fond
Model Checking Contest 2018
8th edition, Bratislava, Slovakia, June 26, 2018
Execution of r117-csrt-152666476500111
Last Updated
June 26, 2018

About the Execution of ITS-Tools.L for LamportFastMutEx-PT-2

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
15755.890 3319.00 7737.00 116.40 F normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Waiting for the VM to be ready (probing ssh)
............................................................................
/home/mcc/execution
total 244K
-rw-r--r-- 1 mcc users 4.5K May 15 18:54 CTLCardinality.txt
-rw-r--r-- 1 mcc users 20K May 15 18:54 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.3K May 15 18:54 CTLFireability.txt
-rw-r--r-- 1 mcc users 28K May 15 18:54 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K May 15 18:50 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.3K May 15 18:50 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 2.7K May 15 18:54 LTLCardinality.txt
-rw-r--r-- 1 mcc users 10K May 15 18:54 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.6K May 15 18:54 LTLFireability.txt
-rw-r--r-- 1 mcc users 11K May 15 18:54 LTLFireability.xml
-rw-r--r-- 1 mcc users 5.3K May 15 18:54 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 24K May 15 18:54 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 112 May 15 18:54 ReachabilityDeadlock.txt
-rw-r--r-- 1 mcc users 350 May 15 18:54 ReachabilityDeadlock.xml
-rw-r--r-- 1 mcc users 3.9K May 15 18:54 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 19K May 15 18:54 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 2.0K May 15 18:54 UpperBounds.txt
-rw-r--r-- 1 mcc users 4.5K May 15 18:54 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 May 15 18:50 equiv_col
-rw-r--r-- 1 mcc users 2 May 15 18:50 instance
-rw-r--r-- 1 mcc users 6 May 15 18:50 iscolored
-rw-r--r-- 1 mcc users 46K May 15 18:50 model.pnml
=====================================================================
Generated by BenchKit 2-3637
Executing tool itstoolsl
Input is LamportFastMutEx-PT-2, examination is ReachabilityDeadlock
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r117-csrt-152666476500111
=====================================================================


--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME LamportFastMutEx-PT-2-ReachabilityDeadlock-0

=== Now, execution of the tool begins

BK_START 1527241920952

Flatten gal took : 105 ms
Constant places removed 6 places and 3 transitions.
Iterating post reduction 0 with 6 rules applied. Total rules applied 6 place count 63 transition count 93
Symmetric choice reduction at 1 with 1 rule applications. Total rules 7 place count 63 transition count 93
Constant places removed 1 places and 4 transitions.
Performed 1 Post agglomeration using F-continuation condition.
Iterating post reduction 1 with 2 rules applied. Total rules applied 9 place count 62 transition count 88
Constant places removed 2 places and 4 transitions.
Iterating post reduction 2 with 2 rules applied. Total rules applied 11 place count 60 transition count 84
Constant places removed 8 places and 6 transitions.
Iterating post reduction 3 with 8 rules applied. Total rules applied 19 place count 52 transition count 78
Constant places removed 4 places and 6 transitions.
Iterating post reduction 4 with 4 rules applied. Total rules applied 23 place count 48 transition count 72
Constant places removed 2 places and 4 transitions.
Iterating post reduction 5 with 2 rules applied. Total rules applied 25 place count 46 transition count 68
Constant places removed 1 places and 3 transitions.
Iterating post reduction 6 with 1 rules applied. Total rules applied 26 place count 45 transition count 65
Constant places removed 1 places and 3 transitions.
Iterating post reduction 7 with 1 rules applied. Total rules applied 27 place count 44 transition count 62
Performed 2 Post agglomeration using F-continuation condition.
Constant places removed 2 places and 0 transitions.
Iterating post reduction 8 with 2 rules applied. Total rules applied 29 place count 42 transition count 60
Applied a total of 29 rules in 15 ms. Remains 42 /69 variables (removed 27) and now considering 60/96 (removed 36) transitions.
Normalized transition count is 54
// Phase 1: matrix 54 rows 42 cols
Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
Converted graph to binary with : CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.louvain.binaries_1.0.0.201805241334/bin/convert-linux64, -i, /tmp/graph3341046912377511828.txt, -o, /tmp/graph3341046912377511828.bin, -w, /tmp/graph3341046912377511828.weights], workingDir=null]
Built communities with : CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.louvain.binaries_1.0.0.201805241334/bin/louvain-linux64, /tmp/graph3341046912377511828.bin, -l, -1, -v, -w, /tmp/graph3341046912377511828.weights, -q, 0, -e, 0.001], workingDir=null]
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
Normalized transition count is 54
// Phase 1: matrix 54 rows 42 cols
invariant :y_0 + y_1 + y_2 = 1
invariant :P_wait_1_1 + -1'P_await_13_1 + P_done_1_1 = 0
invariant :P_wait_2_1 + -1'P_await_13_2 + P_done_2_1 = 0
invariant :P_start_1_1 + P_setx_3_1 + P_setbi_5_1 + P_ify0_4_1 + P_sety_9_1 + P_ifxi_10_1 + P_setbi_11_1 + P_await_13_1 + P_ifyi_15_1 + P_awaity_1 + P_CS_21_1 + P_setbi_24_1 = 1
invariant :P_start_1_2 + P_setx_3_2 + P_setbi_5_2 + P_ify0_4_2 + P_sety_9_2 + P_ifxi_10_2 + P_setbi_11_2 + P_await_13_2 + P_ifyi_15_2 + P_awaity_2 + P_CS_21_2 + P_setbi_24_2 = 1
invariant :x_0 + x_1 + x_2 = 1
invariant :P_wait_1_2 + -1'P_await_13_1 + P_done_1_2 = 0
invariant :P_b_1_false + P_b_1_true = 1
invariant :P_b_2_false + P_b_2_true = 1
invariant :P_wait_2_2 + -1'P_await_13_2 + P_done_2_2 = 0
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805241334/bin/its-ctl-linux64, --gc-threshold, 2000000, --quiet, -i, /home/mcc/execution/ReachabilityDeadlock.pnml.gal, -t, CGAL, -ctl, DEADLOCK], workingDir=/home/mcc/execution]

its-ctl command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805241334/bin/its-ctl-linux64 --gc-threshold 2000000 --quiet -i /home/mcc/execution/ReachabilityDeadlock.pnml.gal -t CGAL -ctl DEADLOCK
No direction supplied, using forward translation only.
built 10 ordering constraints for composite.
built 18 ordering constraints for composite.
built 20 ordering constraints for composite.
built 30 ordering constraints for composite.
built 21 ordering constraints for composite.
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
reachable,348,0.044924,6044,201,99,1979,319,248,3780,82,964,0


Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
dead,0,0.057852,6044,1,0,1979,636,627,3790,334,1683,2608

System contains 0 deadlocks (shown below if less than --print-limit option) !
FORMULA LamportFastMutEx-PT-2-ReachabilityDeadlock-0 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
[ 0 ]
ITS tools runner thread asked to quit. Dying gracefully.
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O3, model.c], workingDir=/home/mcc/execution]
WARNING : LTS min runner thread was asked to interrupt. Dying gracefully.

BK_STOP 1527241924271

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution ReachabilityDeadlock -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -louvain -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -consoleLog -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination ReachabilityDeadlock -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -louvain -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
May 25, 2018 9:52:03 AM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, ReachabilityDeadlock, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -louvain, -smt]
May 25, 2018 9:52:03 AM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
May 25, 2018 9:52:03 AM fr.lip6.move.gal.nupn.PTNetReader loadFromXML
INFO: Load time of PNML (sax parser for PT used): 83 ms
May 25, 2018 9:52:03 AM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 69 places.
May 25, 2018 9:52:03 AM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 96 transitions.
May 25, 2018 9:52:03 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.img.gal : 11 ms
May 25, 2018 9:52:03 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 100 ms
May 25, 2018 9:52:03 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.simple.gal : 4 ms
May 25, 2018 9:52:03 AM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 96 transitions.
May 25, 2018 9:52:03 AM fr.lip6.move.gal.application.MccTranslator applyOrder
INFO: Applying decomposition
May 25, 2018 9:52:03 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 11 ms
May 25, 2018 9:52:03 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 10 ms
May 25, 2018 9:52:03 AM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 60 transitions.
Begin: Fri May 25 09:52:03 2018

Computation of communities with the Newman-Girvan Modularity quality function

level 0:
start computation: Fri May 25 09:52:03 2018
network size: 42 nodes, 264 links, 120 weight
quality increased from -0.0282407 to 0.346174
end computation: Fri May 25 09:52:03 2018
level 1:
start computation: Fri May 25 09:52:03 2018
network size: 11 nodes, 77 links, 120 weight
quality increased from 0.346174 to 0.412257
end computation: Fri May 25 09:52:03 2018
level 2:
start computation: Fri May 25 09:52:03 2018
network size: 4 nodes, 16 links, 120 weight
quality increased from 0.412257 to 0.412257
end computation: Fri May 25 09:52:03 2018
End: Fri May 25 09:52:03 2018
Total duration: 0 sec
0.412257
May 25, 2018 9:52:03 AM fr.lip6.move.gal.instantiate.CompositeBuilder decomposeWithOrder
INFO: Decomposing Gal with order
May 25, 2018 9:52:03 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 23 ms
May 25, 2018 9:52:03 AM fr.lip6.move.gal.instantiate.CompositeBuilder rewriteArraysToAllowPartition
INFO: Rewriting arrays to variables to allow decomposition.
May 25, 2018 9:52:03 AM fr.lip6.move.gal.instantiate.Instantiator fuseIsomorphicEffects
INFO: Removed a total of 46 redundant transitions.
May 25, 2018 9:52:03 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/ReachabilityDeadlock.pnml.gal : 6 ms
May 25, 2018 9:52:03 AM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 10 place invariants in 6 ms
May 25, 2018 9:52:04 AM fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver checkSat
WARNING: SMT solver unexpectedly returned 'unknown' answer, retrying.
Skipping mayMatrices nes/nds SMT solver raised an exception or timeout :(error "Failed to check-sat")
java.lang.RuntimeException: SMT solver raised an exception or timeout :(error "Failed to check-sat")
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:297)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:305)
at fr.lip6.move.gal.gal2smt.bmc.KInductionSolver.init(KInductionSolver.java:116)
at fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver.init(NecessaryEnablingsolver.java:71)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.printLabels(Gal2PinsTransformerNext.java:471)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.printDependencyMatrix(Gal2PinsTransformerNext.java:209)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.buildBodyFile(Gal2PinsTransformerNext.java:85)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.transform(Gal2PinsTransformerNext.java:830)
at fr.lip6.move.gal.application.LTSminRunner$1.run(LTSminRunner.java:71)
at java.lang.Thread.run(Thread.java:748)
May 25, 2018 9:52:04 AM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 268ms conformant to PINS in folder :/home/mcc/execution

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="LamportFastMutEx-PT-2"
export BK_EXAMINATION="ReachabilityDeadlock"
export BK_TOOL="itstoolsl"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

tar xzf /home/mcc/BenchKit/INPUTS/LamportFastMutEx-PT-2.tgz
mv LamportFastMutEx-PT-2 execution
cd execution
pwd
ls -lh

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3637"
echo " Executing tool itstoolsl"
echo " Input is LamportFastMutEx-PT-2, examination is ReachabilityDeadlock"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r117-csrt-152666476500111"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityDeadlock" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityDeadlock" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityDeadlock.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityDeadlock.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityDeadlock.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' ReachabilityDeadlock.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;