Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Waiting for the VM to be ready (probing ssh)
....................
/home/mcc/execution
total 204K
-rw-r--r-- 1 mcc users 3.4K May 15 18:54 CTLCardinality.txt
-rw-r--r-- 1 mcc users 18K May 15 18:54 CTLCardinality.xml
-rw-r--r-- 1 mcc users 2.6K May 15 18:54 CTLFireability.txt
-rw-r--r-- 1 mcc users 15K May 15 18:54 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K May 15 18:50 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.3K May 15 18:50 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 2.5K May 15 18:54 LTLCardinality.txt
-rw-r--r-- 1 mcc users 11K May 15 18:54 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.1K May 15 18:54 LTLFireability.txt
-rw-r--r-- 1 mcc users 11K May 15 18:54 LTLFireability.xml
-rw-r--r-- 1 mcc users 3.9K May 15 18:54 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 19K May 15 18:54 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 113 May 15 18:54 ReachabilityDeadlock.txt
-rw-r--r-- 1 mcc users 351 May 15 18:54 ReachabilityDeadlock.xml
-rw-r--r-- 1 mcc users 2.8K May 15 18:54 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 15K May 15 18:54 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.7K May 15 18:54 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.8K May 15 18:54 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 May 15 18:50 equiv_pt
-rw-r--r-- 1 mcc users 2 May 15 18:50 instance
-rw-r--r-- 1 mcc users 5 May 15 18:50 iscolored
-rw-r--r-- 1 mcc users 43K May 15 18:50 model.pnml
=====================================================================
Generated by BenchKit 2-3637
Executing tool itstoolsl
Input is LamportFastMutEx-COL-7, examination is ReachabilityDeadlock
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r117-csrt-152666476500097
=====================================================================

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME LamportFastMutEx-COL-7-ReachabilityDeadlock-0

=== Now, execution of the tool begins

BK_START 1527241153625

09:39:16.149 [main] ERROR PNML validation - The rng grammar file can't be accessed : www.pnml.org
09:39:16.152 [main] ERROR import - Grammar file errors have been raised, the validation can't be done, process will continue without Grammar validation
Flatten gal took : 391 ms
Constant places removed 16 places and 8 transitions.
Iterating post reduction 0 with 16 rules applied. Total rules applied 16 place count 248 transition count 528
Symmetric choice reduction at 1 with 1 rule applications. Total rules 17 place count 248 transition count 528
Constant places removed 1 places and 4 transitions.
Performed 1 Post agglomeration using F-continuation condition.
Iterating post reduction 1 with 2 rules applied. Total rules applied 19 place count 247 transition count 523
Constant places removed 2 places and 4 transitions.
Iterating post reduction 2 with 2 rules applied. Total rules applied 21 place count 245 transition count 519
Constant places removed 13 places and 16 transitions.
Iterating post reduction 3 with 13 rules applied. Total rules applied 34 place count 232 transition count 503
Constant places removed 9 places and 16 transitions.
Iterating post reduction 4 with 9 rules applied. Total rules applied 43 place count 223 transition count 487
Constant places removed 2 places and 9 transitions.
Iterating post reduction 5 with 2 rules applied. Total rules applied 45 place count 221 transition count 478
Constant places removed 1 places and 8 transitions.
Iterating post reduction 6 with 1 rules applied. Total rules applied 46 place count 220 transition count 470
Constant places removed 1 places and 8 transitions.
Iterating post reduction 7 with 1 rules applied. Total rules applied 47 place count 219 transition count 462
Performed 7 Post agglomeration using F-continuation condition.
Constant places removed 7 places and 0 transitions.
Iterating post reduction 8 with 7 rules applied. Total rules applied 54 place count 212 transition count 455
Applied a total of 54 rules in 84 ms. Remains 212 /264 variables (removed 52) and now considering 455/536 (removed 81) transitions.
Normalized transition count is 329
// Phase 1: matrix 329 rows 212 cols
Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805241334/bin/its-ctl-linux64, --gc-threshold, 2000000, --quiet, -i, /home/mcc/execution/ReachabilityDeadlock.pnml.gal, -t, CGAL, -ctl, DEADLOCK], workingDir=/home/mcc/execution]
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
Normalized transition count is 329
// Phase 1: matrix 329 rows 212 cols

its-ctl command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805241334/bin/its-ctl-linux64 --gc-threshold 2000000 --quiet -i /home/mcc/execution/ReachabilityDeadlock.pnml.gal -t CGAL -ctl DEADLOCK
invariant :wait_19 + -1'P_await_13_2 + done_19 = 0
invariant :wait_20 + -1'P_await_13_2 + done_20 = 0
invariant :b_12 + b_13 = 1
invariant :wait_21 + -1'P_await_13_2 + done_21 = 0
invariant :wait_17 + -1'P_await_13_2 + done_17 = 0
invariant :wait_34 + -1'P_await_13_4 + done_34 = 0
invariant :b_6 + b_7 = 1
invariant :wait_25 + -1'P_await_13_3 + done_25 = 0
invariant :wait_33 + -1'P_await_13_4 + done_33 = 0
invariant :wait_15 + -1'P_await_13_1 + done_15 = 0
invariant :wait_29 + -1'P_await_13_3 + done_29 = 0
invariant :wait_57 + -1'P_await_13_7 + done_57 = 0
invariant :wait_51 + -1'P_await_13_6 + done_51 = 0
invariant :wait_13 + -1'P_await_13_1 + done_13 = 0
invariant :wait_54 + -1'P_await_13_6 + done_54 = 0
invariant :wait_58 + -1'P_await_13_7 + done_58 = 0
invariant :x_0 + x_1 + x_2 + x_3 + x_4 + x_5 + x_6 + x_7 = 1
invariant :wait_53 + -1'P_await_13_6 + done_53 = 0
invariant :P_start_1_3 + P_setx_3_3 + P_setbi_5_3 + P_ify0_4_3 + P_sety_9_3 + P_ifxi_10_3 + P_setbi_11_3 + P_await_13_3 + P_ifyi_15_3 + P_awaity_3 + P_CS_21_3 + P_setbi_24_3 = 1
invariant :wait_39 + -1'P_await_13_4 + done_39 = 0
invariant :b_2 + b_3 = 1
invariant :P_start_1_5 + P_setx_3_5 + P_setbi_5_5 + P_ify0_4_5 + P_sety_9_5 + P_ifxi_10_5 + P_setbi_11_5 + P_await_13_5 + P_ifyi_15_5 + P_awaity_5 + P_CS_21_5 + P_setbi_24_5 = 1
invariant :wait_26 + -1'P_await_13_3 + done_26 = 0
invariant :wait_11 + -1'P_await_13_1 + done_11 = 0
invariant :wait_43 + -1'P_await_13_5 + done_43 = 0
invariant :b_14 + b_15 = 1
invariant :P_start_1_4 + P_setx_3_4 + P_setbi_5_4 + P_ify0_4_4 + P_sety_9_4 + P_ifxi_10_4 + P_setbi_11_4 + P_await_13_4 + P_ifyi_15_4 + P_awaity_4 + P_CS_21_4 + P_setbi_24_4 = 1
invariant :wait_63 + -1'P_await_13_7 + done_63 = 0
invariant :wait_55 + -1'P_await_13_6 + done_55 = 0
invariant :y_0 + y_1 + y_2 + y_3 + y_4 + y_5 + y_6 + y_7 = 1
invariant :wait_60 + -1'P_await_13_7 + done_60 = 0
invariant :wait_47 + -1'P_await_13_5 + done_47 = 0
invariant :wait_12 + -1'P_await_13_1 + done_12 = 0
invariant :P_start_1_6 + P_setx_3_6 + P_setbi_5_6 + P_ify0_4_6 + P_sety_9_6 + P_ifxi_10_6 + P_setbi_11_6 + P_await_13_6 + P_ifyi_15_6 + P_awaity_6 + P_CS_21_6 + P_setbi_24_6 = 1
invariant :P_start_1_7 + P_setx_3_7 + P_setbi_5_7 + P_ify0_4_7 + P_sety_9_7 + P_ifxi_10_7 + P_setbi_11_7 + P_await_13_7 + P_ifyi_15_7 + P_awaity_7 + P_CS_21_7 + P_setbi_24_7 = 1
invariant :wait_38 + -1'P_await_13_4 + done_38 = 0
invariant :wait_30 + -1'P_await_13_3 + done_30 = 0
invariant :wait_28 + -1'P_await_13_3 + done_28 = 0
invariant :wait_27 + -1'P_await_13_3 + done_27 = 0
invariant :wait_36 + -1'P_await_13_4 + done_36 = 0
invariant :wait_61 + -1'P_await_13_7 + done_61 = 0
invariant :wait_45 + -1'P_await_13_5 + done_45 = 0
invariant :b_10 + b_11 = 1
invariant :wait_52 + -1'P_await_13_6 + done_52 = 0
invariant :P_start_1_1 + P_setx_3_1 + P_setbi_5_1 + P_ify0_4_1 + P_sety_9_1 + P_ifxi_10_1 + P_setbi_11_1 + P_await_13_1 + P_ifyi_15_1 + P_awaity_1 + P_CS_21_1 + P_setbi_24_1 = 1
invariant :b_4 + b_5 = 1
invariant :wait_46 + -1'P_await_13_5 + done_46 = 0
invariant :wait_62 + -1'P_await_13_7 + done_62 = 0
invariant :wait_49 + -1'P_await_13_6 + done_49 = 0
invariant :wait_50 + -1'P_await_13_6 + done_50 = 0
invariant :b_8 + b_9 = 1
invariant :wait_31 + -1'P_await_13_3 + done_31 = 0
invariant :wait_35 + -1'P_await_13_4 + done_35 = 0
invariant :wait_14 + -1'P_await_13_1 + done_14 = 0
invariant :wait_9 + -1'P_await_13_1 + done_9 = 0
invariant :wait_41 + -1'P_await_13_5 + done_41 = 0
invariant :wait_44 + -1'P_await_13_5 + done_44 = 0
invariant :wait_59 + -1'P_await_13_7 + done_59 = 0
invariant :wait_23 + -1'P_await_13_2 + done_23 = 0
invariant :wait_18 + -1'P_await_13_2 + done_18 = 0
invariant :wait_37 + -1'P_await_13_4 + done_37 = 0
invariant :wait_22 + -1'P_await_13_2 + done_22 = 0
invariant :wait_10 + -1'P_await_13_1 + done_10 = 0
invariant :wait_42 + -1'P_await_13_5 + done_42 = 0
invariant :P_start_1_2 + P_setx_3_2 + P_setbi_5_2 + P_ify0_4_2 + P_sety_9_2 + P_ifxi_10_2 + P_setbi_11_2 + P_await_13_2 + P_ifyi_15_2 + P_awaity_2 + P_CS_21_2 + P_setbi_24_2 = 1
No direction supplied, using forward translation only.
built 140 ordering constraints for composite.
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O3, model.c], workingDir=/home/mcc/execution]
Compilation finished in 7015 ms.
Running link step : CommandLine [args=[gcc, -shared, -o, gal.so, model.o], workingDir=/home/mcc/execution]
Link finished in 111 ms.
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -d], workingDir=/home/mcc/execution]
sparsehash FATAL ERROR: failed to allocate 41 groups

BK_TIME_CONFINEMENT_REACHED

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution ReachabilityDeadlock -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -louvain -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -consoleLog -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination ReachabilityDeadlock -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -louvain -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
May 25, 2018 9:39:15 AM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, ReachabilityDeadlock, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -louvain, -smt]
May 25, 2018 9:39:15 AM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
May 25, 2018 9:39:15 AM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Detected file is not PT type :http://www.pnml.org/version-2009/grammar/symmetricnet
May 25, 2018 9:39:16 AM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Load time of PNML (colored model parsed with PNMLFW) : 897 ms
May 25, 2018 9:39:16 AM fr.lip6.move.gal.pnml.togal.HLGALTransformer handlePage
INFO: Transformed 18 places.
May 25, 2018 9:39:16 AM fr.lip6.move.gal.pnml.togal.HLGALTransformer handlePage
INFO: Computed order using colors.
May 25, 2018 9:39:16 AM fr.lip6.move.gal.pnml.togal.HLGALTransformer handlePage
INFO: sort/places :pid * pid->wait,done,
pid * bool->b,
pid->P-start_1,x,y,P-setx_3,P-setbi_5,P-ify0_4,P-sety_9,P-ifxi_10,P-setbi_11,P-fordo_12,P-await_13,P-ifyi_15,P-awaity,P-CS_21,P-setbi_24,

May 25, 2018 9:39:16 AM fr.lip6.move.gal.pnml.togal.HLGALTransformer handlePage
INFO: Transformed 17 transitions.
May 25, 2018 9:39:16 AM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Computed order based on color domains.
May 25, 2018 9:39:16 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.img.gal : 8 ms
May 25, 2018 9:39:16 AM fr.lip6.move.gal.instantiate.Instantiator fuseEqualParameters
INFO: Fused parameters : $i and $y of transition T_yeqi_15
May 25, 2018 9:39:16 AM fr.lip6.move.gal.instantiate.Instantiator fuseEqualParameters
INFO: Fused parameters : $i and $x of transition T_xeqi_10
May 25, 2018 9:39:16 AM fr.lip6.move.gal.instantiate.Instantiator instantiateParameters
INFO: On-the-fly reduction of False transitions avoided exploring 17.0 instantiations of transitions. Total transitions/syncs built is 499
May 25, 2018 9:39:16 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 218 ms
May 25, 2018 9:39:17 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.simple.gal : 30 ms
May 25, 2018 9:39:17 AM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was not deterministic with 84 transitions. Expanding to a total of 619 deterministic transitions.
May 25, 2018 9:39:17 AM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Determinization took 8 ms.
May 25, 2018 9:39:18 AM fr.lip6.move.gal.application.MccTranslator applyOrder
INFO: Applying decomposition
May 25, 2018 9:39:18 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 108 ms
May 25, 2018 9:39:18 AM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 455 transitions.
May 25, 2018 9:39:18 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 111 ms
May 25, 2018 9:39:18 AM fr.lip6.move.gal.instantiate.CompositeBuilder decomposeWithOrder
INFO: Decomposing Gal with order
May 25, 2018 9:39:18 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 60 ms
May 25, 2018 9:39:18 AM fr.lip6.move.gal.instantiate.CompositeBuilder rewriteArraysToAllowPartition
INFO: Rewriting arrays to variables to allow decomposition.
May 25, 2018 9:39:18 AM fr.lip6.move.gal.instantiate.Instantiator fuseIsomorphicEffects
INFO: Removed a total of 772 redundant transitions.
May 25, 2018 9:39:18 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/ReachabilityDeadlock.pnml.gal : 7 ms
May 25, 2018 9:39:19 AM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 65 place invariants in 151 ms
May 25, 2018 9:39:21 AM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 212 variables to be positive in 2839 ms
May 25, 2018 9:39:21 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may disable matrix : 455 transitions.
May 25, 2018 9:39:21 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of disable matrix completed :0/455 took 7 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 25, 2018 9:39:21 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete disable matrix. took 51 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 25, 2018 9:39:21 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may enable matrix : 455 transitions.
May 25, 2018 9:39:21 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete enable matrix. took 18 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 25, 2018 9:39:21 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeCoEnablingMatrix
INFO: Computing symmetric co enabling matrix : 455 transitions.
May 25, 2018 9:39:24 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(3/455) took 3196 ms. Total solver calls (SAT/UNSAT): 280(24/256)
May 25, 2018 9:39:28 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(11/455) took 6711 ms. Total solver calls (SAT/UNSAT): 835(42/793)
May 25, 2018 9:39:32 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(18/455) took 10846 ms. Total solver calls (SAT/UNSAT): 1753(92/1661)
May 25, 2018 9:39:35 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(34/455) took 13886 ms. Total solver calls (SAT/UNSAT): 4081(231/3850)
May 25, 2018 9:39:38 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(54/455) took 16893 ms. Total solver calls (SAT/UNSAT): 6631(414/6217)
May 25, 2018 9:39:41 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(88/455) took 19973 ms. Total solver calls (SAT/UNSAT): 12898(950/11948)
May 25, 2018 9:39:45 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(111/455) took 23223 ms. Total solver calls (SAT/UNSAT): 18004(1428/16576)
May 25, 2018 9:39:48 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(140/455) took 26254 ms. Total solver calls (SAT/UNSAT): 21768(1830/19938)
May 25, 2018 9:39:51 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(176/455) took 29288 ms. Total solver calls (SAT/UNSAT): 28086(2408/25678)
May 25, 2018 9:39:54 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(208/455) took 32426 ms. Total solver calls (SAT/UNSAT): 32326(2814/29512)
May 25, 2018 9:39:57 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(226/455) took 36054 ms. Total solver calls (SAT/UNSAT): 33559(2876/30683)
May 25, 2018 9:40:01 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(237/455) took 39321 ms. Total solver calls (SAT/UNSAT): 34153(2916/31237)
May 25, 2018 9:40:05 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(249/455) took 43379 ms. Total solver calls (SAT/UNSAT): 34663(2958/31705)
May 25, 2018 9:40:08 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(253/455) took 47015 ms. Total solver calls (SAT/UNSAT): 34805(2986/31819)
May 25, 2018 9:40:12 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(261/455) took 50327 ms. Total solver calls (SAT/UNSAT): 35079(3070/32009)
May 25, 2018 9:40:15 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(267/455) took 53812 ms. Total solver calls (SAT/UNSAT): 35280(3127/32153)
May 25, 2018 9:40:18 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(277/455) took 56890 ms. Total solver calls (SAT/UNSAT): 35597(3208/32389)
May 25, 2018 9:40:22 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(284/455) took 60336 ms. Total solver calls (SAT/UNSAT): 35812(3257/32555)
May 25, 2018 9:40:26 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(294/455) took 64482 ms. Total solver calls (SAT/UNSAT): 36107(3314/32793)
May 25, 2018 9:40:29 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(302/455) took 67491 ms. Total solver calls (SAT/UNSAT): 36316(3339/32977)
May 25, 2018 9:40:32 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(315/455) took 70900 ms. Total solver calls (SAT/UNSAT): 37321(3414/33907)
May 25, 2018 9:40:35 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(316/455) took 74004 ms. Total solver calls (SAT/UNSAT): 37429(3425/34004)
May 25, 2018 9:40:40 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(319/455) took 79084 ms. Total solver calls (SAT/UNSAT): 37747(3452/34295)
May 25, 2018 9:40:44 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(329/455) took 82440 ms. Total solver calls (SAT/UNSAT): 38742(3549/35193)
May 25, 2018 9:40:49 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(336/455) took 87346 ms. Total solver calls (SAT/UNSAT): 39379(3615/35764)
May 25, 2018 9:40:52 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(380/455) took 90371 ms. Total solver calls (SAT/UNSAT): 42027(3879/38148)
May 25, 2018 9:40:55 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(417/455) took 93418 ms. Total solver calls (SAT/UNSAT): 43174(3989/39185)
May 25, 2018 9:40:58 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Finished co-enabling matrix. took 96384 ms. Total solver calls (SAT/UNSAT): 43288(4011/39277)
May 25, 2018 9:40:58 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeDoNotAccord
INFO: Computing Do-Not-Accords matrix : 455 transitions.
May 25, 2018 9:40:58 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed DNA matrix. took 27 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 25, 2018 9:40:58 AM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 99904ms conformant to PINS in folder :/home/mcc/execution
ITS-tools command line returned an error code 1

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="LamportFastMutEx-COL-7"
export BK_EXAMINATION="ReachabilityDeadlock"
export BK_TOOL="itstoolsl"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

tar xzf /home/mcc/BenchKit/INPUTS/LamportFastMutEx-COL-7.tgz
mv LamportFastMutEx-COL-7 execution
cd execution
pwd
ls -lh

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3637"
echo " Executing tool itstoolsl"
echo " Input is LamportFastMutEx-COL-7, examination is ReachabilityDeadlock"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r117-csrt-152666476500097"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityDeadlock" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityDeadlock" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityDeadlock.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityDeadlock.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityDeadlock.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' ReachabilityDeadlock.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;