Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Waiting for the VM to be ready (probing ssh)
....................
/home/mcc/execution
total 204K
-rw-r--r-- 1 mcc users 3.3K May 15 18:54 CTLCardinality.txt
-rw-r--r-- 1 mcc users 17K May 15 18:54 CTLCardinality.xml
-rw-r--r-- 1 mcc users 2.6K May 15 18:54 CTLFireability.txt
-rw-r--r-- 1 mcc users 15K May 15 18:54 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K May 15 18:50 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.3K May 15 18:50 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 2.6K May 15 18:54 LTLCardinality.txt
-rw-r--r-- 1 mcc users 12K May 15 18:54 LTLCardinality.xml
-rw-r--r-- 1 mcc users 1.9K May 15 18:54 LTLFireability.txt
-rw-r--r-- 1 mcc users 8.1K May 15 18:54 LTLFireability.xml
-rw-r--r-- 1 mcc users 3.9K May 15 18:54 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 20K May 15 18:54 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 113 May 15 18:54 ReachabilityDeadlock.txt
-rw-r--r-- 1 mcc users 351 May 15 18:54 ReachabilityDeadlock.xml
-rw-r--r-- 1 mcc users 2.7K May 15 18:54 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 14K May 15 18:54 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.7K May 15 18:54 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.8K May 15 18:54 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 May 15 18:50 equiv_pt
-rw-r--r-- 1 mcc users 2 May 15 18:50 instance
-rw-r--r-- 1 mcc users 5 May 15 18:50 iscolored
-rw-r--r-- 1 mcc users 42K May 15 18:50 model.pnml
=====================================================================
Generated by BenchKit 2-3637
Executing tool itstoolsl
Input is LamportFastMutEx-COL-6, examination is ReachabilityDeadlock
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r117-csrt-152666476500090
=====================================================================

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME LamportFastMutEx-COL-6-ReachabilityDeadlock-0

=== Now, execution of the tool begins

BK_START 1527240533460

09:28:56.481 [main] ERROR PNML validation - The rng grammar file can't be accessed : www.pnml.org
09:28:56.484 [main] ERROR import - Grammar file errors have been raised, the validation can't be done, process will continue without Grammar validation
Flatten gal took : 480 ms
Constant places removed 14 places and 7 transitions.
Iterating post reduction 0 with 14 rules applied. Total rules applied 14 place count 203 transition count 413
Symmetric choice reduction at 1 with 1 rule applications. Total rules 15 place count 203 transition count 413
Constant places removed 1 places and 4 transitions.
Performed 1 Post agglomeration using F-continuation condition.
Iterating post reduction 1 with 2 rules applied. Total rules applied 17 place count 202 transition count 408
Constant places removed 2 places and 4 transitions.
Iterating post reduction 2 with 2 rules applied. Total rules applied 19 place count 200 transition count 404
Constant places removed 12 places and 14 transitions.
Iterating post reduction 3 with 12 rules applied. Total rules applied 31 place count 188 transition count 390
Constant places removed 8 places and 14 transitions.
Iterating post reduction 4 with 8 rules applied. Total rules applied 39 place count 180 transition count 376
Constant places removed 2 places and 8 transitions.
Iterating post reduction 5 with 2 rules applied. Total rules applied 41 place count 178 transition count 368
Constant places removed 1 places and 7 transitions.
Iterating post reduction 6 with 1 rules applied. Total rules applied 42 place count 177 transition count 361
Constant places removed 1 places and 7 transitions.
Iterating post reduction 7 with 1 rules applied. Total rules applied 43 place count 176 transition count 354
Performed 6 Post agglomeration using F-continuation condition.
Constant places removed 6 places and 0 transitions.
Iterating post reduction 8 with 6 rules applied. Total rules applied 49 place count 170 transition count 348
Applied a total of 49 rules in 56 ms. Remains 170 /217 variables (removed 47) and now considering 348/420 (removed 72) transitions.
Normalized transition count is 258
// Phase 1: matrix 258 rows 170 cols
Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
Normalized transition count is 258
// Phase 1: matrix 258 rows 170 cols
invariant :wait_9 + -1'P_await_13_1 + done_9 = 0
invariant :wait_46 + -1'P_await_13_6 + done_46 = 0
invariant :wait_27 + -1'P_await_13_3 + done_27 = 0
invariant :wait_15 + -1'P_await_13_2 + done_15 = 0
invariant :b_6 + b_7 = 1
invariant :P_start_1_3 + P_setx_3_3 + P_setbi_5_3 + P_ify0_4_3 + P_sety_9_3 + P_ifxi_10_3 + P_setbi_11_3 + P_await_13_3 + P_ifyi_15_3 + P_awaity_3 + P_CS_21_3 + P_setbi_24_3 = 1
invariant :wait_17 + -1'P_await_13_2 + done_17 = 0
invariant :wait_11 + -1'P_await_13_1 + done_11 = 0
invariant :wait_16 + -1'P_await_13_2 + done_16 = 0
invariant :wait_40 + -1'P_await_13_5 + done_40 = 0
invariant :wait_47 + -1'P_await_13_6 + done_47 = 0
invariant :b_4 + b_5 = 1
invariant :wait_30 + -1'P_await_13_4 + done_30 = 0
invariant :wait_24 + -1'P_await_13_3 + done_24 = 0
invariant :wait_8 + -1'P_await_13_1 + done_8 = 0
invariant :b_12 + b_13 = 1
invariant :wait_12 + -1'P_await_13_1 + done_12 = 0
invariant :P_start_1_5 + P_setx_3_5 + P_setbi_5_5 + P_ify0_4_5 + P_sety_9_5 + P_ifxi_10_5 + P_setbi_11_5 + P_await_13_5 + P_ifyi_15_5 + P_awaity_5 + P_CS_21_5 + P_setbi_24_5 = 1
invariant :wait_45 + -1'P_await_13_6 + done_45 = 0
invariant :b_2 + b_3 = 1
invariant :y_0 + y_1 + y_2 + y_3 + y_4 + y_5 + y_6 = 1
invariant :wait_10 + -1'P_await_13_1 + done_10 = 0
invariant :wait_25 + -1'P_await_13_3 + done_25 = 0
invariant :wait_18 + -1'P_await_13_2 + done_18 = 0
invariant :P_start_1_2 + P_setx_3_2 + P_setbi_5_2 + P_ify0_4_2 + P_sety_9_2 + P_ifxi_10_2 + P_setbi_11_2 + P_await_13_2 + P_ifyi_15_2 + P_awaity_2 + P_CS_21_2 + P_setbi_24_2 = 1
invariant :wait_20 + -1'P_await_13_2 + done_20 = 0
invariant :wait_22 + -1'P_await_13_3 + done_22 = 0
invariant :wait_23 + -1'P_await_13_3 + done_23 = 0
invariant :wait_48 + -1'P_await_13_6 + done_48 = 0
invariant :wait_13 + -1'P_await_13_1 + done_13 = 0
invariant :P_start_1_1 + P_setx_3_1 + P_setbi_5_1 + P_ify0_4_1 + P_sety_9_1 + P_ifxi_10_1 + P_setbi_11_1 + P_await_13_1 + P_ifyi_15_1 + P_awaity_1 + P_CS_21_1 + P_setbi_24_1 = 1
invariant :wait_29 + -1'P_await_13_4 + done_29 = 0
invariant :wait_34 + -1'P_await_13_4 + done_34 = 0
invariant :wait_44 + -1'P_await_13_6 + done_44 = 0
invariant :wait_37 + -1'P_await_13_5 + done_37 = 0
invariant :wait_19 + -1'P_await_13_2 + done_19 = 0
invariant :wait_26 + -1'P_await_13_3 + done_26 = 0
invariant :P_start_1_6 + P_setx_3_6 + P_setbi_5_6 + P_ify0_4_6 + P_sety_9_6 + P_ifxi_10_6 + P_setbi_11_6 + P_await_13_6 + P_ifyi_15_6 + P_awaity_6 + P_CS_21_6 + P_setbi_24_6 = 1
invariant :P_start_1_4 + P_setx_3_4 + P_setbi_5_4 + P_ify0_4_4 + P_sety_9_4 + P_ifxi_10_4 + P_setbi_11_4 + P_await_13_4 + P_ifyi_15_4 + P_awaity_4 + P_CS_21_4 + P_setbi_24_4 = 1
invariant :wait_43 + -1'P_await_13_6 + done_43 = 0
invariant :x_0 + x_1 + x_2 + x_3 + x_4 + x_5 + x_6 = 1
invariant :wait_31 + -1'P_await_13_4 + done_31 = 0
invariant :wait_38 + -1'P_await_13_5 + done_38 = 0
invariant :wait_41 + -1'P_await_13_5 + done_41 = 0
invariant :b_10 + b_11 = 1
invariant :wait_33 + -1'P_await_13_4 + done_33 = 0
invariant :wait_36 + -1'P_await_13_5 + done_36 = 0
invariant :wait_32 + -1'P_await_13_4 + done_32 = 0
invariant :b_8 + b_9 = 1
invariant :wait_39 + -1'P_await_13_5 + done_39 = 0
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805241334/bin/its-ctl-linux64, --gc-threshold, 2000000, --quiet, -i, /home/mcc/execution/ReachabilityDeadlock.pnml.gal, -t, CGAL, -ctl, DEADLOCK], workingDir=/home/mcc/execution]

its-ctl command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805241334/bin/its-ctl-linux64 --gc-threshold 2000000 --quiet -i /home/mcc/execution/ReachabilityDeadlock.pnml.gal -t CGAL -ctl DEADLOCK
No direction supplied, using forward translation only.
built 108 ordering constraints for composite.
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O3, model.c], workingDir=/home/mcc/execution]
Compilation finished in 5740 ms.
Running link step : CommandLine [args=[gcc, -shared, -o, gal.so, model.o], workingDir=/home/mcc/execution]
Link finished in 165 ms.
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -d], workingDir=/home/mcc/execution]
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
reachable,5.08304e+11,459.833,4622360,429782,292,7.80371e+06,1220,627,1.22708e+07,80,19621,0


Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
dead,0,572.642,4622360,1,0,7.80371e+06,7010,2596,1.22708e+07,314,60253,19885285

System contains 0 deadlocks (shown below if less than --print-limit option) !
FORMULA LamportFastMutEx-COL-6-ReachabilityDeadlock-0 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
[ 0 ]
WARNING : LTS min runner thread was asked to interrupt. Dying gracefully.

BK_STOP 1527241113683

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution ReachabilityDeadlock -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -louvain -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -consoleLog -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination ReachabilityDeadlock -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -louvain -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
May 25, 2018 9:28:55 AM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, ReachabilityDeadlock, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -louvain, -smt]
May 25, 2018 9:28:55 AM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
May 25, 2018 9:28:55 AM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Detected file is not PT type :http://www.pnml.org/version-2009/grammar/symmetricnet
May 25, 2018 9:28:56 AM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Load time of PNML (colored model parsed with PNMLFW) : 1037 ms
May 25, 2018 9:28:56 AM fr.lip6.move.gal.pnml.togal.HLGALTransformer handlePage
INFO: Transformed 18 places.
May 25, 2018 9:28:56 AM fr.lip6.move.gal.pnml.togal.HLGALTransformer handlePage
INFO: Computed order using colors.
May 25, 2018 9:28:56 AM fr.lip6.move.gal.pnml.togal.HLGALTransformer handlePage
INFO: sort/places :pid * pid->wait,done,
pid * bool->b,
pid->P-start_1,x,y,P-setx_3,P-setbi_5,P-ify0_4,P-sety_9,P-ifxi_10,P-setbi_11,P-fordo_12,P-await_13,P-ifyi_15,P-awaity,P-CS_21,P-setbi_24,

May 25, 2018 9:28:57 AM fr.lip6.move.gal.pnml.togal.HLGALTransformer handlePage
INFO: Transformed 17 transitions.
May 25, 2018 9:28:57 AM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Computed order based on color domains.
May 25, 2018 9:28:57 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.img.gal : 9 ms
May 25, 2018 9:28:57 AM fr.lip6.move.gal.instantiate.Instantiator fuseEqualParameters
INFO: Fused parameters : $i and $y of transition T_yeqi_15
May 25, 2018 9:28:57 AM fr.lip6.move.gal.instantiate.Instantiator fuseEqualParameters
INFO: Fused parameters : $i and $x of transition T_xeqi_10
May 25, 2018 9:28:57 AM fr.lip6.move.gal.instantiate.Instantiator instantiateParameters
INFO: On-the-fly reduction of False transitions avoided exploring 15.0 instantiations of transitions. Total transitions/syncs built is 423
May 25, 2018 9:28:57 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 258 ms
May 25, 2018 9:28:57 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.simple.gal : 15 ms
May 25, 2018 9:28:57 AM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was not deterministic with 95 transitions. Expanding to a total of 514 deterministic transitions.
May 25, 2018 9:28:57 AM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Determinization took 6 ms.
May 25, 2018 9:28:58 AM fr.lip6.move.gal.application.MccTranslator applyOrder
INFO: Applying decomposition
May 25, 2018 9:28:58 AM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 348 transitions.
May 25, 2018 9:28:58 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 119 ms
May 25, 2018 9:28:58 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 93 ms
May 25, 2018 9:28:58 AM fr.lip6.move.gal.instantiate.CompositeBuilder decomposeWithOrder
INFO: Decomposing Gal with order
May 25, 2018 9:28:58 AM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 50 place invariants in 26 ms
May 25, 2018 9:28:58 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 57 ms
May 25, 2018 9:28:58 AM fr.lip6.move.gal.instantiate.CompositeBuilder rewriteArraysToAllowPartition
INFO: Rewriting arrays to variables to allow decomposition.
May 25, 2018 9:28:58 AM fr.lip6.move.gal.instantiate.Instantiator fuseIsomorphicEffects
INFO: Removed a total of 565 redundant transitions.
May 25, 2018 9:28:58 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/ReachabilityDeadlock.pnml.gal : 4 ms
May 25, 2018 9:28:58 AM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 170 variables to be positive in 495 ms
May 25, 2018 9:28:58 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may disable matrix : 348 transitions.
May 25, 2018 9:28:58 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of disable matrix completed :0/348 took 1 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 25, 2018 9:28:58 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete disable matrix. took 40 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 25, 2018 9:28:58 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may enable matrix : 348 transitions.
May 25, 2018 9:28:58 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete enable matrix. took 24 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 25, 2018 9:28:58 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeCoEnablingMatrix
INFO: Computing symmetric co enabling matrix : 348 transitions.
May 25, 2018 9:29:01 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(45/348) took 3033 ms. Total solver calls (SAT/UNSAT): 4427(289/4138)
May 25, 2018 9:29:05 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(72/348) took 6775 ms. Total solver calls (SAT/UNSAT): 8623(680/7943)
May 25, 2018 9:29:09 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(83/348) took 10330 ms. Total solver calls (SAT/UNSAT): 10482(870/9612)
May 25, 2018 9:29:12 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(97/348) took 13352 ms. Total solver calls (SAT/UNSAT): 11817(995/10822)
May 25, 2018 9:29:15 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(104/348) took 16815 ms. Total solver calls (SAT/UNSAT): 12465(1077/11388)
May 25, 2018 9:29:18 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(118/348) took 19827 ms. Total solver calls (SAT/UNSAT): 14502(1310/13192)
May 25, 2018 9:29:22 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(140/348) took 23532 ms. Total solver calls (SAT/UNSAT): 17307(1587/15720)
May 25, 2018 9:29:25 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(149/348) took 26562 ms. Total solver calls (SAT/UNSAT): 18315(1695/16620)
May 25, 2018 9:29:28 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(166/348) took 29586 ms. Total solver calls (SAT/UNSAT): 19613(1800/17813)
May 25, 2018 9:29:31 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(179/348) took 32649 ms. Total solver calls (SAT/UNSAT): 20250(1842/18408)
May 25, 2018 9:29:34 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(193/348) took 35709 ms. Total solver calls (SAT/UNSAT): 20751(1896/18855)
May 25, 2018 9:29:37 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(206/348) took 38909 ms. Total solver calls (SAT/UNSAT): 21141(2004/19137)
May 25, 2018 9:29:40 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(233/348) took 41942 ms. Total solver calls (SAT/UNSAT): 21822(2115/19707)
May 25, 2018 9:29:43 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(245/348) took 45045 ms. Total solver calls (SAT/UNSAT): 22812(2210/20602)
May 25, 2018 9:29:46 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(252/348) took 48119 ms. Total solver calls (SAT/UNSAT): 23323(2267/21056)
May 25, 2018 9:29:50 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(262/348) took 51379 ms. Total solver calls (SAT/UNSAT): 23968(2347/21621)
May 25, 2018 9:29:53 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(271/348) took 55008 ms. Total solver calls (SAT/UNSAT): 24463(2410/22053)
May 25, 2018 9:29:57 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(290/348) took 58279 ms. Total solver calls (SAT/UNSAT): 25107(2457/22650)
May 25, 2018 9:30:00 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(319/348) took 61461 ms. Total solver calls (SAT/UNSAT): 25745(2529/23216)
May 25, 2018 9:30:02 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Finished co-enabling matrix. took 63469 ms. Total solver calls (SAT/UNSAT): 25803(2535/23268)
May 25, 2018 9:30:02 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeDoNotAccord
INFO: Computing Do-Not-Accords matrix : 348 transitions.
May 25, 2018 9:30:02 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed DNA matrix. took 29 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 25, 2018 9:30:02 AM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 64403ms conformant to PINS in folder :/home/mcc/execution

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="LamportFastMutEx-COL-6"
export BK_EXAMINATION="ReachabilityDeadlock"
export BK_TOOL="itstoolsl"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

tar xzf /home/mcc/BenchKit/INPUTS/LamportFastMutEx-COL-6.tgz
mv LamportFastMutEx-COL-6 execution
cd execution
pwd
ls -lh

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3637"
echo " Executing tool itstoolsl"
echo " Input is LamportFastMutEx-COL-6, examination is ReachabilityDeadlock"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r117-csrt-152666476500090"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityDeadlock" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityDeadlock" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityDeadlock.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityDeadlock.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityDeadlock.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' ReachabilityDeadlock.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;