fond
Model Checking Contest 2018
8th edition, Bratislava, Slovakia, June 26, 2018
Execution of r117-csrt-152666476500089
Last Updated
June 26, 2018

About the Execution of ITS-Tools.L for LamportFastMutEx-COL-6

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
15757.490 3600000.00 10782409.00 2163.70 ??FTFFT????????? normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Waiting for the VM to be ready (probing ssh)
.....................................................................................
/home/mcc/execution
total 204K
-rw-r--r-- 1 mcc users 3.3K May 15 18:54 CTLCardinality.txt
-rw-r--r-- 1 mcc users 17K May 15 18:54 CTLCardinality.xml
-rw-r--r-- 1 mcc users 2.6K May 15 18:54 CTLFireability.txt
-rw-r--r-- 1 mcc users 15K May 15 18:54 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K May 15 18:50 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.3K May 15 18:50 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 2.6K May 15 18:54 LTLCardinality.txt
-rw-r--r-- 1 mcc users 12K May 15 18:54 LTLCardinality.xml
-rw-r--r-- 1 mcc users 1.9K May 15 18:54 LTLFireability.txt
-rw-r--r-- 1 mcc users 8.1K May 15 18:54 LTLFireability.xml
-rw-r--r-- 1 mcc users 3.9K May 15 18:54 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 20K May 15 18:54 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 113 May 15 18:54 ReachabilityDeadlock.txt
-rw-r--r-- 1 mcc users 351 May 15 18:54 ReachabilityDeadlock.xml
-rw-r--r-- 1 mcc users 2.7K May 15 18:54 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 14K May 15 18:54 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.7K May 15 18:54 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.8K May 15 18:54 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 May 15 18:50 equiv_pt
-rw-r--r-- 1 mcc users 2 May 15 18:50 instance
-rw-r--r-- 1 mcc users 5 May 15 18:50 iscolored
-rw-r--r-- 1 mcc users 42K May 15 18:50 model.pnml
=====================================================================
Generated by BenchKit 2-3637
Executing tool itstoolsl
Input is LamportFastMutEx-COL-6, examination is ReachabilityCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r117-csrt-152666476500089
=====================================================================


--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME LamportFastMutEx-COL-6-ReachabilityCardinality-00
FORMULA_NAME LamportFastMutEx-COL-6-ReachabilityCardinality-01
FORMULA_NAME LamportFastMutEx-COL-6-ReachabilityCardinality-02
FORMULA_NAME LamportFastMutEx-COL-6-ReachabilityCardinality-03
FORMULA_NAME LamportFastMutEx-COL-6-ReachabilityCardinality-04
FORMULA_NAME LamportFastMutEx-COL-6-ReachabilityCardinality-05
FORMULA_NAME LamportFastMutEx-COL-6-ReachabilityCardinality-06
FORMULA_NAME LamportFastMutEx-COL-6-ReachabilityCardinality-07
FORMULA_NAME LamportFastMutEx-COL-6-ReachabilityCardinality-08
FORMULA_NAME LamportFastMutEx-COL-6-ReachabilityCardinality-09
FORMULA_NAME LamportFastMutEx-COL-6-ReachabilityCardinality-10
FORMULA_NAME LamportFastMutEx-COL-6-ReachabilityCardinality-11
FORMULA_NAME LamportFastMutEx-COL-6-ReachabilityCardinality-12
FORMULA_NAME LamportFastMutEx-COL-6-ReachabilityCardinality-13
FORMULA_NAME LamportFastMutEx-COL-6-ReachabilityCardinality-14
FORMULA_NAME LamportFastMutEx-COL-6-ReachabilityCardinality-15

=== Now, execution of the tool begins

BK_START 1527240511519

09:28:34.566 [main] ERROR PNML validation - The rng grammar file can't be accessed : www.pnml.org
09:28:34.568 [main] ERROR import - Grammar file errors have been raised, the validation can't be done, process will continue without Grammar validation
Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805241334/bin/its-reach-linux64, --gc-threshold, 2000000, --quiet, -i, /home/mcc/execution/ReachabilityCardinality.pnml.gal, -t, CGAL, -reachable-file, ReachabilityCardinality.prop, --nowitness], workingDir=/home/mcc/execution]

its-reach command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805241334/bin/its-reach-linux64 --gc-threshold 2000000 --quiet -i /home/mcc/execution/ReachabilityCardinality.pnml.gal -t CGAL -reachable-file ReachabilityCardinality.prop --nowitness
Loading property file ReachabilityCardinality.prop.
Read [invariant] property : LamportFastMutEx-COL-6-ReachabilityCardinality-00 with value :(((((((P_ifyi_15_0+P_ifyi_15_1)+P_ifyi_15_2)+P_ifyi_15_3)+P_ifyi_15_4)+P_ifyi_15_5)+P_ifyi_15_6)<=((((((P_sety_9_0+P_sety_9_1)+P_sety_9_2)+P_sety_9_3)+P_sety_9_4)+P_sety_9_5)+P_sety_9_6))
Read [invariant] property : LamportFastMutEx-COL-6-ReachabilityCardinality-01 with value :((((((((((P_ifxi_10_0+P_ifxi_10_1)+P_ifxi_10_2)+P_ifxi_10_3)+P_ifxi_10_4)+P_ifxi_10_5)+P_ifxi_10_6)<=(((((((((((((b_0+b_1)+b_2)+b_3)+b_4)+b_5)+b_6)+b_7)+b_8)+b_9)+b_10)+b_11)+b_12)+b_13))||(((((((x_0+x_1)+x_2)+x_3)+x_4)+x_5)+x_6)>=3))||(((((((P_start_1_0+P_start_1_1)+P_start_1_2)+P_start_1_3)+P_start_1_4)+P_start_1_5)+P_start_1_6)<=(((((((((((((b_0+b_1)+b_2)+b_3)+b_4)+b_5)+b_6)+b_7)+b_8)+b_9)+b_10)+b_11)+b_12)+b_13)))&&(!(((((((P_setbi_11_0+P_setbi_11_1)+P_setbi_11_2)+P_setbi_11_3)+P_setbi_11_4)+P_setbi_11_5)+P_setbi_11_6)>=3)))
Read [reachable] property : LamportFastMutEx-COL-6-ReachabilityCardinality-02 with value :(!((!(((((((y_0+y_1)+y_2)+y_3)+y_4)+y_5)+y_6)>=3))||(!(((((((P_setbi_11_0+P_setbi_11_1)+P_setbi_11_2)+P_setbi_11_3)+P_setbi_11_4)+P_setbi_11_5)+P_setbi_11_6)<=((((((P_fordo_12_0+P_fordo_12_1)+P_fordo_12_2)+P_fordo_12_3)+P_fordo_12_4)+P_fordo_12_5)+P_fordo_12_6)))))
Read [invariant] property : LamportFastMutEx-COL-6-ReachabilityCardinality-03 with value :((!(((((((((((((((b_0+b_1)+b_2)+b_3)+b_4)+b_5)+b_6)+b_7)+b_8)+b_9)+b_10)+b_11)+b_12)+b_13)<=((((((y_0+y_1)+y_2)+y_3)+y_4)+y_5)+y_6))&&(((((((P_CS_21_0+P_CS_21_1)+P_CS_21_2)+P_CS_21_3)+P_CS_21_4)+P_CS_21_5)+P_CS_21_6)<=((((((P_ifyi_15_0+P_ifyi_15_1)+P_ifyi_15_2)+P_ifyi_15_3)+P_ifyi_15_4)+P_ifyi_15_5)+P_ifyi_15_6))))||(((((((P_setbi_24_0+P_setbi_24_1)+P_setbi_24_2)+P_setbi_24_3)+P_setbi_24_4)+P_setbi_24_5)+P_setbi_24_6)<=(((((((((((((b_0+b_1)+b_2)+b_3)+b_4)+b_5)+b_6)+b_7)+b_8)+b_9)+b_10)+b_11)+b_12)+b_13)))
Read [invariant] property : LamportFastMutEx-COL-6-ReachabilityCardinality-04 with value :(!(((((((((P_ifxi_10_0+P_ifxi_10_1)+P_ifxi_10_2)+P_ifxi_10_3)+P_ifxi_10_4)+P_ifxi_10_5)+P_ifxi_10_6)>=2)||(((((((((((((((((((((((((((((((((((((((((((((((((wait_0+wait_1)+wait_2)+wait_3)+wait_4)+wait_5)+wait_6)+wait_7)+wait_8)+wait_9)+wait_10)+wait_11)+wait_12)+wait_13)+wait_14)+wait_15)+wait_16)+wait_17)+wait_18)+wait_19)+wait_20)+wait_21)+wait_22)+wait_23)+wait_24)+wait_25)+wait_26)+wait_27)+wait_28)+wait_29)+wait_30)+wait_31)+wait_32)+wait_33)+wait_34)+wait_35)+wait_36)+wait_37)+wait_38)+wait_39)+wait_40)+wait_41)+wait_42)+wait_43)+wait_44)+wait_45)+wait_46)+wait_47)+wait_48)>=1))&&((((((((P_setbi_5_0+P_setbi_5_1)+P_setbi_5_2)+P_setbi_5_3)+P_setbi_5_4)+P_setbi_5_5)+P_setbi_5_6)>=3)||(((((((((((((((((((((((((((((((((((((((((((((((((done_0+done_1)+done_2)+done_3)+done_4)+done_5)+done_6)+done_7)+done_8)+done_9)+done_10)+done_11)+done_12)+done_13)+done_14)+done_15)+done_16)+done_17)+done_18)+done_19)+done_20)+done_21)+done_22)+done_23)+done_24)+done_25)+done_26)+done_27)+done_28)+done_29)+done_30)+done_31)+done_32)+done_33)+done_34)+done_35)+done_36)+done_37)+done_38)+done_39)+done_40)+done_41)+done_42)+done_43)+done_44)+done_45)+done_46)+done_47)+done_48)>=1))))
Read [reachable] property : LamportFastMutEx-COL-6-ReachabilityCardinality-05 with value :(((((((((P_sety_9_0+P_sety_9_1)+P_sety_9_2)+P_sety_9_3)+P_sety_9_4)+P_sety_9_5)+P_sety_9_6)<=((((((P_setbi_24_0+P_setbi_24_1)+P_setbi_24_2)+P_setbi_24_3)+P_setbi_24_4)+P_setbi_24_5)+P_setbi_24_6))&&(((((((P_ifyi_15_0+P_ifyi_15_1)+P_ifyi_15_2)+P_ifyi_15_3)+P_ifyi_15_4)+P_ifyi_15_5)+P_ifyi_15_6)<=((((((P_setbi_5_0+P_setbi_5_1)+P_setbi_5_2)+P_setbi_5_3)+P_setbi_5_4)+P_setbi_5_5)+P_setbi_5_6)))&&(!((((((((P_ifyi_15_0+P_ifyi_15_1)+P_ifyi_15_2)+P_ifyi_15_3)+P_ifyi_15_4)+P_ifyi_15_5)+P_ifyi_15_6)>=3)||((((((((((((((b_0+b_1)+b_2)+b_3)+b_4)+b_5)+b_6)+b_7)+b_8)+b_9)+b_10)+b_11)+b_12)+b_13)>=1))))
Read [reachable] property : LamportFastMutEx-COL-6-ReachabilityCardinality-06 with value :(!(((((((((P_await_13_0+P_await_13_1)+P_await_13_2)+P_await_13_3)+P_await_13_4)+P_await_13_5)+P_await_13_6)<=((((((P_setbi_24_0+P_setbi_24_1)+P_setbi_24_2)+P_setbi_24_3)+P_setbi_24_4)+P_setbi_24_5)+P_setbi_24_6))||(((((((y_0+y_1)+y_2)+y_3)+y_4)+y_5)+y_6)<=((((((P_setbi_5_0+P_setbi_5_1)+P_setbi_5_2)+P_setbi_5_3)+P_setbi_5_4)+P_setbi_5_5)+P_setbi_5_6)))||(((((((P_setbi_24_0+P_setbi_24_1)+P_setbi_24_2)+P_setbi_24_3)+P_setbi_24_4)+P_setbi_24_5)+P_setbi_24_6)>=2)))
Read [invariant] property : LamportFastMutEx-COL-6-ReachabilityCardinality-07 with value :((((((((((P_setx_3_0+P_setx_3_1)+P_setx_3_2)+P_setx_3_3)+P_setx_3_4)+P_setx_3_5)+P_setx_3_6)>=3)||(((((((P_start_1_0+P_start_1_1)+P_start_1_2)+P_start_1_3)+P_start_1_4)+P_start_1_5)+P_start_1_6)>=1))||((((((((P_setbi_5_0+P_setbi_5_1)+P_setbi_5_2)+P_setbi_5_3)+P_setbi_5_4)+P_setbi_5_5)+P_setbi_5_6)<=((((((P_fordo_12_0+P_fordo_12_1)+P_fordo_12_2)+P_fordo_12_3)+P_fordo_12_4)+P_fordo_12_5)+P_fordo_12_6))||(((((((((((((((((((((((((((((((((((((((((((((((((wait_0+wait_1)+wait_2)+wait_3)+wait_4)+wait_5)+wait_6)+wait_7)+wait_8)+wait_9)+wait_10)+wait_11)+wait_12)+wait_13)+wait_14)+wait_15)+wait_16)+wait_17)+wait_18)+wait_19)+wait_20)+wait_21)+wait_22)+wait_23)+wait_24)+wait_25)+wait_26)+wait_27)+wait_28)+wait_29)+wait_30)+wait_31)+wait_32)+wait_33)+wait_34)+wait_35)+wait_36)+wait_37)+wait_38)+wait_39)+wait_40)+wait_41)+wait_42)+wait_43)+wait_44)+wait_45)+wait_46)+wait_47)+wait_48)<=((((((P_setbi_24_0+P_setbi_24_1)+P_setbi_24_2)+P_setbi_24_3)+P_setbi_24_4)+P_setbi_24_5)+P_setbi_24_6))))&&(!(((((((x_0+x_1)+x_2)+x_3)+x_4)+x_5)+x_6)>=3)))
Read [reachable] property : LamportFastMutEx-COL-6-ReachabilityCardinality-08 with value :((!((((((((P_CS_21_0+P_CS_21_1)+P_CS_21_2)+P_CS_21_3)+P_CS_21_4)+P_CS_21_5)+P_CS_21_6)>=3)&&(((((((P_sety_9_0+P_sety_9_1)+P_sety_9_2)+P_sety_9_3)+P_sety_9_4)+P_sety_9_5)+P_sety_9_6)<=((((((x_0+x_1)+x_2)+x_3)+x_4)+x_5)+x_6))))&&((((((((P_ifyi_15_0+P_ifyi_15_1)+P_ifyi_15_2)+P_ifyi_15_3)+P_ifyi_15_4)+P_ifyi_15_5)+P_ifyi_15_6)>=3)&&(((((((P_sety_9_0+P_sety_9_1)+P_sety_9_2)+P_sety_9_3)+P_sety_9_4)+P_sety_9_5)+P_sety_9_6)>=1)))
Read [invariant] property : LamportFastMutEx-COL-6-ReachabilityCardinality-09 with value :(!((((((((P_setx_3_0+P_setx_3_1)+P_setx_3_2)+P_setx_3_3)+P_setx_3_4)+P_setx_3_5)+P_setx_3_6)>=2)&&(((((((P_setbi_11_0+P_setbi_11_1)+P_setbi_11_2)+P_setbi_11_3)+P_setbi_11_4)+P_setbi_11_5)+P_setbi_11_6)>=3)))
Read [reachable] property : LamportFastMutEx-COL-6-ReachabilityCardinality-10 with value :((((((((P_fordo_12_0+P_fordo_12_1)+P_fordo_12_2)+P_fordo_12_3)+P_fordo_12_4)+P_fordo_12_5)+P_fordo_12_6)>=1)&&((!(((((((y_0+y_1)+y_2)+y_3)+y_4)+y_5)+y_6)>=2))&&((((((((x_0+x_1)+x_2)+x_3)+x_4)+x_5)+x_6)>=1)&&(((((((P_sety_9_0+P_sety_9_1)+P_sety_9_2)+P_sety_9_3)+P_sety_9_4)+P_sety_9_5)+P_sety_9_6)>=2))))
Read [invariant] property : LamportFastMutEx-COL-6-ReachabilityCardinality-11 with value :((((((((P_ifyi_15_0+P_ifyi_15_1)+P_ifyi_15_2)+P_ifyi_15_3)+P_ifyi_15_4)+P_ifyi_15_5)+P_ifyi_15_6)>=2)||((((((((P_ifyi_15_0+P_ifyi_15_1)+P_ifyi_15_2)+P_ifyi_15_3)+P_ifyi_15_4)+P_ifyi_15_5)+P_ifyi_15_6)<=((((((P_CS_21_0+P_CS_21_1)+P_CS_21_2)+P_CS_21_3)+P_CS_21_4)+P_CS_21_5)+P_CS_21_6))&&((((((((y_0+y_1)+y_2)+y_3)+y_4)+y_5)+y_6)<=((((((P_ify0_4_0+P_ify0_4_1)+P_ify0_4_2)+P_ify0_4_3)+P_ify0_4_4)+P_ify0_4_5)+P_ify0_4_6))||((((((((((((((b_0+b_1)+b_2)+b_3)+b_4)+b_5)+b_6)+b_7)+b_8)+b_9)+b_10)+b_11)+b_12)+b_13)>=1))))
Read [reachable] property : LamportFastMutEx-COL-6-ReachabilityCardinality-12 with value :(!(((((((((P_await_13_0+P_await_13_1)+P_await_13_2)+P_await_13_3)+P_await_13_4)+P_await_13_5)+P_await_13_6)<=((((((P_setbi_24_0+P_setbi_24_1)+P_setbi_24_2)+P_setbi_24_3)+P_setbi_24_4)+P_setbi_24_5)+P_setbi_24_6))||(((((((((((((((((((((((((((((((((((((((((((((((((wait_0+wait_1)+wait_2)+wait_3)+wait_4)+wait_5)+wait_6)+wait_7)+wait_8)+wait_9)+wait_10)+wait_11)+wait_12)+wait_13)+wait_14)+wait_15)+wait_16)+wait_17)+wait_18)+wait_19)+wait_20)+wait_21)+wait_22)+wait_23)+wait_24)+wait_25)+wait_26)+wait_27)+wait_28)+wait_29)+wait_30)+wait_31)+wait_32)+wait_33)+wait_34)+wait_35)+wait_36)+wait_37)+wait_38)+wait_39)+wait_40)+wait_41)+wait_42)+wait_43)+wait_44)+wait_45)+wait_46)+wait_47)+wait_48)<=((((((P_fordo_12_0+P_fordo_12_1)+P_fordo_12_2)+P_fordo_12_3)+P_fordo_12_4)+P_fordo_12_5)+P_fordo_12_6)))||(((((((P_CS_21_0+P_CS_21_1)+P_CS_21_2)+P_CS_21_3)+P_CS_21_4)+P_CS_21_5)+P_CS_21_6)<=((((((P_await_13_0+P_await_13_1)+P_await_13_2)+P_await_13_3)+P_await_13_4)+P_await_13_5)+P_await_13_6))))
Read [reachable] property : LamportFastMutEx-COL-6-ReachabilityCardinality-13 with value :((((((((P_ifxi_10_0+P_ifxi_10_1)+P_ifxi_10_2)+P_ifxi_10_3)+P_ifxi_10_4)+P_ifxi_10_5)+P_ifxi_10_6)>=2)||((((((((P_fordo_12_0+P_fordo_12_1)+P_fordo_12_2)+P_fordo_12_3)+P_fordo_12_4)+P_fordo_12_5)+P_fordo_12_6)>=2)&&((((((((((((((((((((((((((((((((((((((((((((((((((done_0+done_1)+done_2)+done_3)+done_4)+done_5)+done_6)+done_7)+done_8)+done_9)+done_10)+done_11)+done_12)+done_13)+done_14)+done_15)+done_16)+done_17)+done_18)+done_19)+done_20)+done_21)+done_22)+done_23)+done_24)+done_25)+done_26)+done_27)+done_28)+done_29)+done_30)+done_31)+done_32)+done_33)+done_34)+done_35)+done_36)+done_37)+done_38)+done_39)+done_40)+done_41)+done_42)+done_43)+done_44)+done_45)+done_46)+done_47)+done_48)<=((((((P_ify0_4_0+P_ify0_4_1)+P_ify0_4_2)+P_ify0_4_3)+P_ify0_4_4)+P_ify0_4_5)+P_ify0_4_6))&&(((((((P_setbi_5_0+P_setbi_5_1)+P_setbi_5_2)+P_setbi_5_3)+P_setbi_5_4)+P_setbi_5_5)+P_setbi_5_6)>=3))))
Read [invariant] property : LamportFastMutEx-COL-6-ReachabilityCardinality-14 with value :(!(((((((((P_setx_3_0+P_setx_3_1)+P_setx_3_2)+P_setx_3_3)+P_setx_3_4)+P_setx_3_5)+P_setx_3_6)>=2)||(((((((P_setx_3_0+P_setx_3_1)+P_setx_3_2)+P_setx_3_3)+P_setx_3_4)+P_setx_3_5)+P_setx_3_6)>=1))&&((((((((((((((((((((((((((((((((((((((((((((((((((done_0+done_1)+done_2)+done_3)+done_4)+done_5)+done_6)+done_7)+done_8)+done_9)+done_10)+done_11)+done_12)+done_13)+done_14)+done_15)+done_16)+done_17)+done_18)+done_19)+done_20)+done_21)+done_22)+done_23)+done_24)+done_25)+done_26)+done_27)+done_28)+done_29)+done_30)+done_31)+done_32)+done_33)+done_34)+done_35)+done_36)+done_37)+done_38)+done_39)+done_40)+done_41)+done_42)+done_43)+done_44)+done_45)+done_46)+done_47)+done_48)>=1)&&(((((((((((((((((((((((((((((((((((((((((((((((((wait_0+wait_1)+wait_2)+wait_3)+wait_4)+wait_5)+wait_6)+wait_7)+wait_8)+wait_9)+wait_10)+wait_11)+wait_12)+wait_13)+wait_14)+wait_15)+wait_16)+wait_17)+wait_18)+wait_19)+wait_20)+wait_21)+wait_22)+wait_23)+wait_24)+wait_25)+wait_26)+wait_27)+wait_28)+wait_29)+wait_30)+wait_31)+wait_32)+wait_33)+wait_34)+wait_35)+wait_36)+wait_37)+wait_38)+wait_39)+wait_40)+wait_41)+wait_42)+wait_43)+wait_44)+wait_45)+wait_46)+wait_47)+wait_48)>=2))))
Read [reachable] property : LamportFastMutEx-COL-6-ReachabilityCardinality-15 with value :((((((((P_awaity_0+P_awaity_1)+P_awaity_2)+P_awaity_3)+P_awaity_4)+P_awaity_5)+P_awaity_6)<=((((((x_0+x_1)+x_2)+x_3)+x_4)+x_5)+x_6))&&((((((((((((((b_0+b_1)+b_2)+b_3)+b_4)+b_5)+b_6)+b_7)+b_8)+b_9)+b_10)+b_11)+b_12)+b_13)<=((((((P_ify0_4_0+P_ify0_4_1)+P_ify0_4_2)+P_ify0_4_3)+P_ify0_4_4)+P_ify0_4_5)+P_ify0_4_6)))
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
Normalized transition count is 315
// Phase 1: matrix 315 rows 217 cols
invariant :wait_41 + -1'P_await_13_5 + done_41 = 0
invariant :wait_24 + -1'P_await_13_3 + done_24 = 0
invariant :wait_3 + -1'P_await_13_0 + done_3 = 0
invariant :wait_47 + -1'P_await_13_6 + done_47 = 0
invariant :b_2 + b_3 = 1
invariant :wait_14 + done_14 = 0
invariant :wait_48 + -1'P_await_13_6 + done_48 = 0
invariant :wait_33 + -1'P_await_13_4 + done_33 = 0
invariant :wait_38 + -1'P_await_13_5 + done_38 = 0
invariant :wait_23 + -1'P_await_13_3 + done_23 = 0
invariant :wait_0 + done_0 = 0
invariant :wait_25 + -1'P_await_13_3 + done_25 = 0
invariant :wait_7 + done_7 = 0
invariant :P_start_1_5 + P_setx_3_5 + P_setbi_5_5 + P_ify0_4_5 + P_sety_9_5 + P_ifxi_10_5 + P_setbi_11_5 + P_fordo_12_5 + P_await_13_5 + P_ifyi_15_5 + P_awaity_5 + P_CS_21_5 + P_setbi_24_5 = 1
invariant :wait_26 + -1'P_await_13_3 + done_26 = 0
invariant :wait_31 + -1'P_await_13_4 + done_31 = 0
invariant :wait_15 + -1'P_await_13_2 + done_15 = 0
invariant :wait_5 + -1'P_await_13_0 + done_5 = 0
invariant :wait_8 + -1'P_await_13_1 + done_8 = 0
invariant :b_8 + b_9 = 1
invariant :wait_37 + -1'P_await_13_5 + done_37 = 0
invariant :wait_12 + -1'P_await_13_1 + done_12 = 0
invariant :wait_28 + done_28 = 0
invariant :wait_39 + -1'P_await_13_5 + done_39 = 0
invariant :wait_32 + -1'P_await_13_4 + done_32 = 0
invariant :P_start_1_4 + P_setx_3_4 + P_setbi_5_4 + P_ify0_4_4 + P_sety_9_4 + P_ifxi_10_4 + P_setbi_11_4 + P_fordo_12_4 + P_await_13_4 + P_ifyi_15_4 + P_awaity_4 + P_CS_21_4 + P_setbi_24_4 = 1
invariant :wait_29 + -1'P_await_13_4 + done_29 = 0
invariant :wait_18 + -1'P_await_13_2 + done_18 = 0
invariant :wait_11 + -1'P_await_13_1 + done_11 = 0
invariant :P_start_1_3 + P_setx_3_3 + P_setbi_5_3 + P_ify0_4_3 + P_sety_9_3 + P_ifxi_10_3 + P_setbi_11_3 + P_fordo_12_3 + P_await_13_3 + P_ifyi_15_3 + P_awaity_3 + P_CS_21_3 + P_setbi_24_3 = 1
invariant :wait_40 + -1'P_await_13_5 + done_40 = 0
invariant :x_0 + x_1 + x_2 + x_3 + x_4 + x_5 + x_6 = 1
invariant :wait_1 + -1'P_await_13_0 + done_1 = 0
invariant :wait_36 + -1'P_await_13_5 + done_36 = 0
invariant :wait_17 + -1'P_await_13_2 + done_17 = 0
invariant :b_12 + b_13 = 1
invariant :wait_19 + -1'P_await_13_2 + done_19 = 0
invariant :P_start_1_0 + P_setx_3_0 + P_setbi_5_0 + P_ify0_4_0 + P_sety_9_0 + P_ifxi_10_0 + P_setbi_11_0 + P_fordo_12_0 + P_await_13_0 + P_ifyi_15_0 + P_awaity_0 + P_CS_21_0 + P_setbi_24_0 = 0
invariant :wait_21 + done_21 = 0
invariant :b_10 + b_11 = 1
invariant :wait_22 + -1'P_await_13_3 + done_22 = 0
invariant :P_start_1_2 + P_setx_3_2 + P_setbi_5_2 + P_ify0_4_2 + P_sety_9_2 + P_ifxi_10_2 + P_setbi_11_2 + P_fordo_12_2 + P_await_13_2 + P_ifyi_15_2 + P_awaity_2 + P_CS_21_2 + P_setbi_24_2 = 1
invariant :wait_30 + -1'P_await_13_4 + done_30 = 0
invariant :b_4 + b_5 = 1
invariant :wait_2 + -1'P_await_13_0 + done_2 = 0
invariant :wait_9 + -1'P_await_13_1 + done_9 = 0
invariant :wait_27 + -1'P_await_13_3 + done_27 = 0
invariant :wait_13 + -1'P_await_13_1 + done_13 = 0
invariant :wait_35 + done_35 = 0
invariant :wait_34 + -1'P_await_13_4 + done_34 = 0
invariant :wait_10 + -1'P_await_13_1 + done_10 = 0
invariant :wait_20 + -1'P_await_13_2 + done_20 = 0
invariant :P_start_1_6 + P_setx_3_6 + P_setbi_5_6 + P_ify0_4_6 + P_sety_9_6 + P_ifxi_10_6 + P_setbi_11_6 + P_fordo_12_6 + P_await_13_6 + P_ifyi_15_6 + P_awaity_6 + P_CS_21_6 + P_setbi_24_6 = 1
invariant :wait_44 + -1'P_await_13_6 + done_44 = 0
invariant :wait_42 + done_42 = 0
invariant :wait_46 + -1'P_await_13_6 + done_46 = 0
invariant :b_6 + b_7 = 1
invariant :wait_16 + -1'P_await_13_2 + done_16 = 0
invariant :wait_43 + -1'P_await_13_6 + done_43 = 0
invariant :b_0 + b_1 = 0
invariant :wait_45 + -1'P_await_13_6 + done_45 = 0
invariant :P_start_1_1 + P_setx_3_1 + P_setbi_5_1 + P_ify0_4_1 + P_sety_9_1 + P_ifxi_10_1 + P_setbi_11_1 + P_fordo_12_1 + P_await_13_1 + P_ifyi_15_1 + P_awaity_1 + P_CS_21_1 + P_setbi_24_1 = 1
invariant :wait_6 + -1'P_await_13_0 + done_6 = 0
invariant :y_0 + y_1 + y_2 + y_3 + y_4 + y_5 + y_6 = 1
invariant :wait_4 + -1'P_await_13_0 + done_4 = 0
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
Normalized transition count is 315
// Phase 1: matrix 315 rows 217 cols
invariant :wait_41 + -1'P_await_13_5 + done_41 = 0
invariant :wait_24 + -1'P_await_13_3 + done_24 = 0
invariant :wait_3 + -1'P_await_13_0 + done_3 = 0
invariant :wait_47 + -1'P_await_13_6 + done_47 = 0
invariant :b_2 + b_3 = 1
invariant :wait_14 + done_14 = 0
invariant :wait_48 + -1'P_await_13_6 + done_48 = 0
invariant :wait_33 + -1'P_await_13_4 + done_33 = 0
invariant :wait_38 + -1'P_await_13_5 + done_38 = 0
invariant :wait_23 + -1'P_await_13_3 + done_23 = 0
invariant :wait_0 + done_0 = 0
invariant :wait_25 + -1'P_await_13_3 + done_25 = 0
invariant :wait_7 + done_7 = 0
invariant :P_start_1_5 + P_setx_3_5 + P_setbi_5_5 + P_ify0_4_5 + P_sety_9_5 + P_ifxi_10_5 + P_setbi_11_5 + P_fordo_12_5 + P_await_13_5 + P_ifyi_15_5 + P_awaity_5 + P_CS_21_5 + P_setbi_24_5 = 1
invariant :wait_26 + -1'P_await_13_3 + done_26 = 0
invariant :wait_31 + -1'P_await_13_4 + done_31 = 0
invariant :wait_15 + -1'P_await_13_2 + done_15 = 0
invariant :wait_5 + -1'P_await_13_0 + done_5 = 0
invariant :wait_8 + -1'P_await_13_1 + done_8 = 0
invariant :b_8 + b_9 = 1
invariant :wait_37 + -1'P_await_13_5 + done_37 = 0
invariant :wait_12 + -1'P_await_13_1 + done_12 = 0
invariant :wait_28 + done_28 = 0
invariant :wait_39 + -1'P_await_13_5 + done_39 = 0
invariant :wait_32 + -1'P_await_13_4 + done_32 = 0
invariant :P_start_1_4 + P_setx_3_4 + P_setbi_5_4 + P_ify0_4_4 + P_sety_9_4 + P_ifxi_10_4 + P_setbi_11_4 + P_fordo_12_4 + P_await_13_4 + P_ifyi_15_4 + P_awaity_4 + P_CS_21_4 + P_setbi_24_4 = 1
invariant :wait_29 + -1'P_await_13_4 + done_29 = 0
invariant :wait_18 + -1'P_await_13_2 + done_18 = 0
invariant :wait_11 + -1'P_await_13_1 + done_11 = 0
invariant :P_start_1_3 + P_setx_3_3 + P_setbi_5_3 + P_ify0_4_3 + P_sety_9_3 + P_ifxi_10_3 + P_setbi_11_3 + P_fordo_12_3 + P_await_13_3 + P_ifyi_15_3 + P_awaity_3 + P_CS_21_3 + P_setbi_24_3 = 1
invariant :wait_40 + -1'P_await_13_5 + done_40 = 0
invariant :x_0 + x_1 + x_2 + x_3 + x_4 + x_5 + x_6 = 1
invariant :wait_1 + -1'P_await_13_0 + done_1 = 0
invariant :wait_36 + -1'P_await_13_5 + done_36 = 0
invariant :wait_17 + -1'P_await_13_2 + done_17 = 0
invariant :b_12 + b_13 = 1
invariant :wait_19 + -1'P_await_13_2 + done_19 = 0
invariant :P_start_1_0 + P_setx_3_0 + P_setbi_5_0 + P_ify0_4_0 + P_sety_9_0 + P_ifxi_10_0 + P_setbi_11_0 + P_fordo_12_0 + P_await_13_0 + P_ifyi_15_0 + P_awaity_0 + P_CS_21_0 + P_setbi_24_0 = 0
invariant :wait_21 + done_21 = 0
invariant :b_10 + b_11 = 1
invariant :wait_22 + -1'P_await_13_3 + done_22 = 0
invariant :P_start_1_2 + P_setx_3_2 + P_setbi_5_2 + P_ify0_4_2 + P_sety_9_2 + P_ifxi_10_2 + P_setbi_11_2 + P_fordo_12_2 + P_await_13_2 + P_ifyi_15_2 + P_awaity_2 + P_CS_21_2 + P_setbi_24_2 = 1
invariant :wait_30 + -1'P_await_13_4 + done_30 = 0
invariant :b_4 + b_5 = 1
invariant :wait_2 + -1'P_await_13_0 + done_2 = 0
invariant :wait_9 + -1'P_await_13_1 + done_9 = 0
invariant :wait_27 + -1'P_await_13_3 + done_27 = 0
invariant :wait_13 + -1'P_await_13_1 + done_13 = 0
invariant :wait_35 + done_35 = 0
invariant :wait_34 + -1'P_await_13_4 + done_34 = 0
invariant :wait_10 + -1'P_await_13_1 + done_10 = 0
invariant :wait_20 + -1'P_await_13_2 + done_20 = 0
invariant :P_start_1_6 + P_setx_3_6 + P_setbi_5_6 + P_ify0_4_6 + P_sety_9_6 + P_ifxi_10_6 + P_setbi_11_6 + P_fordo_12_6 + P_await_13_6 + P_ifyi_15_6 + P_awaity_6 + P_CS_21_6 + P_setbi_24_6 = 1
invariant :wait_44 + -1'P_await_13_6 + done_44 = 0
invariant :wait_42 + done_42 = 0
invariant :wait_46 + -1'P_await_13_6 + done_46 = 0
invariant :b_6 + b_7 = 1
invariant :wait_16 + -1'P_await_13_2 + done_16 = 0
invariant :wait_43 + -1'P_await_13_6 + done_43 = 0
invariant :b_0 + b_1 = 0
invariant :wait_45 + -1'P_await_13_6 + done_45 = 0
invariant :P_start_1_1 + P_setx_3_1 + P_setbi_5_1 + P_ify0_4_1 + P_sety_9_1 + P_ifxi_10_1 + P_setbi_11_1 + P_fordo_12_1 + P_await_13_1 + P_ifyi_15_1 + P_awaity_1 + P_CS_21_1 + P_setbi_24_1 = 1
invariant :wait_6 + -1'P_await_13_0 + done_6 = 0
invariant :y_0 + y_1 + y_2 + y_3 + y_4 + y_5 + y_6 = 1
invariant :wait_4 + -1'P_await_13_0 + done_4 = 0
FORMULA LamportFastMutEx-COL-6-ReachabilityCardinality-02 FALSE TECHNIQUES SAT_SMT K_INDUCTION(0)
FORMULA LamportFastMutEx-COL-6-ReachabilityCardinality-03 TRUE TECHNIQUES SAT_SMT K_INDUCTION(0)
FORMULA LamportFastMutEx-COL-6-ReachabilityCardinality-05 FALSE TECHNIQUES SAT_SMT K_INDUCTION(0)
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O3, model.c], workingDir=/home/mcc/execution]
Compilation finished in 14417 ms.
Running link step : CommandLine [args=[gcc, -shared, -o, gal.so, model.o], workingDir=/home/mcc/execution]
Link finished in 129 ms.
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -i, LamportFastMutExCOL6ReachabilityCardinality00==true], workingDir=/home/mcc/execution]
WARNING : LTSmin timed out (>225 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -i, LamportFastMutExCOL6ReachabilityCardinality00==true], workingDir=/home/mcc/execution]
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -i, LamportFastMutExCOL6ReachabilityCardinality01==true], workingDir=/home/mcc/execution]
WARNING : LTSmin timed out (>225 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -i, LamportFastMutExCOL6ReachabilityCardinality01==true], workingDir=/home/mcc/execution]
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -i, LamportFastMutExCOL6ReachabilityCardinality04==true], workingDir=/home/mcc/execution]
LTSmin run took 7052 ms.
Found Violation
FORMULA LamportFastMutEx-COL-6-ReachabilityCardinality-04 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -i, LamportFastMutExCOL6ReachabilityCardinality06==true], workingDir=/home/mcc/execution]
LTSmin run took 2406 ms.
Found Violation
FORMULA LamportFastMutEx-COL-6-ReachabilityCardinality-06 TRUE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -i, LamportFastMutExCOL6ReachabilityCardinality07==true], workingDir=/home/mcc/execution]
WARNING : LTSmin timed out (>225 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -i, LamportFastMutExCOL6ReachabilityCardinality07==true], workingDir=/home/mcc/execution]
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -i, LamportFastMutExCOL6ReachabilityCardinality08==true], workingDir=/home/mcc/execution]
WARNING : LTS min runner thread failed on error :java.lang.RuntimeException: Unexpected exception when executing ltsmin :CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -i, LamportFastMutExCOL6ReachabilityCardinality08==true], workingDir=/home/mcc/execution]
255

BK_TIME_CONFINEMENT_REACHED

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution ReachabilityCardinality -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -louvain -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -consoleLog -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination ReachabilityCardinality -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -louvain -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
May 25, 2018 9:28:33 AM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, ReachabilityCardinality, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -louvain, -smt]
May 25, 2018 9:28:33 AM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
May 25, 2018 9:28:34 AM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Detected file is not PT type :http://www.pnml.org/version-2009/grammar/symmetricnet
May 25, 2018 9:28:35 AM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Load time of PNML (colored model parsed with PNMLFW) : 1071 ms
May 25, 2018 9:28:35 AM fr.lip6.move.gal.pnml.togal.HLGALTransformer handlePage
INFO: Transformed 18 places.
May 25, 2018 9:28:35 AM fr.lip6.move.gal.pnml.togal.HLGALTransformer handlePage
INFO: Computed order using colors.
May 25, 2018 9:28:35 AM fr.lip6.move.gal.pnml.togal.HLGALTransformer handlePage
INFO: sort/places :pid * pid->wait,done,
pid * bool->b,
pid->P-start_1,x,y,P-setx_3,P-setbi_5,P-ify0_4,P-sety_9,P-ifxi_10,P-setbi_11,P-fordo_12,P-await_13,P-ifyi_15,P-awaity,P-CS_21,P-setbi_24,

May 25, 2018 9:28:35 AM fr.lip6.move.gal.pnml.togal.HLGALTransformer handlePage
INFO: Transformed 17 transitions.
May 25, 2018 9:28:35 AM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Computed order based on color domains.
May 25, 2018 9:28:35 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.img.gal : 8 ms
May 25, 2018 9:28:35 AM fr.lip6.move.gal.instantiate.Instantiator fuseEqualParameters
INFO: Fused parameters : $i and $y of transition T_yeqi_15
May 25, 2018 9:28:35 AM fr.lip6.move.gal.instantiate.Instantiator fuseEqualParameters
INFO: Fused parameters : $i and $x of transition T_xeqi_10
May 25, 2018 9:28:35 AM fr.lip6.move.gal.instantiate.Instantiator instantiateParameters
INFO: On-the-fly reduction of False transitions avoided exploring 15.0 instantiations of transitions. Total transitions/syncs built is 423
May 25, 2018 9:28:35 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 222 ms
May 25, 2018 9:28:36 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 61 ms
May 25, 2018 9:28:36 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 96 ms
May 25, 2018 9:28:36 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/ReachabilityCardinality.pnml.gal : 28 ms
May 25, 2018 9:28:36 AM fr.lip6.move.serialization.SerializationUtil serializePropertiesForITSTools
INFO: Time to serialize properties into /home/mcc/execution/ReachabilityCardinality.prop : 11 ms
May 25, 2018 9:28:36 AM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was not deterministic with 95 transitions. Expanding to a total of 514 deterministic transitions.
May 25, 2018 9:28:36 AM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Determinization took 26 ms.
May 25, 2018 9:28:36 AM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was not deterministic with 95 transitions. Expanding to a total of 514 deterministic transitions.
May 25, 2018 9:28:36 AM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Determinization took 2 ms.
May 25, 2018 9:28:37 AM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 65 place invariants in 104 ms
May 25, 2018 9:28:37 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd checkProperties
INFO: Ran tautology test, simplified 0 / 16 in 814 ms.
May 25, 2018 9:28:37 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-00(UNSAT) depth K=0 took 22 ms
May 25, 2018 9:28:37 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-01(UNSAT) depth K=0 took 11 ms
May 25, 2018 9:28:37 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-02(UNSAT) depth K=0 took 19 ms
May 25, 2018 9:28:37 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-03(UNSAT) depth K=0 took 11 ms
May 25, 2018 9:28:37 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-04(UNSAT) depth K=0 took 12 ms
May 25, 2018 9:28:37 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-05(UNSAT) depth K=0 took 10 ms
May 25, 2018 9:28:37 AM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was not deterministic with 95 transitions. Expanding to a total of 514 deterministic transitions.
May 25, 2018 9:28:37 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-06(UNSAT) depth K=0 took 17 ms
May 25, 2018 9:28:37 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-07(UNSAT) depth K=0 took 12 ms
May 25, 2018 9:28:37 AM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Determinization took 23 ms.
May 25, 2018 9:28:37 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-08(UNSAT) depth K=0 took 9 ms
May 25, 2018 9:28:37 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-09(UNSAT) depth K=0 took 6 ms
May 25, 2018 9:28:37 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-10(UNSAT) depth K=0 took 12 ms
May 25, 2018 9:28:37 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-11(UNSAT) depth K=0 took 16 ms
May 25, 2018 9:28:37 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-12(UNSAT) depth K=0 took 8 ms
May 25, 2018 9:28:37 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-13(UNSAT) depth K=0 took 12 ms
May 25, 2018 9:28:37 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-14(UNSAT) depth K=0 took 19 ms
May 25, 2018 9:28:37 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-15(UNSAT) depth K=0 took 8 ms
May 25, 2018 9:28:37 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-00(UNSAT) depth K=1 took 15 ms
May 25, 2018 9:28:37 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-01(UNSAT) depth K=1 took 23 ms
May 25, 2018 9:28:37 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-02(UNSAT) depth K=1 took 20 ms
May 25, 2018 9:28:37 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-03(UNSAT) depth K=1 took 11 ms
May 25, 2018 9:28:37 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-04(UNSAT) depth K=1 took 33 ms
May 25, 2018 9:28:37 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-05(UNSAT) depth K=1 took 11 ms
May 25, 2018 9:28:37 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-06(UNSAT) depth K=1 took 11 ms
May 25, 2018 9:28:37 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-07(UNSAT) depth K=1 took 19 ms
May 25, 2018 9:28:37 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-08(UNSAT) depth K=1 took 14 ms
May 25, 2018 9:28:37 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-09(UNSAT) depth K=1 took 10 ms
May 25, 2018 9:28:37 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-10(UNSAT) depth K=1 took 24 ms
May 25, 2018 9:28:37 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-11(UNSAT) depth K=1 took 13 ms
May 25, 2018 9:28:37 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-12(UNSAT) depth K=1 took 18 ms
May 25, 2018 9:28:37 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-13(UNSAT) depth K=1 took 21 ms
May 25, 2018 9:28:37 AM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 65 place invariants in 86 ms
May 25, 2018 9:28:37 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-14(UNSAT) depth K=1 took 30 ms
May 25, 2018 9:28:37 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-15(UNSAT) depth K=1 took 23 ms
May 25, 2018 9:28:37 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-00(UNSAT) depth K=2 took 138 ms
May 25, 2018 9:28:38 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-01(UNSAT) depth K=2 took 287 ms
May 25, 2018 9:28:38 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-02(UNSAT) depth K=2 took 113 ms
May 25, 2018 9:28:38 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-03(UNSAT) depth K=2 took 184 ms
May 25, 2018 9:28:38 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-04(UNSAT) depth K=2 took 344 ms
May 25, 2018 9:28:38 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-05(UNSAT) depth K=2 took 157 ms
May 25, 2018 9:28:39 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-06(UNSAT) depth K=2 took 113 ms
May 25, 2018 9:28:39 AM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 217 variables to be positive in 2145 ms
May 25, 2018 9:28:39 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may disable matrix : 420 transitions.
May 25, 2018 9:28:39 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of disable matrix completed :0/420 took 0 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 25, 2018 9:28:39 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete disable matrix. took 76 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 25, 2018 9:28:39 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may enable matrix : 420 transitions.
May 25, 2018 9:28:39 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete enable matrix. took 49 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 25, 2018 9:28:39 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-07(UNSAT) depth K=2 took 286 ms
May 25, 2018 9:28:39 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-08(UNSAT) depth K=2 took 116 ms
May 25, 2018 9:28:39 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-09(UNSAT) depth K=2 took 82 ms
May 25, 2018 9:28:39 AM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 217 variables to be positive in 2020 ms
May 25, 2018 9:28:39 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-10(UNSAT) depth K=2 took 176 ms
May 25, 2018 9:28:39 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-11(UNSAT) depth K=2 took 218 ms
May 25, 2018 9:28:40 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-12(UNSAT) depth K=2 took 162 ms
May 25, 2018 9:28:40 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-13(UNSAT) depth K=2 took 244 ms
May 25, 2018 9:28:40 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-6-ReachabilityCardinality-00
May 25, 2018 9:28:40 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-00(SAT) depth K=0 took 833 ms
May 25, 2018 9:28:40 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-14(UNSAT) depth K=2 took 210 ms
May 25, 2018 9:28:40 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-15(UNSAT) depth K=2 took 241 ms
May 25, 2018 9:28:41 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-6-ReachabilityCardinality-01
May 25, 2018 9:28:41 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-01(SAT) depth K=0 took 1106 ms
May 25, 2018 9:28:41 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-00(UNSAT) depth K=3 took 777 ms
May 25, 2018 9:28:42 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, proved UNreachability of reachability predicate LamportFastMutEx-COL-6-ReachabilityCardinality-02
May 25, 2018 9:28:42 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, successfully proved induction at step 0 for LamportFastMutEx-COL-6-ReachabilityCardinality-02
May 25, 2018 9:28:42 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-02(FALSE) depth K=0 took 849 ms
May 25, 2018 9:28:42 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, proved invariant LamportFastMutEx-COL-6-ReachabilityCardinality-03
May 25, 2018 9:28:42 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, successfully proved induction at step 0 for LamportFastMutEx-COL-6-ReachabilityCardinality-03
May 25, 2018 9:28:42 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-03(TRUE) depth K=0 took 510 ms
May 25, 2018 9:28:43 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-6-ReachabilityCardinality-04
May 25, 2018 9:28:43 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-04(SAT) depth K=0 took 1096 ms
May 25, 2018 9:28:44 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, proved UNreachability of reachability predicate LamportFastMutEx-COL-6-ReachabilityCardinality-05
May 25, 2018 9:28:44 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, successfully proved induction at step 0 for LamportFastMutEx-COL-6-ReachabilityCardinality-05
May 25, 2018 9:28:44 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-05(FALSE) depth K=0 took 581 ms
May 25, 2018 9:28:45 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-6-ReachabilityCardinality-06
May 25, 2018 9:28:45 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-06(SAT) depth K=0 took 943 ms
May 25, 2018 9:28:47 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-6-ReachabilityCardinality-07
May 25, 2018 9:28:47 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-07(SAT) depth K=0 took 2001 ms
May 25, 2018 9:28:48 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-6-ReachabilityCardinality-08
May 25, 2018 9:28:48 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-08(SAT) depth K=0 took 918 ms
May 25, 2018 9:28:49 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-6-ReachabilityCardinality-09
May 25, 2018 9:28:49 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-09(SAT) depth K=0 took 1067 ms
May 25, 2018 9:28:50 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-6-ReachabilityCardinality-10
May 25, 2018 9:28:50 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-10(SAT) depth K=0 took 821 ms
May 25, 2018 9:28:50 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-6-ReachabilityCardinality-11
May 25, 2018 9:28:50 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-11(SAT) depth K=0 took 637 ms
May 25, 2018 9:28:51 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-6-ReachabilityCardinality-12
May 25, 2018 9:28:51 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-12(SAT) depth K=0 took 596 ms
May 25, 2018 9:28:52 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-6-ReachabilityCardinality-13
May 25, 2018 9:28:52 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-13(SAT) depth K=0 took 839 ms
May 25, 2018 9:28:52 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-01(UNSAT) depth K=3 took 11129 ms
May 25, 2018 9:28:52 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-6-ReachabilityCardinality-14
May 25, 2018 9:28:52 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-14(SAT) depth K=0 took 463 ms
May 25, 2018 9:28:53 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-6-ReachabilityCardinality-15
May 25, 2018 9:28:53 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-15(SAT) depth K=0 took 833 ms
May 25, 2018 9:28:57 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-02(UNSAT) depth K=3 took 5056 ms
May 25, 2018 9:29:01 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-6-ReachabilityCardinality-00
May 25, 2018 9:29:01 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-00(SAT) depth K=1 took 7445 ms
May 25, 2018 9:29:06 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-03(UNSAT) depth K=3 took 8416 ms
May 25, 2018 9:29:11 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-04(UNSAT) depth K=3 took 5256 ms
May 25, 2018 9:29:13 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-6-ReachabilityCardinality-01
May 25, 2018 9:29:13 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-01(SAT) depth K=1 took 12042 ms
May 25, 2018 9:29:20 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-05(UNSAT) depth K=3 took 9318 ms
May 25, 2018 9:29:27 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-06(UNSAT) depth K=3 took 7257 ms
May 25, 2018 9:29:37 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-6-ReachabilityCardinality-04
May 25, 2018 9:29:37 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-04(SAT) depth K=1 took 24115 ms
May 25, 2018 9:29:41 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-07(UNSAT) depth K=3 took 13504 ms
May 25, 2018 9:29:44 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-6-ReachabilityCardinality-06
May 25, 2018 9:29:44 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-06(SAT) depth K=1 took 7001 ms
May 25, 2018 9:29:44 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-08(UNSAT) depth K=3 took 3065 ms
May 25, 2018 9:29:46 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-09(UNSAT) depth K=3 took 2437 ms
May 25, 2018 9:29:52 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-10(UNSAT) depth K=3 took 5434 ms
May 25, 2018 9:29:57 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-6-ReachabilityCardinality-07
May 25, 2018 9:29:57 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-07(SAT) depth K=1 took 13159 ms
May 25, 2018 9:29:58 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-11(UNSAT) depth K=3 took 6247 ms
May 25, 2018 9:30:03 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-6-ReachabilityCardinality-08
May 25, 2018 9:30:03 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-08(SAT) depth K=1 took 5698 ms
May 25, 2018 9:30:04 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-12(UNSAT) depth K=3 took 5392 ms
May 25, 2018 9:30:05 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-6-ReachabilityCardinality-09
May 25, 2018 9:30:05 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-09(SAT) depth K=1 took 2084 ms
May 25, 2018 9:30:05 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-13(UNSAT) depth K=3 took 1683 ms
May 25, 2018 9:30:07 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-14(UNSAT) depth K=3 took 2057 ms
May 25, 2018 9:30:14 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-6-ReachabilityCardinality-10
May 25, 2018 9:30:14 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-10(SAT) depth K=1 took 9248 ms
May 25, 2018 9:30:15 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-15(UNSAT) depth K=3 took 7224 ms
May 25, 2018 9:30:16 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeCoEnablingMatrix
INFO: Computing symmetric co enabling matrix : 420 transitions.
May 25, 2018 9:30:17 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(0/420) took 1551 ms. Total solver calls (SAT/UNSAT): 65(0/65)
May 25, 2018 9:30:20 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-6-ReachabilityCardinality-11
May 25, 2018 9:30:20 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-11(SAT) depth K=1 took 6424 ms
May 25, 2018 9:30:21 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(3/420) took 5500 ms. Total solver calls (SAT/UNSAT): 258(6/252)
May 25, 2018 9:30:25 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(8/420) took 9203 ms. Total solver calls (SAT/UNSAT): 581(24/557)
May 25, 2018 9:30:29 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(11/420) took 12975 ms. Total solver calls (SAT/UNSAT): 774(30/744)
May 25, 2018 9:30:35 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(14/420) took 19150 ms. Total solver calls (SAT/UNSAT): 1044(36/1008)
May 25, 2018 9:30:37 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-6-ReachabilityCardinality-12
May 25, 2018 9:30:37 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-12(SAT) depth K=1 took 16975 ms
May 25, 2018 9:30:39 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(16/420) took 23746 ms. Total solver calls (SAT/UNSAT): 1323(57/1266)
May 25, 2018 9:30:43 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-00(UNSAT) depth K=4 took 28620 ms
May 25, 2018 9:30:44 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(18/420) took 28522 ms. Total solver calls (SAT/UNSAT): 1598(74/1524)
May 25, 2018 9:30:44 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-6-ReachabilityCardinality-13
May 25, 2018 9:30:44 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-13(SAT) depth K=1 took 6859 ms
May 25, 2018 9:30:47 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-6-ReachabilityCardinality-14
May 25, 2018 9:30:47 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-14(SAT) depth K=1 took 2603 ms
May 25, 2018 9:30:50 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(20/420) took 34032 ms. Total solver calls (SAT/UNSAT): 1869(87/1782)
May 25, 2018 9:30:55 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(22/420) took 38973 ms. Total solver calls (SAT/UNSAT): 2136(98/2038)
May 25, 2018 9:30:58 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(24/420) took 42837 ms. Total solver calls (SAT/UNSAT): 2399(117/2282)
May 25, 2018 9:31:01 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(26/420) took 45937 ms. Total solver calls (SAT/UNSAT): 2658(132/2526)
May 25, 2018 9:31:04 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-6-ReachabilityCardinality-15
May 25, 2018 9:31:04 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-15(SAT) depth K=1 took 16718 ms
May 25, 2018 9:31:06 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(28/420) took 50352 ms. Total solver calls (SAT/UNSAT): 2913(138/2775)
May 25, 2018 9:31:10 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(31/420) took 54100 ms. Total solver calls (SAT/UNSAT): 3288(168/3120)
May 25, 2018 9:31:13 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(34/420) took 57362 ms. Total solver calls (SAT/UNSAT): 3654(189/3465)
May 25, 2018 9:31:16 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(36/420) took 60654 ms. Total solver calls (SAT/UNSAT): 3893(200/3693)
May 25, 2018 9:31:20 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(38/420) took 64135 ms. Total solver calls (SAT/UNSAT): 4128(219/3909)
May 25, 2018 9:31:25 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(40/420) took 69294 ms. Total solver calls (SAT/UNSAT): 4359(234/4125)
May 25, 2018 9:31:30 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(42/420) took 74299 ms. Total solver calls (SAT/UNSAT): 4586(240/4346)
May 25, 2018 9:31:34 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(44/420) took 78832 ms. Total solver calls (SAT/UNSAT): 4809(261/4548)
May 25, 2018 9:31:38 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-6-ReachabilityCardinality-00
May 25, 2018 9:31:38 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-00(SAT) depth K=2 took 34932 ms
May 25, 2018 9:31:39 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(46/420) took 83867 ms. Total solver calls (SAT/UNSAT): 5028(278/4750)
May 25, 2018 9:31:45 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(48/420) took 89211 ms. Total solver calls (SAT/UNSAT): 5243(291/4952)
May 25, 2018 9:31:50 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(50/420) took 94223 ms. Total solver calls (SAT/UNSAT): 5454(302/5152)
May 25, 2018 9:31:55 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(52/420) took 99122 ms. Total solver calls (SAT/UNSAT): 5661(321/5340)
May 25, 2018 9:31:58 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(55/420) took 102881 ms. Total solver calls (SAT/UNSAT): 5964(342/5622)
May 25, 2018 9:32:02 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(57/420) took 106721 ms. Total solver calls (SAT/UNSAT): 6161(353/5808)
May 25, 2018 9:32:06 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(59/420) took 110581 ms. Total solver calls (SAT/UNSAT): 6354(372/5982)
May 25, 2018 9:32:10 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(61/420) took 114338 ms. Total solver calls (SAT/UNSAT): 6543(387/6156)
May 25, 2018 9:32:15 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(63/420) took 119711 ms. Total solver calls (SAT/UNSAT): 6860(393/6467)
May 25, 2018 9:32:16 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-6-ReachabilityCardinality-01
May 25, 2018 9:32:16 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-01(SAT) depth K=2 took 37203 ms
May 25, 2018 9:32:22 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(64/420) took 126712 ms. Total solver calls (SAT/UNSAT): 7083(416/6667)
May 25, 2018 9:32:29 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(65/420) took 133180 ms. Total solver calls (SAT/UNSAT): 7305(438/6867)
May 25, 2018 9:32:33 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(66/420) took 137711 ms. Total solver calls (SAT/UNSAT): 7526(459/7067)
May 25, 2018 9:32:38 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(67/420) took 142527 ms. Total solver calls (SAT/UNSAT): 7746(479/7267)
May 25, 2018 9:32:44 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(69/420) took 148599 ms. Total solver calls (SAT/UNSAT): 8183(516/7667)
May 25, 2018 9:32:49 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(70/420) took 153832 ms. Total solver calls (SAT/UNSAT): 8400(516/7884)
May 25, 2018 9:32:50 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-01(UNSAT) depth K=4 took 127186 ms
May 25, 2018 9:32:55 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(71/420) took 159062 ms. Total solver calls (SAT/UNSAT): 8616(539/8077)
May 25, 2018 9:32:59 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(72/420) took 163534 ms. Total solver calls (SAT/UNSAT): 8831(561/8270)
May 25, 2018 9:33:04 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(73/420) took 168177 ms. Total solver calls (SAT/UNSAT): 9045(582/8463)
May 25, 2018 9:33:09 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(74/420) took 173563 ms. Total solver calls (SAT/UNSAT): 9258(602/8656)
May 25, 2018 9:33:14 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(75/420) took 178633 ms. Total solver calls (SAT/UNSAT): 9470(621/8849)
May 25, 2018 9:33:19 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(76/420) took 183240 ms. Total solver calls (SAT/UNSAT): 9681(639/9042)
May 25, 2018 9:33:22 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(77/420) took 186647 ms. Total solver calls (SAT/UNSAT): 9891(639/9252)
May 25, 2018 9:33:27 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-04(UNSAT) depth K=4 took 36957 ms
May 25, 2018 9:33:29 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(79/420) took 193204 ms. Total solver calls (SAT/UNSAT): 10308(684/9624)
May 25, 2018 9:33:34 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(80/420) took 198132 ms. Total solver calls (SAT/UNSAT): 10515(705/9810)
May 25, 2018 9:33:38 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(81/420) took 202717 ms. Total solver calls (SAT/UNSAT): 10721(725/9996)
May 25, 2018 9:33:43 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(82/420) took 207837 ms. Total solver calls (SAT/UNSAT): 10926(744/10182)
May 25, 2018 9:33:50 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(83/420) took 214930 ms. Total solver calls (SAT/UNSAT): 11130(762/10368)
May 25, 2018 9:33:58 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(84/420) took 221968 ms. Total solver calls (SAT/UNSAT): 11333(762/10571)
May 25, 2018 9:34:05 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(85/420) took 229354 ms. Total solver calls (SAT/UNSAT): 11535(785/10750)
May 25, 2018 9:34:12 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(86/420) took 236631 ms. Total solver calls (SAT/UNSAT): 11736(807/10929)
May 25, 2018 9:34:19 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(87/420) took 243332 ms. Total solver calls (SAT/UNSAT): 11936(828/11108)
May 25, 2018 9:34:23 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(88/420) took 247047 ms. Total solver calls (SAT/UNSAT): 12135(848/11287)
May 25, 2018 9:34:27 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(89/420) took 251440 ms. Total solver calls (SAT/UNSAT): 12333(867/11466)
May 25, 2018 9:34:32 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(90/420) took 256380 ms. Total solver calls (SAT/UNSAT): 12530(885/11645)
May 25, 2018 9:34:36 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(91/420) took 260560 ms. Total solver calls (SAT/UNSAT): 12726(885/11841)
May 25, 2018 9:34:42 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(93/420) took 266110 ms. Total solver calls (SAT/UNSAT): 13115(930/12185)
May 25, 2018 9:34:47 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(95/420) took 271617 ms. Total solver calls (SAT/UNSAT): 13500(971/12529)
May 25, 2018 9:34:50 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(96/420) took 274627 ms. Total solver calls (SAT/UNSAT): 13691(990/12701)
May 25, 2018 9:34:53 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(97/420) took 277905 ms. Total solver calls (SAT/UNSAT): 13881(1008/12873)
May 25, 2018 9:34:58 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(99/420) took 282641 ms. Total solver calls (SAT/UNSAT): 14258(1031/13227)
May 25, 2018 9:35:03 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(101/420) took 287550 ms. Total solver calls (SAT/UNSAT): 14631(1074/13557)
May 25, 2018 9:35:04 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-06(UNSAT) depth K=4 took 96420 ms
May 25, 2018 9:35:07 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(102/420) took 291310 ms. Total solver calls (SAT/UNSAT): 14816(1094/13722)
May 25, 2018 9:35:14 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(104/420) took 298076 ms. Total solver calls (SAT/UNSAT): 15183(1131/14052)
May 25, 2018 9:35:17 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(106/420) took 301388 ms. Total solver calls (SAT/UNSAT): 15282(1131/14151)
May 25, 2018 9:35:20 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(110/420) took 304438 ms. Total solver calls (SAT/UNSAT): 15480(1143/14337)
May 25, 2018 9:35:23 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(114/420) took 307917 ms. Total solver calls (SAT/UNSAT): 15678(1155/14523)
May 25, 2018 9:35:29 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(119/420) took 312993 ms. Total solver calls (SAT/UNSAT): 16056(1167/14889)
May 25, 2018 9:35:35 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(121/420) took 319449 ms. Total solver calls (SAT/UNSAT): 16413(1224/15189)
May 25, 2018 9:35:40 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(122/420) took 324388 ms. Total solver calls (SAT/UNSAT): 16590(1251/15339)
May 25, 2018 9:35:43 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(123/420) took 327919 ms. Total solver calls (SAT/UNSAT): 16766(1277/15489)
May 25, 2018 9:35:50 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(124/420) took 334946 ms. Total solver calls (SAT/UNSAT): 16941(1302/15639)
May 25, 2018 9:35:54 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-6-ReachabilityCardinality-04
May 25, 2018 9:35:54 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-04(SAT) depth K=2 took 218403 ms
May 25, 2018 9:35:56 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(125/420) took 340941 ms. Total solver calls (SAT/UNSAT): 17115(1326/15789)
May 25, 2018 9:36:02 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(126/420) took 346812 ms. Total solver calls (SAT/UNSAT): 17288(1326/15962)
May 25, 2018 9:36:07 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(127/420) took 350957 ms. Total solver calls (SAT/UNSAT): 17460(1349/16111)
May 25, 2018 9:36:08 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-6-ReachabilityCardinality-06
May 25, 2018 9:36:08 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-06(SAT) depth K=2 took 14041 ms
May 25, 2018 9:36:10 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(128/420) took 354526 ms. Total solver calls (SAT/UNSAT): 17631(1371/16260)
May 25, 2018 9:36:15 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(130/420) took 359328 ms. Total solver calls (SAT/UNSAT): 17970(1412/16558)
May 25, 2018 9:36:21 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(131/420) took 365008 ms. Total solver calls (SAT/UNSAT): 18138(1431/16707)
May 25, 2018 9:36:25 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(132/420) took 369472 ms. Total solver calls (SAT/UNSAT): 18305(1449/16856)
May 25, 2018 9:36:29 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(133/420) took 373070 ms. Total solver calls (SAT/UNSAT): 18471(1449/17022)
May 25, 2018 9:36:32 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(134/420) took 376706 ms. Total solver calls (SAT/UNSAT): 18636(1466/17170)
May 25, 2018 9:36:35 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(135/420) took 379721 ms. Total solver calls (SAT/UNSAT): 18800(1482/17318)
May 25, 2018 9:36:40 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(136/420) took 384426 ms. Total solver calls (SAT/UNSAT): 18963(1497/17466)
May 25, 2018 9:36:44 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(137/420) took 388466 ms. Total solver calls (SAT/UNSAT): 19125(1511/17614)
May 25, 2018 9:36:48 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(138/420) took 392060 ms. Total solver calls (SAT/UNSAT): 19286(1524/17762)
May 25, 2018 9:36:52 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(139/420) took 396048 ms. Total solver calls (SAT/UNSAT): 19446(1536/17910)
May 25, 2018 9:36:56 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(140/420) took 400427 ms. Total solver calls (SAT/UNSAT): 19605(1536/18069)
May 25, 2018 9:37:00 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(141/420) took 404417 ms. Total solver calls (SAT/UNSAT): 19763(1553/18210)
May 25, 2018 9:37:04 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(143/420) took 408477 ms. Total solver calls (SAT/UNSAT): 20076(1584/18492)
May 25, 2018 9:37:08 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(145/420) took 412399 ms. Total solver calls (SAT/UNSAT): 20385(1611/18774)
May 25, 2018 9:37:12 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(147/420) took 416338 ms. Total solver calls (SAT/UNSAT): 20690(1623/19067)
May 25, 2018 9:37:15 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-07(UNSAT) depth K=4 took 131120 ms
May 25, 2018 9:37:16 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(149/420) took 420550 ms. Total solver calls (SAT/UNSAT): 20991(1656/19335)
May 25, 2018 9:37:20 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(151/420) took 424428 ms. Total solver calls (SAT/UNSAT): 21288(1685/19603)
May 25, 2018 9:37:24 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(153/420) took 428326 ms. Total solver calls (SAT/UNSAT): 21581(1710/19871)
May 25, 2018 9:37:28 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(155/420) took 432001 ms. Total solver calls (SAT/UNSAT): 21870(1727/20143)
May 25, 2018 9:37:34 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(157/420) took 437961 ms. Total solver calls (SAT/UNSAT): 22155(1758/20397)
May 25, 2018 9:37:38 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(158/420) took 442269 ms. Total solver calls (SAT/UNSAT): 22296(1772/20524)
May 25, 2018 9:37:41 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(159/420) took 445383 ms. Total solver calls (SAT/UNSAT): 22436(1785/20651)
May 25, 2018 9:37:44 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(160/420) took 448651 ms. Total solver calls (SAT/UNSAT): 22575(1797/20778)
May 25, 2018 9:37:47 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(162/420) took 451832 ms. Total solver calls (SAT/UNSAT): 22850(1814/21036)
May 25, 2018 9:37:51 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(164/420) took 455534 ms. Total solver calls (SAT/UNSAT): 23121(1845/21276)
May 25, 2018 9:37:55 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(166/420) took 459070 ms. Total solver calls (SAT/UNSAT): 23388(1872/21516)
May 25, 2018 9:37:59 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(168/420) took 463394 ms. Total solver calls (SAT/UNSAT): 23651(1884/21767)
May 25, 2018 9:38:03 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(170/420) took 467483 ms. Total solver calls (SAT/UNSAT): 23910(1917/21993)
May 25, 2018 9:38:07 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(172/420) took 471447 ms. Total solver calls (SAT/UNSAT): 24165(1946/22219)
May 25, 2018 9:38:11 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(175/420) took 475571 ms. Total solver calls (SAT/UNSAT): 24540(1971/22569)
May 25, 2018 9:38:14 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(176/420) took 478704 ms. Total solver calls (SAT/UNSAT): 24663(1988/22675)
May 25, 2018 9:38:19 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(178/420) took 483292 ms. Total solver calls (SAT/UNSAT): 24906(2019/22887)
May 25, 2018 9:38:22 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(179/420) took 486366 ms. Total solver calls (SAT/UNSAT): 25026(2033/22993)
May 25, 2018 9:38:27 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(181/420) took 491238 ms. Total solver calls (SAT/UNSAT): 25263(2058/23205)
May 25, 2018 9:38:31 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(183/420) took 495126 ms. Total solver calls (SAT/UNSAT): 25412(2069/23343)
May 25, 2018 9:38:35 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(185/420) took 499396 ms. Total solver calls (SAT/UNSAT): 25557(2076/23481)
May 25, 2018 9:38:38 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-08(UNSAT) depth K=4 took 83141 ms
May 25, 2018 9:38:38 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(187/420) took 502803 ms. Total solver calls (SAT/UNSAT): 25698(2079/23619)
May 25, 2018 9:38:42 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(189/420) took 505957 ms. Total solver calls (SAT/UNSAT): 25835(2084/23751)
May 25, 2018 9:38:45 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(191/420) took 508967 ms. Total solver calls (SAT/UNSAT): 25968(2091/23877)
May 25, 2018 9:38:49 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(194/420) took 513159 ms. Total solver calls (SAT/UNSAT): 26160(2094/24066)
May 25, 2018 9:38:53 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(197/420) took 517696 ms. Total solver calls (SAT/UNSAT): 26343(2106/24237)
May 25, 2018 9:38:56 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(199/420) took 520716 ms. Total solver calls (SAT/UNSAT): 26460(2109/24351)
May 25, 2018 9:39:00 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(202/420) took 524673 ms. Total solver calls (SAT/UNSAT): 26628(2118/24510)
May 25, 2018 9:39:04 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(205/420) took 528404 ms. Total solver calls (SAT/UNSAT): 26787(2124/24663)
May 25, 2018 9:39:07 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(208/420) took 531859 ms. Total solver calls (SAT/UNSAT): 26937(2133/24804)
May 25, 2018 9:39:10 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(211/420) took 534923 ms. Total solver calls (SAT/UNSAT): 27078(2139/24939)
May 25, 2018 9:39:14 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(215/420) took 538436 ms. Total solver calls (SAT/UNSAT): 27252(2151/25101)
May 25, 2018 9:39:17 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(219/420) took 541511 ms. Total solver calls (SAT/UNSAT): 27410(2159/25251)
May 25, 2018 9:39:20 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(223/420) took 544527 ms. Total solver calls (SAT/UNSAT): 27552(2169/25383)
May 25, 2018 9:39:23 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(228/420) took 547757 ms. Total solver calls (SAT/UNSAT): 27715(2181/25534)
May 25, 2018 9:39:27 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(233/420) took 551526 ms. Total solver calls (SAT/UNSAT): 27877(2193/25684)
May 25, 2018 9:39:30 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(238/420) took 554852 ms. Total solver calls (SAT/UNSAT): 28032(2205/25827)
May 25, 2018 9:39:34 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(244/420) took 558106 ms. Total solver calls (SAT/UNSAT): 28182(2205/25977)
May 25, 2018 9:39:37 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(248/420) took 561469 ms. Total solver calls (SAT/UNSAT): 28302(2205/26097)
May 25, 2018 9:39:40 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(252/420) took 564596 ms. Total solver calls (SAT/UNSAT): 28414(2205/26209)
May 25, 2018 9:39:43 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(257/420) took 567645 ms. Total solver calls (SAT/UNSAT): 28552(2249/26303)
May 25, 2018 9:39:46 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(263/420) took 570791 ms. Total solver calls (SAT/UNSAT): 28715(2288/26427)
May 25, 2018 9:39:50 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(269/420) took 574219 ms. Total solver calls (SAT/UNSAT): 28872(2322/26550)
May 25, 2018 9:39:53 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(278/420) took 577434 ms. Total solver calls (SAT/UNSAT): 29095(2366/26729)
May 25, 2018 9:39:56 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(284/420) took 580919 ms. Total solver calls (SAT/UNSAT): 29242(2391/26851)
May 25, 2018 9:39:59 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-09(UNSAT) depth K=4 took 80599 ms
May 25, 2018 9:40:00 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(289/420) took 584636 ms. Total solver calls (SAT/UNSAT): 29358(2406/26952)
May 25, 2018 9:40:03 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(296/420) took 587656 ms. Total solver calls (SAT/UNSAT): 29493(2415/27078)
May 25, 2018 9:40:06 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-6-ReachabilityCardinality-07
May 25, 2018 9:40:06 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-07(SAT) depth K=2 took 237792 ms
May 25, 2018 9:40:07 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(301/420) took 591286 ms. Total solver calls (SAT/UNSAT): 29661(2427/27234)
May 25, 2018 9:40:12 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(304/420) took 596488 ms. Total solver calls (SAT/UNSAT): 29955(2457/27498)
May 25, 2018 9:40:16 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(306/420) took 600057 ms. Total solver calls (SAT/UNSAT): 30146(2472/27674)
May 25, 2018 9:40:19 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(308/420) took 603267 ms. Total solver calls (SAT/UNSAT): 30333(2483/27850)
May 25, 2018 9:40:24 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(310/420) took 608125 ms. Total solver calls (SAT/UNSAT): 30516(2502/28014)
May 25, 2018 9:40:27 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(313/420) took 611508 ms. Total solver calls (SAT/UNSAT): 30783(2517/28266)
May 25, 2018 9:40:31 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-10(UNSAT) depth K=4 took 31988 ms
May 25, 2018 9:40:31 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(315/420) took 615033 ms. Total solver calls (SAT/UNSAT): 30956(2538/28418)
May 25, 2018 9:40:34 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(317/420) took 618528 ms. Total solver calls (SAT/UNSAT): 31125(2555/28570)
May 25, 2018 9:40:37 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(319/420) took 621758 ms. Total solver calls (SAT/UNSAT): 31290(2562/28728)
May 25, 2018 9:40:41 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(321/420) took 625376 ms. Total solver calls (SAT/UNSAT): 31451(2583/28868)
May 25, 2018 9:40:44 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(323/420) took 628456 ms. Total solver calls (SAT/UNSAT): 31608(2600/29008)
May 25, 2018 9:40:47 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(325/420) took 631774 ms. Total solver calls (SAT/UNSAT): 31761(2607/29154)
May 25, 2018 9:40:51 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(327/420) took 635275 ms. Total solver calls (SAT/UNSAT): 31910(2628/29282)
May 25, 2018 9:40:54 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(329/420) took 638675 ms. Total solver calls (SAT/UNSAT): 32055(2645/29410)
May 25, 2018 9:40:57 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(331/420) took 641693 ms. Total solver calls (SAT/UNSAT): 32196(2652/29544)
May 25, 2018 9:41:01 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(333/420) took 645277 ms. Total solver calls (SAT/UNSAT): 32333(2673/29660)
May 25, 2018 9:41:04 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(335/420) took 648948 ms. Total solver calls (SAT/UNSAT): 32466(2690/29776)
May 25, 2018 9:41:08 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(337/420) took 652274 ms. Total solver calls (SAT/UNSAT): 32595(2697/29898)
May 25, 2018 9:41:12 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(340/420) took 656459 ms. Total solver calls (SAT/UNSAT): 32781(2727/30054)
May 25, 2018 9:41:16 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(343/420) took 660464 ms. Total solver calls (SAT/UNSAT): 32958(2742/30216)
May 25, 2018 9:41:20 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(346/420) took 664250 ms. Total solver calls (SAT/UNSAT): 33126(2760/30366)
May 25, 2018 9:41:24 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(349/420) took 668150 ms. Total solver calls (SAT/UNSAT): 33285(2778/30507)
May 25, 2018 9:41:27 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(357/420) took 671247 ms. Total solver calls (SAT/UNSAT): 33419(2778/30641)
May 25, 2018 9:41:30 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(359/420) took 674299 ms. Total solver calls (SAT/UNSAT): 33516(2787/30729)
May 25, 2018 9:41:33 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-6-ReachabilityCardinality-08
May 25, 2018 9:41:33 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-08(SAT) depth K=2 took 86590 ms
May 25, 2018 9:41:34 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(361/420) took 678506 ms. Total solver calls (SAT/UNSAT): 33609(2792/30817)
May 25, 2018 9:41:38 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(365/420) took 682102 ms. Total solver calls (SAT/UNSAT): 33783(2798/30985)
May 25, 2018 9:41:42 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(369/420) took 685966 ms. Total solver calls (SAT/UNSAT): 33941(2808/31133)
May 25, 2018 9:41:45 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(375/420) took 689154 ms. Total solver calls (SAT/UNSAT): 34148(2822/31326)
May 25, 2018 9:41:48 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(385/420) took 692394 ms. Total solver calls (SAT/UNSAT): 34413(2838/31575)
May 25, 2018 9:41:51 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(395/420) took 695656 ms. Total solver calls (SAT/UNSAT): 34578(2865/31713)
May 25, 2018 9:41:53 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Finished co-enabling matrix. took 697273 ms. Total solver calls (SAT/UNSAT): 34650(2883/31767)
May 25, 2018 9:41:53 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeDoNotAccord
INFO: Computing Do-Not-Accords matrix : 420 transitions.
May 25, 2018 9:42:01 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-11(UNSAT) depth K=4 took 90448 ms
May 25, 2018 9:42:05 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed DNA matrix. took 11702 ms. Total solver calls (SAT/UNSAT): 339(0/339)
May 25, 2018 9:42:05 AM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 808925ms conformant to PINS in folder :/home/mcc/execution
May 25, 2018 9:42:37 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-6-ReachabilityCardinality-09
May 25, 2018 9:42:37 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-09(SAT) depth K=2 took 64914 ms
May 25, 2018 9:42:54 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-12(UNSAT) depth K=4 took 53381 ms
May 25, 2018 9:43:26 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-6-ReachabilityCardinality-10
May 25, 2018 9:43:26 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-10(SAT) depth K=2 took 48574 ms
May 25, 2018 9:44:03 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-13(UNSAT) depth K=4 took 68607 ms
May 25, 2018 9:44:42 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-6-ReachabilityCardinality-11
May 25, 2018 9:44:42 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-11(SAT) depth K=2 took 76199 ms
May 25, 2018 9:46:43 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-14(UNSAT) depth K=4 took 160027 ms
May 25, 2018 9:47:55 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-6-ReachabilityCardinality-12
May 25, 2018 9:47:55 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-12(SAT) depth K=2 took 193179 ms
May 25, 2018 9:48:48 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-6-ReachabilityCardinality-13
May 25, 2018 9:48:48 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-13(SAT) depth K=2 took 52633 ms
May 25, 2018 9:49:17 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-6-ReachabilityCardinality-14
May 25, 2018 9:49:17 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-14(SAT) depth K=2 took 28625 ms
May 25, 2018 9:49:53 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-6-ReachabilityCardinality-15
May 25, 2018 9:49:53 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-15(SAT) depth K=2 took 36830 ms
May 25, 2018 9:51:03 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-6-ReachabilityCardinality-00
May 25, 2018 9:51:03 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-00(SAT) depth K=3 took 69250 ms
May 25, 2018 9:51:22 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-15(UNSAT) depth K=4 took 279106 ms
May 25, 2018 9:52:30 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-6-ReachabilityCardinality-01
May 25, 2018 9:52:30 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-01(SAT) depth K=3 took 87662 ms
pins2lts-mc, 0.000: Registering PINS so language module
pins2lts-mc, 0.000, ** error **: out of memory trying to get 4294967296
java.lang.RuntimeException: Unexpected exception when executing ltsmin :CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -i, LamportFastMutExCOL6ReachabilityCardinality08==true], workingDir=/home/mcc/execution]
255
at fr.lip6.move.gal.application.LTSminRunner.checkProperty(LTSminRunner.java:167)
at fr.lip6.move.gal.application.LTSminRunner.access$9(LTSminRunner.java:122)
at fr.lip6.move.gal.application.LTSminRunner$1.run(LTSminRunner.java:91)
at java.lang.Thread.run(Thread.java:748)
May 25, 2018 9:55:00 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-00(UNSAT) depth K=5 took 217644 ms
May 25, 2018 9:58:29 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-6-ReachabilityCardinality-07
May 25, 2018 9:58:29 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-07(SAT) depth K=3 took 358371 ms
May 25, 2018 10:00:49 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-6-ReachabilityCardinality-08
May 25, 2018 10:00:49 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-08(SAT) depth K=3 took 139742 ms
May 25, 2018 10:02:50 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-6-ReachabilityCardinality-09
May 25, 2018 10:02:50 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-09(SAT) depth K=3 took 121656 ms
ITS-tools command line returned an error code 137
May 25, 2018 10:04:51 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-6-ReachabilityCardinality-10
May 25, 2018 10:04:51 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-10(SAT) depth K=3 took 121095 ms
May 25, 2018 10:06:50 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-6-ReachabilityCardinality-11
May 25, 2018 10:06:50 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-11(SAT) depth K=3 took 118414 ms
May 25, 2018 10:08:16 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-01(UNSAT) depth K=5 took 796255 ms
May 25, 2018 10:08:56 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-6-ReachabilityCardinality-12
May 25, 2018 10:08:56 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-12(SAT) depth K=3 took 126666 ms
May 25, 2018 10:10:51 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-6-ReachabilityCardinality-13
May 25, 2018 10:10:51 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-13(SAT) depth K=3 took 114565 ms
May 25, 2018 10:13:56 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-07(UNSAT) depth K=5 took 339881 ms
May 25, 2018 10:14:13 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-6-ReachabilityCardinality-14
May 25, 2018 10:14:13 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-14(SAT) depth K=3 took 202037 ms
May 25, 2018 10:15:12 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-6-ReachabilityCardinality-15
May 25, 2018 10:15:12 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-15(SAT) depth K=3 took 58900 ms
May 25, 2018 10:16:01 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-08(UNSAT) depth K=5 took 125429 ms
May 25, 2018 10:17:49 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-09(UNSAT) depth K=5 took 107963 ms
May 25, 2018 10:20:31 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-10(UNSAT) depth K=5 took 161597 ms
May 25, 2018 10:20:33 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-6-ReachabilityCardinality-00
May 25, 2018 10:20:33 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-00(SAT) depth K=4 took 320688 ms
May 25, 2018 10:25:41 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-6-ReachabilityCardinality-01
May 25, 2018 10:25:41 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-01(SAT) depth K=4 took 308491 ms

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="LamportFastMutEx-COL-6"
export BK_EXAMINATION="ReachabilityCardinality"
export BK_TOOL="itstoolsl"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

tar xzf /home/mcc/BenchKit/INPUTS/LamportFastMutEx-COL-6.tgz
mv LamportFastMutEx-COL-6 execution
cd execution
pwd
ls -lh

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3637"
echo " Executing tool itstoolsl"
echo " Input is LamportFastMutEx-COL-6, examination is ReachabilityCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r117-csrt-152666476500089"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' ReachabilityCardinality.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;