Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Waiting for the VM to be ready (probing ssh)
.................................................................................
/home/mcc/execution
total 2.2M
-rw-r--r-- 1 mcc users 90K May 15 18:54 CTLCardinality.txt
-rw-r--r-- 1 mcc users 242K May 15 18:54 CTLCardinality.xml
-rw-r--r-- 1 mcc users 63K May 15 18:54 CTLFireability.txt
-rw-r--r-- 1 mcc users 204K May 15 18:54 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K May 15 18:50 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.0K May 15 18:50 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 32K May 15 18:54 LTLCardinality.txt
-rw-r--r-- 1 mcc users 86K May 15 18:54 LTLCardinality.xml
-rw-r--r-- 1 mcc users 22K May 15 18:54 LTLFireability.txt
-rw-r--r-- 1 mcc users 69K May 15 18:54 LTLFireability.xml
-rw-r--r-- 1 mcc users 34K May 15 18:54 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 97K May 15 18:54 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 104 May 15 18:54 ReachabilityDeadlock.txt
-rw-r--r-- 1 mcc users 342 May 15 18:54 ReachabilityDeadlock.xml
-rw-r--r-- 1 mcc users 69K May 15 18:54 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 230K May 15 18:54 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 9.5K May 15 18:54 UpperBounds.txt
-rw-r--r-- 1 mcc users 21K May 15 18:54 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 May 15 18:50 equiv_col
-rw-r--r-- 1 mcc users 2 May 15 18:50 instance
-rw-r--r-- 1 mcc users 6 May 15 18:50 iscolored
-rw-r--r-- 1 mcc users 911K May 15 18:50 model.pnml
=====================================================================
Generated by BenchKit 2-3637
Executing tool itstools
Input is Peterson-PT-5, examination is ReachabilityCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r116-csrt-152666475600579
=====================================================================

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME Peterson-PT-5-ReachabilityCardinality-00
FORMULA_NAME Peterson-PT-5-ReachabilityCardinality-01
FORMULA_NAME Peterson-PT-5-ReachabilityCardinality-02
FORMULA_NAME Peterson-PT-5-ReachabilityCardinality-03
FORMULA_NAME Peterson-PT-5-ReachabilityCardinality-04
FORMULA_NAME Peterson-PT-5-ReachabilityCardinality-05
FORMULA_NAME Peterson-PT-5-ReachabilityCardinality-06
FORMULA_NAME Peterson-PT-5-ReachabilityCardinality-07
FORMULA_NAME Peterson-PT-5-ReachabilityCardinality-08
FORMULA_NAME Peterson-PT-5-ReachabilityCardinality-09
FORMULA_NAME Peterson-PT-5-ReachabilityCardinality-10
FORMULA_NAME Peterson-PT-5-ReachabilityCardinality-11
FORMULA_NAME Peterson-PT-5-ReachabilityCardinality-12
FORMULA_NAME Peterson-PT-5-ReachabilityCardinality-13
FORMULA_NAME Peterson-PT-5-ReachabilityCardinality-14
FORMULA_NAME Peterson-PT-5-ReachabilityCardinality-15

=== Now, execution of the tool begins

BK_START 1527187381408

FORMULA Peterson-PT-5-ReachabilityCardinality-07 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805151631/bin/its-reach-linux64, --gc-threshold, 2000000, --quiet, -i, /home/mcc/execution/ReachabilityCardinality.pnml.gal, -t, CGAL, -reachable-file, ReachabilityCardinality.prop, --nowitness], workingDir=/home/mcc/execution]

its-reach command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805151631/bin/its-reach-linux64 --gc-threshold 2000000 --quiet -i /home/mcc/execution/ReachabilityCardinality.pnml.gal -t CGAL -reachable-file ReachabilityCardinality.prop --nowitness
Loading property file ReachabilityCardinality.prop.
Read [reachable] property : Peterson-PT-5-ReachabilityCardinality-00 with value :(!(((((((CS_0+CS_3)+CS_4)+CS_1)+CS_2)+CS_5)<=(((((((((((((((((((((((((((((Turn_1_0+Turn_2_0)+Turn_0_0)+Turn_1_5)+Turn_0_5)+Turn_4_4)+Turn_3_4)+Turn_2_4)+Turn_1_4)+Turn_0_4)+Turn_4_3)+Turn_4_5)+Turn_3_5)+Turn_2_5)+Turn_4_1)+Turn_0_2)+Turn_2_1)+Turn_3_1)+Turn_0_1)+Turn_1_1)+Turn_3_0)+Turn_4_0)+Turn_2_3)+Turn_3_3)+Turn_0_3)+Turn_1_3)+Turn_3_2)+Turn_4_2)+Turn_1_2)+Turn_2_2))&&(((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((TestIdentity_1_4_0+TestIdentity_2_4_0)+TestIdentity_5_3_0)+TestIdentity_0_4_0)+TestIdentity_5_4_0)+TestIdentity_0_0_1)+TestIdentity_3_4_0)+TestIdentity_4_4_0)+TestIdentity_3_0_1)+TestIdentity_4_0_1)+TestIdentity_1_0_1)+TestIdentity_2_0_1)+TestIdentity_1_1_1)+TestIdentity_2_1_1)+TestIdentity_5_0_1)+TestIdentity_0_1_1)+TestIdentity_0_2_1)+TestIdentity_5_1_1)+TestIdentity_4_1_1)+TestIdentity_3_1_1)+TestIdentity_4_2_1)+TestIdentity_3_2_1)+TestIdentity_2_2_1)+TestIdentity_1_2_1)+TestIdentity_2_3_1)+TestIdentity_1_3_1)+TestIdentity_0_3_1)+TestIdentity_5_2_1)+TestIdentity_0_4_1)+TestIdentity_5_3_1)+TestIdentity_4_3_1)+TestIdentity_3_3_1)+TestIdentity_0_0_0)+TestIdentity_1_0_0)+TestIdentity_2_0_0)+TestIdentity_3_0_0)+TestIdentity_4_0_0)+TestIdentity_5_0_0)+TestIdentity_0_1_0)+TestIdentity_2_1_0)+TestIdentity_1_1_0)+TestIdentity_4_1_0)+TestIdentity_3_1_0)+TestIdentity_0_2_0)+TestIdentity_5_1_0)+TestIdentity_2_2_0)+TestIdentity_1_2_0)+TestIdentity_4_2_0)+TestIdentity_3_2_0)+TestIdentity_0_3_0)+TestIdentity_5_2_0)+TestIdentity_2_3_0)+TestIdentity_1_3_0)+TestIdentity_4_3_0)+TestIdentity_3_3_0)+TestIdentity_0_2_3)+TestIdentity_5_1_3)+TestIdentity_4_1_3)+TestIdentity_3_1_3)+TestIdentity_2_1_3)+TestIdentity_1_1_3)+TestIdentity_0_1_3)+TestIdentity_5_0_3)+TestIdentity_4_0_3)+TestIdentity_3_0_3)+TestIdentity_2_0_3)+TestIdentity_1_0_3)+TestIdentity_0_0_3)+TestIdentity_5_4_2)+TestIdentity_4_4_2)+TestIdentity_3_4_2)+TestIdentity_3_4_3)+TestIdentity_4_4_3)+TestIdentity_1_4_3)+TestIdentity_2_4_3)+TestIdentity_5_3_3)+TestIdentity_0_4_3)+TestIdentity_3_3_3)+TestIdentity_4_3_3)+TestIdentity_1_3_3)+TestIdentity_2_3_3)+TestIdentity_5_2_3)+TestIdentity_0_3_3)+TestIdentity_3_2_3)+TestIdentity_4_2_3)+TestIdentity_1_2_3)+TestIdentity_2_2_3)+TestIdentity_2_1_2)+TestIdentity_1_1_2)+TestIdentity_4_1_2)+TestIdentity_3_1_2)+TestIdentity_4_0_2)+TestIdentity_3_0_2)+TestIdentity_0_1_2)+TestIdentity_5_0_2)+TestIdentity_0_0_2)+TestIdentity_5_4_1)+TestIdentity_2_0_2)+TestIdentity_1_0_2)+TestIdentity_2_4_1)+TestIdentity_1_4_1)+TestIdentity_4_4_1)+TestIdentity_3_4_1)+TestIdentity_5_3_2)+TestIdentity_0_4_2)+TestIdentity_1_4_2)+TestIdentity_2_4_2)+TestIdentity_1_3_2)+TestIdentity_2_3_2)+TestIdentity_3_3_2)+TestIdentity_4_3_2)+TestIdentity_3_2_2)+TestIdentity_4_2_2)+TestIdentity_5_2_2)+TestIdentity_0_3_2)+TestIdentity_5_1_2)+TestIdentity_0_2_2)+TestIdentity_1_2_2)+TestIdentity_2_2_2)+TestIdentity_0_2_5)+TestIdentity_5_1_5)+TestIdentity_4_1_5)+TestIdentity_3_1_5)+TestIdentity_4_2_5)+TestIdentity_3_2_5)+TestIdentity_2_2_5)+TestIdentity_1_2_5)+TestIdentity_4_0_5)+TestIdentity_3_0_5)+TestIdentity_2_0_5)+TestIdentity_1_0_5)+TestIdentity_2_1_5)+TestIdentity_1_1_5)+TestIdentity_0_1_5)+TestIdentity_5_0_5)+TestIdentity_3_4_5)+TestIdentity_4_4_5)+TestIdentity_1_4_5)+TestIdentity_2_4_5)+TestIdentity_5_4_5)+TestIdentity_1_3_5)+TestIdentity_2_3_5)+TestIdentity_5_2_5)+TestIdentity_0_3_5)+TestIdentity_5_3_5)+TestIdentity_0_4_5)+TestIdentity_3_3_5)+TestIdentity_4_3_5)+TestIdentity_2_1_4)+TestIdentity_1_1_4)+TestIdentity_4_1_4)+TestIdentity_3_1_4)+TestIdentity_0_2_4)+TestIdentity_5_1_4)+TestIdentity_2_2_4)+TestIdentity_1_2_4)+TestIdentity_0_0_4)+TestIdentity_5_4_3)+TestIdentity_2_0_4)+TestIdentity_1_0_4)+TestIdentity_4_0_4)+TestIdentity_3_0_4)+TestIdentity_0_1_4)+TestIdentity_5_0_4)+TestIdentity_5_3_4)+TestIdentity_0_4_4)+TestIdentity_1_4_4)+TestIdentity_2_4_4)+TestIdentity_3_4_4)+TestIdentity_4_4_4)+TestIdentity_5_4_4)+TestIdentity_0_0_5)+TestIdentity_3_2_4)+TestIdentity_4_2_4)+TestIdentity_5_2_4)+TestIdentity_0_3_4)+TestIdentity_1_3_4)+TestIdentity_2_3_4)+TestIdentity_3_3_4)+TestIdentity_4_3_4)<=(((((((((((WantSection_3_F+WantSection_4_F)+WantSection_1_F)+WantSection_2_F)+WantSection_5_F)+WantSection_2_T)+WantSection_1_T)+WantSection_0_T)+WantSection_0_F)+WantSection_5_T)+WantSection_4_T)+WantSection_3_T))&&((((((((((((((((((((((((((((((AskForSection_2_3+AskForSection_1_3)+AskForSection_4_3)+AskForSection_3_3)+AskForSection_4_2)+AskForSection_3_2)+AskForSection_0_3)+AskForSection_5_2)+AskForSection_4_4)+AskForSection_3_4)+AskForSection_5_4)+AskForSection_0_4)+AskForSection_5_3)+AskForSection_2_4)+AskForSection_1_4)+AskForSection_3_0)+AskForSection_4_0)+AskForSection_5_0)+AskForSection_0_1)+AskForSection_0_0)+AskForSection_1_0)+AskForSection_2_0)+AskForSection_5_1)+AskForSection_0_2)+AskForSection_1_2)+AskForSection_2_2)+AskForSection_1_1)+AskForSection_2_1)+AskForSection_3_1)+AskForSection_4_1)<=(((((((((((WantSection_3_F+WantSection_4_F)+WantSection_1_F)+WantSection_2_F)+WantSection_5_F)+WantSection_2_T)+WantSection_1_T)+WantSection_0_T)+WantSection_0_F)+WantSection_5_T)+WantSection_4_T)+WantSection_3_T)))))
Read [reachable] property : Peterson-PT-5-ReachabilityCardinality-01 with value :(!((((((((((((WantSection_3_F+WantSection_4_F)+WantSection_1_F)+WantSection_2_F)+WantSection_5_F)+WantSection_2_T)+WantSection_1_T)+WantSection_0_T)+WantSection_0_F)+WantSection_5_T)+WantSection_4_T)+WantSection_3_T)>=3))
Read [reachable] property : Peterson-PT-5-ReachabilityCardinality-02 with value :(!(((((((((((((((((((((((((((((((TestTurn_3_0+TestTurn_4_0)+TestTurn_1_0)+TestTurn_2_0)+TestTurn_0_0)+TestTurn_0_2)+TestTurn_5_1)+TestTurn_4_1)+TestTurn_3_1)+TestTurn_2_1)+TestTurn_1_1)+TestTurn_0_1)+TestTurn_5_0)+TestTurn_2_3)+TestTurn_1_3)+TestTurn_0_3)+TestTurn_5_2)+TestTurn_4_2)+TestTurn_3_2)+TestTurn_2_2)+TestTurn_1_2)+TestTurn_3_3)+TestTurn_4_3)+TestTurn_5_3)+TestTurn_0_4)+TestTurn_1_4)+TestTurn_2_4)+TestTurn_3_4)+TestTurn_4_4)+TestTurn_5_4)<=(((((((((((((((((((((((((((((AskForSection_2_3+AskForSection_1_3)+AskForSection_4_3)+AskForSection_3_3)+AskForSection_4_2)+AskForSection_3_2)+AskForSection_0_3)+AskForSection_5_2)+AskForSection_4_4)+AskForSection_3_4)+AskForSection_5_4)+AskForSection_0_4)+AskForSection_5_3)+AskForSection_2_4)+AskForSection_1_4)+AskForSection_3_0)+AskForSection_4_0)+AskForSection_5_0)+AskForSection_0_1)+AskForSection_0_0)+AskForSection_1_0)+AskForSection_2_0)+AskForSection_5_1)+AskForSection_0_2)+AskForSection_1_2)+AskForSection_2_2)+AskForSection_1_1)+AskForSection_2_1)+AskForSection_3_1)+AskForSection_4_1))||(((((((Idle_5+Idle_4)+Idle_3)+Idle_2)+Idle_1)+Idle_0)>=1)||((((((CS_0+CS_3)+CS_4)+CS_1)+CS_2)+CS_5)>=2))))
Read [invariant] property : Peterson-PT-5-ReachabilityCardinality-03 with value :(!((!((((((Idle_5+Idle_4)+Idle_3)+Idle_2)+Idle_1)+Idle_0)>=2))&&(((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((IsEndLoop_0_0_0+IsEndLoop_1_0_0)+IsEndLoop_2_0_0)+IsEndLoop_3_0_0)+IsEndLoop_4_0_0)+IsEndLoop_5_0_0)+IsEndLoop_0_1_0)+IsEndLoop_1_1_0)+IsEndLoop_2_1_0)+IsEndLoop_3_1_0)+IsEndLoop_4_1_0)+IsEndLoop_5_1_0)+IsEndLoop_0_2_0)+IsEndLoop_2_2_0)+IsEndLoop_1_2_0)+IsEndLoop_4_2_0)+IsEndLoop_3_2_0)+IsEndLoop_0_3_0)+IsEndLoop_5_2_0)+IsEndLoop_2_3_0)+IsEndLoop_1_3_0)+IsEndLoop_4_3_0)+IsEndLoop_3_3_0)+IsEndLoop_0_4_0)+IsEndLoop_5_3_0)+IsEndLoop_2_4_0)+IsEndLoop_1_4_0)+IsEndLoop_4_4_0)+IsEndLoop_3_4_0)+IsEndLoop_1_0_1)+IsEndLoop_2_0_1)+IsEndLoop_5_4_0)+IsEndLoop_0_0_1)+IsEndLoop_5_0_1)+IsEndLoop_0_1_1)+IsEndLoop_3_0_1)+IsEndLoop_4_0_1)+IsEndLoop_3_1_1)+IsEndLoop_4_1_1)+IsEndLoop_1_1_1)+IsEndLoop_2_1_1)+IsEndLoop_1_2_1)+IsEndLoop_2_2_1)+IsEndLoop_5_1_1)+IsEndLoop_0_2_1)+IsEndLoop_0_3_1)+IsEndLoop_5_2_1)+IsEndLoop_4_2_1)+IsEndLoop_3_2_1)+IsEndLoop_4_3_1)+IsEndLoop_3_3_1)+IsEndLoop_2_3_1)+IsEndLoop_1_3_1)+IsEndLoop_2_4_1)+IsEndLoop_1_4_1)+IsEndLoop_0_4_1)+IsEndLoop_5_3_1)+IsEndLoop_0_0_2)+IsEndLoop_5_4_1)+IsEndLoop_4_4_1)+IsEndLoop_3_4_1)+IsEndLoop_5_0_2)+IsEndLoop_0_1_2)+IsEndLoop_1_1_2)+IsEndLoop_2_1_2)+IsEndLoop_1_0_2)+IsEndLoop_2_0_2)+IsEndLoop_3_0_2)+IsEndLoop_4_0_2)+IsEndLoop_1_2_2)+IsEndLoop_2_2_2)+IsEndLoop_3_2_2)+IsEndLoop_4_2_2)+IsEndLoop_3_1_2)+IsEndLoop_4_1_2)+IsEndLoop_5_1_2)+IsEndLoop_0_2_2)+IsEndLoop_4_3_2)+IsEndLoop_3_3_2)+IsEndLoop_0_4_2)+IsEndLoop_5_3_2)+IsEndLoop_0_3_2)+IsEndLoop_5_2_2)+IsEndLoop_2_3_2)+IsEndLoop_1_3_2)+IsEndLoop_0_0_3)+IsEndLoop_5_4_2)+IsEndLoop_2_0_3)+IsEndLoop_1_0_3)+IsEndLoop_2_4_2)+IsEndLoop_1_4_2)+IsEndLoop_4_4_2)+IsEndLoop_3_4_2)+IsEndLoop_3_1_3)+IsEndLoop_4_1_3)+IsEndLoop_1_1_3)+IsEndLoop_2_1_3)+IsEndLoop_5_0_3)+IsEndLoop_0_1_3)+IsEndLoop_3_0_3)+IsEndLoop_4_0_3)+IsEndLoop_5_2_3)+IsEndLoop_0_3_3)+IsEndLoop_3_2_3)+IsEndLoop_4_2_3)+IsEndLoop_1_2_3)+IsEndLoop_2_2_3)+IsEndLoop_5_1_3)+IsEndLoop_0_2_3)+IsEndLoop_2_4_3)+IsEndLoop_1_4_3)+IsEndLoop_0_4_3)+IsEndLoop_5_3_3)+IsEndLoop_4_3_3)+IsEndLoop_3_3_3)+IsEndLoop_2_3_3)+IsEndLoop_1_3_3)+IsEndLoop_4_0_4)+IsEndLoop_3_0_4)+IsEndLoop_2_0_4)+IsEndLoop_1_0_4)+IsEndLoop_0_0_4)+IsEndLoop_5_4_3)+IsEndLoop_4_4_3)+IsEndLoop_3_4_3)+IsEndLoop_2_2_4)+IsEndLoop_1_2_4)+IsEndLoop_4_2_4)+IsEndLoop_3_2_4)+IsEndLoop_0_3_4)+IsEndLoop_5_2_4)+IsEndLoop_2_3_4)+IsEndLoop_1_3_4)+IsEndLoop_0_1_4)+IsEndLoop_5_0_4)+IsEndLoop_2_1_4)+IsEndLoop_1_1_4)+IsEndLoop_4_1_4)+IsEndLoop_3_1_4)+IsEndLoop_0_2_4)+IsEndLoop_5_1_4)+IsEndLoop_5_4_4)+IsEndLoop_0_0_5)+IsEndLoop_1_0_5)+IsEndLoop_2_0_5)+IsEndLoop_3_0_5)+IsEndLoop_4_0_5)+IsEndLoop_5_0_5)+IsEndLoop_0_1_5)+IsEndLoop_3_3_4)+IsEndLoop_4_3_4)+IsEndLoop_5_3_4)+IsEndLoop_0_4_4)+IsEndLoop_1_4_4)+IsEndLoop_2_4_4)+IsEndLoop_3_4_4)+IsEndLoop_4_4_4)+IsEndLoop_0_3_5)+IsEndLoop_5_2_5)+IsEndLoop_4_2_5)+IsEndLoop_3_2_5)+IsEndLoop_4_3_5)+IsEndLoop_3_3_5)+IsEndLoop_2_3_5)+IsEndLoop_1_3_5)+IsEndLoop_4_1_5)+IsEndLoop_3_1_5)+IsEndLoop_2_1_5)+IsEndLoop_1_1_5)+IsEndLoop_2_2_5)+IsEndLoop_1_2_5)+IsEndLoop_0_2_5)+IsEndLoop_5_1_5)+IsEndLoop_1_4_5)+IsEndLoop_2_4_5)+IsEndLoop_5_3_5)+IsEndLoop_0_4_5)+IsEndLoop_5_4_5)+IsEndLoop_3_4_5)+IsEndLoop_4_4_5)<=(((((((((((((((((((((((((((((TestTurn_3_0+TestTurn_4_0)+TestTurn_1_0)+TestTurn_2_0)+TestTurn_0_0)+TestTurn_0_2)+TestTurn_5_1)+TestTurn_4_1)+TestTurn_3_1)+TestTurn_2_1)+TestTurn_1_1)+TestTurn_0_1)+TestTurn_5_0)+TestTurn_2_3)+TestTurn_1_3)+TestTurn_0_3)+TestTurn_5_2)+TestTurn_4_2)+TestTurn_3_2)+TestTurn_2_2)+TestTurn_1_2)+TestTurn_3_3)+TestTurn_4_3)+TestTurn_5_3)+TestTurn_0_4)+TestTurn_1_4)+TestTurn_2_4)+TestTurn_3_4)+TestTurn_4_4)+TestTurn_5_4))&&((((((((((((((((((((((((((((((EndTurn_3_0+EndTurn_4_0)+EndTurn_1_0)+EndTurn_2_0)+EndTurn_1_1)+EndTurn_2_1)+EndTurn_5_0)+EndTurn_0_1)+EndTurn_0_0)+EndTurn_4_3)+EndTurn_3_3)+EndTurn_0_4)+EndTurn_5_3)+EndTurn_0_3)+EndTurn_5_2)+EndTurn_2_3)+EndTurn_1_3)+EndTurn_2_2)+EndTurn_1_2)+EndTurn_4_2)+EndTurn_3_2)+EndTurn_4_1)+EndTurn_3_1)+EndTurn_0_2)+EndTurn_5_1)+EndTurn_5_4)+EndTurn_1_4)+EndTurn_2_4)+EndTurn_3_4)+EndTurn_4_4)>=1))))
Read [invariant] property : Peterson-PT-5-ReachabilityCardinality-04 with value :(((((((((((((((((((((((((((((((EndTurn_3_0+EndTurn_4_0)+EndTurn_1_0)+EndTurn_2_0)+EndTurn_1_1)+EndTurn_2_1)+EndTurn_5_0)+EndTurn_0_1)+EndTurn_0_0)+EndTurn_4_3)+EndTurn_3_3)+EndTurn_0_4)+EndTurn_5_3)+EndTurn_0_3)+EndTurn_5_2)+EndTurn_2_3)+EndTurn_1_3)+EndTurn_2_2)+EndTurn_1_2)+EndTurn_4_2)+EndTurn_3_2)+EndTurn_4_1)+EndTurn_3_1)+EndTurn_0_2)+EndTurn_5_1)+EndTurn_5_4)+EndTurn_1_4)+EndTurn_2_4)+EndTurn_3_4)+EndTurn_4_4)<=(((((((((((((((((((((((((((((Turn_1_0+Turn_2_0)+Turn_0_0)+Turn_1_5)+Turn_0_5)+Turn_4_4)+Turn_3_4)+Turn_2_4)+Turn_1_4)+Turn_0_4)+Turn_4_3)+Turn_4_5)+Turn_3_5)+Turn_2_5)+Turn_4_1)+Turn_0_2)+Turn_2_1)+Turn_3_1)+Turn_0_1)+Turn_1_1)+Turn_3_0)+Turn_4_0)+Turn_2_3)+Turn_3_3)+Turn_0_3)+Turn_1_3)+Turn_3_2)+Turn_4_2)+Turn_1_2)+Turn_2_2))||((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((IsEndLoop_0_0_0+IsEndLoop_1_0_0)+IsEndLoop_2_0_0)+IsEndLoop_3_0_0)+IsEndLoop_4_0_0)+IsEndLoop_5_0_0)+IsEndLoop_0_1_0)+IsEndLoop_1_1_0)+IsEndLoop_2_1_0)+IsEndLoop_3_1_0)+IsEndLoop_4_1_0)+IsEndLoop_5_1_0)+IsEndLoop_0_2_0)+IsEndLoop_2_2_0)+IsEndLoop_1_2_0)+IsEndLoop_4_2_0)+IsEndLoop_3_2_0)+IsEndLoop_0_3_0)+IsEndLoop_5_2_0)+IsEndLoop_2_3_0)+IsEndLoop_1_3_0)+IsEndLoop_4_3_0)+IsEndLoop_3_3_0)+IsEndLoop_0_4_0)+IsEndLoop_5_3_0)+IsEndLoop_2_4_0)+IsEndLoop_1_4_0)+IsEndLoop_4_4_0)+IsEndLoop_3_4_0)+IsEndLoop_1_0_1)+IsEndLoop_2_0_1)+IsEndLoop_5_4_0)+IsEndLoop_0_0_1)+IsEndLoop_5_0_1)+IsEndLoop_0_1_1)+IsEndLoop_3_0_1)+IsEndLoop_4_0_1)+IsEndLoop_3_1_1)+IsEndLoop_4_1_1)+IsEndLoop_1_1_1)+IsEndLoop_2_1_1)+IsEndLoop_1_2_1)+IsEndLoop_2_2_1)+IsEndLoop_5_1_1)+IsEndLoop_0_2_1)+IsEndLoop_0_3_1)+IsEndLoop_5_2_1)+IsEndLoop_4_2_1)+IsEndLoop_3_2_1)+IsEndLoop_4_3_1)+IsEndLoop_3_3_1)+IsEndLoop_2_3_1)+IsEndLoop_1_3_1)+IsEndLoop_2_4_1)+IsEndLoop_1_4_1)+IsEndLoop_0_4_1)+IsEndLoop_5_3_1)+IsEndLoop_0_0_2)+IsEndLoop_5_4_1)+IsEndLoop_4_4_1)+IsEndLoop_3_4_1)+IsEndLoop_5_0_2)+IsEndLoop_0_1_2)+IsEndLoop_1_1_2)+IsEndLoop_2_1_2)+IsEndLoop_1_0_2)+IsEndLoop_2_0_2)+IsEndLoop_3_0_2)+IsEndLoop_4_0_2)+IsEndLoop_1_2_2)+IsEndLoop_2_2_2)+IsEndLoop_3_2_2)+IsEndLoop_4_2_2)+IsEndLoop_3_1_2)+IsEndLoop_4_1_2)+IsEndLoop_5_1_2)+IsEndLoop_0_2_2)+IsEndLoop_4_3_2)+IsEndLoop_3_3_2)+IsEndLoop_0_4_2)+IsEndLoop_5_3_2)+IsEndLoop_0_3_2)+IsEndLoop_5_2_2)+IsEndLoop_2_3_2)+IsEndLoop_1_3_2)+IsEndLoop_0_0_3)+IsEndLoop_5_4_2)+IsEndLoop_2_0_3)+IsEndLoop_1_0_3)+IsEndLoop_2_4_2)+IsEndLoop_1_4_2)+IsEndLoop_4_4_2)+IsEndLoop_3_4_2)+IsEndLoop_3_1_3)+IsEndLoop_4_1_3)+IsEndLoop_1_1_3)+IsEndLoop_2_1_3)+IsEndLoop_5_0_3)+IsEndLoop_0_1_3)+IsEndLoop_3_0_3)+IsEndLoop_4_0_3)+IsEndLoop_5_2_3)+IsEndLoop_0_3_3)+IsEndLoop_3_2_3)+IsEndLoop_4_2_3)+IsEndLoop_1_2_3)+IsEndLoop_2_2_3)+IsEndLoop_5_1_3)+IsEndLoop_0_2_3)+IsEndLoop_2_4_3)+IsEndLoop_1_4_3)+IsEndLoop_0_4_3)+IsEndLoop_5_3_3)+IsEndLoop_4_3_3)+IsEndLoop_3_3_3)+IsEndLoop_2_3_3)+IsEndLoop_1_3_3)+IsEndLoop_4_0_4)+IsEndLoop_3_0_4)+IsEndLoop_2_0_4)+IsEndLoop_1_0_4)+IsEndLoop_0_0_4)+IsEndLoop_5_4_3)+IsEndLoop_4_4_3)+IsEndLoop_3_4_3)+IsEndLoop_2_2_4)+IsEndLoop_1_2_4)+IsEndLoop_4_2_4)+IsEndLoop_3_2_4)+IsEndLoop_0_3_4)+IsEndLoop_5_2_4)+IsEndLoop_2_3_4)+IsEndLoop_1_3_4)+IsEndLoop_0_1_4)+IsEndLoop_5_0_4)+IsEndLoop_2_1_4)+IsEndLoop_1_1_4)+IsEndLoop_4_1_4)+IsEndLoop_3_1_4)+IsEndLoop_0_2_4)+IsEndLoop_5_1_4)+IsEndLoop_5_4_4)+IsEndLoop_0_0_5)+IsEndLoop_1_0_5)+IsEndLoop_2_0_5)+IsEndLoop_3_0_5)+IsEndLoop_4_0_5)+IsEndLoop_5_0_5)+IsEndLoop_0_1_5)+IsEndLoop_3_3_4)+IsEndLoop_4_3_4)+IsEndLoop_5_3_4)+IsEndLoop_0_4_4)+IsEndLoop_1_4_4)+IsEndLoop_2_4_4)+IsEndLoop_3_4_4)+IsEndLoop_4_4_4)+IsEndLoop_0_3_5)+IsEndLoop_5_2_5)+IsEndLoop_4_2_5)+IsEndLoop_3_2_5)+IsEndLoop_4_3_5)+IsEndLoop_3_3_5)+IsEndLoop_2_3_5)+IsEndLoop_1_3_5)+IsEndLoop_4_1_5)+IsEndLoop_3_1_5)+IsEndLoop_2_1_5)+IsEndLoop_1_1_5)+IsEndLoop_2_2_5)+IsEndLoop_1_2_5)+IsEndLoop_0_2_5)+IsEndLoop_5_1_5)+IsEndLoop_1_4_5)+IsEndLoop_2_4_5)+IsEndLoop_5_3_5)+IsEndLoop_0_4_5)+IsEndLoop_5_4_5)+IsEndLoop_3_4_5)+IsEndLoop_4_4_5)>=2)||((((((CS_0+CS_3)+CS_4)+CS_1)+CS_2)+CS_5)<=(((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((TestAlone_1_1_0+TestAlone_2_1_0)+TestAlone_4_0_0)+TestAlone_5_0_0)+TestAlone_5_1_0)+TestAlone_1_2_0)+TestAlone_3_1_0)+TestAlone_4_1_0)+TestAlone_2_0_0)+TestAlone_3_0_0)+TestAlone_1_0_0)+TestAlone_0_2_1)+TestAlone_2_2_1)+TestAlone_3_2_1)+TestAlone_4_2_1)+TestAlone_5_2_1)+TestAlone_0_3_1)+TestAlone_2_3_1)+TestAlone_3_3_1)+TestAlone_3_0_1)+TestAlone_4_0_1)+TestAlone_5_0_1)+TestAlone_0_1_1)+TestAlone_2_1_1)+TestAlone_3_1_1)+TestAlone_4_1_1)+TestAlone_5_1_1)+TestAlone_1_4_0)+TestAlone_5_3_0)+TestAlone_3_4_0)+TestAlone_2_4_0)+TestAlone_5_4_0)+TestAlone_4_4_0)+TestAlone_2_0_1)+TestAlone_0_0_1)+TestAlone_3_2_0)+TestAlone_2_2_0)+TestAlone_5_2_0)+TestAlone_4_2_0)+TestAlone_2_3_0)+TestAlone_1_3_0)+TestAlone_4_3_0)+TestAlone_3_3_0)+TestAlone_4_4_2)+TestAlone_5_4_2)+TestAlone_1_4_2)+TestAlone_3_4_2)+TestAlone_5_3_2)+TestAlone_0_4_2)+TestAlone_3_3_2)+TestAlone_4_3_2)+TestAlone_0_3_2)+TestAlone_1_3_2)+TestAlone_4_2_2)+TestAlone_5_2_2)+TestAlone_1_2_2)+TestAlone_3_2_2)+TestAlone_5_1_2)+TestAlone_0_2_2)+TestAlone_4_1_2)+TestAlone_3_1_2)+TestAlone_1_1_2)+TestAlone_0_1_2)+TestAlone_5_0_2)+TestAlone_4_0_2)+TestAlone_3_0_2)+TestAlone_1_0_2)+TestAlone_0_0_2)+TestAlone_5_4_1)+TestAlone_4_4_1)+TestAlone_3_4_1)+TestAlone_2_4_1)+TestAlone_0_4_1)+TestAlone_5_3_1)+TestAlone_4_3_1)+TestAlone_3_0_4)+TestAlone_5_0_4)+TestAlone_0_1_4)+TestAlone_1_1_4)+TestAlone_5_4_3)+TestAlone_0_0_4)+TestAlone_1_0_4)+TestAlone_2_0_4)+TestAlone_0_4_3)+TestAlone_1_4_3)+TestAlone_2_4_3)+TestAlone_4_4_3)+TestAlone_1_3_3)+TestAlone_2_3_3)+TestAlone_4_3_3)+TestAlone_5_3_3)+TestAlone_4_2_3)+TestAlone_2_2_3)+TestAlone_0_3_3)+TestAlone_5_2_3)+TestAlone_5_1_3)+TestAlone_4_1_3)+TestAlone_1_2_3)+TestAlone_0_2_3)+TestAlone_0_1_3)+TestAlone_5_0_3)+TestAlone_2_1_3)+TestAlone_1_1_3)+TestAlone_1_0_3)+TestAlone_0_0_3)+TestAlone_4_0_3)+TestAlone_2_0_3)+TestAlone_0_4_5)+TestAlone_1_4_5)+TestAlone_3_3_5)+TestAlone_4_3_5)+TestAlone_1_3_5)+TestAlone_2_3_5)+TestAlone_4_2_5)+TestAlone_0_3_5)+TestAlone_4_4_5)+TestAlone_2_4_5)+TestAlone_3_4_5)+TestAlone_1_2_4)+TestAlone_2_2_4)+TestAlone_3_2_4)+TestAlone_5_2_4)+TestAlone_2_1_4)+TestAlone_3_1_4)+TestAlone_5_1_4)+TestAlone_0_2_4)+TestAlone_5_3_4)+TestAlone_0_4_4)+TestAlone_1_4_4)+TestAlone_2_4_4)+TestAlone_0_3_4)+TestAlone_1_3_4)+TestAlone_2_3_4)+TestAlone_3_3_4)+TestAlone_3_0_5)+TestAlone_2_0_5)+TestAlone_0_1_5)+TestAlone_4_0_5)+TestAlone_5_4_4)+TestAlone_3_4_4)+TestAlone_1_0_5)+TestAlone_0_0_5)+TestAlone_1_2_5)+TestAlone_0_2_5)+TestAlone_3_2_5)+TestAlone_2_2_5)+TestAlone_2_1_5)+TestAlone_1_1_5)+TestAlone_4_1_5)+TestAlone_3_1_5)))&&(!((((((((((((((((((((((((((((((Turn_1_0+Turn_2_0)+Turn_0_0)+Turn_1_5)+Turn_0_5)+Turn_4_4)+Turn_3_4)+Turn_2_4)+Turn_1_4)+Turn_0_4)+Turn_4_3)+Turn_4_5)+Turn_3_5)+Turn_2_5)+Turn_4_1)+Turn_0_2)+Turn_2_1)+Turn_3_1)+Turn_0_1)+Turn_1_1)+Turn_3_0)+Turn_4_0)+Turn_2_3)+Turn_3_3)+Turn_0_3)+Turn_1_3)+Turn_3_2)+Turn_4_2)+Turn_1_2)+Turn_2_2)>=2))))
Read [reachable] property : Peterson-PT-5-ReachabilityCardinality-05 with value :(((((((((((((((((((((((((((((((((TestTurn_3_0+TestTurn_4_0)+TestTurn_1_0)+TestTurn_2_0)+TestTurn_0_0)+TestTurn_0_2)+TestTurn_5_1)+TestTurn_4_1)+TestTurn_3_1)+TestTurn_2_1)+TestTurn_1_1)+TestTurn_0_1)+TestTurn_5_0)+TestTurn_2_3)+TestTurn_1_3)+TestTurn_0_3)+TestTurn_5_2)+TestTurn_4_2)+TestTurn_3_2)+TestTurn_2_2)+TestTurn_1_2)+TestTurn_3_3)+TestTurn_4_3)+TestTurn_5_3)+TestTurn_0_4)+TestTurn_1_4)+TestTurn_2_4)+TestTurn_3_4)+TestTurn_4_4)+TestTurn_5_4)<=(((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((IsEndLoop_0_0_0+IsEndLoop_1_0_0)+IsEndLoop_2_0_0)+IsEndLoop_3_0_0)+IsEndLoop_4_0_0)+IsEndLoop_5_0_0)+IsEndLoop_0_1_0)+IsEndLoop_1_1_0)+IsEndLoop_2_1_0)+IsEndLoop_3_1_0)+IsEndLoop_4_1_0)+IsEndLoop_5_1_0)+IsEndLoop_0_2_0)+IsEndLoop_2_2_0)+IsEndLoop_1_2_0)+IsEndLoop_4_2_0)+IsEndLoop_3_2_0)+IsEndLoop_0_3_0)+IsEndLoop_5_2_0)+IsEndLoop_2_3_0)+IsEndLoop_1_3_0)+IsEndLoop_4_3_0)+IsEndLoop_3_3_0)+IsEndLoop_0_4_0)+IsEndLoop_5_3_0)+IsEndLoop_2_4_0)+IsEndLoop_1_4_0)+IsEndLoop_4_4_0)+IsEndLoop_3_4_0)+IsEndLoop_1_0_1)+IsEndLoop_2_0_1)+IsEndLoop_5_4_0)+IsEndLoop_0_0_1)+IsEndLoop_5_0_1)+IsEndLoop_0_1_1)+IsEndLoop_3_0_1)+IsEndLoop_4_0_1)+IsEndLoop_3_1_1)+IsEndLoop_4_1_1)+IsEndLoop_1_1_1)+IsEndLoop_2_1_1)+IsEndLoop_1_2_1)+IsEndLoop_2_2_1)+IsEndLoop_5_1_1)+IsEndLoop_0_2_1)+IsEndLoop_0_3_1)+IsEndLoop_5_2_1)+IsEndLoop_4_2_1)+IsEndLoop_3_2_1)+IsEndLoop_4_3_1)+IsEndLoop_3_3_1)+IsEndLoop_2_3_1)+IsEndLoop_1_3_1)+IsEndLoop_2_4_1)+IsEndLoop_1_4_1)+IsEndLoop_0_4_1)+IsEndLoop_5_3_1)+IsEndLoop_0_0_2)+IsEndLoop_5_4_1)+IsEndLoop_4_4_1)+IsEndLoop_3_4_1)+IsEndLoop_5_0_2)+IsEndLoop_0_1_2)+IsEndLoop_1_1_2)+IsEndLoop_2_1_2)+IsEndLoop_1_0_2)+IsEndLoop_2_0_2)+IsEndLoop_3_0_2)+IsEndLoop_4_0_2)+IsEndLoop_1_2_2)+IsEndLoop_2_2_2)+IsEndLoop_3_2_2)+IsEndLoop_4_2_2)+IsEndLoop_3_1_2)+IsEndLoop_4_1_2)+IsEndLoop_5_1_2)+IsEndLoop_0_2_2)+IsEndLoop_4_3_2)+IsEndLoop_3_3_2)+IsEndLoop_0_4_2)+IsEndLoop_5_3_2)+IsEndLoop_0_3_2)+IsEndLoop_5_2_2)+IsEndLoop_2_3_2)+IsEndLoop_1_3_2)+IsEndLoop_0_0_3)+IsEndLoop_5_4_2)+IsEndLoop_2_0_3)+IsEndLoop_1_0_3)+IsEndLoop_2_4_2)+IsEndLoop_1_4_2)+IsEndLoop_4_4_2)+IsEndLoop_3_4_2)+IsEndLoop_3_1_3)+IsEndLoop_4_1_3)+IsEndLoop_1_1_3)+IsEndLoop_2_1_3)+IsEndLoop_5_0_3)+IsEndLoop_0_1_3)+IsEndLoop_3_0_3)+IsEndLoop_4_0_3)+IsEndLoop_5_2_3)+IsEndLoop_0_3_3)+IsEndLoop_3_2_3)+IsEndLoop_4_2_3)+IsEndLoop_1_2_3)+IsEndLoop_2_2_3)+IsEndLoop_5_1_3)+IsEndLoop_0_2_3)+IsEndLoop_2_4_3)+IsEndLoop_1_4_3)+IsEndLoop_0_4_3)+IsEndLoop_5_3_3)+IsEndLoop_4_3_3)+IsEndLoop_3_3_3)+IsEndLoop_2_3_3)+IsEndLoop_1_3_3)+IsEndLoop_4_0_4)+IsEndLoop_3_0_4)+IsEndLoop_2_0_4)+IsEndLoop_1_0_4)+IsEndLoop_0_0_4)+IsEndLoop_5_4_3)+IsEndLoop_4_4_3)+IsEndLoop_3_4_3)+IsEndLoop_2_2_4)+IsEndLoop_1_2_4)+IsEndLoop_4_2_4)+IsEndLoop_3_2_4)+IsEndLoop_0_3_4)+IsEndLoop_5_2_4)+IsEndLoop_2_3_4)+IsEndLoop_1_3_4)+IsEndLoop_0_1_4)+IsEndLoop_5_0_4)+IsEndLoop_2_1_4)+IsEndLoop_1_1_4)+IsEndLoop_4_1_4)+IsEndLoop_3_1_4)+IsEndLoop_0_2_4)+IsEndLoop_5_1_4)+IsEndLoop_5_4_4)+IsEndLoop_0_0_5)+IsEndLoop_1_0_5)+IsEndLoop_2_0_5)+IsEndLoop_3_0_5)+IsEndLoop_4_0_5)+IsEndLoop_5_0_5)+IsEndLoop_0_1_5)+IsEndLoop_3_3_4)+IsEndLoop_4_3_4)+IsEndLoop_5_3_4)+IsEndLoop_0_4_4)+IsEndLoop_1_4_4)+IsEndLoop_2_4_4)+IsEndLoop_3_4_4)+IsEndLoop_4_4_4)+IsEndLoop_0_3_5)+IsEndLoop_5_2_5)+IsEndLoop_4_2_5)+IsEndLoop_3_2_5)+IsEndLoop_4_3_5)+IsEndLoop_3_3_5)+IsEndLoop_2_3_5)+IsEndLoop_1_3_5)+IsEndLoop_4_1_5)+IsEndLoop_3_1_5)+IsEndLoop_2_1_5)+IsEndLoop_1_1_5)+IsEndLoop_2_2_5)+IsEndLoop_1_2_5)+IsEndLoop_0_2_5)+IsEndLoop_5_1_5)+IsEndLoop_1_4_5)+IsEndLoop_2_4_5)+IsEndLoop_5_3_5)+IsEndLoop_0_4_5)+IsEndLoop_5_4_5)+IsEndLoop_3_4_5)+IsEndLoop_4_4_5))&&((((((((((((WantSection_3_F+WantSection_4_F)+WantSection_1_F)+WantSection_2_F)+WantSection_5_F)+WantSection_2_T)+WantSection_1_T)+WantSection_0_T)+WantSection_0_F)+WantSection_5_T)+WantSection_4_T)+WantSection_3_T)<=(((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((TestAlone_1_1_0+TestAlone_2_1_0)+TestAlone_4_0_0)+TestAlone_5_0_0)+TestAlone_5_1_0)+TestAlone_1_2_0)+TestAlone_3_1_0)+TestAlone_4_1_0)+TestAlone_2_0_0)+TestAlone_3_0_0)+TestAlone_1_0_0)+TestAlone_0_2_1)+TestAlone_2_2_1)+TestAlone_3_2_1)+TestAlone_4_2_1)+TestAlone_5_2_1)+TestAlone_0_3_1)+TestAlone_2_3_1)+TestAlone_3_3_1)+TestAlone_3_0_1)+TestAlone_4_0_1)+TestAlone_5_0_1)+TestAlone_0_1_1)+TestAlone_2_1_1)+TestAlone_3_1_1)+TestAlone_4_1_1)+TestAlone_5_1_1)+TestAlone_1_4_0)+TestAlone_5_3_0)+TestAlone_3_4_0)+TestAlone_2_4_0)+TestAlone_5_4_0)+TestAlone_4_4_0)+TestAlone_2_0_1)+TestAlone_0_0_1)+TestAlone_3_2_0)+TestAlone_2_2_0)+TestAlone_5_2_0)+TestAlone_4_2_0)+TestAlone_2_3_0)+TestAlone_1_3_0)+TestAlone_4_3_0)+TestAlone_3_3_0)+TestAlone_4_4_2)+TestAlone_5_4_2)+TestAlone_1_4_2)+TestAlone_3_4_2)+TestAlone_5_3_2)+TestAlone_0_4_2)+TestAlone_3_3_2)+TestAlone_4_3_2)+TestAlone_0_3_2)+TestAlone_1_3_2)+TestAlone_4_2_2)+TestAlone_5_2_2)+TestAlone_1_2_2)+TestAlone_3_2_2)+TestAlone_5_1_2)+TestAlone_0_2_2)+TestAlone_4_1_2)+TestAlone_3_1_2)+TestAlone_1_1_2)+TestAlone_0_1_2)+TestAlone_5_0_2)+TestAlone_4_0_2)+TestAlone_3_0_2)+TestAlone_1_0_2)+TestAlone_0_0_2)+TestAlone_5_4_1)+TestAlone_4_4_1)+TestAlone_3_4_1)+TestAlone_2_4_1)+TestAlone_0_4_1)+TestAlone_5_3_1)+TestAlone_4_3_1)+TestAlone_3_0_4)+TestAlone_5_0_4)+TestAlone_0_1_4)+TestAlone_1_1_4)+TestAlone_5_4_3)+TestAlone_0_0_4)+TestAlone_1_0_4)+TestAlone_2_0_4)+TestAlone_0_4_3)+TestAlone_1_4_3)+TestAlone_2_4_3)+TestAlone_4_4_3)+TestAlone_1_3_3)+TestAlone_2_3_3)+TestAlone_4_3_3)+TestAlone_5_3_3)+TestAlone_4_2_3)+TestAlone_2_2_3)+TestAlone_0_3_3)+TestAlone_5_2_3)+TestAlone_5_1_3)+TestAlone_4_1_3)+TestAlone_1_2_3)+TestAlone_0_2_3)+TestAlone_0_1_3)+TestAlone_5_0_3)+TestAlone_2_1_3)+TestAlone_1_1_3)+TestAlone_1_0_3)+TestAlone_0_0_3)+TestAlone_4_0_3)+TestAlone_2_0_3)+TestAlone_0_4_5)+TestAlone_1_4_5)+TestAlone_3_3_5)+TestAlone_4_3_5)+TestAlone_1_3_5)+TestAlone_2_3_5)+TestAlone_4_2_5)+TestAlone_0_3_5)+TestAlone_4_4_5)+TestAlone_2_4_5)+TestAlone_3_4_5)+TestAlone_1_2_4)+TestAlone_2_2_4)+TestAlone_3_2_4)+TestAlone_5_2_4)+TestAlone_2_1_4)+TestAlone_3_1_4)+TestAlone_5_1_4)+TestAlone_0_2_4)+TestAlone_5_3_4)+TestAlone_0_4_4)+TestAlone_1_4_4)+TestAlone_2_4_4)+TestAlone_0_3_4)+TestAlone_1_3_4)+TestAlone_2_3_4)+TestAlone_3_3_4)+TestAlone_3_0_5)+TestAlone_2_0_5)+TestAlone_0_1_5)+TestAlone_4_0_5)+TestAlone_5_4_4)+TestAlone_3_4_4)+TestAlone_1_0_5)+TestAlone_0_0_5)+TestAlone_1_2_5)+TestAlone_0_2_5)+TestAlone_3_2_5)+TestAlone_2_2_5)+TestAlone_2_1_5)+TestAlone_1_1_5)+TestAlone_4_1_5)+TestAlone_3_1_5)))||((((((CS_0+CS_3)+CS_4)+CS_1)+CS_2)+CS_5)>=1))&&(((((((((((((((((((((((((((((((AskForSection_2_3+AskForSection_1_3)+AskForSection_4_3)+AskForSection_3_3)+AskForSection_4_2)+AskForSection_3_2)+AskForSection_0_3)+AskForSection_5_2)+AskForSection_4_4)+AskForSection_3_4)+AskForSection_5_4)+AskForSection_0_4)+AskForSection_5_3)+AskForSection_2_4)+AskForSection_1_4)+AskForSection_3_0)+AskForSection_4_0)+AskForSection_5_0)+AskForSection_0_1)+AskForSection_0_0)+AskForSection_1_0)+AskForSection_2_0)+AskForSection_5_1)+AskForSection_0_2)+AskForSection_1_2)+AskForSection_2_2)+AskForSection_1_1)+AskForSection_2_1)+AskForSection_3_1)+AskForSection_4_1)>=3)&&(!((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((BeginLoop_1_1_0+BeginLoop_2_1_0)+BeginLoop_3_1_0)+BeginLoop_4_1_0)+BeginLoop_3_0_0)+BeginLoop_4_0_0)+BeginLoop_5_0_0)+BeginLoop_0_1_0)+BeginLoop_0_0_0)+BeginLoop_1_0_0)+BeginLoop_2_0_0)+BeginLoop_2_4_0)+BeginLoop_1_4_0)+BeginLoop_0_4_0)+BeginLoop_5_3_0)+BeginLoop_4_3_0)+BeginLoop_3_3_0)+BeginLoop_2_3_0)+BeginLoop_1_3_0)+BeginLoop_0_3_0)+BeginLoop_5_2_0)+BeginLoop_4_2_0)+BeginLoop_3_2_0)+BeginLoop_2_2_0)+BeginLoop_1_2_0)+BeginLoop_0_2_0)+BeginLoop_5_1_0)+BeginLoop_5_1_1)+BeginLoop_0_2_1)+BeginLoop_3_1_1)+BeginLoop_4_1_1)+BeginLoop_1_1_1)+BeginLoop_2_1_1)+BeginLoop_5_0_1)+BeginLoop_0_1_1)+BeginLoop_3_0_1)+BeginLoop_4_0_1)+BeginLoop_1_0_1)+BeginLoop_2_0_1)+BeginLoop_5_4_0)+BeginLoop_0_0_1)+BeginLoop_3_4_0)+BeginLoop_4_4_0)+BeginLoop_2_0_2)+BeginLoop_1_0_2)+BeginLoop_0_0_2)+BeginLoop_5_4_1)+BeginLoop_0_1_2)+BeginLoop_5_0_2)+BeginLoop_4_0_2)+BeginLoop_3_0_2)+BeginLoop_4_1_2)+BeginLoop_3_1_2)+BeginLoop_2_1_2)+BeginLoop_1_1_2)+BeginLoop_2_2_2)+BeginLoop_1_2_2)+BeginLoop_0_2_2)+BeginLoop_5_1_2)+BeginLoop_3_2_1)+BeginLoop_4_2_1)+BeginLoop_1_2_1)+BeginLoop_2_2_1)+BeginLoop_1_3_1)+BeginLoop_2_3_1)+BeginLoop_5_2_1)+BeginLoop_0_3_1)+BeginLoop_5_3_1)+BeginLoop_0_4_1)+BeginLoop_3_3_1)+BeginLoop_4_3_1)+BeginLoop_3_4_1)+BeginLoop_4_4_1)+BeginLoop_1_4_1)+BeginLoop_2_4_1)+BeginLoop_2_0_3)+BeginLoop_1_0_3)+BeginLoop_4_0_3)+BeginLoop_3_0_3)+BeginLoop_0_1_3)+BeginLoop_5_0_3)+BeginLoop_2_1_3)+BeginLoop_1_1_3)+BeginLoop_4_1_3)+BeginLoop_3_1_3)+BeginLoop_0_2_3)+BeginLoop_5_1_3)+BeginLoop_2_2_3)+BeginLoop_1_2_3)+BeginLoop_4_2_3)+BeginLoop_3_2_3)+BeginLoop_3_2_2)+BeginLoop_4_2_2)+BeginLoop_5_2_2)+BeginLoop_0_3_2)+BeginLoop_1_3_2)+BeginLoop_2_3_2)+BeginLoop_3_3_2)+BeginLoop_4_3_2)+BeginLoop_5_3_2)+BeginLoop_0_4_2)+BeginLoop_1_4_2)+BeginLoop_2_4_2)+BeginLoop_3_4_2)+BeginLoop_4_4_2)+BeginLoop_5_4_2)+BeginLoop_0_0_3)+BeginLoop_4_1_4)+BeginLoop_3_1_4)+BeginLoop_2_1_4)+BeginLoop_1_1_4)+BeginLoop_0_1_4)+BeginLoop_5_0_4)+BeginLoop_4_0_4)+BeginLoop_3_0_4)+BeginLoop_0_3_4)+BeginLoop_5_2_4)+BeginLoop_4_2_4)+BeginLoop_3_2_4)+BeginLoop_2_2_4)+BeginLoop_1_2_4)+BeginLoop_0_2_4)+BeginLoop_5_1_4)+BeginLoop_5_3_3)+BeginLoop_0_4_3)+BeginLoop_3_3_3)+BeginLoop_4_3_3)+BeginLoop_1_3_3)+BeginLoop_2_3_3)+BeginLoop_5_2_3)+BeginLoop_0_3_3)+BeginLoop_1_0_4)+BeginLoop_2_0_4)+BeginLoop_5_4_3)+BeginLoop_0_0_4)+BeginLoop_3_4_3)+BeginLoop_4_4_3)+BeginLoop_1_4_3)+BeginLoop_2_4_3)+BeginLoop_4_1_5)+BeginLoop_3_1_5)+BeginLoop_0_2_5)+BeginLoop_5_1_5)+BeginLoop_0_1_5)+BeginLoop_5_0_5)+BeginLoop_2_1_5)+BeginLoop_1_1_5)+BeginLoop_0_3_5)+BeginLoop_5_2_5)+BeginLoop_2_3_5)+BeginLoop_1_3_5)+BeginLoop_2_2_5)+BeginLoop_1_2_5)+BeginLoop_4_2_5)+BeginLoop_3_2_5)+BeginLoop_5_3_4)+BeginLoop_0_4_4)+BeginLoop_1_4_4)+BeginLoop_2_4_4)+BeginLoop_1_3_4)+BeginLoop_2_3_4)+BeginLoop_3_3_4)+BeginLoop_4_3_4)+BeginLoop_1_0_5)+BeginLoop_2_0_5)+BeginLoop_3_0_5)+BeginLoop_4_0_5)+BeginLoop_3_4_4)+BeginLoop_4_4_4)+BeginLoop_5_4_4)+BeginLoop_0_0_5)+BeginLoop_5_4_5)+BeginLoop_0_4_5)+BeginLoop_5_3_5)+BeginLoop_4_3_5)+BeginLoop_3_3_5)+BeginLoop_4_4_5)+BeginLoop_3_4_5)+BeginLoop_2_4_5)+BeginLoop_1_4_5)>=2))))
Read [invariant] property : Peterson-PT-5-ReachabilityCardinality-06 with value :((((((((((((WantSection_3_F+WantSection_4_F)+WantSection_1_F)+WantSection_2_F)+WantSection_5_F)+WantSection_2_T)+WantSection_1_T)+WantSection_0_T)+WantSection_0_F)+WantSection_5_T)+WantSection_4_T)+WantSection_3_T)>=1)
Read [reachable] property : Peterson-PT-5-ReachabilityCardinality-08 with value :(((!(IsEndLoop_0_1_3<=BeginLoop_2_3_0))||(!(AskForSection_2_4<=IsEndLoop_4_0_5)))&&(IsEndLoop_4_4_5<=BeginLoop_0_4_0))
Read [invariant] property : Peterson-PT-5-ReachabilityCardinality-09 with value :(TestIdentity_5_3_3<=BeginLoop_2_3_4)
Read [reachable] property : Peterson-PT-5-ReachabilityCardinality-10 with value :((((TestIdentity_2_3_1>=1)||(BeginLoop_5_1_3<=IsEndLoop_3_4_1))&&(!(CS_4<=TestAlone_0_2_4)))&&(TestIdentity_0_3_0>=2))
Read [reachable] property : Peterson-PT-5-ReachabilityCardinality-11 with value :(BeginLoop_1_2_0>=1)
Read [invariant] property : Peterson-PT-5-ReachabilityCardinality-12 with value :(TestIdentity_0_0_4<=TestTurn_2_3)
Read [reachable] property : Peterson-PT-5-ReachabilityCardinality-13 with value :(!(Turn_3_4<=IsEndLoop_2_3_3))
Read [invariant] property : Peterson-PT-5-ReachabilityCardinality-14 with value :((!((TestIdentity_5_3_3>=3)&&(CS_0>=2)))&&(TestIdentity_0_4_1<=BeginLoop_3_1_0))
Read [reachable] property : Peterson-PT-5-ReachabilityCardinality-15 with value :(TestIdentity_3_3_0>=2)
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
Normalized transition count is 1122
// Phase 1: matrix 1122 rows 834 cols
invariant :IsEndLoop_1_0_0 + IsEndLoop_1_1_0 + IsEndLoop_1_2_0 + IsEndLoop_1_3_0 + IsEndLoop_1_4_0 + IsEndLoop_1_0_1 + IsEndLoop_1_1_1 + IsEndLoop_1_2_1 + IsEndLoop_1_3_1 + IsEndLoop_1_4_1 + IsEndLoop_1_1_2 + IsEndLoop_1_0_2 + IsEndLoop_1_2_2 + IsEndLoop_1_3_2 + IsEndLoop_1_0_3 + IsEndLoop_1_4_2 + IsEndLoop_1_1_3 + IsEndLoop_1_2_3 + IsEndLoop_1_4_3 + IsEndLoop_1_3_3 + IsEndLoop_1_0_4 + IsEndLoop_1_2_4 + IsEndLoop_1_3_4 + IsEndLoop_1_1_4 + IsEndLoop_1_0_5 + IsEndLoop_1_4_4 + IsEndLoop_1_3_5 + IsEndLoop_1_1_5 + IsEndLoop_1_2_5 + EndTurn_1_0 + EndTurn_1_1 + IsEndLoop_1_4_5 + EndTurn_1_3 + EndTurn_1_2 + BeginLoop_1_1_0 + BeginLoop_1_0_0 + EndTurn_1_4 + BeginLoop_1_4_0 + BeginLoop_1_3_0 + BeginLoop_1_2_0 + BeginLoop_1_1_1 + BeginLoop_1_0_1 + BeginLoop_1_0_2 + BeginLoop_1_1_2 + BeginLoop_1_2_2 + BeginLoop_1_2_1 + BeginLoop_1_3_1 + BeginLoop_1_4_1 + BeginLoop_1_0_3 + BeginLoop_1_1_3 + BeginLoop_1_2_3 + BeginLoop_1_3_2 + BeginLoop_1_4_2 + BeginLoop_1_1_4 + BeginLoop_1_2_4 + BeginLoop_1_3_3 + BeginLoop_1_0_4 + BeginLoop_1_4_3 + BeginLoop_1_1_5 + BeginLoop_1_3_5 + BeginLoop_1_2_5 + BeginLoop_1_4_4 + BeginLoop_1_3_4 + BeginLoop_1_0_5 + TestAlone_1_1_0 + TestAlone_1_2_0 + TestAlone_1_0_0 + BeginLoop_1_4_5 + TestAlone_1_4_0 + TestAlone_1_3_0 + TestAlone_1_4_2 + TestAlone_1_3_2 + TestAlone_1_2_2 + TestAlone_1_1_2 + TestAlone_1_0_2 + TestAlone_1_1_4 + TestAlone_1_0_4 + TestAlone_1_4_3 + TestAlone_1_3_3 + TestAlone_1_2_3 + TestAlone_1_1_3 + TestAlone_1_0_3 + TestAlone_1_4_5 + TestAlone_1_3_5 + TestTurn_1_0 + TestTurn_1_1 + TestTurn_1_3 + TestTurn_1_2 + TestAlone_1_2_4 + TestAlone_1_4_4 + TestAlone_1_3_4 + TestAlone_1_0_5 + TestAlone_1_2_5 + TestAlone_1_1_5 + TestIdentity_1_4_0 + TestIdentity_1_0_1 + TestIdentity_1_1_1 + TestIdentity_1_2_1 + TestIdentity_1_3_1 + TestTurn_1_4 + TestIdentity_1_0_0 + TestIdentity_1_1_0 + TestIdentity_1_2_0 + TestIdentity_1_3_0 + TestIdentity_1_1_3 + TestIdentity_1_0_3 + TestIdentity_1_4_3 + TestIdentity_1_3_3 + TestIdentity_1_2_3 + TestIdentity_1_1_2 + TestIdentity_1_0_2 + TestIdentity_1_4_1 + TestIdentity_1_4_2 + TestIdentity_1_3_2 + TestIdentity_1_2_2 + TestIdentity_1_2_5 + TestIdentity_1_0_5 + TestIdentity_1_1_5 + TestIdentity_1_4_5 + TestIdentity_1_3_5 + TestIdentity_1_1_4 + TestIdentity_1_2_4 + TestIdentity_1_0_4 + TestIdentity_1_4_4 + TestIdentity_1_3_4 + AskForSection_1_3 + AskForSection_1_4 + AskForSection_1_0 + AskForSection_1_2 + AskForSection_1_1 + Idle_1 + CS_1 = 1
invariant :Turn_1_0 + Turn_1_5 + Turn_1_4 + Turn_1_1 + Turn_1_3 + Turn_1_2 = 1
invariant :Turn_0_0 + Turn_0_5 + Turn_0_4 + Turn_0_2 + Turn_0_1 + Turn_0_3 = 1
invariant :WantSection_0_F + -1'Idle_0 = 0
invariant :WantSection_1_T + Idle_1 = 1
invariant :IsEndLoop_4_0_0 + IsEndLoop_4_1_0 + IsEndLoop_4_2_0 + IsEndLoop_4_3_0 + IsEndLoop_4_4_0 + IsEndLoop_4_0_1 + IsEndLoop_4_1_1 + IsEndLoop_4_2_1 + IsEndLoop_4_3_1 + IsEndLoop_4_4_1 + IsEndLoop_4_0_2 + IsEndLoop_4_2_2 + IsEndLoop_4_1_2 + IsEndLoop_4_3_2 + IsEndLoop_4_4_2 + IsEndLoop_4_1_3 + IsEndLoop_4_0_3 + IsEndLoop_4_2_3 + IsEndLoop_4_3_3 + IsEndLoop_4_0_4 + IsEndLoop_4_4_3 + IsEndLoop_4_2_4 + IsEndLoop_4_1_4 + IsEndLoop_4_0_5 + IsEndLoop_4_3_4 + IsEndLoop_4_4_4 + IsEndLoop_4_2_5 + IsEndLoop_4_3_5 + IsEndLoop_4_1_5 + EndTurn_4_0 + IsEndLoop_4_4_5 + EndTurn_4_3 + EndTurn_4_2 + EndTurn_4_1 + BeginLoop_4_1_0 + BeginLoop_4_0_0 + EndTurn_4_4 + BeginLoop_4_3_0 + BeginLoop_4_2_0 + BeginLoop_4_1_1 + BeginLoop_4_0_1 + BeginLoop_4_4_0 + BeginLoop_4_0_2 + BeginLoop_4_1_2 + BeginLoop_4_2_1 + BeginLoop_4_3_1 + BeginLoop_4_4_1 + BeginLoop_4_0_3 + BeginLoop_4_1_3 + BeginLoop_4_2_3 + BeginLoop_4_2_2 + BeginLoop_4_3_2 + BeginLoop_4_4_2 + BeginLoop_4_1_4 + BeginLoop_4_0_4 + BeginLoop_4_2_4 + BeginLoop_4_3_3 + BeginLoop_4_4_3 + BeginLoop_4_1_5 + BeginLoop_4_2_5 + BeginLoop_4_3_4 + BeginLoop_4_0_5 + BeginLoop_4_4_4 + TestAlone_4_0_0 + TestAlone_4_1_0 + BeginLoop_4_3_5 + BeginLoop_4_4_5 + TestAlone_4_2_1 + TestAlone_4_0_1 + TestAlone_4_1_1 + TestAlone_4_4_0 + TestAlone_4_2_0 + TestAlone_4_3_0 + TestAlone_4_4_2 + TestAlone_4_3_2 + TestAlone_4_2_2 + TestAlone_4_1_2 + TestAlone_4_0_2 + TestAlone_4_4_1 + TestAlone_4_3_1 + TestAlone_4_4_3 + TestAlone_4_3_3 + TestAlone_4_2_3 + TestAlone_4_1_3 + TestAlone_4_0_3 + TestAlone_4_3_5 + TestAlone_4_2_5 + TestTurn_4_0 + TestAlone_4_4_5 + TestTurn_4_1 + TestTurn_4_2 + TestAlone_4_0_5 + TestAlone_4_1_5 + TestIdentity_4_4_0 + TestIdentity_4_0_1 + TestIdentity_4_1_1 + TestIdentity_4_2_1 + TestIdentity_4_3_1 + TestTurn_4_3 + TestTurn_4_4 + TestIdentity_4_0_0 + TestIdentity_4_1_0 + TestIdentity_4_2_0 + TestIdentity_4_3_0 + TestIdentity_4_1_3 + TestIdentity_4_0_3 + TestIdentity_4_4_2 + TestIdentity_4_4_3 + TestIdentity_4_3_3 + TestIdentity_4_2_3 + TestIdentity_4_1_2 + TestIdentity_4_0_2 + TestIdentity_4_4_1 + TestIdentity_4_3_2 + TestIdentity_4_2_2 + TestIdentity_4_1_5 + TestIdentity_4_2_5 + TestIdentity_4_0_5 + TestIdentity_4_4_5 + TestIdentity_4_3_5 + TestIdentity_4_1_4 + TestIdentity_4_0_4 + TestIdentity_4_4_4 + TestIdentity_4_2_4 + TestIdentity_4_3_4 + AskForSection_4_3 + AskForSection_4_2 + AskForSection_4_4 + AskForSection_4_0 + AskForSection_4_1 + Idle_4 + CS_4 = 1
invariant :Turn_4_4 + Turn_4_3 + Turn_4_5 + Turn_4_1 + Turn_4_0 + Turn_4_2 = 1
invariant :WantSection_3_T + Idle_3 = 1
invariant :WantSection_2_T + Idle_2 = 1
invariant :WantSection_5_T + Idle_5 = 1
invariant :WantSection_4_F + -1'Idle_4 = 0
invariant :IsEndLoop_0_0_0 + IsEndLoop_0_1_0 + IsEndLoop_0_2_0 + IsEndLoop_0_3_0 + IsEndLoop_0_4_0 + IsEndLoop_0_0_1 + IsEndLoop_0_1_1 + IsEndLoop_0_2_1 + IsEndLoop_0_3_1 + IsEndLoop_0_4_1 + IsEndLoop_0_0_2 + IsEndLoop_0_1_2 + IsEndLoop_0_2_2 + IsEndLoop_0_4_2 + IsEndLoop_0_3_2 + IsEndLoop_0_0_3 + IsEndLoop_0_1_3 + IsEndLoop_0_3_3 + IsEndLoop_0_2_3 + IsEndLoop_0_4_3 + IsEndLoop_0_0_4 + IsEndLoop_0_3_4 + IsEndLoop_0_1_4 + IsEndLoop_0_2_4 + IsEndLoop_0_0_5 + IsEndLoop_0_1_5 + IsEndLoop_0_4_4 + IsEndLoop_0_3_5 + IsEndLoop_0_2_5 + EndTurn_0_1 + IsEndLoop_0_4_5 + EndTurn_0_0 + EndTurn_0_4 + EndTurn_0_3 + EndTurn_0_2 + BeginLoop_0_1_0 + BeginLoop_0_0_0 + BeginLoop_0_4_0 + BeginLoop_0_3_0 + BeginLoop_0_2_0 + BeginLoop_0_2_1 + BeginLoop_0_1_1 + BeginLoop_0_0_1 + BeginLoop_0_0_2 + BeginLoop_0_1_2 + BeginLoop_0_2_2 + BeginLoop_0_3_1 + BeginLoop_0_4_1 + BeginLoop_0_1_3 + BeginLoop_0_2_3 + BeginLoop_0_3_2 + BeginLoop_0_4_2 + BeginLoop_0_0_3 + BeginLoop_0_1_4 + BeginLoop_0_3_4 + BeginLoop_0_2_4 + BeginLoop_0_4_3 + BeginLoop_0_3_3 + BeginLoop_0_0_4 + BeginLoop_0_2_5 + BeginLoop_0_1_5 + BeginLoop_0_3_5 + BeginLoop_0_4_4 + BeginLoop_0_0_5 + BeginLoop_0_4_5 + TestAlone_0_2_1 + TestAlone_0_3_1 + TestAlone_0_1_1 + TestAlone_0_0_1 + TestAlone_0_4_2 + TestAlone_0_3_2 + TestAlone_0_2_2 + TestAlone_0_1_2 + TestAlone_0_0_2 + TestAlone_0_4_1 + TestAlone_0_1_4 + TestAlone_0_0_4 + TestAlone_0_4_3 + TestAlone_0_3_3 + TestAlone_0_2_3 + TestAlone_0_1_3 + TestAlone_0_0_3 + TestAlone_0_4_5 + TestAlone_0_3_5 + TestTurn_0_0 + TestTurn_0_2 + TestTurn_0_1 + TestTurn_0_3 + TestAlone_0_2_4 + TestAlone_0_4_4 + TestAlone_0_3_4 + TestAlone_0_1_5 + TestAlone_0_0_5 + TestAlone_0_2_5 + TestIdentity_0_4_0 + TestIdentity_0_0_1 + TestIdentity_0_1_1 + TestIdentity_0_2_1 + TestIdentity_0_3_1 + TestIdentity_0_4_1 + TestTurn_0_4 + TestIdentity_0_0_0 + TestIdentity_0_1_0 + TestIdentity_0_2_0 + TestIdentity_0_3_0 + TestIdentity_0_2_3 + TestIdentity_0_1_3 + TestIdentity_0_0_3 + TestIdentity_0_4_3 + TestIdentity_0_3_3 + TestIdentity_0_1_2 + TestIdentity_0_0_2 + TestIdentity_0_4_2 + TestIdentity_0_3_2 + TestIdentity_0_2_2 + TestIdentity_0_2_5 + TestIdentity_0_1_5 + TestIdentity_0_3_5 + TestIdentity_0_4_5 + TestIdentity_0_2_4 + TestIdentity_0_0_4 + TestIdentity_0_1_4 + TestIdentity_0_4_4 + TestIdentity_0_0_5 + TestIdentity_0_3_4 + AskForSection_0_3 + CS_0 + AskForSection_0_4 + AskForSection_0_1 + AskForSection_0_0 + AskForSection_0_2 + Idle_0 = 1
invariant :IsEndLoop_5_0_0 + IsEndLoop_5_1_0 + IsEndLoop_5_2_0 + IsEndLoop_5_3_0 + IsEndLoop_5_4_0 + IsEndLoop_5_0_1 + IsEndLoop_5_1_1 + IsEndLoop_5_2_1 + IsEndLoop_5_3_1 + IsEndLoop_5_4_1 + IsEndLoop_5_0_2 + IsEndLoop_5_1_2 + IsEndLoop_5_3_2 + IsEndLoop_5_2_2 + IsEndLoop_5_4_2 + IsEndLoop_5_0_3 + IsEndLoop_5_2_3 + IsEndLoop_5_1_3 + IsEndLoop_5_3_3 + IsEndLoop_5_4_3 + IsEndLoop_5_2_4 + IsEndLoop_5_0_4 + IsEndLoop_5_1_4 + IsEndLoop_5_4_4 + IsEndLoop_5_0_5 + IsEndLoop_5_3_4 + IsEndLoop_5_2_5 + IsEndLoop_5_1_5 + EndTurn_5_0 + IsEndLoop_5_3_5 + IsEndLoop_5_4_5 + EndTurn_5_3 + EndTurn_5_2 + EndTurn_5_1 + BeginLoop_5_0_0 + EndTurn_5_4 + BeginLoop_5_3_0 + BeginLoop_5_2_0 + BeginLoop_5_1_0 + BeginLoop_5_1_1 + BeginLoop_5_0_1 + BeginLoop_5_4_0 + BeginLoop_5_4_1 + BeginLoop_5_0_2 + BeginLoop_5_1_2 + BeginLoop_5_2_1 + BeginLoop_5_3_1 + BeginLoop_5_0_3 + BeginLoop_5_1_3 + BeginLoop_5_2_2 + BeginLoop_5_3_2 + BeginLoop_5_4_2 + BeginLoop_5_0_4 + BeginLoop_5_2_4 + BeginLoop_5_1_4 + BeginLoop_5_3_3 + BeginLoop_5_2_3 + BeginLoop_5_4_3 + BeginLoop_5_1_5 + BeginLoop_5_0_5 + BeginLoop_5_2_5 + BeginLoop_5_3_4 + BeginLoop_5_4_4 + TestAlone_5_0_0 + TestAlone_5_1_0 + BeginLoop_5_4_5 + BeginLoop_5_3_5 + TestAlone_5_2_1 + TestAlone_5_0_1 + TestAlone_5_1_1 + TestAlone_5_3_0 + TestAlone_5_4_0 + TestAlone_5_2_0 + TestAlone_5_4_2 + TestAlone_5_3_2 + TestAlone_5_2_2 + TestAlone_5_1_2 + TestAlone_5_0_2 + TestAlone_5_4_1 + TestAlone_5_3_1 + TestAlone_5_0_4 + TestAlone_5_4_3 + TestAlone_5_3_3 + TestAlone_5_2_3 + TestAlone_5_1_3 + TestAlone_5_0_3 + TestTurn_5_1 + TestTurn_5_0 + TestTurn_5_2 + TestAlone_5_2_4 + TestAlone_5_1_4 + TestAlone_5_3_4 + TestAlone_5_4_4 + TestIdentity_5_3_0 + TestIdentity_5_4_0 + TestIdentity_5_0_1 + TestIdentity_5_1_1 + TestIdentity_5_2_1 + TestIdentity_5_3_1 + TestTurn_5_3 + TestTurn_5_4 + TestIdentity_5_0_0 + TestIdentity_5_1_0 + TestIdentity_5_2_0 + TestIdentity_5_1_3 + TestIdentity_5_0_3 + TestIdentity_5_4_2 + TestIdentity_5_3_3 + TestIdentity_5_2_3 + TestIdentity_5_0_2 + TestIdentity_5_4_1 + TestIdentity_5_3_2 + TestIdentity_5_2_2 + TestIdentity_5_1_2 + TestIdentity_5_1_5 + TestIdentity_5_0_5 + TestIdentity_5_4_5 + TestIdentity_5_2_5 + TestIdentity_5_3_5 + TestIdentity_5_1_4 + TestIdentity_5_4_3 + TestIdentity_5_0_4 + TestIdentity_5_3_4 + TestIdentity_5_4_4 + TestIdentity_5_2_4 + AskForSection_5_2 + AskForSection_5_4 + AskForSection_5_3 + AskForSection_5_0 + Idle_5 + AskForSection_5_1 + CS_5 = 1
invariant :WantSection_5_F + -1'Idle_5 = 0
invariant :WantSection_2_F + -1'Idle_2 = 0
invariant :Turn_3_4 + Turn_3_5 + Turn_3_1 + Turn_3_0 + Turn_3_3 + Turn_3_2 = 1
invariant :WantSection_1_F + -1'Idle_1 = 0
invariant :WantSection_4_T + Idle_4 = 1
invariant :IsEndLoop_3_0_0 + IsEndLoop_3_1_0 + IsEndLoop_3_2_0 + IsEndLoop_3_3_0 + IsEndLoop_3_4_0 + IsEndLoop_3_0_1 + IsEndLoop_3_1_1 + IsEndLoop_3_2_1 + IsEndLoop_3_3_1 + IsEndLoop_3_4_1 + IsEndLoop_3_0_2 + IsEndLoop_3_2_2 + IsEndLoop_3_1_2 + IsEndLoop_3_3_2 + IsEndLoop_3_4_2 + IsEndLoop_3_1_3 + IsEndLoop_3_0_3 + IsEndLoop_3_2_3 + IsEndLoop_3_3_3 + IsEndLoop_3_0_4 + IsEndLoop_3_4_3 + IsEndLoop_3_2_4 + IsEndLoop_3_1_4 + IsEndLoop_3_0_5 + IsEndLoop_3_3_4 + IsEndLoop_3_4_4 + IsEndLoop_3_2_5 + IsEndLoop_3_3_5 + IsEndLoop_3_1_5 + EndTurn_3_0 + IsEndLoop_3_4_5 + EndTurn_3_3 + EndTurn_3_2 + EndTurn_3_1 + BeginLoop_3_1_0 + BeginLoop_3_0_0 + EndTurn_3_4 + BeginLoop_3_3_0 + BeginLoop_3_2_0 + BeginLoop_3_1_1 + BeginLoop_3_0_1 + BeginLoop_3_4_0 + BeginLoop_3_0_2 + BeginLoop_3_1_2 + BeginLoop_3_2_1 + BeginLoop_3_3_1 + BeginLoop_3_4_1 + BeginLoop_3_0_3 + BeginLoop_3_1_3 + BeginLoop_3_2_3 + BeginLoop_3_2_2 + BeginLoop_3_3_2 + BeginLoop_3_4_2 + BeginLoop_3_1_4 + BeginLoop_3_0_4 + BeginLoop_3_2_4 + BeginLoop_3_3_3 + BeginLoop_3_4_3 + BeginLoop_3_1_5 + BeginLoop_3_2_5 + BeginLoop_3_3_4 + BeginLoop_3_0_5 + BeginLoop_3_4_4 + TestAlone_3_1_0 + TestAlone_3_0_0 + BeginLoop_3_3_5 + BeginLoop_3_4_5 + TestAlone_3_2_1 + TestAlone_3_3_1 + TestAlone_3_0_1 + TestAlone_3_1_1 + TestAlone_3_4_0 + TestAlone_3_2_0 + TestAlone_3_3_0 + TestAlone_3_4_2 + TestAlone_3_3_2 + TestAlone_3_2_2 + TestAlone_3_1_2 + TestAlone_3_0_2 + TestAlone_3_4_1 + TestAlone_3_0_4 + TestAlone_3_3_5 + TestTurn_3_0 + TestAlone_3_4_5 + TestTurn_3_1 + TestTurn_3_2 + TestAlone_3_2_4 + TestAlone_3_1_4 + TestAlone_3_3_4 + TestAlone_3_0_5 + TestAlone_3_4_4 + TestAlone_3_2_5 + TestAlone_3_1_5 + TestIdentity_3_4_0 + TestIdentity_3_0_1 + TestIdentity_3_1_1 + TestIdentity_3_2_1 + TestIdentity_3_3_1 + TestTurn_3_3 + TestTurn_3_4 + TestIdentity_3_0_0 + TestIdentity_3_1_0 + TestIdentity_3_2_0 + TestIdentity_3_3_0 + TestIdentity_3_1_3 + TestIdentity_3_0_3 + TestIdentity_3_4_2 + TestIdentity_3_4_3 + TestIdentity_3_3_3 + TestIdentity_3_2_3 + TestIdentity_3_1_2 + TestIdentity_3_0_2 + TestIdentity_3_4_1 + TestIdentity_3_3_2 + TestIdentity_3_2_2 + TestIdentity_3_1_5 + TestIdentity_3_2_5 + TestIdentity_3_0_5 + TestIdentity_3_4_5 + TestIdentity_3_3_5 + TestIdentity_3_1_4 + TestIdentity_3_0_4 + TestIdentity_3_4_4 + TestIdentity_3_2_4 + TestIdentity_3_3_4 + AskForSection_3_3 + AskForSection_3_2 + AskForSection_3_4 + AskForSection_3_0 + AskForSection_3_1 + Idle_3 + CS_3 = 1
invariant :WantSection_0_T + Idle_0 = 1
invariant :IsEndLoop_2_0_0 + IsEndLoop_2_1_0 + IsEndLoop_2_2_0 + IsEndLoop_2_3_0 + IsEndLoop_2_4_0 + IsEndLoop_2_0_1 + IsEndLoop_2_1_1 + IsEndLoop_2_2_1 + IsEndLoop_2_3_1 + IsEndLoop_2_4_1 + IsEndLoop_2_1_2 + IsEndLoop_2_0_2 + IsEndLoop_2_2_2 + IsEndLoop_2_3_2 + IsEndLoop_2_0_3 + IsEndLoop_2_4_2 + IsEndLoop_2_1_3 + IsEndLoop_2_2_3 + IsEndLoop_2_4_3 + IsEndLoop_2_3_3 + IsEndLoop_2_0_4 + IsEndLoop_2_2_4 + IsEndLoop_2_3_4 + IsEndLoop_2_1_4 + IsEndLoop_2_0_5 + IsEndLoop_2_4_4 + IsEndLoop_2_3_5 + IsEndLoop_2_1_5 + IsEndLoop_2_2_5 + EndTurn_2_0 + EndTurn_2_1 + IsEndLoop_2_4_5 + EndTurn_2_3 + EndTurn_2_2 + BeginLoop_2_1_0 + BeginLoop_2_0_0 + EndTurn_2_4 + BeginLoop_2_4_0 + BeginLoop_2_3_0 + BeginLoop_2_2_0 + BeginLoop_2_1_1 + BeginLoop_2_0_1 + BeginLoop_2_0_2 + BeginLoop_2_1_2 + BeginLoop_2_2_2 + BeginLoop_2_2_1 + BeginLoop_2_3_1 + BeginLoop_2_4_1 + BeginLoop_2_0_3 + BeginLoop_2_1_3 + BeginLoop_2_2_3 + BeginLoop_2_3_2 + BeginLoop_2_4_2 + BeginLoop_2_1_4 + BeginLoop_2_2_4 + BeginLoop_2_3_3 + BeginLoop_2_0_4 + BeginLoop_2_4_3 + BeginLoop_2_1_5 + BeginLoop_2_3_5 + BeginLoop_2_2_5 + BeginLoop_2_4_4 + BeginLoop_2_3_4 + BeginLoop_2_0_5 + TestAlone_2_1_0 + TestAlone_2_0_0 + BeginLoop_2_4_5 + TestAlone_2_2_1 + TestAlone_2_3_1 + TestAlone_2_1_1 + TestAlone_2_4_0 + TestAlone_2_0_1 + TestAlone_2_2_0 + TestAlone_2_3_0 + TestAlone_2_4_1 + TestAlone_2_0_4 + TestAlone_2_4_3 + TestAlone_2_3_3 + TestAlone_2_2_3 + TestAlone_2_1_3 + TestAlone_2_0_3 + TestAlone_2_3_5 + TestTurn_2_0 + TestAlone_2_4_5 + TestTurn_2_1 + TestTurn_2_3 + TestTurn_2_2 + TestAlone_2_2_4 + TestAlone_2_1_4 + TestAlone_2_4_4 + TestAlone_2_3_4 + TestAlone_2_0_5 + TestAlone_2_2_5 + TestAlone_2_1_5 + TestIdentity_2_4_0 + TestIdentity_2_0_1 + TestIdentity_2_1_1 + TestIdentity_2_2_1 + TestIdentity_2_3_1 + TestTurn_2_4 + TestIdentity_2_0_0 + TestIdentity_2_1_0 + TestIdentity_2_2_0 + TestIdentity_2_3_0 + TestIdentity_2_1_3 + TestIdentity_2_0_3 + TestIdentity_2_4_3 + TestIdentity_2_3_3 + TestIdentity_2_2_3 + TestIdentity_2_1_2 + TestIdentity_2_0_2 + TestIdentity_2_4_1 + TestIdentity_2_4_2 + TestIdentity_2_3_2 + TestIdentity_2_2_2 + TestIdentity_2_2_5 + TestIdentity_2_0_5 + TestIdentity_2_1_5 + TestIdentity_2_4_5 + TestIdentity_2_3_5 + TestIdentity_2_1_4 + TestIdentity_2_2_4 + TestIdentity_2_0_4 + TestIdentity_2_4_4 + TestIdentity_2_3_4 + AskForSection_2_3 + AskForSection_2_4 + AskForSection_2_0 + AskForSection_2_2 + AskForSection_2_1 + Idle_2 + CS_2 = 1
invariant :WantSection_3_F + -1'Idle_3 = 0
invariant :Turn_2_0 + Turn_2_4 + Turn_2_5 + Turn_2_1 + Turn_2_3 + Turn_2_2 = 1
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
Normalized transition count is 1122
// Phase 1: matrix 1122 rows 834 cols
invariant :IsEndLoop_1_0_0 + IsEndLoop_1_1_0 + IsEndLoop_1_2_0 + IsEndLoop_1_3_0 + IsEndLoop_1_4_0 + IsEndLoop_1_0_1 + IsEndLoop_1_1_1 + IsEndLoop_1_2_1 + IsEndLoop_1_3_1 + IsEndLoop_1_4_1 + IsEndLoop_1_1_2 + IsEndLoop_1_0_2 + IsEndLoop_1_2_2 + IsEndLoop_1_3_2 + IsEndLoop_1_0_3 + IsEndLoop_1_4_2 + IsEndLoop_1_1_3 + IsEndLoop_1_2_3 + IsEndLoop_1_4_3 + IsEndLoop_1_3_3 + IsEndLoop_1_0_4 + IsEndLoop_1_2_4 + IsEndLoop_1_3_4 + IsEndLoop_1_1_4 + IsEndLoop_1_0_5 + IsEndLoop_1_4_4 + IsEndLoop_1_3_5 + IsEndLoop_1_1_5 + IsEndLoop_1_2_5 + EndTurn_1_0 + EndTurn_1_1 + IsEndLoop_1_4_5 + EndTurn_1_3 + EndTurn_1_2 + BeginLoop_1_1_0 + BeginLoop_1_0_0 + EndTurn_1_4 + BeginLoop_1_4_0 + BeginLoop_1_3_0 + BeginLoop_1_2_0 + BeginLoop_1_1_1 + BeginLoop_1_0_1 + BeginLoop_1_0_2 + BeginLoop_1_1_2 + BeginLoop_1_2_2 + BeginLoop_1_2_1 + BeginLoop_1_3_1 + BeginLoop_1_4_1 + BeginLoop_1_0_3 + BeginLoop_1_1_3 + BeginLoop_1_2_3 + BeginLoop_1_3_2 + BeginLoop_1_4_2 + BeginLoop_1_1_4 + BeginLoop_1_2_4 + BeginLoop_1_3_3 + BeginLoop_1_0_4 + BeginLoop_1_4_3 + BeginLoop_1_1_5 + BeginLoop_1_3_5 + BeginLoop_1_2_5 + BeginLoop_1_4_4 + BeginLoop_1_3_4 + BeginLoop_1_0_5 + TestAlone_1_1_0 + TestAlone_1_2_0 + TestAlone_1_0_0 + BeginLoop_1_4_5 + TestAlone_1_4_0 + TestAlone_1_3_0 + TestAlone_1_4_2 + TestAlone_1_3_2 + TestAlone_1_2_2 + TestAlone_1_1_2 + TestAlone_1_0_2 + TestAlone_1_1_4 + TestAlone_1_0_4 + TestAlone_1_4_3 + TestAlone_1_3_3 + TestAlone_1_2_3 + TestAlone_1_1_3 + TestAlone_1_0_3 + TestAlone_1_4_5 + TestAlone_1_3_5 + TestTurn_1_0 + TestTurn_1_1 + TestTurn_1_3 + TestTurn_1_2 + TestAlone_1_2_4 + TestAlone_1_4_4 + TestAlone_1_3_4 + TestAlone_1_0_5 + TestAlone_1_2_5 + TestAlone_1_1_5 + TestIdentity_1_4_0 + TestIdentity_1_0_1 + TestIdentity_1_1_1 + TestIdentity_1_2_1 + TestIdentity_1_3_1 + TestTurn_1_4 + TestIdentity_1_0_0 + TestIdentity_1_1_0 + TestIdentity_1_2_0 + TestIdentity_1_3_0 + TestIdentity_1_1_3 + TestIdentity_1_0_3 + TestIdentity_1_4_3 + TestIdentity_1_3_3 + TestIdentity_1_2_3 + TestIdentity_1_1_2 + TestIdentity_1_0_2 + TestIdentity_1_4_1 + TestIdentity_1_4_2 + TestIdentity_1_3_2 + TestIdentity_1_2_2 + TestIdentity_1_2_5 + TestIdentity_1_0_5 + TestIdentity_1_1_5 + TestIdentity_1_4_5 + TestIdentity_1_3_5 + TestIdentity_1_1_4 + TestIdentity_1_2_4 + TestIdentity_1_0_4 + TestIdentity_1_4_4 + TestIdentity_1_3_4 + AskForSection_1_3 + AskForSection_1_4 + AskForSection_1_0 + AskForSection_1_2 + AskForSection_1_1 + Idle_1 + CS_1 = 1
invariant :Turn_1_0 + Turn_1_5 + Turn_1_4 + Turn_1_1 + Turn_1_3 + Turn_1_2 = 1
invariant :Turn_0_0 + Turn_0_5 + Turn_0_4 + Turn_0_2 + Turn_0_1 + Turn_0_3 = 1
invariant :WantSection_0_F + -1'Idle_0 = 0
invariant :WantSection_1_T + Idle_1 = 1
invariant :IsEndLoop_4_0_0 + IsEndLoop_4_1_0 + IsEndLoop_4_2_0 + IsEndLoop_4_3_0 + IsEndLoop_4_4_0 + IsEndLoop_4_0_1 + IsEndLoop_4_1_1 + IsEndLoop_4_2_1 + IsEndLoop_4_3_1 + IsEndLoop_4_4_1 + IsEndLoop_4_0_2 + IsEndLoop_4_2_2 + IsEndLoop_4_1_2 + IsEndLoop_4_3_2 + IsEndLoop_4_4_2 + IsEndLoop_4_1_3 + IsEndLoop_4_0_3 + IsEndLoop_4_2_3 + IsEndLoop_4_3_3 + IsEndLoop_4_0_4 + IsEndLoop_4_4_3 + IsEndLoop_4_2_4 + IsEndLoop_4_1_4 + IsEndLoop_4_0_5 + IsEndLoop_4_3_4 + IsEndLoop_4_4_4 + IsEndLoop_4_2_5 + IsEndLoop_4_3_5 + IsEndLoop_4_1_5 + EndTurn_4_0 + IsEndLoop_4_4_5 + EndTurn_4_3 + EndTurn_4_2 + EndTurn_4_1 + BeginLoop_4_1_0 + BeginLoop_4_0_0 + EndTurn_4_4 + BeginLoop_4_3_0 + BeginLoop_4_2_0 + BeginLoop_4_1_1 + BeginLoop_4_0_1 + BeginLoop_4_4_0 + BeginLoop_4_0_2 + BeginLoop_4_1_2 + BeginLoop_4_2_1 + BeginLoop_4_3_1 + BeginLoop_4_4_1 + BeginLoop_4_0_3 + BeginLoop_4_1_3 + BeginLoop_4_2_3 + BeginLoop_4_2_2 + BeginLoop_4_3_2 + BeginLoop_4_4_2 + BeginLoop_4_1_4 + BeginLoop_4_0_4 + BeginLoop_4_2_4 + BeginLoop_4_3_3 + BeginLoop_4_4_3 + BeginLoop_4_1_5 + BeginLoop_4_2_5 + BeginLoop_4_3_4 + BeginLoop_4_0_5 + BeginLoop_4_4_4 + TestAlone_4_0_0 + TestAlone_4_1_0 + BeginLoop_4_3_5 + BeginLoop_4_4_5 + TestAlone_4_2_1 + TestAlone_4_0_1 + TestAlone_4_1_1 + TestAlone_4_4_0 + TestAlone_4_2_0 + TestAlone_4_3_0 + TestAlone_4_4_2 + TestAlone_4_3_2 + TestAlone_4_2_2 + TestAlone_4_1_2 + TestAlone_4_0_2 + TestAlone_4_4_1 + TestAlone_4_3_1 + TestAlone_4_4_3 + TestAlone_4_3_3 + TestAlone_4_2_3 + TestAlone_4_1_3 + TestAlone_4_0_3 + TestAlone_4_3_5 + TestAlone_4_2_5 + TestTurn_4_0 + TestAlone_4_4_5 + TestTurn_4_1 + TestTurn_4_2 + TestAlone_4_0_5 + TestAlone_4_1_5 + TestIdentity_4_4_0 + TestIdentity_4_0_1 + TestIdentity_4_1_1 + TestIdentity_4_2_1 + TestIdentity_4_3_1 + TestTurn_4_3 + TestTurn_4_4 + TestIdentity_4_0_0 + TestIdentity_4_1_0 + TestIdentity_4_2_0 + TestIdentity_4_3_0 + TestIdentity_4_1_3 + TestIdentity_4_0_3 + TestIdentity_4_4_2 + TestIdentity_4_4_3 + TestIdentity_4_3_3 + TestIdentity_4_2_3 + TestIdentity_4_1_2 + TestIdentity_4_0_2 + TestIdentity_4_4_1 + TestIdentity_4_3_2 + TestIdentity_4_2_2 + TestIdentity_4_1_5 + TestIdentity_4_2_5 + TestIdentity_4_0_5 + TestIdentity_4_4_5 + TestIdentity_4_3_5 + TestIdentity_4_1_4 + TestIdentity_4_0_4 + TestIdentity_4_4_4 + TestIdentity_4_2_4 + TestIdentity_4_3_4 + AskForSection_4_3 + AskForSection_4_2 + AskForSection_4_4 + AskForSection_4_0 + AskForSection_4_1 + Idle_4 + CS_4 = 1
invariant :Turn_4_4 + Turn_4_3 + Turn_4_5 + Turn_4_1 + Turn_4_0 + Turn_4_2 = 1
invariant :WantSection_3_T + Idle_3 = 1
invariant :WantSection_2_T + Idle_2 = 1
invariant :WantSection_5_T + Idle_5 = 1
invariant :WantSection_4_F + -1'Idle_4 = 0
invariant :IsEndLoop_0_0_0 + IsEndLoop_0_1_0 + IsEndLoop_0_2_0 + IsEndLoop_0_3_0 + IsEndLoop_0_4_0 + IsEndLoop_0_0_1 + IsEndLoop_0_1_1 + IsEndLoop_0_2_1 + IsEndLoop_0_3_1 + IsEndLoop_0_4_1 + IsEndLoop_0_0_2 + IsEndLoop_0_1_2 + IsEndLoop_0_2_2 + IsEndLoop_0_4_2 + IsEndLoop_0_3_2 + IsEndLoop_0_0_3 + IsEndLoop_0_1_3 + IsEndLoop_0_3_3 + IsEndLoop_0_2_3 + IsEndLoop_0_4_3 + IsEndLoop_0_0_4 + IsEndLoop_0_3_4 + IsEndLoop_0_1_4 + IsEndLoop_0_2_4 + IsEndLoop_0_0_5 + IsEndLoop_0_1_5 + IsEndLoop_0_4_4 + IsEndLoop_0_3_5 + IsEndLoop_0_2_5 + EndTurn_0_1 + IsEndLoop_0_4_5 + EndTurn_0_0 + EndTurn_0_4 + EndTurn_0_3 + EndTurn_0_2 + BeginLoop_0_1_0 + BeginLoop_0_0_0 + BeginLoop_0_4_0 + BeginLoop_0_3_0 + BeginLoop_0_2_0 + BeginLoop_0_2_1 + BeginLoop_0_1_1 + BeginLoop_0_0_1 + BeginLoop_0_0_2 + BeginLoop_0_1_2 + BeginLoop_0_2_2 + BeginLoop_0_3_1 + BeginLoop_0_4_1 + BeginLoop_0_1_3 + BeginLoop_0_2_3 + BeginLoop_0_3_2 + BeginLoop_0_4_2 + BeginLoop_0_0_3 + BeginLoop_0_1_4 + BeginLoop_0_3_4 + BeginLoop_0_2_4 + BeginLoop_0_4_3 + BeginLoop_0_3_3 + BeginLoop_0_0_4 + BeginLoop_0_2_5 + BeginLoop_0_1_5 + BeginLoop_0_3_5 + BeginLoop_0_4_4 + BeginLoop_0_0_5 + BeginLoop_0_4_5 + TestAlone_0_2_1 + TestAlone_0_3_1 + TestAlone_0_1_1 + TestAlone_0_0_1 + TestAlone_0_4_2 + TestAlone_0_3_2 + TestAlone_0_2_2 + TestAlone_0_1_2 + TestAlone_0_0_2 + TestAlone_0_4_1 + TestAlone_0_1_4 + TestAlone_0_0_4 + TestAlone_0_4_3 + TestAlone_0_3_3 + TestAlone_0_2_3 + TestAlone_0_1_3 + TestAlone_0_0_3 + TestAlone_0_4_5 + TestAlone_0_3_5 + TestTurn_0_0 + TestTurn_0_2 + TestTurn_0_1 + TestTurn_0_3 + TestAlone_0_2_4 + TestAlone_0_4_4 + TestAlone_0_3_4 + TestAlone_0_1_5 + TestAlone_0_0_5 + TestAlone_0_2_5 + TestIdentity_0_4_0 + TestIdentity_0_0_1 + TestIdentity_0_1_1 + TestIdentity_0_2_1 + TestIdentity_0_3_1 + TestIdentity_0_4_1 + TestTurn_0_4 + TestIdentity_0_0_0 + TestIdentity_0_1_0 + TestIdentity_0_2_0 + TestIdentity_0_3_0 + TestIdentity_0_2_3 + TestIdentity_0_1_3 + TestIdentity_0_0_3 + TestIdentity_0_4_3 + TestIdentity_0_3_3 + TestIdentity_0_1_2 + TestIdentity_0_0_2 + TestIdentity_0_4_2 + TestIdentity_0_3_2 + TestIdentity_0_2_2 + TestIdentity_0_2_5 + TestIdentity_0_1_5 + TestIdentity_0_3_5 + TestIdentity_0_4_5 + TestIdentity_0_2_4 + TestIdentity_0_0_4 + TestIdentity_0_1_4 + TestIdentity_0_4_4 + TestIdentity_0_0_5 + TestIdentity_0_3_4 + AskForSection_0_3 + CS_0 + AskForSection_0_4 + AskForSection_0_1 + AskForSection_0_0 + AskForSection_0_2 + Idle_0 = 1
invariant :IsEndLoop_5_0_0 + IsEndLoop_5_1_0 + IsEndLoop_5_2_0 + IsEndLoop_5_3_0 + IsEndLoop_5_4_0 + IsEndLoop_5_0_1 + IsEndLoop_5_1_1 + IsEndLoop_5_2_1 + IsEndLoop_5_3_1 + IsEndLoop_5_4_1 + IsEndLoop_5_0_2 + IsEndLoop_5_1_2 + IsEndLoop_5_3_2 + IsEndLoop_5_2_2 + IsEndLoop_5_4_2 + IsEndLoop_5_0_3 + IsEndLoop_5_2_3 + IsEndLoop_5_1_3 + IsEndLoop_5_3_3 + IsEndLoop_5_4_3 + IsEndLoop_5_2_4 + IsEndLoop_5_0_4 + IsEndLoop_5_1_4 + IsEndLoop_5_4_4 + IsEndLoop_5_0_5 + IsEndLoop_5_3_4 + IsEndLoop_5_2_5 + IsEndLoop_5_1_5 + EndTurn_5_0 + IsEndLoop_5_3_5 + IsEndLoop_5_4_5 + EndTurn_5_3 + EndTurn_5_2 + EndTurn_5_1 + BeginLoop_5_0_0 + EndTurn_5_4 + BeginLoop_5_3_0 + BeginLoop_5_2_0 + BeginLoop_5_1_0 + BeginLoop_5_1_1 + BeginLoop_5_0_1 + BeginLoop_5_4_0 + BeginLoop_5_4_1 + BeginLoop_5_0_2 + BeginLoop_5_1_2 + BeginLoop_5_2_1 + BeginLoop_5_3_1 + BeginLoop_5_0_3 + BeginLoop_5_1_3 + BeginLoop_5_2_2 + BeginLoop_5_3_2 + BeginLoop_5_4_2 + BeginLoop_5_0_4 + BeginLoop_5_2_4 + BeginLoop_5_1_4 + BeginLoop_5_3_3 + BeginLoop_5_2_3 + BeginLoop_5_4_3 + BeginLoop_5_1_5 + BeginLoop_5_0_5 + BeginLoop_5_2_5 + BeginLoop_5_3_4 + BeginLoop_5_4_4 + TestAlone_5_0_0 + TestAlone_5_1_0 + BeginLoop_5_4_5 + BeginLoop_5_3_5 + TestAlone_5_2_1 + TestAlone_5_0_1 + TestAlone_5_1_1 + TestAlone_5_3_0 + TestAlone_5_4_0 + TestAlone_5_2_0 + TestAlone_5_4_2 + TestAlone_5_3_2 + TestAlone_5_2_2 + TestAlone_5_1_2 + TestAlone_5_0_2 + TestAlone_5_4_1 + TestAlone_5_3_1 + TestAlone_5_0_4 + TestAlone_5_4_3 + TestAlone_5_3_3 + TestAlone_5_2_3 + TestAlone_5_1_3 + TestAlone_5_0_3 + TestTurn_5_1 + TestTurn_5_0 + TestTurn_5_2 + TestAlone_5_2_4 + TestAlone_5_1_4 + TestAlone_5_3_4 + TestAlone_5_4_4 + TestIdentity_5_3_0 + TestIdentity_5_4_0 + TestIdentity_5_0_1 + TestIdentity_5_1_1 + TestIdentity_5_2_1 + TestIdentity_5_3_1 + TestTurn_5_3 + TestTurn_5_4 + TestIdentity_5_0_0 + TestIdentity_5_1_0 + TestIdentity_5_2_0 + TestIdentity_5_1_3 + TestIdentity_5_0_3 + TestIdentity_5_4_2 + TestIdentity_5_3_3 + TestIdentity_5_2_3 + TestIdentity_5_0_2 + TestIdentity_5_4_1 + TestIdentity_5_3_2 + TestIdentity_5_2_2 + TestIdentity_5_1_2 + TestIdentity_5_1_5 + TestIdentity_5_0_5 + TestIdentity_5_4_5 + TestIdentity_5_2_5 + TestIdentity_5_3_5 + TestIdentity_5_1_4 + TestIdentity_5_4_3 + TestIdentity_5_0_4 + TestIdentity_5_3_4 + TestIdentity_5_4_4 + TestIdentity_5_2_4 + AskForSection_5_2 + AskForSection_5_4 + AskForSection_5_3 + AskForSection_5_0 + Idle_5 + AskForSection_5_1 + CS_5 = 1
invariant :WantSection_5_F + -1'Idle_5 = 0
invariant :WantSection_2_F + -1'Idle_2 = 0
invariant :Turn_3_4 + Turn_3_5 + Turn_3_1 + Turn_3_0 + Turn_3_3 + Turn_3_2 = 1
invariant :WantSection_1_F + -1'Idle_1 = 0
invariant :WantSection_4_T + Idle_4 = 1
invariant :IsEndLoop_3_0_0 + IsEndLoop_3_1_0 + IsEndLoop_3_2_0 + IsEndLoop_3_3_0 + IsEndLoop_3_4_0 + IsEndLoop_3_0_1 + IsEndLoop_3_1_1 + IsEndLoop_3_2_1 + IsEndLoop_3_3_1 + IsEndLoop_3_4_1 + IsEndLoop_3_0_2 + IsEndLoop_3_2_2 + IsEndLoop_3_1_2 + IsEndLoop_3_3_2 + IsEndLoop_3_4_2 + IsEndLoop_3_1_3 + IsEndLoop_3_0_3 + IsEndLoop_3_2_3 + IsEndLoop_3_3_3 + IsEndLoop_3_0_4 + IsEndLoop_3_4_3 + IsEndLoop_3_2_4 + IsEndLoop_3_1_4 + IsEndLoop_3_0_5 + IsEndLoop_3_3_4 + IsEndLoop_3_4_4 + IsEndLoop_3_2_5 + IsEndLoop_3_3_5 + IsEndLoop_3_1_5 + EndTurn_3_0 + IsEndLoop_3_4_5 + EndTurn_3_3 + EndTurn_3_2 + EndTurn_3_1 + BeginLoop_3_1_0 + BeginLoop_3_0_0 + EndTurn_3_4 + BeginLoop_3_3_0 + BeginLoop_3_2_0 + BeginLoop_3_1_1 + BeginLoop_3_0_1 + BeginLoop_3_4_0 + BeginLoop_3_0_2 + BeginLoop_3_1_2 + BeginLoop_3_2_1 + BeginLoop_3_3_1 + BeginLoop_3_4_1 + BeginLoop_3_0_3 + BeginLoop_3_1_3 + BeginLoop_3_2_3 + BeginLoop_3_2_2 + BeginLoop_3_3_2 + BeginLoop_3_4_2 + BeginLoop_3_1_4 + BeginLoop_3_0_4 + BeginLoop_3_2_4 + BeginLoop_3_3_3 + BeginLoop_3_4_3 + BeginLoop_3_1_5 + BeginLoop_3_2_5 + BeginLoop_3_3_4 + BeginLoop_3_0_5 + BeginLoop_3_4_4 + TestAlone_3_1_0 + TestAlone_3_0_0 + BeginLoop_3_3_5 + BeginLoop_3_4_5 + TestAlone_3_2_1 + TestAlone_3_3_1 + TestAlone_3_0_1 + TestAlone_3_1_1 + TestAlone_3_4_0 + TestAlone_3_2_0 + TestAlone_3_3_0 + TestAlone_3_4_2 + TestAlone_3_3_2 + TestAlone_3_2_2 + TestAlone_3_1_2 + TestAlone_3_0_2 + TestAlone_3_4_1 + TestAlone_3_0_4 + TestAlone_3_3_5 + TestTurn_3_0 + TestAlone_3_4_5 + TestTurn_3_1 + TestTurn_3_2 + TestAlone_3_2_4 + TestAlone_3_1_4 + TestAlone_3_3_4 + TestAlone_3_0_5 + TestAlone_3_4_4 + TestAlone_3_2_5 + TestAlone_3_1_5 + TestIdentity_3_4_0 + TestIdentity_3_0_1 + TestIdentity_3_1_1 + TestIdentity_3_2_1 + TestIdentity_3_3_1 + TestTurn_3_3 + TestTurn_3_4 + TestIdentity_3_0_0 + TestIdentity_3_1_0 + TestIdentity_3_2_0 + TestIdentity_3_3_0 + TestIdentity_3_1_3 + TestIdentity_3_0_3 + TestIdentity_3_4_2 + TestIdentity_3_4_3 + TestIdentity_3_3_3 + TestIdentity_3_2_3 + TestIdentity_3_1_2 + TestIdentity_3_0_2 + TestIdentity_3_4_1 + TestIdentity_3_3_2 + TestIdentity_3_2_2 + TestIdentity_3_1_5 + TestIdentity_3_2_5 + TestIdentity_3_0_5 + TestIdentity_3_4_5 + TestIdentity_3_3_5 + TestIdentity_3_1_4 + TestIdentity_3_0_4 + TestIdentity_3_4_4 + TestIdentity_3_2_4 + TestIdentity_3_3_4 + AskForSection_3_3 + AskForSection_3_2 + AskForSection_3_4 + AskForSection_3_0 + AskForSection_3_1 + Idle_3 + CS_3 = 1
invariant :WantSection_0_T + Idle_0 = 1
invariant :IsEndLoop_2_0_0 + IsEndLoop_2_1_0 + IsEndLoop_2_2_0 + IsEndLoop_2_3_0 + IsEndLoop_2_4_0 + IsEndLoop_2_0_1 + IsEndLoop_2_1_1 + IsEndLoop_2_2_1 + IsEndLoop_2_3_1 + IsEndLoop_2_4_1 + IsEndLoop_2_1_2 + IsEndLoop_2_0_2 + IsEndLoop_2_2_2 + IsEndLoop_2_3_2 + IsEndLoop_2_0_3 + IsEndLoop_2_4_2 + IsEndLoop_2_1_3 + IsEndLoop_2_2_3 + IsEndLoop_2_4_3 + IsEndLoop_2_3_3 + IsEndLoop_2_0_4 + IsEndLoop_2_2_4 + IsEndLoop_2_3_4 + IsEndLoop_2_1_4 + IsEndLoop_2_0_5 + IsEndLoop_2_4_4 + IsEndLoop_2_3_5 + IsEndLoop_2_1_5 + IsEndLoop_2_2_5 + EndTurn_2_0 + EndTurn_2_1 + IsEndLoop_2_4_5 + EndTurn_2_3 + EndTurn_2_2 + BeginLoop_2_1_0 + BeginLoop_2_0_0 + EndTurn_2_4 + BeginLoop_2_4_0 + BeginLoop_2_3_0 + BeginLoop_2_2_0 + BeginLoop_2_1_1 + BeginLoop_2_0_1 + BeginLoop_2_0_2 + BeginLoop_2_1_2 + BeginLoop_2_2_2 + BeginLoop_2_2_1 + BeginLoop_2_3_1 + BeginLoop_2_4_1 + BeginLoop_2_0_3 + BeginLoop_2_1_3 + BeginLoop_2_2_3 + BeginLoop_2_3_2 + BeginLoop_2_4_2 + BeginLoop_2_1_4 + BeginLoop_2_2_4 + BeginLoop_2_3_3 + BeginLoop_2_0_4 + BeginLoop_2_4_3 + BeginLoop_2_1_5 + BeginLoop_2_3_5 + BeginLoop_2_2_5 + BeginLoop_2_4_4 + BeginLoop_2_3_4 + BeginLoop_2_0_5 + TestAlone_2_1_0 + TestAlone_2_0_0 + BeginLoop_2_4_5 + TestAlone_2_2_1 + TestAlone_2_3_1 + TestAlone_2_1_1 + TestAlone_2_4_0 + TestAlone_2_0_1 + TestAlone_2_2_0 + TestAlone_2_3_0 + TestAlone_2_4_1 + TestAlone_2_0_4 + TestAlone_2_4_3 + TestAlone_2_3_3 + TestAlone_2_2_3 + TestAlone_2_1_3 + TestAlone_2_0_3 + TestAlone_2_3_5 + TestTurn_2_0 + TestAlone_2_4_5 + TestTurn_2_1 + TestTurn_2_3 + TestTurn_2_2 + TestAlone_2_2_4 + TestAlone_2_1_4 + TestAlone_2_4_4 + TestAlone_2_3_4 + TestAlone_2_0_5 + TestAlone_2_2_5 + TestAlone_2_1_5 + TestIdentity_2_4_0 + TestIdentity_2_0_1 + TestIdentity_2_1_1 + TestIdentity_2_2_1 + TestIdentity_2_3_1 + TestTurn_2_4 + TestIdentity_2_0_0 + TestIdentity_2_1_0 + TestIdentity_2_2_0 + TestIdentity_2_3_0 + TestIdentity_2_1_3 + TestIdentity_2_0_3 + TestIdentity_2_4_3 + TestIdentity_2_3_3 + TestIdentity_2_2_3 + TestIdentity_2_1_2 + TestIdentity_2_0_2 + TestIdentity_2_4_1 + TestIdentity_2_4_2 + TestIdentity_2_3_2 + TestIdentity_2_2_2 + TestIdentity_2_2_5 + TestIdentity_2_0_5 + TestIdentity_2_1_5 + TestIdentity_2_4_5 + TestIdentity_2_3_5 + TestIdentity_2_1_4 + TestIdentity_2_2_4 + TestIdentity_2_0_4 + TestIdentity_2_4_4 + TestIdentity_2_3_4 + AskForSection_2_3 + AskForSection_2_4 + AskForSection_2_0 + AskForSection_2_2 + AskForSection_2_1 + Idle_2 + CS_2 = 1
invariant :WantSection_3_F + -1'Idle_3 = 0
invariant :Turn_2_0 + Turn_2_4 + Turn_2_5 + Turn_2_1 + Turn_2_3 + Turn_2_2 = 1
FORMULA Peterson-PT-5-ReachabilityCardinality-01 FALSE TECHNIQUES SAT_SMT K_INDUCTION(0)
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O3, model.c], workingDir=/home/mcc/execution]
Compilation finished in 59540 ms.
Running link step : CommandLine [args=[gcc, -shared, -o, gal.so, model.o], workingDir=/home/mcc/execution]
Link finished in 194 ms.
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -i, PetersonPT5ReachabilityCardinality00==true], workingDir=/home/mcc/execution]
WARNING : LTSmin timed out (>240 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -i, PetersonPT5ReachabilityCardinality00==true], workingDir=/home/mcc/execution]
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -i, PetersonPT5ReachabilityCardinality02==true], workingDir=/home/mcc/execution]
FORMULA Peterson-PT-5-ReachabilityCardinality-06 TRUE TECHNIQUES SAT_SMT K_INDUCTION(0)
LTSmin run took 146311 ms.
Found Violation
FORMULA Peterson-PT-5-ReachabilityCardinality-02 TRUE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -i, PetersonPT5ReachabilityCardinality03==true], workingDir=/home/mcc/execution]
FORMULA Peterson-PT-5-ReachabilityCardinality-10 FALSE TECHNIQUES SAT_SMT K_INDUCTION(0)
LTSmin run took 93777 ms.
Found Violation
FORMULA Peterson-PT-5-ReachabilityCardinality-03 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -i, PetersonPT5ReachabilityCardinality04==true], workingDir=/home/mcc/execution]
WARNING : LTSmin timed out (>240 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -i, PetersonPT5ReachabilityCardinality04==true], workingDir=/home/mcc/execution]
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -i, PetersonPT5ReachabilityCardinality05==true], workingDir=/home/mcc/execution]
FORMULA Peterson-PT-5-ReachabilityCardinality-15 FALSE TECHNIQUES SAT_SMT K_INDUCTION(0)
WARNING : LTSmin timed out (>240 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -i, PetersonPT5ReachabilityCardinality05==true], workingDir=/home/mcc/execution]
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -i, PetersonPT5ReachabilityCardinality08==true], workingDir=/home/mcc/execution]
WARNING : LTSmin timed out (>240 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -i, PetersonPT5ReachabilityCardinality08==true], workingDir=/home/mcc/execution]
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -i, PetersonPT5ReachabilityCardinality09==true], workingDir=/home/mcc/execution]
WARNING : LTSmin timed out (>240 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -i, PetersonPT5ReachabilityCardinality09==true], workingDir=/home/mcc/execution]
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -i, PetersonPT5ReachabilityCardinality11==true], workingDir=/home/mcc/execution]
WARNING : LTSmin timed out (>240 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -i, PetersonPT5ReachabilityCardinality11==true], workingDir=/home/mcc/execution]
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -i, PetersonPT5ReachabilityCardinality12==true], workingDir=/home/mcc/execution]
WARNING : LTSmin timed out (>240 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -i, PetersonPT5ReachabilityCardinality12==true], workingDir=/home/mcc/execution]
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -i, PetersonPT5ReachabilityCardinality13==true], workingDir=/home/mcc/execution]
WARNING : LTSmin timed out (>240 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -i, PetersonPT5ReachabilityCardinality13==true], workingDir=/home/mcc/execution]
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -i, PetersonPT5ReachabilityCardinality14==true], workingDir=/home/mcc/execution]
WARNING : LTS min runner thread failed on error :java.lang.RuntimeException: Unexpected exception when executing ltsmin :CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -i, PetersonPT5ReachabilityCardinality14==true], workingDir=/home/mcc/execution]
255

BK_TIME_CONFINEMENT_REACHED

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution ReachabilityCardinality -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -consoleLog -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination ReachabilityCardinality -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
May 24, 2018 6:43:08 PM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, ReachabilityCardinality, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -smt]
May 24, 2018 6:43:08 PM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
May 24, 2018 6:43:09 PM fr.lip6.move.gal.nupn.PTNetReader loadFromXML
INFO: Load time of PNML (sax parser for PT used): 609 ms
May 24, 2018 6:43:09 PM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 834 places.
May 24, 2018 6:43:10 PM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 1242 transitions.
May 24, 2018 6:43:10 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.img.gal : 128 ms
May 24, 2018 6:43:11 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 1045 ms
May 24, 2018 6:43:13 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 565 ms
May 24, 2018 6:43:13 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/ReachabilityCardinality.pnml.gal : 93 ms
May 24, 2018 6:43:13 PM fr.lip6.move.serialization.SerializationUtil serializePropertiesForITSTools
INFO: Time to serialize properties into /home/mcc/execution/ReachabilityCardinality.prop : 40 ms
May 24, 2018 6:43:14 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 970 ms
May 24, 2018 6:43:16 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 1242 transitions.
May 24, 2018 6:43:16 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 1242 transitions.
May 24, 2018 6:43:21 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd checkProperties
INFO: Ran tautology test, simplified 0 / 15 in 6972 ms.
May 24, 2018 6:43:22 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 1242 transitions.
May 24, 2018 6:43:22 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-5-ReachabilityCardinality-00(UNSAT) depth K=0 took 835 ms
May 24, 2018 6:43:22 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 23 place invariants in 2179 ms
May 24, 2018 6:43:22 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-5-ReachabilityCardinality-01(UNSAT) depth K=0 took 159 ms
May 24, 2018 6:43:23 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-5-ReachabilityCardinality-02(UNSAT) depth K=0 took 144 ms
May 24, 2018 6:43:23 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-5-ReachabilityCardinality-03(UNSAT) depth K=0 took 185 ms
May 24, 2018 6:43:23 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-5-ReachabilityCardinality-04(UNSAT) depth K=0 took 141 ms
May 24, 2018 6:43:23 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-5-ReachabilityCardinality-05(UNSAT) depth K=0 took 122 ms
May 24, 2018 6:43:23 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-5-ReachabilityCardinality-06(UNSAT) depth K=0 took 121 ms
May 24, 2018 6:43:23 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-5-ReachabilityCardinality-08(UNSAT) depth K=0 took 94 ms
May 24, 2018 6:43:23 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-5-ReachabilityCardinality-09(UNSAT) depth K=0 took 84 ms
May 24, 2018 6:43:23 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-5-ReachabilityCardinality-10(UNSAT) depth K=0 took 22 ms
May 24, 2018 6:43:23 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-5-ReachabilityCardinality-11(UNSAT) depth K=0 took 113 ms
May 24, 2018 6:43:24 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-5-ReachabilityCardinality-12(UNSAT) depth K=0 took 124 ms
May 24, 2018 6:43:24 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-5-ReachabilityCardinality-13(UNSAT) depth K=0 took 72 ms
May 24, 2018 6:43:24 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-5-ReachabilityCardinality-14(UNSAT) depth K=0 took 64 ms
May 24, 2018 6:43:24 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-5-ReachabilityCardinality-15(UNSAT) depth K=0 took 69 ms
May 24, 2018 6:43:24 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-5-ReachabilityCardinality-00(UNSAT) depth K=1 took 303 ms
May 24, 2018 6:43:24 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-5-ReachabilityCardinality-01(UNSAT) depth K=1 took 41 ms
May 24, 2018 6:43:24 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-5-ReachabilityCardinality-02(UNSAT) depth K=1 took 45 ms
May 24, 2018 6:43:24 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-5-ReachabilityCardinality-03(UNSAT) depth K=1 took 167 ms
May 24, 2018 6:43:25 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-5-ReachabilityCardinality-04(UNSAT) depth K=1 took 63 ms
May 24, 2018 6:43:25 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-5-ReachabilityCardinality-05(UNSAT) depth K=1 took 178 ms
May 24, 2018 6:43:25 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-5-ReachabilityCardinality-06(UNSAT) depth K=1 took 24 ms
May 24, 2018 6:43:25 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-5-ReachabilityCardinality-08(UNSAT) depth K=1 took 47 ms
May 24, 2018 6:43:25 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-5-ReachabilityCardinality-09(UNSAT) depth K=1 took 20 ms
May 24, 2018 6:43:25 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-5-ReachabilityCardinality-10(UNSAT) depth K=1 took 88 ms
May 24, 2018 6:43:25 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-5-ReachabilityCardinality-11(UNSAT) depth K=1 took 78 ms
May 24, 2018 6:43:25 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-5-ReachabilityCardinality-12(UNSAT) depth K=1 took 30 ms
May 24, 2018 6:43:25 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-5-ReachabilityCardinality-13(UNSAT) depth K=1 took 55 ms
May 24, 2018 6:43:25 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-5-ReachabilityCardinality-14(UNSAT) depth K=1 took 31 ms
May 24, 2018 6:43:25 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-5-ReachabilityCardinality-15(UNSAT) depth K=1 took 34 ms
May 24, 2018 6:43:26 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 23 place invariants in 1132 ms
May 24, 2018 6:43:34 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-5-ReachabilityCardinality-00(UNSAT) depth K=2 took 8975 ms
May 24, 2018 6:43:36 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-5-ReachabilityCardinality-01(UNSAT) depth K=2 took 2068 ms
May 24, 2018 6:43:37 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-5-ReachabilityCardinality-02(UNSAT) depth K=2 took 1197 ms
May 24, 2018 6:43:39 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-5-ReachabilityCardinality-03(UNSAT) depth K=2 took 1231 ms
May 24, 2018 6:43:40 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-5-ReachabilityCardinality-04(UNSAT) depth K=2 took 1064 ms
May 24, 2018 6:43:41 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-5-ReachabilityCardinality-05(UNSAT) depth K=2 took 1709 ms
May 24, 2018 6:43:46 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-5-ReachabilityCardinality-06(UNSAT) depth K=2 took 4412 ms
May 24, 2018 6:43:53 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-5-ReachabilityCardinality-08(UNSAT) depth K=2 took 6931 ms
May 24, 2018 6:43:53 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 834 variables to be positive in 33446 ms
May 24, 2018 6:43:53 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may disable matrix : 1242 transitions.
May 24, 2018 6:43:53 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of disable matrix completed :0/1242 took 0 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 24, 2018 6:43:54 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete disable matrix. took 736 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 24, 2018 6:43:54 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may enable matrix : 1242 transitions.
May 24, 2018 6:43:55 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete enable matrix. took 325 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 24, 2018 6:43:57 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-5-ReachabilityCardinality-09(UNSAT) depth K=2 took 4271 ms
May 24, 2018 6:43:59 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-5-ReachabilityCardinality-10(UNSAT) depth K=2 took 1936 ms
May 24, 2018 6:44:00 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 834 variables to be positive in 34708 ms
May 24, 2018 6:44:06 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-5-ReachabilityCardinality-11(UNSAT) depth K=2 took 7421 ms
May 24, 2018 6:44:09 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-5-ReachabilityCardinality-12(UNSAT) depth K=2 took 2396 ms
May 24, 2018 6:44:10 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-5-ReachabilityCardinality-13(UNSAT) depth K=2 took 1676 ms
May 24, 2018 6:44:13 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-5-ReachabilityCardinality-14(UNSAT) depth K=2 took 2587 ms
May 24, 2018 6:44:18 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-5-ReachabilityCardinality-15(UNSAT) depth K=2 took 5379 ms
May 24, 2018 6:45:33 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesPeterson-PT-5-ReachabilityCardinality-00
May 24, 2018 6:45:33 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property Peterson-PT-5-ReachabilityCardinality-00(SAT) depth K=0 took 92869 ms
May 24, 2018 6:47:01 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, proved UNreachability of reachability predicate Peterson-PT-5-ReachabilityCardinality-01
May 24, 2018 6:47:01 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, successfully proved induction at step 0 for Peterson-PT-5-ReachabilityCardinality-01
May 24, 2018 6:47:01 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property Peterson-PT-5-ReachabilityCardinality-01(FALSE) depth K=0 took 87677 ms
May 24, 2018 6:48:36 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesPeterson-PT-5-ReachabilityCardinality-02
May 24, 2018 6:48:36 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property Peterson-PT-5-ReachabilityCardinality-02(SAT) depth K=0 took 95942 ms
Skipping mayMatrices nes/nds SMT solver raised an error :unknown
java.lang.RuntimeException: SMT solver raised an error :unknown
at fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver.computeAblingForPredicate(NecessaryEnablingsolver.java:766)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.printLabels(Gal2PinsTransformerNext.java:502)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.printDependencyMatrix(Gal2PinsTransformerNext.java:209)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.buildBodyFile(Gal2PinsTransformerNext.java:85)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.transform(Gal2PinsTransformerNext.java:830)
at fr.lip6.move.gal.application.LTSminRunner$1.run(LTSminRunner.java:71)
at java.lang.Thread.run(Thread.java:748)
May 24, 2018 6:49:02 PM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 347716ms conformant to PINS in folder :/home/mcc/execution
May 24, 2018 6:50:30 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesPeterson-PT-5-ReachabilityCardinality-03
May 24, 2018 6:50:30 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property Peterson-PT-5-ReachabilityCardinality-03(SAT) depth K=0 took 113388 ms
May 24, 2018 6:52:10 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesPeterson-PT-5-ReachabilityCardinality-04
May 24, 2018 6:52:10 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property Peterson-PT-5-ReachabilityCardinality-04(SAT) depth K=0 took 99770 ms
May 24, 2018 6:53:02 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesPeterson-PT-5-ReachabilityCardinality-05
May 24, 2018 6:53:02 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property Peterson-PT-5-ReachabilityCardinality-05(SAT) depth K=0 took 52054 ms
May 24, 2018 6:53:14 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-5-ReachabilityCardinality-00(UNSAT) depth K=3 took 535252 ms
May 24, 2018 6:55:11 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, proved invariant Peterson-PT-5-ReachabilityCardinality-06
May 24, 2018 6:55:11 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, successfully proved induction at step 0 for Peterson-PT-5-ReachabilityCardinality-06
May 24, 2018 6:55:11 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property Peterson-PT-5-ReachabilityCardinality-06(TRUE) depth K=0 took 128981 ms
May 24, 2018 6:55:55 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesPeterson-PT-5-ReachabilityCardinality-08
May 24, 2018 6:55:55 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property Peterson-PT-5-ReachabilityCardinality-08(SAT) depth K=0 took 44316 ms
May 24, 2018 6:56:46 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-5-ReachabilityCardinality-01(UNSAT) depth K=3 took 212276 ms
May 24, 2018 6:57:15 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesPeterson-PT-5-ReachabilityCardinality-09
May 24, 2018 6:57:15 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property Peterson-PT-5-ReachabilityCardinality-09(SAT) depth K=0 took 79700 ms
May 24, 2018 6:57:49 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, proved UNreachability of reachability predicate Peterson-PT-5-ReachabilityCardinality-10
May 24, 2018 6:57:49 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, successfully proved induction at step 0 for Peterson-PT-5-ReachabilityCardinality-10
May 24, 2018 6:57:49 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property Peterson-PT-5-ReachabilityCardinality-10(FALSE) depth K=0 took 34510 ms
May 24, 2018 6:58:43 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-5-ReachabilityCardinality-02(UNSAT) depth K=3 took 116942 ms
May 24, 2018 6:59:42 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesPeterson-PT-5-ReachabilityCardinality-11
May 24, 2018 6:59:42 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property Peterson-PT-5-ReachabilityCardinality-11(SAT) depth K=0 took 112724 ms
May 24, 2018 7:00:05 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesPeterson-PT-5-ReachabilityCardinality-12
May 24, 2018 7:00:05 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property Peterson-PT-5-ReachabilityCardinality-12(SAT) depth K=0 took 23156 ms
May 24, 2018 7:01:11 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesPeterson-PT-5-ReachabilityCardinality-13
May 24, 2018 7:01:11 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property Peterson-PT-5-ReachabilityCardinality-13(SAT) depth K=0 took 66279 ms
May 24, 2018 7:02:04 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesPeterson-PT-5-ReachabilityCardinality-14
May 24, 2018 7:02:04 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property Peterson-PT-5-ReachabilityCardinality-14(SAT) depth K=0 took 52984 ms
May 24, 2018 7:02:27 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, proved UNreachability of reachability predicate Peterson-PT-5-ReachabilityCardinality-15
May 24, 2018 7:02:27 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, successfully proved induction at step 0 for Peterson-PT-5-ReachabilityCardinality-15
May 24, 2018 7:02:27 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property Peterson-PT-5-ReachabilityCardinality-15(FALSE) depth K=0 took 22447 ms
May 24, 2018 7:02:48 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-5-ReachabilityCardinality-03(UNSAT) depth K=3 took 244881 ms
May 24, 2018 7:04:26 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-5-ReachabilityCardinality-04(UNSAT) depth K=3 took 98512 ms
May 24, 2018 7:08:33 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-5-ReachabilityCardinality-05(UNSAT) depth K=3 took 246892 ms
May 24, 2018 7:15:55 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-5-ReachabilityCardinality-06(UNSAT) depth K=3 took 441487 ms
May 24, 2018 7:16:43 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-5-ReachabilityCardinality-08(UNSAT) depth K=3 took 48235 ms
May 24, 2018 7:17:03 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-5-ReachabilityCardinality-09(UNSAT) depth K=3 took 19901 ms
May 24, 2018 7:18:19 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-5-ReachabilityCardinality-10(UNSAT) depth K=3 took 75774 ms
May 24, 2018 7:19:40 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-5-ReachabilityCardinality-11(UNSAT) depth K=3 took 81262 ms
May 24, 2018 7:20:13 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-5-ReachabilityCardinality-12(UNSAT) depth K=3 took 33543 ms
May 24, 2018 7:20:41 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-5-ReachabilityCardinality-13(UNSAT) depth K=3 took 27395 ms
May 24, 2018 7:22:24 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-5-ReachabilityCardinality-14(UNSAT) depth K=3 took 103184 ms
May 24, 2018 7:23:11 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-5-ReachabilityCardinality-15(UNSAT) depth K=3 took 46995 ms
pins2lts-mc, 0.000: Registering PINS so language module
pins2lts-mc, 0.000, ** error **: out of memory trying to get 4294967296
java.lang.RuntimeException: Unexpected exception when executing ltsmin :CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -i, PetersonPT5ReachabilityCardinality14==true], workingDir=/home/mcc/execution]
255
at fr.lip6.move.gal.application.LTSminRunner.checkProperty(LTSminRunner.java:167)
at fr.lip6.move.gal.application.LTSminRunner.access$9(LTSminRunner.java:122)
at fr.lip6.move.gal.application.LTSminRunner$1.run(LTSminRunner.java:91)
at java.lang.Thread.run(Thread.java:748)
ITS-tools command line returned an error code 137
May 24, 2018 7:40:47 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-5-ReachabilityCardinality-00(UNSAT) depth K=4 took 1056314 ms

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="Peterson-PT-5"
export BK_EXAMINATION="ReachabilityCardinality"
export BK_TOOL="itstools"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

tar xzf /home/mcc/BenchKit/INPUTS/Peterson-PT-5.tgz
mv Peterson-PT-5 execution
cd execution
pwd
ls -lh

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3637"
echo " Executing tool itstools"
echo " Input is Peterson-PT-5, examination is ReachabilityCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r116-csrt-152666475600579"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' ReachabilityCardinality.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;