fond
Model Checking Contest 2018
8th edition, Bratislava, Slovakia, June 26, 2018
Execution of r116-csrt-152666475600572
Last Updated
June 26, 2018

About the Execution of ITS-Tools for Peterson-PT-4

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
15756.400 3600000.00 12564032.00 3070.40 FTTFTTTT?F?FFTTT normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Waiting for the VM to be ready (probing ssh)
................................................................................
/home/mcc/execution
total 1.3M
-rw-r--r-- 1 mcc users 40K May 15 18:54 CTLCardinality.txt
-rw-r--r-- 1 mcc users 114K May 15 18:54 CTLCardinality.xml
-rw-r--r-- 1 mcc users 24K May 15 18:54 CTLFireability.txt
-rw-r--r-- 1 mcc users 82K May 15 18:54 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K May 15 18:50 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.0K May 15 18:50 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 20K May 15 18:54 LTLCardinality.txt
-rw-r--r-- 1 mcc users 56K May 15 18:54 LTLCardinality.xml
-rw-r--r-- 1 mcc users 9.8K May 15 18:54 LTLFireability.txt
-rw-r--r-- 1 mcc users 32K May 15 18:54 LTLFireability.xml
-rw-r--r-- 1 mcc users 37K May 15 18:54 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 106K May 15 18:54 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 104 May 15 18:54 ReachabilityDeadlock.txt
-rw-r--r-- 1 mcc users 342 May 15 18:54 ReachabilityDeadlock.xml
-rw-r--r-- 1 mcc users 29K May 15 18:54 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 100K May 15 18:54 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 12K May 15 18:54 UpperBounds.txt
-rw-r--r-- 1 mcc users 25K May 15 18:54 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 May 15 18:50 equiv_col
-rw-r--r-- 1 mcc users 2 May 15 18:50 instance
-rw-r--r-- 1 mcc users 6 May 15 18:50 iscolored
-rw-r--r-- 1 mcc users 511K May 15 18:50 model.pnml
=====================================================================
Generated by BenchKit 2-3637
Executing tool itstools
Input is Peterson-PT-4, examination is ReachabilityCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r116-csrt-152666475600572
=====================================================================


--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME Peterson-PT-4-ReachabilityCardinality-00
FORMULA_NAME Peterson-PT-4-ReachabilityCardinality-01
FORMULA_NAME Peterson-PT-4-ReachabilityCardinality-02
FORMULA_NAME Peterson-PT-4-ReachabilityCardinality-03
FORMULA_NAME Peterson-PT-4-ReachabilityCardinality-04
FORMULA_NAME Peterson-PT-4-ReachabilityCardinality-05
FORMULA_NAME Peterson-PT-4-ReachabilityCardinality-06
FORMULA_NAME Peterson-PT-4-ReachabilityCardinality-07
FORMULA_NAME Peterson-PT-4-ReachabilityCardinality-08
FORMULA_NAME Peterson-PT-4-ReachabilityCardinality-09
FORMULA_NAME Peterson-PT-4-ReachabilityCardinality-10
FORMULA_NAME Peterson-PT-4-ReachabilityCardinality-11
FORMULA_NAME Peterson-PT-4-ReachabilityCardinality-12
FORMULA_NAME Peterson-PT-4-ReachabilityCardinality-13
FORMULA_NAME Peterson-PT-4-ReachabilityCardinality-14
FORMULA_NAME Peterson-PT-4-ReachabilityCardinality-15

=== Now, execution of the tool begins

BK_START 1527186979288

Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805151631/bin/its-reach-linux64, --gc-threshold, 2000000, --quiet, -i, /home/mcc/execution/ReachabilityCardinality.pnml.gal, -t, CGAL, -reachable-file, ReachabilityCardinality.prop, --nowitness], workingDir=/home/mcc/execution]

its-reach command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805151631/bin/its-reach-linux64 --gc-threshold 2000000 --quiet -i /home/mcc/execution/ReachabilityCardinality.pnml.gal -t CGAL -reachable-file ReachabilityCardinality.prop --nowitness
Loading property file ReachabilityCardinality.prop.
Read [reachable] property : Peterson-PT-4-ReachabilityCardinality-00 with value :(((((((((((WantSection_0_T+WantSection_4_F)+WantSection_3_F)+WantSection_2_F)+WantSection_1_F)+WantSection_0_F)+WantSection_4_T)+WantSection_3_T)+WantSection_2_T)+WantSection_1_T)<=(((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((BeginLoop_4_0_0+BeginLoop_3_0_0)+BeginLoop_2_0_0)+BeginLoop_1_0_0)+BeginLoop_0_0_0)+BeginLoop_4_2_0)+BeginLoop_3_2_0)+BeginLoop_1_3_0)+BeginLoop_0_3_0)+BeginLoop_3_3_0)+BeginLoop_2_3_0)+BeginLoop_0_0_1)+BeginLoop_4_3_0)+BeginLoop_1_1_0)+BeginLoop_0_1_0)+BeginLoop_3_1_0)+BeginLoop_2_1_0)+BeginLoop_0_2_0)+BeginLoop_4_1_0)+BeginLoop_2_2_0)+BeginLoop_1_2_0)+BeginLoop_4_1_1)+BeginLoop_0_2_1)+BeginLoop_1_2_1)+BeginLoop_2_2_1)+BeginLoop_3_2_1)+BeginLoop_4_2_1)+BeginLoop_0_3_1)+BeginLoop_1_3_1)+BeginLoop_1_0_1)+BeginLoop_2_0_1)+BeginLoop_3_0_1)+BeginLoop_4_0_1)+BeginLoop_0_1_1)+BeginLoop_1_1_1)+BeginLoop_2_1_1)+BeginLoop_3_1_1)+BeginLoop_3_1_2)+BeginLoop_2_1_2)+BeginLoop_1_1_2)+BeginLoop_0_1_2)+BeginLoop_2_2_2)+BeginLoop_1_2_2)+BeginLoop_0_2_2)+BeginLoop_4_1_2)+BeginLoop_0_0_2)+BeginLoop_4_3_1)+BeginLoop_3_3_1)+BeginLoop_2_3_1)+BeginLoop_4_0_2)+BeginLoop_3_0_2)+BeginLoop_2_0_2)+BeginLoop_1_0_2)+BeginLoop_3_0_3)+BeginLoop_4_0_3)+BeginLoop_1_0_3)+BeginLoop_2_0_3)+BeginLoop_2_1_3)+BeginLoop_3_1_3)+BeginLoop_0_1_3)+BeginLoop_1_1_3)+BeginLoop_0_3_2)+BeginLoop_1_3_2)+BeginLoop_3_2_2)+BeginLoop_4_2_2)+BeginLoop_4_3_2)+BeginLoop_0_0_3)+BeginLoop_2_3_2)+BeginLoop_3_3_2)+BeginLoop_2_0_4)+BeginLoop_1_0_4)+BeginLoop_4_0_4)+BeginLoop_3_0_4)+BeginLoop_3_3_3)+BeginLoop_2_3_3)+BeginLoop_0_0_4)+BeginLoop_4_3_3)+BeginLoop_4_2_3)+BeginLoop_3_2_3)+BeginLoop_1_3_3)+BeginLoop_0_3_3)+BeginLoop_0_2_3)+BeginLoop_4_1_3)+BeginLoop_2_2_3)+BeginLoop_1_2_3)+BeginLoop_2_3_4)+BeginLoop_3_3_4)+BeginLoop_4_3_4)+BeginLoop_3_2_4)+BeginLoop_4_2_4)+BeginLoop_0_3_4)+BeginLoop_1_3_4)+BeginLoop_4_1_4)+BeginLoop_0_2_4)+BeginLoop_1_2_4)+BeginLoop_2_2_4)+BeginLoop_0_1_4)+BeginLoop_1_1_4)+BeginLoop_2_1_4)+BeginLoop_3_1_4))&&(!((((((((((((((((((((Turn_3_1+Turn_0_2)+Turn_1_2)+Turn_2_2)+Turn_3_2)+Turn_0_3)+Turn_1_3)+Turn_2_3)+Turn_0_0)+Turn_1_0)+Turn_2_0)+Turn_3_0)+Turn_0_1)+Turn_1_1)+Turn_2_1)+Turn_3_4)+Turn_2_4)+Turn_1_4)+Turn_0_4)+Turn_3_3)>=1)))
Read [invariant] property : Peterson-PT-4-ReachabilityCardinality-01 with value :(((((((((((((((((((((Turn_3_1+Turn_0_2)+Turn_1_2)+Turn_2_2)+Turn_3_2)+Turn_0_3)+Turn_1_3)+Turn_2_3)+Turn_0_0)+Turn_1_0)+Turn_2_0)+Turn_3_0)+Turn_0_1)+Turn_1_1)+Turn_2_1)+Turn_3_4)+Turn_2_4)+Turn_1_4)+Turn_0_4)+Turn_3_3)>=1)||((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((TestAlone_3_1_0+TestAlone_2_1_0)+TestAlone_1_1_0)+TestAlone_4_0_0)+TestAlone_3_0_0)+TestAlone_2_0_0)+TestAlone_1_0_0)+TestAlone_2_1_1)+TestAlone_3_1_1)+TestAlone_4_0_1)+TestAlone_0_1_1)+TestAlone_2_0_1)+TestAlone_3_0_1)+TestAlone_4_3_0)+TestAlone_0_0_1)+TestAlone_2_3_0)+TestAlone_3_3_0)+TestAlone_4_2_0)+TestAlone_1_3_0)+TestAlone_2_2_0)+TestAlone_3_2_0)+TestAlone_4_1_0)+TestAlone_1_2_0)+TestAlone_3_2_2)+TestAlone_1_2_2)+TestAlone_0_2_2)+TestAlone_4_1_2)+TestAlone_3_3_2)+TestAlone_1_3_2)+TestAlone_0_3_2)+TestAlone_4_2_2)+TestAlone_2_0_3)+TestAlone_1_0_3)+TestAlone_0_0_3)+TestAlone_4_3_2)+TestAlone_2_1_3)+TestAlone_1_1_3)+TestAlone_0_1_3)+TestAlone_4_0_3)+TestAlone_2_2_1)+TestAlone_3_2_1)+TestAlone_4_1_1)+TestAlone_0_2_1)+TestAlone_2_3_1)+TestAlone_3_3_1)+TestAlone_4_2_1)+TestAlone_0_3_1)+TestAlone_1_0_2)+TestAlone_3_0_2)+TestAlone_4_3_1)+TestAlone_0_0_2)+TestAlone_1_1_2)+TestAlone_3_1_2)+TestAlone_4_0_2)+TestAlone_0_1_2)+TestAlone_0_2_4)+TestAlone_3_1_4)+TestAlone_2_2_4)+TestAlone_1_2_4)+TestAlone_0_3_4)+TestAlone_3_2_4)+TestAlone_2_3_4)+TestAlone_1_3_4)+TestAlone_3_3_4)+TestAlone_4_1_3)+TestAlone_0_2_3)+TestAlone_1_2_3)+TestAlone_2_2_3)+TestAlone_4_2_3)+TestAlone_0_3_3)+TestAlone_1_3_3)+TestAlone_2_3_3)+TestAlone_4_3_3)+TestAlone_0_0_4)+TestAlone_1_0_4)+TestAlone_2_0_4)+TestAlone_3_0_4)+TestAlone_0_1_4)+TestAlone_1_1_4)+TestAlone_2_1_4)>=1)&&(((((CS_0+CS_1)+CS_3)+CS_2)+CS_4)<=(((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((BeginLoop_4_0_0+BeginLoop_3_0_0)+BeginLoop_2_0_0)+BeginLoop_1_0_0)+BeginLoop_0_0_0)+BeginLoop_4_2_0)+BeginLoop_3_2_0)+BeginLoop_1_3_0)+BeginLoop_0_3_0)+BeginLoop_3_3_0)+BeginLoop_2_3_0)+BeginLoop_0_0_1)+BeginLoop_4_3_0)+BeginLoop_1_1_0)+BeginLoop_0_1_0)+BeginLoop_3_1_0)+BeginLoop_2_1_0)+BeginLoop_0_2_0)+BeginLoop_4_1_0)+BeginLoop_2_2_0)+BeginLoop_1_2_0)+BeginLoop_4_1_1)+BeginLoop_0_2_1)+BeginLoop_1_2_1)+BeginLoop_2_2_1)+BeginLoop_3_2_1)+BeginLoop_4_2_1)+BeginLoop_0_3_1)+BeginLoop_1_3_1)+BeginLoop_1_0_1)+BeginLoop_2_0_1)+BeginLoop_3_0_1)+BeginLoop_4_0_1)+BeginLoop_0_1_1)+BeginLoop_1_1_1)+BeginLoop_2_1_1)+BeginLoop_3_1_1)+BeginLoop_3_1_2)+BeginLoop_2_1_2)+BeginLoop_1_1_2)+BeginLoop_0_1_2)+BeginLoop_2_2_2)+BeginLoop_1_2_2)+BeginLoop_0_2_2)+BeginLoop_4_1_2)+BeginLoop_0_0_2)+BeginLoop_4_3_1)+BeginLoop_3_3_1)+BeginLoop_2_3_1)+BeginLoop_4_0_2)+BeginLoop_3_0_2)+BeginLoop_2_0_2)+BeginLoop_1_0_2)+BeginLoop_3_0_3)+BeginLoop_4_0_3)+BeginLoop_1_0_3)+BeginLoop_2_0_3)+BeginLoop_2_1_3)+BeginLoop_3_1_3)+BeginLoop_0_1_3)+BeginLoop_1_1_3)+BeginLoop_0_3_2)+BeginLoop_1_3_2)+BeginLoop_3_2_2)+BeginLoop_4_2_2)+BeginLoop_4_3_2)+BeginLoop_0_0_3)+BeginLoop_2_3_2)+BeginLoop_3_3_2)+BeginLoop_2_0_4)+BeginLoop_1_0_4)+BeginLoop_4_0_4)+BeginLoop_3_0_4)+BeginLoop_3_3_3)+BeginLoop_2_3_3)+BeginLoop_0_0_4)+BeginLoop_4_3_3)+BeginLoop_4_2_3)+BeginLoop_3_2_3)+BeginLoop_1_3_3)+BeginLoop_0_3_3)+BeginLoop_0_2_3)+BeginLoop_4_1_3)+BeginLoop_2_2_3)+BeginLoop_1_2_3)+BeginLoop_2_3_4)+BeginLoop_3_3_4)+BeginLoop_4_3_4)+BeginLoop_3_2_4)+BeginLoop_4_2_4)+BeginLoop_0_3_4)+BeginLoop_1_3_4)+BeginLoop_4_1_4)+BeginLoop_0_2_4)+BeginLoop_1_2_4)+BeginLoop_2_2_4)+BeginLoop_0_1_4)+BeginLoop_1_1_4)+BeginLoop_2_1_4)+BeginLoop_3_1_4)))||(!((((((((((((((((((((EndTurn_0_0+EndTurn_2_1)+EndTurn_3_1)+EndTurn_0_1)+EndTurn_1_1)+EndTurn_3_0)+EndTurn_4_0)+EndTurn_1_0)+EndTurn_2_0)+EndTurn_1_3)+EndTurn_0_3)+EndTurn_4_2)+EndTurn_3_2)+EndTurn_2_2)+EndTurn_1_2)+EndTurn_0_2)+EndTurn_4_1)+EndTurn_4_3)+EndTurn_3_3)+EndTurn_2_3)<=(((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((IsEndLoop_0_0_0+IsEndLoop_1_0_0)+IsEndLoop_2_0_0)+IsEndLoop_3_0_0)+IsEndLoop_4_0_0)+IsEndLoop_0_1_0)+IsEndLoop_1_1_0)+IsEndLoop_2_1_0)+IsEndLoop_3_1_0)+IsEndLoop_4_1_0)+IsEndLoop_0_2_0)+IsEndLoop_1_2_0)+IsEndLoop_2_2_0)+IsEndLoop_4_2_0)+IsEndLoop_3_2_0)+IsEndLoop_1_3_0)+IsEndLoop_0_3_0)+IsEndLoop_3_3_0)+IsEndLoop_2_3_0)+IsEndLoop_0_0_1)+IsEndLoop_4_3_0)+IsEndLoop_2_0_1)+IsEndLoop_1_0_1)+IsEndLoop_4_0_1)+IsEndLoop_3_0_1)+IsEndLoop_1_1_1)+IsEndLoop_0_1_1)+IsEndLoop_3_1_1)+IsEndLoop_2_1_1)+IsEndLoop_1_2_1)+IsEndLoop_2_2_1)+IsEndLoop_4_1_1)+IsEndLoop_0_2_1)+IsEndLoop_0_3_1)+IsEndLoop_1_3_1)+IsEndLoop_3_2_1)+IsEndLoop_4_2_1)+IsEndLoop_4_3_1)+IsEndLoop_0_0_2)+IsEndLoop_2_3_1)+IsEndLoop_3_3_1)+IsEndLoop_3_0_2)+IsEndLoop_4_0_2)+IsEndLoop_1_0_2)+IsEndLoop_2_0_2)+IsEndLoop_3_1_2)+IsEndLoop_2_1_2)+IsEndLoop_1_1_2)+IsEndLoop_0_1_2)+IsEndLoop_2_2_2)+IsEndLoop_1_2_2)+IsEndLoop_0_2_2)+IsEndLoop_4_1_2)+IsEndLoop_1_3_2)+IsEndLoop_0_3_2)+IsEndLoop_4_2_2)+IsEndLoop_3_2_2)+IsEndLoop_0_0_3)+IsEndLoop_4_3_2)+IsEndLoop_3_3_2)+IsEndLoop_2_3_2)+IsEndLoop_0_1_3)+IsEndLoop_1_1_3)+IsEndLoop_2_1_3)+IsEndLoop_3_1_3)+IsEndLoop_1_0_3)+IsEndLoop_2_0_3)+IsEndLoop_3_0_3)+IsEndLoop_4_0_3)+IsEndLoop_3_2_3)+IsEndLoop_4_2_3)+IsEndLoop_0_3_3)+IsEndLoop_1_3_3)+IsEndLoop_4_1_3)+IsEndLoop_0_2_3)+IsEndLoop_1_2_3)+IsEndLoop_2_2_3)+IsEndLoop_2_0_4)+IsEndLoop_1_0_4)+IsEndLoop_4_0_4)+IsEndLoop_3_0_4)+IsEndLoop_3_3_3)+IsEndLoop_2_3_3)+IsEndLoop_0_0_4)+IsEndLoop_4_3_3)+IsEndLoop_0_2_4)+IsEndLoop_4_1_4)+IsEndLoop_2_2_4)+IsEndLoop_1_2_4)+IsEndLoop_1_1_4)+IsEndLoop_0_1_4)+IsEndLoop_3_1_4)+IsEndLoop_2_1_4)+IsEndLoop_4_3_4)+IsEndLoop_2_3_4)+IsEndLoop_3_3_4)+IsEndLoop_0_3_4)+IsEndLoop_1_3_4)+IsEndLoop_3_2_4)+IsEndLoop_4_2_4)))))
Read [invariant] property : Peterson-PT-4-ReachabilityCardinality-02 with value :((((((((((((((((((((Turn_3_1+Turn_0_2)+Turn_1_2)+Turn_2_2)+Turn_3_2)+Turn_0_3)+Turn_1_3)+Turn_2_3)+Turn_0_0)+Turn_1_0)+Turn_2_0)+Turn_3_0)+Turn_0_1)+Turn_1_1)+Turn_2_1)+Turn_3_4)+Turn_2_4)+Turn_1_4)+Turn_0_4)+Turn_3_3)>=3)
Read [invariant] property : Peterson-PT-4-ReachabilityCardinality-03 with value :((((((((((((((((((((TestTurn_0_0+TestTurn_2_0)+TestTurn_1_0)+TestTurn_4_0)+TestTurn_3_0)+TestTurn_1_1)+TestTurn_0_1)+TestTurn_3_2)+TestTurn_4_2)+TestTurn_1_2)+TestTurn_2_2)+TestTurn_4_1)+TestTurn_0_2)+TestTurn_2_1)+TestTurn_3_1)+TestTurn_4_3)+TestTurn_2_3)+TestTurn_3_3)+TestTurn_0_3)+TestTurn_1_3)<=(((((((((((((((((((Turn_3_1+Turn_0_2)+Turn_1_2)+Turn_2_2)+Turn_3_2)+Turn_0_3)+Turn_1_3)+Turn_2_3)+Turn_0_0)+Turn_1_0)+Turn_2_0)+Turn_3_0)+Turn_0_1)+Turn_1_1)+Turn_2_1)+Turn_3_4)+Turn_2_4)+Turn_1_4)+Turn_0_4)+Turn_3_3))
Read [reachable] property : Peterson-PT-4-ReachabilityCardinality-04 with value :(((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((BeginLoop_4_0_0+BeginLoop_3_0_0)+BeginLoop_2_0_0)+BeginLoop_1_0_0)+BeginLoop_0_0_0)+BeginLoop_4_2_0)+BeginLoop_3_2_0)+BeginLoop_1_3_0)+BeginLoop_0_3_0)+BeginLoop_3_3_0)+BeginLoop_2_3_0)+BeginLoop_0_0_1)+BeginLoop_4_3_0)+BeginLoop_1_1_0)+BeginLoop_0_1_0)+BeginLoop_3_1_0)+BeginLoop_2_1_0)+BeginLoop_0_2_0)+BeginLoop_4_1_0)+BeginLoop_2_2_0)+BeginLoop_1_2_0)+BeginLoop_4_1_1)+BeginLoop_0_2_1)+BeginLoop_1_2_1)+BeginLoop_2_2_1)+BeginLoop_3_2_1)+BeginLoop_4_2_1)+BeginLoop_0_3_1)+BeginLoop_1_3_1)+BeginLoop_1_0_1)+BeginLoop_2_0_1)+BeginLoop_3_0_1)+BeginLoop_4_0_1)+BeginLoop_0_1_1)+BeginLoop_1_1_1)+BeginLoop_2_1_1)+BeginLoop_3_1_1)+BeginLoop_3_1_2)+BeginLoop_2_1_2)+BeginLoop_1_1_2)+BeginLoop_0_1_2)+BeginLoop_2_2_2)+BeginLoop_1_2_2)+BeginLoop_0_2_2)+BeginLoop_4_1_2)+BeginLoop_0_0_2)+BeginLoop_4_3_1)+BeginLoop_3_3_1)+BeginLoop_2_3_1)+BeginLoop_4_0_2)+BeginLoop_3_0_2)+BeginLoop_2_0_2)+BeginLoop_1_0_2)+BeginLoop_3_0_3)+BeginLoop_4_0_3)+BeginLoop_1_0_3)+BeginLoop_2_0_3)+BeginLoop_2_1_3)+BeginLoop_3_1_3)+BeginLoop_0_1_3)+BeginLoop_1_1_3)+BeginLoop_0_3_2)+BeginLoop_1_3_2)+BeginLoop_3_2_2)+BeginLoop_4_2_2)+BeginLoop_4_3_2)+BeginLoop_0_0_3)+BeginLoop_2_3_2)+BeginLoop_3_3_2)+BeginLoop_2_0_4)+BeginLoop_1_0_4)+BeginLoop_4_0_4)+BeginLoop_3_0_4)+BeginLoop_3_3_3)+BeginLoop_2_3_3)+BeginLoop_0_0_4)+BeginLoop_4_3_3)+BeginLoop_4_2_3)+BeginLoop_3_2_3)+BeginLoop_1_3_3)+BeginLoop_0_3_3)+BeginLoop_0_2_3)+BeginLoop_4_1_3)+BeginLoop_2_2_3)+BeginLoop_1_2_3)+BeginLoop_2_3_4)+BeginLoop_3_3_4)+BeginLoop_4_3_4)+BeginLoop_3_2_4)+BeginLoop_4_2_4)+BeginLoop_0_3_4)+BeginLoop_1_3_4)+BeginLoop_4_1_4)+BeginLoop_0_2_4)+BeginLoop_1_2_4)+BeginLoop_2_2_4)+BeginLoop_0_1_4)+BeginLoop_1_1_4)+BeginLoop_2_1_4)+BeginLoop_3_1_4)>=2)&&(((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((IsEndLoop_0_0_0+IsEndLoop_1_0_0)+IsEndLoop_2_0_0)+IsEndLoop_3_0_0)+IsEndLoop_4_0_0)+IsEndLoop_0_1_0)+IsEndLoop_1_1_0)+IsEndLoop_2_1_0)+IsEndLoop_3_1_0)+IsEndLoop_4_1_0)+IsEndLoop_0_2_0)+IsEndLoop_1_2_0)+IsEndLoop_2_2_0)+IsEndLoop_4_2_0)+IsEndLoop_3_2_0)+IsEndLoop_1_3_0)+IsEndLoop_0_3_0)+IsEndLoop_3_3_0)+IsEndLoop_2_3_0)+IsEndLoop_0_0_1)+IsEndLoop_4_3_0)+IsEndLoop_2_0_1)+IsEndLoop_1_0_1)+IsEndLoop_4_0_1)+IsEndLoop_3_0_1)+IsEndLoop_1_1_1)+IsEndLoop_0_1_1)+IsEndLoop_3_1_1)+IsEndLoop_2_1_1)+IsEndLoop_1_2_1)+IsEndLoop_2_2_1)+IsEndLoop_4_1_1)+IsEndLoop_0_2_1)+IsEndLoop_0_3_1)+IsEndLoop_1_3_1)+IsEndLoop_3_2_1)+IsEndLoop_4_2_1)+IsEndLoop_4_3_1)+IsEndLoop_0_0_2)+IsEndLoop_2_3_1)+IsEndLoop_3_3_1)+IsEndLoop_3_0_2)+IsEndLoop_4_0_2)+IsEndLoop_1_0_2)+IsEndLoop_2_0_2)+IsEndLoop_3_1_2)+IsEndLoop_2_1_2)+IsEndLoop_1_1_2)+IsEndLoop_0_1_2)+IsEndLoop_2_2_2)+IsEndLoop_1_2_2)+IsEndLoop_0_2_2)+IsEndLoop_4_1_2)+IsEndLoop_1_3_2)+IsEndLoop_0_3_2)+IsEndLoop_4_2_2)+IsEndLoop_3_2_2)+IsEndLoop_0_0_3)+IsEndLoop_4_3_2)+IsEndLoop_3_3_2)+IsEndLoop_2_3_2)+IsEndLoop_0_1_3)+IsEndLoop_1_1_3)+IsEndLoop_2_1_3)+IsEndLoop_3_1_3)+IsEndLoop_1_0_3)+IsEndLoop_2_0_3)+IsEndLoop_3_0_3)+IsEndLoop_4_0_3)+IsEndLoop_3_2_3)+IsEndLoop_4_2_3)+IsEndLoop_0_3_3)+IsEndLoop_1_3_3)+IsEndLoop_4_1_3)+IsEndLoop_0_2_3)+IsEndLoop_1_2_3)+IsEndLoop_2_2_3)+IsEndLoop_2_0_4)+IsEndLoop_1_0_4)+IsEndLoop_4_0_4)+IsEndLoop_3_0_4)+IsEndLoop_3_3_3)+IsEndLoop_2_3_3)+IsEndLoop_0_0_4)+IsEndLoop_4_3_3)+IsEndLoop_0_2_4)+IsEndLoop_4_1_4)+IsEndLoop_2_2_4)+IsEndLoop_1_2_4)+IsEndLoop_1_1_4)+IsEndLoop_0_1_4)+IsEndLoop_3_1_4)+IsEndLoop_2_1_4)+IsEndLoop_4_3_4)+IsEndLoop_2_3_4)+IsEndLoop_3_3_4)+IsEndLoop_0_3_4)+IsEndLoop_1_3_4)+IsEndLoop_3_2_4)+IsEndLoop_4_2_4)>=3)||((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((BeginLoop_4_0_0+BeginLoop_3_0_0)+BeginLoop_2_0_0)+BeginLoop_1_0_0)+BeginLoop_0_0_0)+BeginLoop_4_2_0)+BeginLoop_3_2_0)+BeginLoop_1_3_0)+BeginLoop_0_3_0)+BeginLoop_3_3_0)+BeginLoop_2_3_0)+BeginLoop_0_0_1)+BeginLoop_4_3_0)+BeginLoop_1_1_0)+BeginLoop_0_1_0)+BeginLoop_3_1_0)+BeginLoop_2_1_0)+BeginLoop_0_2_0)+BeginLoop_4_1_0)+BeginLoop_2_2_0)+BeginLoop_1_2_0)+BeginLoop_4_1_1)+BeginLoop_0_2_1)+BeginLoop_1_2_1)+BeginLoop_2_2_1)+BeginLoop_3_2_1)+BeginLoop_4_2_1)+BeginLoop_0_3_1)+BeginLoop_1_3_1)+BeginLoop_1_0_1)+BeginLoop_2_0_1)+BeginLoop_3_0_1)+BeginLoop_4_0_1)+BeginLoop_0_1_1)+BeginLoop_1_1_1)+BeginLoop_2_1_1)+BeginLoop_3_1_1)+BeginLoop_3_1_2)+BeginLoop_2_1_2)+BeginLoop_1_1_2)+BeginLoop_0_1_2)+BeginLoop_2_2_2)+BeginLoop_1_2_2)+BeginLoop_0_2_2)+BeginLoop_4_1_2)+BeginLoop_0_0_2)+BeginLoop_4_3_1)+BeginLoop_3_3_1)+BeginLoop_2_3_1)+BeginLoop_4_0_2)+BeginLoop_3_0_2)+BeginLoop_2_0_2)+BeginLoop_1_0_2)+BeginLoop_3_0_3)+BeginLoop_4_0_3)+BeginLoop_1_0_3)+BeginLoop_2_0_3)+BeginLoop_2_1_3)+BeginLoop_3_1_3)+BeginLoop_0_1_3)+BeginLoop_1_1_3)+BeginLoop_0_3_2)+BeginLoop_1_3_2)+BeginLoop_3_2_2)+BeginLoop_4_2_2)+BeginLoop_4_3_2)+BeginLoop_0_0_3)+BeginLoop_2_3_2)+BeginLoop_3_3_2)+BeginLoop_2_0_4)+BeginLoop_1_0_4)+BeginLoop_4_0_4)+BeginLoop_3_0_4)+BeginLoop_3_3_3)+BeginLoop_2_3_3)+BeginLoop_0_0_4)+BeginLoop_4_3_3)+BeginLoop_4_2_3)+BeginLoop_3_2_3)+BeginLoop_1_3_3)+BeginLoop_0_3_3)+BeginLoop_0_2_3)+BeginLoop_4_1_3)+BeginLoop_2_2_3)+BeginLoop_1_2_3)+BeginLoop_2_3_4)+BeginLoop_3_3_4)+BeginLoop_4_3_4)+BeginLoop_3_2_4)+BeginLoop_4_2_4)+BeginLoop_0_3_4)+BeginLoop_1_3_4)+BeginLoop_4_1_4)+BeginLoop_0_2_4)+BeginLoop_1_2_4)+BeginLoop_2_2_4)+BeginLoop_0_1_4)+BeginLoop_1_1_4)+BeginLoop_2_1_4)+BeginLoop_3_1_4)<=(((((((((((((((((((EndTurn_0_0+EndTurn_2_1)+EndTurn_3_1)+EndTurn_0_1)+EndTurn_1_1)+EndTurn_3_0)+EndTurn_4_0)+EndTurn_1_0)+EndTurn_2_0)+EndTurn_1_3)+EndTurn_0_3)+EndTurn_4_2)+EndTurn_3_2)+EndTurn_2_2)+EndTurn_1_2)+EndTurn_0_2)+EndTurn_4_1)+EndTurn_4_3)+EndTurn_3_3)+EndTurn_2_3))))
Read [reachable] property : Peterson-PT-4-ReachabilityCardinality-05 with value :(!((((((((((((((((((((((TestTurn_0_0+TestTurn_2_0)+TestTurn_1_0)+TestTurn_4_0)+TestTurn_3_0)+TestTurn_1_1)+TestTurn_0_1)+TestTurn_3_2)+TestTurn_4_2)+TestTurn_1_2)+TestTurn_2_2)+TestTurn_4_1)+TestTurn_0_2)+TestTurn_2_1)+TestTurn_3_1)+TestTurn_4_3)+TestTurn_2_3)+TestTurn_3_3)+TestTurn_0_3)+TestTurn_1_3)<=(((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((IsEndLoop_0_0_0+IsEndLoop_1_0_0)+IsEndLoop_2_0_0)+IsEndLoop_3_0_0)+IsEndLoop_4_0_0)+IsEndLoop_0_1_0)+IsEndLoop_1_1_0)+IsEndLoop_2_1_0)+IsEndLoop_3_1_0)+IsEndLoop_4_1_0)+IsEndLoop_0_2_0)+IsEndLoop_1_2_0)+IsEndLoop_2_2_0)+IsEndLoop_4_2_0)+IsEndLoop_3_2_0)+IsEndLoop_1_3_0)+IsEndLoop_0_3_0)+IsEndLoop_3_3_0)+IsEndLoop_2_3_0)+IsEndLoop_0_0_1)+IsEndLoop_4_3_0)+IsEndLoop_2_0_1)+IsEndLoop_1_0_1)+IsEndLoop_4_0_1)+IsEndLoop_3_0_1)+IsEndLoop_1_1_1)+IsEndLoop_0_1_1)+IsEndLoop_3_1_1)+IsEndLoop_2_1_1)+IsEndLoop_1_2_1)+IsEndLoop_2_2_1)+IsEndLoop_4_1_1)+IsEndLoop_0_2_1)+IsEndLoop_0_3_1)+IsEndLoop_1_3_1)+IsEndLoop_3_2_1)+IsEndLoop_4_2_1)+IsEndLoop_4_3_1)+IsEndLoop_0_0_2)+IsEndLoop_2_3_1)+IsEndLoop_3_3_1)+IsEndLoop_3_0_2)+IsEndLoop_4_0_2)+IsEndLoop_1_0_2)+IsEndLoop_2_0_2)+IsEndLoop_3_1_2)+IsEndLoop_2_1_2)+IsEndLoop_1_1_2)+IsEndLoop_0_1_2)+IsEndLoop_2_2_2)+IsEndLoop_1_2_2)+IsEndLoop_0_2_2)+IsEndLoop_4_1_2)+IsEndLoop_1_3_2)+IsEndLoop_0_3_2)+IsEndLoop_4_2_2)+IsEndLoop_3_2_2)+IsEndLoop_0_0_3)+IsEndLoop_4_3_2)+IsEndLoop_3_3_2)+IsEndLoop_2_3_2)+IsEndLoop_0_1_3)+IsEndLoop_1_1_3)+IsEndLoop_2_1_3)+IsEndLoop_3_1_3)+IsEndLoop_1_0_3)+IsEndLoop_2_0_3)+IsEndLoop_3_0_3)+IsEndLoop_4_0_3)+IsEndLoop_3_2_3)+IsEndLoop_4_2_3)+IsEndLoop_0_3_3)+IsEndLoop_1_3_3)+IsEndLoop_4_1_3)+IsEndLoop_0_2_3)+IsEndLoop_1_2_3)+IsEndLoop_2_2_3)+IsEndLoop_2_0_4)+IsEndLoop_1_0_4)+IsEndLoop_4_0_4)+IsEndLoop_3_0_4)+IsEndLoop_3_3_3)+IsEndLoop_2_3_3)+IsEndLoop_0_0_4)+IsEndLoop_4_3_3)+IsEndLoop_0_2_4)+IsEndLoop_4_1_4)+IsEndLoop_2_2_4)+IsEndLoop_1_2_4)+IsEndLoop_1_1_4)+IsEndLoop_0_1_4)+IsEndLoop_3_1_4)+IsEndLoop_2_1_4)+IsEndLoop_4_3_4)+IsEndLoop_2_3_4)+IsEndLoop_3_3_4)+IsEndLoop_0_3_4)+IsEndLoop_1_3_4)+IsEndLoop_3_2_4)+IsEndLoop_4_2_4))||((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((IsEndLoop_0_0_0+IsEndLoop_1_0_0)+IsEndLoop_2_0_0)+IsEndLoop_3_0_0)+IsEndLoop_4_0_0)+IsEndLoop_0_1_0)+IsEndLoop_1_1_0)+IsEndLoop_2_1_0)+IsEndLoop_3_1_0)+IsEndLoop_4_1_0)+IsEndLoop_0_2_0)+IsEndLoop_1_2_0)+IsEndLoop_2_2_0)+IsEndLoop_4_2_0)+IsEndLoop_3_2_0)+IsEndLoop_1_3_0)+IsEndLoop_0_3_0)+IsEndLoop_3_3_0)+IsEndLoop_2_3_0)+IsEndLoop_0_0_1)+IsEndLoop_4_3_0)+IsEndLoop_2_0_1)+IsEndLoop_1_0_1)+IsEndLoop_4_0_1)+IsEndLoop_3_0_1)+IsEndLoop_1_1_1)+IsEndLoop_0_1_1)+IsEndLoop_3_1_1)+IsEndLoop_2_1_1)+IsEndLoop_1_2_1)+IsEndLoop_2_2_1)+IsEndLoop_4_1_1)+IsEndLoop_0_2_1)+IsEndLoop_0_3_1)+IsEndLoop_1_3_1)+IsEndLoop_3_2_1)+IsEndLoop_4_2_1)+IsEndLoop_4_3_1)+IsEndLoop_0_0_2)+IsEndLoop_2_3_1)+IsEndLoop_3_3_1)+IsEndLoop_3_0_2)+IsEndLoop_4_0_2)+IsEndLoop_1_0_2)+IsEndLoop_2_0_2)+IsEndLoop_3_1_2)+IsEndLoop_2_1_2)+IsEndLoop_1_1_2)+IsEndLoop_0_1_2)+IsEndLoop_2_2_2)+IsEndLoop_1_2_2)+IsEndLoop_0_2_2)+IsEndLoop_4_1_2)+IsEndLoop_1_3_2)+IsEndLoop_0_3_2)+IsEndLoop_4_2_2)+IsEndLoop_3_2_2)+IsEndLoop_0_0_3)+IsEndLoop_4_3_2)+IsEndLoop_3_3_2)+IsEndLoop_2_3_2)+IsEndLoop_0_1_3)+IsEndLoop_1_1_3)+IsEndLoop_2_1_3)+IsEndLoop_3_1_3)+IsEndLoop_1_0_3)+IsEndLoop_2_0_3)+IsEndLoop_3_0_3)+IsEndLoop_4_0_3)+IsEndLoop_3_2_3)+IsEndLoop_4_2_3)+IsEndLoop_0_3_3)+IsEndLoop_1_3_3)+IsEndLoop_4_1_3)+IsEndLoop_0_2_3)+IsEndLoop_1_2_3)+IsEndLoop_2_2_3)+IsEndLoop_2_0_4)+IsEndLoop_1_0_4)+IsEndLoop_4_0_4)+IsEndLoop_3_0_4)+IsEndLoop_3_3_3)+IsEndLoop_2_3_3)+IsEndLoop_0_0_4)+IsEndLoop_4_3_3)+IsEndLoop_0_2_4)+IsEndLoop_4_1_4)+IsEndLoop_2_2_4)+IsEndLoop_1_2_4)+IsEndLoop_1_1_4)+IsEndLoop_0_1_4)+IsEndLoop_3_1_4)+IsEndLoop_2_1_4)+IsEndLoop_4_3_4)+IsEndLoop_2_3_4)+IsEndLoop_3_3_4)+IsEndLoop_0_3_4)+IsEndLoop_1_3_4)+IsEndLoop_3_2_4)+IsEndLoop_4_2_4)<=(((((((((((((((((((AskForSection_3_3+AskForSection_4_3)+AskForSection_1_3)+AskForSection_2_3)+AskForSection_4_2)+AskForSection_0_3)+AskForSection_2_2)+AskForSection_3_2)+AskForSection_0_2)+AskForSection_1_2)+AskForSection_3_1)+AskForSection_4_1)+AskForSection_1_1)+AskForSection_2_1)+AskForSection_0_1)+AskForSection_4_0)+AskForSection_3_0)+AskForSection_2_0)+AskForSection_1_0)+AskForSection_0_0)))||(((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((TestIdentity_0_2_0+TestIdentity_4_1_0)+TestIdentity_3_1_0)+TestIdentity_2_1_0)+TestIdentity_1_1_0)+TestIdentity_0_1_0)+TestIdentity_4_0_0)+TestIdentity_3_0_0)+TestIdentity_3_3_0)+TestIdentity_2_3_0)+TestIdentity_1_3_0)+TestIdentity_0_3_0)+TestIdentity_4_2_0)+TestIdentity_3_2_0)+TestIdentity_2_2_0)+TestIdentity_1_2_0)+TestIdentity_1_0_0)+TestIdentity_2_0_0)+TestIdentity_0_0_0)+TestIdentity_0_0_2)+TestIdentity_4_3_1)+TestIdentity_2_0_2)+TestIdentity_1_0_2)+TestIdentity_1_3_1)+TestIdentity_0_3_1)+TestIdentity_3_3_1)+TestIdentity_2_3_1)+TestIdentity_3_1_2)+TestIdentity_2_1_2)+TestIdentity_0_2_2)+TestIdentity_4_1_2)+TestIdentity_4_0_2)+TestIdentity_3_0_2)+TestIdentity_1_1_2)+TestIdentity_0_1_2)+TestIdentity_3_0_1)+TestIdentity_4_0_1)+TestIdentity_0_1_1)+TestIdentity_1_1_1)+TestIdentity_4_3_0)+TestIdentity_0_0_1)+TestIdentity_1_0_1)+TestIdentity_2_0_1)+TestIdentity_1_2_1)+TestIdentity_2_2_1)+TestIdentity_3_2_1)+TestIdentity_4_2_1)+TestIdentity_2_1_1)+TestIdentity_3_1_1)+TestIdentity_4_1_1)+TestIdentity_0_2_1)+TestIdentity_2_3_3)+TestIdentity_3_3_3)+TestIdentity_0_3_3)+TestIdentity_1_3_3)+TestIdentity_1_0_4)+TestIdentity_2_0_4)+TestIdentity_4_3_3)+TestIdentity_0_0_4)+TestIdentity_4_1_3)+TestIdentity_0_2_3)+TestIdentity_2_1_3)+TestIdentity_3_1_3)+TestIdentity_3_2_3)+TestIdentity_4_2_3)+TestIdentity_1_2_3)+TestIdentity_2_2_3)+TestIdentity_2_0_3)+TestIdentity_1_0_3)+TestIdentity_0_0_3)+TestIdentity_4_3_2)+TestIdentity_1_1_3)+TestIdentity_0_1_3)+TestIdentity_4_0_3)+TestIdentity_3_0_3)+TestIdentity_4_2_2)+TestIdentity_3_2_2)+TestIdentity_2_2_2)+TestIdentity_1_2_2)+TestIdentity_3_3_2)+TestIdentity_2_3_2)+TestIdentity_1_3_2)+TestIdentity_0_3_2)+TestIdentity_4_3_4)+TestIdentity_2_2_4)+TestIdentity_1_2_4)+TestIdentity_4_2_4)+TestIdentity_3_2_4)+TestIdentity_1_3_4)+TestIdentity_0_3_4)+TestIdentity_3_3_4)+TestIdentity_2_3_4)+TestIdentity_4_0_4)+TestIdentity_3_0_4)+TestIdentity_1_1_4)+TestIdentity_0_1_4)+TestIdentity_3_1_4)+TestIdentity_2_1_4)+TestIdentity_0_2_4)+TestIdentity_4_1_4)>=2)||((((((((((((((((((((TestTurn_0_0+TestTurn_2_0)+TestTurn_1_0)+TestTurn_4_0)+TestTurn_3_0)+TestTurn_1_1)+TestTurn_0_1)+TestTurn_3_2)+TestTurn_4_2)+TestTurn_1_2)+TestTurn_2_2)+TestTurn_4_1)+TestTurn_0_2)+TestTurn_2_1)+TestTurn_3_1)+TestTurn_4_3)+TestTurn_2_3)+TestTurn_3_3)+TestTurn_0_3)+TestTurn_1_3)>=3))))
Read [invariant] property : Peterson-PT-4-ReachabilityCardinality-06 with value :(!((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((TestAlone_3_1_0+TestAlone_2_1_0)+TestAlone_1_1_0)+TestAlone_4_0_0)+TestAlone_3_0_0)+TestAlone_2_0_0)+TestAlone_1_0_0)+TestAlone_2_1_1)+TestAlone_3_1_1)+TestAlone_4_0_1)+TestAlone_0_1_1)+TestAlone_2_0_1)+TestAlone_3_0_1)+TestAlone_4_3_0)+TestAlone_0_0_1)+TestAlone_2_3_0)+TestAlone_3_3_0)+TestAlone_4_2_0)+TestAlone_1_3_0)+TestAlone_2_2_0)+TestAlone_3_2_0)+TestAlone_4_1_0)+TestAlone_1_2_0)+TestAlone_3_2_2)+TestAlone_1_2_2)+TestAlone_0_2_2)+TestAlone_4_1_2)+TestAlone_3_3_2)+TestAlone_1_3_2)+TestAlone_0_3_2)+TestAlone_4_2_2)+TestAlone_2_0_3)+TestAlone_1_0_3)+TestAlone_0_0_3)+TestAlone_4_3_2)+TestAlone_2_1_3)+TestAlone_1_1_3)+TestAlone_0_1_3)+TestAlone_4_0_3)+TestAlone_2_2_1)+TestAlone_3_2_1)+TestAlone_4_1_1)+TestAlone_0_2_1)+TestAlone_2_3_1)+TestAlone_3_3_1)+TestAlone_4_2_1)+TestAlone_0_3_1)+TestAlone_1_0_2)+TestAlone_3_0_2)+TestAlone_4_3_1)+TestAlone_0_0_2)+TestAlone_1_1_2)+TestAlone_3_1_2)+TestAlone_4_0_2)+TestAlone_0_1_2)+TestAlone_0_2_4)+TestAlone_3_1_4)+TestAlone_2_2_4)+TestAlone_1_2_4)+TestAlone_0_3_4)+TestAlone_3_2_4)+TestAlone_2_3_4)+TestAlone_1_3_4)+TestAlone_3_3_4)+TestAlone_4_1_3)+TestAlone_0_2_3)+TestAlone_1_2_3)+TestAlone_2_2_3)+TestAlone_4_2_3)+TestAlone_0_3_3)+TestAlone_1_3_3)+TestAlone_2_3_3)+TestAlone_4_3_3)+TestAlone_0_0_4)+TestAlone_1_0_4)+TestAlone_2_0_4)+TestAlone_3_0_4)+TestAlone_0_1_4)+TestAlone_1_1_4)+TestAlone_2_1_4)>=2)||((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((IsEndLoop_0_0_0+IsEndLoop_1_0_0)+IsEndLoop_2_0_0)+IsEndLoop_3_0_0)+IsEndLoop_4_0_0)+IsEndLoop_0_1_0)+IsEndLoop_1_1_0)+IsEndLoop_2_1_0)+IsEndLoop_3_1_0)+IsEndLoop_4_1_0)+IsEndLoop_0_2_0)+IsEndLoop_1_2_0)+IsEndLoop_2_2_0)+IsEndLoop_4_2_0)+IsEndLoop_3_2_0)+IsEndLoop_1_3_0)+IsEndLoop_0_3_0)+IsEndLoop_3_3_0)+IsEndLoop_2_3_0)+IsEndLoop_0_0_1)+IsEndLoop_4_3_0)+IsEndLoop_2_0_1)+IsEndLoop_1_0_1)+IsEndLoop_4_0_1)+IsEndLoop_3_0_1)+IsEndLoop_1_1_1)+IsEndLoop_0_1_1)+IsEndLoop_3_1_1)+IsEndLoop_2_1_1)+IsEndLoop_1_2_1)+IsEndLoop_2_2_1)+IsEndLoop_4_1_1)+IsEndLoop_0_2_1)+IsEndLoop_0_3_1)+IsEndLoop_1_3_1)+IsEndLoop_3_2_1)+IsEndLoop_4_2_1)+IsEndLoop_4_3_1)+IsEndLoop_0_0_2)+IsEndLoop_2_3_1)+IsEndLoop_3_3_1)+IsEndLoop_3_0_2)+IsEndLoop_4_0_2)+IsEndLoop_1_0_2)+IsEndLoop_2_0_2)+IsEndLoop_3_1_2)+IsEndLoop_2_1_2)+IsEndLoop_1_1_2)+IsEndLoop_0_1_2)+IsEndLoop_2_2_2)+IsEndLoop_1_2_2)+IsEndLoop_0_2_2)+IsEndLoop_4_1_2)+IsEndLoop_1_3_2)+IsEndLoop_0_3_2)+IsEndLoop_4_2_2)+IsEndLoop_3_2_2)+IsEndLoop_0_0_3)+IsEndLoop_4_3_2)+IsEndLoop_3_3_2)+IsEndLoop_2_3_2)+IsEndLoop_0_1_3)+IsEndLoop_1_1_3)+IsEndLoop_2_1_3)+IsEndLoop_3_1_3)+IsEndLoop_1_0_3)+IsEndLoop_2_0_3)+IsEndLoop_3_0_3)+IsEndLoop_4_0_3)+IsEndLoop_3_2_3)+IsEndLoop_4_2_3)+IsEndLoop_0_3_3)+IsEndLoop_1_3_3)+IsEndLoop_4_1_3)+IsEndLoop_0_2_3)+IsEndLoop_1_2_3)+IsEndLoop_2_2_3)+IsEndLoop_2_0_4)+IsEndLoop_1_0_4)+IsEndLoop_4_0_4)+IsEndLoop_3_0_4)+IsEndLoop_3_3_3)+IsEndLoop_2_3_3)+IsEndLoop_0_0_4)+IsEndLoop_4_3_3)+IsEndLoop_0_2_4)+IsEndLoop_4_1_4)+IsEndLoop_2_2_4)+IsEndLoop_1_2_4)+IsEndLoop_1_1_4)+IsEndLoop_0_1_4)+IsEndLoop_3_1_4)+IsEndLoop_2_1_4)+IsEndLoop_4_3_4)+IsEndLoop_2_3_4)+IsEndLoop_3_3_4)+IsEndLoop_0_3_4)+IsEndLoop_1_3_4)+IsEndLoop_3_2_4)+IsEndLoop_4_2_4)<=(((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((TestIdentity_0_2_0+TestIdentity_4_1_0)+TestIdentity_3_1_0)+TestIdentity_2_1_0)+TestIdentity_1_1_0)+TestIdentity_0_1_0)+TestIdentity_4_0_0)+TestIdentity_3_0_0)+TestIdentity_3_3_0)+TestIdentity_2_3_0)+TestIdentity_1_3_0)+TestIdentity_0_3_0)+TestIdentity_4_2_0)+TestIdentity_3_2_0)+TestIdentity_2_2_0)+TestIdentity_1_2_0)+TestIdentity_1_0_0)+TestIdentity_2_0_0)+TestIdentity_0_0_0)+TestIdentity_0_0_2)+TestIdentity_4_3_1)+TestIdentity_2_0_2)+TestIdentity_1_0_2)+TestIdentity_1_3_1)+TestIdentity_0_3_1)+TestIdentity_3_3_1)+TestIdentity_2_3_1)+TestIdentity_3_1_2)+TestIdentity_2_1_2)+TestIdentity_0_2_2)+TestIdentity_4_1_2)+TestIdentity_4_0_2)+TestIdentity_3_0_2)+TestIdentity_1_1_2)+TestIdentity_0_1_2)+TestIdentity_3_0_1)+TestIdentity_4_0_1)+TestIdentity_0_1_1)+TestIdentity_1_1_1)+TestIdentity_4_3_0)+TestIdentity_0_0_1)+TestIdentity_1_0_1)+TestIdentity_2_0_1)+TestIdentity_1_2_1)+TestIdentity_2_2_1)+TestIdentity_3_2_1)+TestIdentity_4_2_1)+TestIdentity_2_1_1)+TestIdentity_3_1_1)+TestIdentity_4_1_1)+TestIdentity_0_2_1)+TestIdentity_2_3_3)+TestIdentity_3_3_3)+TestIdentity_0_3_3)+TestIdentity_1_3_3)+TestIdentity_1_0_4)+TestIdentity_2_0_4)+TestIdentity_4_3_3)+TestIdentity_0_0_4)+TestIdentity_4_1_3)+TestIdentity_0_2_3)+TestIdentity_2_1_3)+TestIdentity_3_1_3)+TestIdentity_3_2_3)+TestIdentity_4_2_3)+TestIdentity_1_2_3)+TestIdentity_2_2_3)+TestIdentity_2_0_3)+TestIdentity_1_0_3)+TestIdentity_0_0_3)+TestIdentity_4_3_2)+TestIdentity_1_1_3)+TestIdentity_0_1_3)+TestIdentity_4_0_3)+TestIdentity_3_0_3)+TestIdentity_4_2_2)+TestIdentity_3_2_2)+TestIdentity_2_2_2)+TestIdentity_1_2_2)+TestIdentity_3_3_2)+TestIdentity_2_3_2)+TestIdentity_1_3_2)+TestIdentity_0_3_2)+TestIdentity_4_3_4)+TestIdentity_2_2_4)+TestIdentity_1_2_4)+TestIdentity_4_2_4)+TestIdentity_3_2_4)+TestIdentity_1_3_4)+TestIdentity_0_3_4)+TestIdentity_3_3_4)+TestIdentity_2_3_4)+TestIdentity_4_0_4)+TestIdentity_3_0_4)+TestIdentity_1_1_4)+TestIdentity_0_1_4)+TestIdentity_3_1_4)+TestIdentity_2_1_4)+TestIdentity_0_2_4)+TestIdentity_4_1_4)))&&(!((((((((((((((((((((EndTurn_0_0+EndTurn_2_1)+EndTurn_3_1)+EndTurn_0_1)+EndTurn_1_1)+EndTurn_3_0)+EndTurn_4_0)+EndTurn_1_0)+EndTurn_2_0)+EndTurn_1_3)+EndTurn_0_3)+EndTurn_4_2)+EndTurn_3_2)+EndTurn_2_2)+EndTurn_1_2)+EndTurn_0_2)+EndTurn_4_1)+EndTurn_4_3)+EndTurn_3_3)+EndTurn_2_3)<=(((((((((WantSection_0_T+WantSection_4_F)+WantSection_3_F)+WantSection_2_F)+WantSection_1_F)+WantSection_0_F)+WantSection_4_T)+WantSection_3_T)+WantSection_2_T)+WantSection_1_T)))))
Read [invariant] property : Peterson-PT-4-ReachabilityCardinality-07 with value :(((!((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((IsEndLoop_0_0_0+IsEndLoop_1_0_0)+IsEndLoop_2_0_0)+IsEndLoop_3_0_0)+IsEndLoop_4_0_0)+IsEndLoop_0_1_0)+IsEndLoop_1_1_0)+IsEndLoop_2_1_0)+IsEndLoop_3_1_0)+IsEndLoop_4_1_0)+IsEndLoop_0_2_0)+IsEndLoop_1_2_0)+IsEndLoop_2_2_0)+IsEndLoop_4_2_0)+IsEndLoop_3_2_0)+IsEndLoop_1_3_0)+IsEndLoop_0_3_0)+IsEndLoop_3_3_0)+IsEndLoop_2_3_0)+IsEndLoop_0_0_1)+IsEndLoop_4_3_0)+IsEndLoop_2_0_1)+IsEndLoop_1_0_1)+IsEndLoop_4_0_1)+IsEndLoop_3_0_1)+IsEndLoop_1_1_1)+IsEndLoop_0_1_1)+IsEndLoop_3_1_1)+IsEndLoop_2_1_1)+IsEndLoop_1_2_1)+IsEndLoop_2_2_1)+IsEndLoop_4_1_1)+IsEndLoop_0_2_1)+IsEndLoop_0_3_1)+IsEndLoop_1_3_1)+IsEndLoop_3_2_1)+IsEndLoop_4_2_1)+IsEndLoop_4_3_1)+IsEndLoop_0_0_2)+IsEndLoop_2_3_1)+IsEndLoop_3_3_1)+IsEndLoop_3_0_2)+IsEndLoop_4_0_2)+IsEndLoop_1_0_2)+IsEndLoop_2_0_2)+IsEndLoop_3_1_2)+IsEndLoop_2_1_2)+IsEndLoop_1_1_2)+IsEndLoop_0_1_2)+IsEndLoop_2_2_2)+IsEndLoop_1_2_2)+IsEndLoop_0_2_2)+IsEndLoop_4_1_2)+IsEndLoop_1_3_2)+IsEndLoop_0_3_2)+IsEndLoop_4_2_2)+IsEndLoop_3_2_2)+IsEndLoop_0_0_3)+IsEndLoop_4_3_2)+IsEndLoop_3_3_2)+IsEndLoop_2_3_2)+IsEndLoop_0_1_3)+IsEndLoop_1_1_3)+IsEndLoop_2_1_3)+IsEndLoop_3_1_3)+IsEndLoop_1_0_3)+IsEndLoop_2_0_3)+IsEndLoop_3_0_3)+IsEndLoop_4_0_3)+IsEndLoop_3_2_3)+IsEndLoop_4_2_3)+IsEndLoop_0_3_3)+IsEndLoop_1_3_3)+IsEndLoop_4_1_3)+IsEndLoop_0_2_3)+IsEndLoop_1_2_3)+IsEndLoop_2_2_3)+IsEndLoop_2_0_4)+IsEndLoop_1_0_4)+IsEndLoop_4_0_4)+IsEndLoop_3_0_4)+IsEndLoop_3_3_3)+IsEndLoop_2_3_3)+IsEndLoop_0_0_4)+IsEndLoop_4_3_3)+IsEndLoop_0_2_4)+IsEndLoop_4_1_4)+IsEndLoop_2_2_4)+IsEndLoop_1_2_4)+IsEndLoop_1_1_4)+IsEndLoop_0_1_4)+IsEndLoop_3_1_4)+IsEndLoop_2_1_4)+IsEndLoop_4_3_4)+IsEndLoop_2_3_4)+IsEndLoop_3_3_4)+IsEndLoop_0_3_4)+IsEndLoop_1_3_4)+IsEndLoop_3_2_4)+IsEndLoop_4_2_4)<=(((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((TestIdentity_0_2_0+TestIdentity_4_1_0)+TestIdentity_3_1_0)+TestIdentity_2_1_0)+TestIdentity_1_1_0)+TestIdentity_0_1_0)+TestIdentity_4_0_0)+TestIdentity_3_0_0)+TestIdentity_3_3_0)+TestIdentity_2_3_0)+TestIdentity_1_3_0)+TestIdentity_0_3_0)+TestIdentity_4_2_0)+TestIdentity_3_2_0)+TestIdentity_2_2_0)+TestIdentity_1_2_0)+TestIdentity_1_0_0)+TestIdentity_2_0_0)+TestIdentity_0_0_0)+TestIdentity_0_0_2)+TestIdentity_4_3_1)+TestIdentity_2_0_2)+TestIdentity_1_0_2)+TestIdentity_1_3_1)+TestIdentity_0_3_1)+TestIdentity_3_3_1)+TestIdentity_2_3_1)+TestIdentity_3_1_2)+TestIdentity_2_1_2)+TestIdentity_0_2_2)+TestIdentity_4_1_2)+TestIdentity_4_0_2)+TestIdentity_3_0_2)+TestIdentity_1_1_2)+TestIdentity_0_1_2)+TestIdentity_3_0_1)+TestIdentity_4_0_1)+TestIdentity_0_1_1)+TestIdentity_1_1_1)+TestIdentity_4_3_0)+TestIdentity_0_0_1)+TestIdentity_1_0_1)+TestIdentity_2_0_1)+TestIdentity_1_2_1)+TestIdentity_2_2_1)+TestIdentity_3_2_1)+TestIdentity_4_2_1)+TestIdentity_2_1_1)+TestIdentity_3_1_1)+TestIdentity_4_1_1)+TestIdentity_0_2_1)+TestIdentity_2_3_3)+TestIdentity_3_3_3)+TestIdentity_0_3_3)+TestIdentity_1_3_3)+TestIdentity_1_0_4)+TestIdentity_2_0_4)+TestIdentity_4_3_3)+TestIdentity_0_0_4)+TestIdentity_4_1_3)+TestIdentity_0_2_3)+TestIdentity_2_1_3)+TestIdentity_3_1_3)+TestIdentity_3_2_3)+TestIdentity_4_2_3)+TestIdentity_1_2_3)+TestIdentity_2_2_3)+TestIdentity_2_0_3)+TestIdentity_1_0_3)+TestIdentity_0_0_3)+TestIdentity_4_3_2)+TestIdentity_1_1_3)+TestIdentity_0_1_3)+TestIdentity_4_0_3)+TestIdentity_3_0_3)+TestIdentity_4_2_2)+TestIdentity_3_2_2)+TestIdentity_2_2_2)+TestIdentity_1_2_2)+TestIdentity_3_3_2)+TestIdentity_2_3_2)+TestIdentity_1_3_2)+TestIdentity_0_3_2)+TestIdentity_4_3_4)+TestIdentity_2_2_4)+TestIdentity_1_2_4)+TestIdentity_4_2_4)+TestIdentity_3_2_4)+TestIdentity_1_3_4)+TestIdentity_0_3_4)+TestIdentity_3_3_4)+TestIdentity_2_3_4)+TestIdentity_4_0_4)+TestIdentity_3_0_4)+TestIdentity_1_1_4)+TestIdentity_0_1_4)+TestIdentity_3_1_4)+TestIdentity_2_1_4)+TestIdentity_0_2_4)+TestIdentity_4_1_4)))&&(!((((((((((((((((((((EndTurn_0_0+EndTurn_2_1)+EndTurn_3_1)+EndTurn_0_1)+EndTurn_1_1)+EndTurn_3_0)+EndTurn_4_0)+EndTurn_1_0)+EndTurn_2_0)+EndTurn_1_3)+EndTurn_0_3)+EndTurn_4_2)+EndTurn_3_2)+EndTurn_2_2)+EndTurn_1_2)+EndTurn_0_2)+EndTurn_4_1)+EndTurn_4_3)+EndTurn_3_3)+EndTurn_2_3)>=2)))||(((((CS_0+CS_1)+CS_3)+CS_2)+CS_4)<=(((((((((WantSection_0_T+WantSection_4_F)+WantSection_3_F)+WantSection_2_F)+WantSection_1_F)+WantSection_0_F)+WantSection_4_T)+WantSection_3_T)+WantSection_2_T)+WantSection_1_T)))
Read [reachable] property : Peterson-PT-4-ReachabilityCardinality-08 with value :(!((!(TestAlone_4_1_3>=3))&&((IsEndLoop_2_3_3>=2)||(TestAlone_1_3_4<=TestIdentity_3_2_1))))
Read [reachable] property : Peterson-PT-4-ReachabilityCardinality-09 with value :(TestAlone_0_1_4>=3)
Read [invariant] property : Peterson-PT-4-ReachabilityCardinality-10 with value :(IsEndLoop_1_1_4<=IsEndLoop_2_1_1)
Read [invariant] property : Peterson-PT-4-ReachabilityCardinality-11 with value :(TestAlone_1_2_0<=TestAlone_3_0_1)
Read [invariant] property : Peterson-PT-4-ReachabilityCardinality-12 with value :((IsEndLoop_0_2_1>=2)||(TestAlone_2_0_3<=BeginLoop_4_2_1))
Read [invariant] property : Peterson-PT-4-ReachabilityCardinality-13 with value :(!(IsEndLoop_1_1_0>=3))
Read [invariant] property : Peterson-PT-4-ReachabilityCardinality-14 with value :(!((!(IsEndLoop_1_0_0<=AskForSection_3_0))&&((BeginLoop_0_1_2>=3)&&(EndTurn_3_3>=2))))
Read [reachable] property : Peterson-PT-4-ReachabilityCardinality-15 with value :((!((TestIdentity_4_0_1<=TestTurn_3_2)&&(TestIdentity_2_1_1<=IsEndLoop_1_0_3)))&&((TestAlone_4_0_3<=IsEndLoop_2_1_3)&&((TestIdentity_2_0_2<=BeginLoop_3_3_2)||(AskForSection_1_2>=1))))
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
Normalized transition count is 630
// Phase 1: matrix 630 rows 480 cols
invariant :IsEndLoop_0_0_0 + IsEndLoop_0_1_0 + IsEndLoop_0_2_0 + IsEndLoop_0_3_0 + IsEndLoop_0_0_1 + IsEndLoop_0_1_1 + IsEndLoop_0_2_1 + IsEndLoop_0_3_1 + IsEndLoop_0_0_2 + IsEndLoop_0_1_2 + IsEndLoop_0_2_2 + IsEndLoop_0_3_2 + IsEndLoop_0_0_3 + IsEndLoop_0_1_3 + IsEndLoop_0_3_3 + IsEndLoop_0_2_3 + IsEndLoop_0_0_4 + IsEndLoop_0_2_4 + IsEndLoop_0_1_4 + EndTurn_0_0 + IsEndLoop_0_3_4 + EndTurn_0_1 + EndTurn_0_3 + EndTurn_0_2 + BeginLoop_0_0_0 + BeginLoop_0_3_0 + BeginLoop_0_0_1 + BeginLoop_0_1_0 + BeginLoop_0_2_0 + BeginLoop_0_2_1 + BeginLoop_0_3_1 + BeginLoop_0_1_1 + BeginLoop_0_1_2 + BeginLoop_0_2_2 + BeginLoop_0_0_2 + BeginLoop_0_1_3 + BeginLoop_0_3_2 + BeginLoop_0_0_3 + BeginLoop_0_0_4 + BeginLoop_0_3_3 + BeginLoop_0_2_3 + BeginLoop_0_3_4 + BeginLoop_0_2_4 + BeginLoop_0_1_4 + TestAlone_0_1_1 + TestAlone_0_0_1 + TestAlone_0_2_2 + TestAlone_0_3_2 + TestAlone_0_0_3 + TestAlone_0_1_3 + TestAlone_0_2_1 + TestAlone_0_3_1 + TestAlone_0_0_2 + TestAlone_0_1_2 + TestAlone_0_2_4 + TestAlone_0_3_4 + TestTurn_0_0 + TestTurn_0_1 + TestAlone_0_2_3 + TestAlone_0_3_3 + TestAlone_0_0_4 + TestAlone_0_1_4 + TestIdentity_0_2_0 + TestIdentity_0_1_0 + TestIdentity_0_3_0 + TestTurn_0_2 + TestIdentity_0_0_0 + TestTurn_0_3 + TestIdentity_0_0_2 + TestIdentity_0_3_1 + TestIdentity_0_2_2 + TestIdentity_0_1_2 + TestIdentity_0_1_1 + TestIdentity_0_0_1 + TestIdentity_0_2_1 + TestIdentity_0_3_3 + TestIdentity_0_0_4 + TestIdentity_0_2_3 + TestIdentity_0_0_3 + TestIdentity_0_1_3 + TestIdentity_0_3_2 + TestIdentity_0_3_4 + TestIdentity_0_1_4 + TestIdentity_0_2_4 + CS_0 + AskForSection_0_3 + AskForSection_0_2 + AskForSection_0_1 + AskForSection_0_0 + Idle_0 = 1
invariant :IsEndLoop_1_0_0 + IsEndLoop_1_1_0 + IsEndLoop_1_2_0 + IsEndLoop_1_3_0 + IsEndLoop_1_0_1 + IsEndLoop_1_1_1 + IsEndLoop_1_2_1 + IsEndLoop_1_3_1 + IsEndLoop_1_0_2 + IsEndLoop_1_1_2 + IsEndLoop_1_2_2 + IsEndLoop_1_3_2 + IsEndLoop_1_1_3 + IsEndLoop_1_0_3 + IsEndLoop_1_3_3 + IsEndLoop_1_2_3 + IsEndLoop_1_0_4 + IsEndLoop_1_2_4 + IsEndLoop_1_1_4 + IsEndLoop_1_3_4 + EndTurn_1_1 + EndTurn_1_0 + EndTurn_1_3 + EndTurn_1_2 + BeginLoop_1_0_0 + BeginLoop_1_3_0 + BeginLoop_1_1_0 + BeginLoop_1_2_0 + BeginLoop_1_2_1 + BeginLoop_1_3_1 + BeginLoop_1_0_1 + BeginLoop_1_1_1 + BeginLoop_1_1_2 + BeginLoop_1_2_2 + BeginLoop_1_0_2 + BeginLoop_1_0_3 + BeginLoop_1_1_3 + BeginLoop_1_3_2 + BeginLoop_1_0_4 + BeginLoop_1_3_3 + BeginLoop_1_2_3 + BeginLoop_1_3_4 + BeginLoop_1_2_4 + BeginLoop_1_1_4 + TestAlone_1_1_0 + TestAlone_1_0_0 + TestAlone_1_3_0 + TestAlone_1_2_0 + TestAlone_1_2_2 + TestAlone_1_3_2 + TestAlone_1_0_3 + TestAlone_1_1_3 + TestAlone_1_0_2 + TestAlone_1_1_2 + TestAlone_1_2_4 + TestAlone_1_3_4 + TestTurn_1_0 + TestTurn_1_1 + TestAlone_1_2_3 + TestAlone_1_3_3 + TestAlone_1_0_4 + TestAlone_1_1_4 + TestIdentity_1_1_0 + TestIdentity_1_3_0 + TestIdentity_1_2_0 + TestTurn_1_2 + TestIdentity_1_0_0 + TestTurn_1_3 + TestIdentity_1_0_2 + TestIdentity_1_3_1 + TestIdentity_1_1_2 + TestIdentity_1_1_1 + TestIdentity_1_0_1 + TestIdentity_1_2_1 + TestIdentity_1_3_3 + TestIdentity_1_0_4 + TestIdentity_1_2_3 + TestIdentity_1_0_3 + TestIdentity_1_1_3 + TestIdentity_1_2_2 + TestIdentity_1_3_2 + TestIdentity_1_2_4 + TestIdentity_1_3_4 + TestIdentity_1_1_4 + CS_1 + AskForSection_1_3 + AskForSection_1_2 + AskForSection_1_1 + AskForSection_1_0 + Idle_1 = 1
invariant :WantSection_1_F + -1'Idle_1 = 0
invariant :Turn_0_2 + Turn_0_3 + Turn_0_0 + Turn_0_1 + Turn_0_4 = 1
invariant :WantSection_3_F + -1'Idle_3 = 0
invariant :Turn_1_2 + Turn_1_3 + Turn_1_0 + Turn_1_1 + Turn_1_4 = 1
invariant :WantSection_4_F + -1'Idle_4 = 0
invariant :WantSection_3_T + Idle_3 = 1
invariant :WantSection_0_F + -1'Idle_0 = 0
invariant :IsEndLoop_4_0_0 + IsEndLoop_4_1_0 + IsEndLoop_4_2_0 + IsEndLoop_4_3_0 + IsEndLoop_4_0_1 + IsEndLoop_4_1_1 + IsEndLoop_4_2_1 + IsEndLoop_4_3_1 + IsEndLoop_4_0_2 + IsEndLoop_4_1_2 + IsEndLoop_4_2_2 + IsEndLoop_4_3_2 + IsEndLoop_4_0_3 + IsEndLoop_4_2_3 + IsEndLoop_4_1_3 + IsEndLoop_4_0_4 + IsEndLoop_4_3_3 + IsEndLoop_4_1_4 + IsEndLoop_4_3_4 + IsEndLoop_4_2_4 + EndTurn_4_0 + EndTurn_4_2 + EndTurn_4_1 + BeginLoop_4_0_0 + EndTurn_4_3 + BeginLoop_4_2_0 + BeginLoop_4_3_0 + BeginLoop_4_1_0 + BeginLoop_4_1_1 + BeginLoop_4_2_1 + BeginLoop_4_0_1 + BeginLoop_4_1_2 + BeginLoop_4_3_1 + BeginLoop_4_0_2 + BeginLoop_4_0_3 + BeginLoop_4_2_2 + BeginLoop_4_3_2 + BeginLoop_4_0_4 + BeginLoop_4_3_3 + BeginLoop_4_2_3 + BeginLoop_4_1_3 + BeginLoop_4_3_4 + BeginLoop_4_2_4 + BeginLoop_4_1_4 + TestAlone_4_0_0 + TestAlone_4_0_1 + TestAlone_4_3_0 + TestAlone_4_2_0 + TestAlone_4_1_0 + TestAlone_4_1_2 + TestAlone_4_2_2 + TestAlone_4_3_2 + TestAlone_4_0_3 + TestAlone_4_1_1 + TestAlone_4_2_1 + TestAlone_4_3_1 + TestAlone_4_0_2 + TestTurn_4_0 + TestAlone_4_1_3 + TestAlone_4_2_3 + TestAlone_4_3_3 + TestIdentity_4_1_0 + TestIdentity_4_0_0 + TestIdentity_4_2_0 + TestTurn_4_2 + TestTurn_4_1 + TestTurn_4_3 + TestIdentity_4_3_1 + TestIdentity_4_1_2 + TestIdentity_4_0_2 + TestIdentity_4_0_1 + TestIdentity_4_3_0 + TestIdentity_4_2_1 + TestIdentity_4_1_1 + TestIdentity_4_3_3 + TestIdentity_4_1_3 + TestIdentity_4_2_3 + TestIdentity_4_3_2 + TestIdentity_4_0_3 + TestIdentity_4_2_2 + TestIdentity_4_3_4 + TestIdentity_4_2_4 + TestIdentity_4_0_4 + TestIdentity_4_1_4 + AskForSection_4_3 + AskForSection_4_2 + AskForSection_4_1 + AskForSection_4_0 + Idle_4 + CS_4 = 1
invariant :WantSection_4_T + Idle_4 = 1
invariant :WantSection_2_T + Idle_2 = 1
invariant :IsEndLoop_3_0_0 + IsEndLoop_3_1_0 + IsEndLoop_3_2_0 + IsEndLoop_3_3_0 + IsEndLoop_3_0_1 + IsEndLoop_3_1_1 + IsEndLoop_3_2_1 + IsEndLoop_3_3_1 + IsEndLoop_3_0_2 + IsEndLoop_3_1_2 + IsEndLoop_3_2_2 + IsEndLoop_3_3_2 + IsEndLoop_3_1_3 + IsEndLoop_3_0_3 + IsEndLoop_3_2_3 + IsEndLoop_3_0_4 + IsEndLoop_3_3_3 + IsEndLoop_3_1_4 + IsEndLoop_3_3_4 + IsEndLoop_3_2_4 + EndTurn_3_1 + EndTurn_3_0 + EndTurn_3_2 + BeginLoop_3_0_0 + EndTurn_3_3 + BeginLoop_3_2_0 + BeginLoop_3_3_0 + BeginLoop_3_1_0 + BeginLoop_3_2_1 + BeginLoop_3_0_1 + BeginLoop_3_1_1 + BeginLoop_3_1_2 + BeginLoop_3_3_1 + BeginLoop_3_0_2 + BeginLoop_3_0_3 + BeginLoop_3_1_3 + BeginLoop_3_2_2 + BeginLoop_3_3_2 + BeginLoop_3_0_4 + BeginLoop_3_3_3 + BeginLoop_3_2_3 + BeginLoop_3_3_4 + BeginLoop_3_2_4 + BeginLoop_3_1_4 + TestAlone_3_1_0 + TestAlone_3_0_0 + TestAlone_3_1_1 + TestAlone_3_0_1 + TestAlone_3_3_0 + TestAlone_3_2_0 + TestAlone_3_2_2 + TestAlone_3_3_2 + TestAlone_3_2_1 + TestAlone_3_3_1 + TestAlone_3_0_2 + TestAlone_3_1_2 + TestAlone_3_1_4 + TestAlone_3_2_4 + TestAlone_3_3_4 + TestTurn_3_0 + TestAlone_3_0_4 + TestIdentity_3_1_0 + TestIdentity_3_0_0 + TestIdentity_3_3_0 + TestIdentity_3_2_0 + TestTurn_3_2 + TestTurn_3_1 + TestTurn_3_3 + TestIdentity_3_3_1 + TestIdentity_3_1_2 + TestIdentity_3_0_2 + TestIdentity_3_0_1 + TestIdentity_3_2_1 + TestIdentity_3_1_1 + TestIdentity_3_3_3 + TestIdentity_3_1_3 + TestIdentity_3_2_3 + TestIdentity_3_0_3 + TestIdentity_3_2_2 + TestIdentity_3_3_2 + TestIdentity_3_2_4 + TestIdentity_3_3_4 + TestIdentity_3_0_4 + TestIdentity_3_1_4 + AskForSection_3_3 + AskForSection_3_2 + AskForSection_3_1 + AskForSection_3_0 + Idle_3 + CS_3 = 1
invariant :WantSection_0_T + Idle_0 = 1
invariant :WantSection_1_T + Idle_1 = 1
invariant :Turn_2_2 + Turn_2_3 + Turn_2_0 + Turn_2_1 + Turn_2_4 = 1
invariant :IsEndLoop_2_0_0 + IsEndLoop_2_1_0 + IsEndLoop_2_2_0 + IsEndLoop_2_3_0 + IsEndLoop_2_0_1 + IsEndLoop_2_1_1 + IsEndLoop_2_2_1 + IsEndLoop_2_3_1 + IsEndLoop_2_0_2 + IsEndLoop_2_1_2 + IsEndLoop_2_2_2 + IsEndLoop_2_3_2 + IsEndLoop_2_1_3 + IsEndLoop_2_0_3 + IsEndLoop_2_2_3 + IsEndLoop_2_0_4 + IsEndLoop_2_3_3 + IsEndLoop_2_2_4 + IsEndLoop_2_1_4 + IsEndLoop_2_3_4 + EndTurn_2_1 + EndTurn_2_0 + EndTurn_2_2 + BeginLoop_2_0_0 + EndTurn_2_3 + BeginLoop_2_3_0 + BeginLoop_2_1_0 + BeginLoop_2_2_0 + BeginLoop_2_2_1 + BeginLoop_2_0_1 + BeginLoop_2_1_1 + BeginLoop_2_1_2 + BeginLoop_2_2_2 + BeginLoop_2_3_1 + BeginLoop_2_0_2 + BeginLoop_2_0_3 + BeginLoop_2_1_3 + BeginLoop_2_3_2 + BeginLoop_2_0_4 + BeginLoop_2_3_3 + BeginLoop_2_2_3 + BeginLoop_2_3_4 + BeginLoop_2_2_4 + BeginLoop_2_1_4 + TestAlone_2_1_0 + TestAlone_2_0_0 + TestAlone_2_1_1 + TestAlone_2_0_1 + TestAlone_2_3_0 + TestAlone_2_2_0 + TestAlone_2_0_3 + TestAlone_2_1_3 + TestAlone_2_2_1 + TestAlone_2_3_1 + TestAlone_2_2_4 + TestAlone_2_3_4 + TestTurn_2_0 + TestAlone_2_2_3 + TestAlone_2_3_3 + TestAlone_2_0_4 + TestAlone_2_1_4 + TestIdentity_2_1_0 + TestIdentity_2_3_0 + TestIdentity_2_2_0 + TestTurn_2_2 + TestTurn_2_1 + TestIdentity_2_0_0 + TestTurn_2_3 + TestIdentity_2_0_2 + TestIdentity_2_3_1 + TestIdentity_2_1_2 + TestIdentity_2_0_1 + TestIdentity_2_2_1 + TestIdentity_2_1_1 + TestIdentity_2_3_3 + TestIdentity_2_0_4 + TestIdentity_2_1_3 + TestIdentity_2_2_3 + TestIdentity_2_0_3 + TestIdentity_2_2_2 + TestIdentity_2_3_2 + TestIdentity_2_2_4 + TestIdentity_2_3_4 + TestIdentity_2_1_4 + AskForSection_2_3 + AskForSection_2_2 + AskForSection_2_1 + AskForSection_2_0 + Idle_2 + CS_2 = 1
invariant :Turn_3_1 + Turn_3_2 + Turn_3_0 + Turn_3_4 + Turn_3_3 = 1
invariant :WantSection_2_F + -1'Idle_2 = 0
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
Normalized transition count is 630
// Phase 1: matrix 630 rows 480 cols
invariant :IsEndLoop_0_0_0 + IsEndLoop_0_1_0 + IsEndLoop_0_2_0 + IsEndLoop_0_3_0 + IsEndLoop_0_0_1 + IsEndLoop_0_1_1 + IsEndLoop_0_2_1 + IsEndLoop_0_3_1 + IsEndLoop_0_0_2 + IsEndLoop_0_1_2 + IsEndLoop_0_2_2 + IsEndLoop_0_3_2 + IsEndLoop_0_0_3 + IsEndLoop_0_1_3 + IsEndLoop_0_3_3 + IsEndLoop_0_2_3 + IsEndLoop_0_0_4 + IsEndLoop_0_2_4 + IsEndLoop_0_1_4 + EndTurn_0_0 + IsEndLoop_0_3_4 + EndTurn_0_1 + EndTurn_0_3 + EndTurn_0_2 + BeginLoop_0_0_0 + BeginLoop_0_3_0 + BeginLoop_0_0_1 + BeginLoop_0_1_0 + BeginLoop_0_2_0 + BeginLoop_0_2_1 + BeginLoop_0_3_1 + BeginLoop_0_1_1 + BeginLoop_0_1_2 + BeginLoop_0_2_2 + BeginLoop_0_0_2 + BeginLoop_0_1_3 + BeginLoop_0_3_2 + BeginLoop_0_0_3 + BeginLoop_0_0_4 + BeginLoop_0_3_3 + BeginLoop_0_2_3 + BeginLoop_0_3_4 + BeginLoop_0_2_4 + BeginLoop_0_1_4 + TestAlone_0_1_1 + TestAlone_0_0_1 + TestAlone_0_2_2 + TestAlone_0_3_2 + TestAlone_0_0_3 + TestAlone_0_1_3 + TestAlone_0_2_1 + TestAlone_0_3_1 + TestAlone_0_0_2 + TestAlone_0_1_2 + TestAlone_0_2_4 + TestAlone_0_3_4 + TestTurn_0_0 + TestTurn_0_1 + TestAlone_0_2_3 + TestAlone_0_3_3 + TestAlone_0_0_4 + TestAlone_0_1_4 + TestIdentity_0_2_0 + TestIdentity_0_1_0 + TestIdentity_0_3_0 + TestTurn_0_2 + TestIdentity_0_0_0 + TestTurn_0_3 + TestIdentity_0_0_2 + TestIdentity_0_3_1 + TestIdentity_0_2_2 + TestIdentity_0_1_2 + TestIdentity_0_1_1 + TestIdentity_0_0_1 + TestIdentity_0_2_1 + TestIdentity_0_3_3 + TestIdentity_0_0_4 + TestIdentity_0_2_3 + TestIdentity_0_0_3 + TestIdentity_0_1_3 + TestIdentity_0_3_2 + TestIdentity_0_3_4 + TestIdentity_0_1_4 + TestIdentity_0_2_4 + CS_0 + AskForSection_0_3 + AskForSection_0_2 + AskForSection_0_1 + AskForSection_0_0 + Idle_0 = 1
invariant :IsEndLoop_1_0_0 + IsEndLoop_1_1_0 + IsEndLoop_1_2_0 + IsEndLoop_1_3_0 + IsEndLoop_1_0_1 + IsEndLoop_1_1_1 + IsEndLoop_1_2_1 + IsEndLoop_1_3_1 + IsEndLoop_1_0_2 + IsEndLoop_1_1_2 + IsEndLoop_1_2_2 + IsEndLoop_1_3_2 + IsEndLoop_1_1_3 + IsEndLoop_1_0_3 + IsEndLoop_1_3_3 + IsEndLoop_1_2_3 + IsEndLoop_1_0_4 + IsEndLoop_1_2_4 + IsEndLoop_1_1_4 + IsEndLoop_1_3_4 + EndTurn_1_1 + EndTurn_1_0 + EndTurn_1_3 + EndTurn_1_2 + BeginLoop_1_0_0 + BeginLoop_1_3_0 + BeginLoop_1_1_0 + BeginLoop_1_2_0 + BeginLoop_1_2_1 + BeginLoop_1_3_1 + BeginLoop_1_0_1 + BeginLoop_1_1_1 + BeginLoop_1_1_2 + BeginLoop_1_2_2 + BeginLoop_1_0_2 + BeginLoop_1_0_3 + BeginLoop_1_1_3 + BeginLoop_1_3_2 + BeginLoop_1_0_4 + BeginLoop_1_3_3 + BeginLoop_1_2_3 + BeginLoop_1_3_4 + BeginLoop_1_2_4 + BeginLoop_1_1_4 + TestAlone_1_1_0 + TestAlone_1_0_0 + TestAlone_1_3_0 + TestAlone_1_2_0 + TestAlone_1_2_2 + TestAlone_1_3_2 + TestAlone_1_0_3 + TestAlone_1_1_3 + TestAlone_1_0_2 + TestAlone_1_1_2 + TestAlone_1_2_4 + TestAlone_1_3_4 + TestTurn_1_0 + TestTurn_1_1 + TestAlone_1_2_3 + TestAlone_1_3_3 + TestAlone_1_0_4 + TestAlone_1_1_4 + TestIdentity_1_1_0 + TestIdentity_1_3_0 + TestIdentity_1_2_0 + TestTurn_1_2 + TestIdentity_1_0_0 + TestTurn_1_3 + TestIdentity_1_0_2 + TestIdentity_1_3_1 + TestIdentity_1_1_2 + TestIdentity_1_1_1 + TestIdentity_1_0_1 + TestIdentity_1_2_1 + TestIdentity_1_3_3 + TestIdentity_1_0_4 + TestIdentity_1_2_3 + TestIdentity_1_0_3 + TestIdentity_1_1_3 + TestIdentity_1_2_2 + TestIdentity_1_3_2 + TestIdentity_1_2_4 + TestIdentity_1_3_4 + TestIdentity_1_1_4 + CS_1 + AskForSection_1_3 + AskForSection_1_2 + AskForSection_1_1 + AskForSection_1_0 + Idle_1 = 1
invariant :WantSection_1_F + -1'Idle_1 = 0
invariant :Turn_0_2 + Turn_0_3 + Turn_0_0 + Turn_0_1 + Turn_0_4 = 1
invariant :WantSection_3_F + -1'Idle_3 = 0
invariant :Turn_1_2 + Turn_1_3 + Turn_1_0 + Turn_1_1 + Turn_1_4 = 1
invariant :WantSection_4_F + -1'Idle_4 = 0
invariant :WantSection_3_T + Idle_3 = 1
invariant :WantSection_0_F + -1'Idle_0 = 0
invariant :IsEndLoop_4_0_0 + IsEndLoop_4_1_0 + IsEndLoop_4_2_0 + IsEndLoop_4_3_0 + IsEndLoop_4_0_1 + IsEndLoop_4_1_1 + IsEndLoop_4_2_1 + IsEndLoop_4_3_1 + IsEndLoop_4_0_2 + IsEndLoop_4_1_2 + IsEndLoop_4_2_2 + IsEndLoop_4_3_2 + IsEndLoop_4_0_3 + IsEndLoop_4_2_3 + IsEndLoop_4_1_3 + IsEndLoop_4_0_4 + IsEndLoop_4_3_3 + IsEndLoop_4_1_4 + IsEndLoop_4_3_4 + IsEndLoop_4_2_4 + EndTurn_4_0 + EndTurn_4_2 + EndTurn_4_1 + BeginLoop_4_0_0 + EndTurn_4_3 + BeginLoop_4_2_0 + BeginLoop_4_3_0 + BeginLoop_4_1_0 + BeginLoop_4_1_1 + BeginLoop_4_2_1 + BeginLoop_4_0_1 + BeginLoop_4_1_2 + BeginLoop_4_3_1 + BeginLoop_4_0_2 + BeginLoop_4_0_3 + BeginLoop_4_2_2 + BeginLoop_4_3_2 + BeginLoop_4_0_4 + BeginLoop_4_3_3 + BeginLoop_4_2_3 + BeginLoop_4_1_3 + BeginLoop_4_3_4 + BeginLoop_4_2_4 + BeginLoop_4_1_4 + TestAlone_4_0_0 + TestAlone_4_0_1 + TestAlone_4_3_0 + TestAlone_4_2_0 + TestAlone_4_1_0 + TestAlone_4_1_2 + TestAlone_4_2_2 + TestAlone_4_3_2 + TestAlone_4_0_3 + TestAlone_4_1_1 + TestAlone_4_2_1 + TestAlone_4_3_1 + TestAlone_4_0_2 + TestTurn_4_0 + TestAlone_4_1_3 + TestAlone_4_2_3 + TestAlone_4_3_3 + TestIdentity_4_1_0 + TestIdentity_4_0_0 + TestIdentity_4_2_0 + TestTurn_4_2 + TestTurn_4_1 + TestTurn_4_3 + TestIdentity_4_3_1 + TestIdentity_4_1_2 + TestIdentity_4_0_2 + TestIdentity_4_0_1 + TestIdentity_4_3_0 + TestIdentity_4_2_1 + TestIdentity_4_1_1 + TestIdentity_4_3_3 + TestIdentity_4_1_3 + TestIdentity_4_2_3 + TestIdentity_4_3_2 + TestIdentity_4_0_3 + TestIdentity_4_2_2 + TestIdentity_4_3_4 + TestIdentity_4_2_4 + TestIdentity_4_0_4 + TestIdentity_4_1_4 + AskForSection_4_3 + AskForSection_4_2 + AskForSection_4_1 + AskForSection_4_0 + Idle_4 + CS_4 = 1
invariant :WantSection_4_T + Idle_4 = 1
invariant :WantSection_2_T + Idle_2 = 1
invariant :IsEndLoop_3_0_0 + IsEndLoop_3_1_0 + IsEndLoop_3_2_0 + IsEndLoop_3_3_0 + IsEndLoop_3_0_1 + IsEndLoop_3_1_1 + IsEndLoop_3_2_1 + IsEndLoop_3_3_1 + IsEndLoop_3_0_2 + IsEndLoop_3_1_2 + IsEndLoop_3_2_2 + IsEndLoop_3_3_2 + IsEndLoop_3_1_3 + IsEndLoop_3_0_3 + IsEndLoop_3_2_3 + IsEndLoop_3_0_4 + IsEndLoop_3_3_3 + IsEndLoop_3_1_4 + IsEndLoop_3_3_4 + IsEndLoop_3_2_4 + EndTurn_3_1 + EndTurn_3_0 + EndTurn_3_2 + BeginLoop_3_0_0 + EndTurn_3_3 + BeginLoop_3_2_0 + BeginLoop_3_3_0 + BeginLoop_3_1_0 + BeginLoop_3_2_1 + BeginLoop_3_0_1 + BeginLoop_3_1_1 + BeginLoop_3_1_2 + BeginLoop_3_3_1 + BeginLoop_3_0_2 + BeginLoop_3_0_3 + BeginLoop_3_1_3 + BeginLoop_3_2_2 + BeginLoop_3_3_2 + BeginLoop_3_0_4 + BeginLoop_3_3_3 + BeginLoop_3_2_3 + BeginLoop_3_3_4 + BeginLoop_3_2_4 + BeginLoop_3_1_4 + TestAlone_3_1_0 + TestAlone_3_0_0 + TestAlone_3_1_1 + TestAlone_3_0_1 + TestAlone_3_3_0 + TestAlone_3_2_0 + TestAlone_3_2_2 + TestAlone_3_3_2 + TestAlone_3_2_1 + TestAlone_3_3_1 + TestAlone_3_0_2 + TestAlone_3_1_2 + TestAlone_3_1_4 + TestAlone_3_2_4 + TestAlone_3_3_4 + TestTurn_3_0 + TestAlone_3_0_4 + TestIdentity_3_1_0 + TestIdentity_3_0_0 + TestIdentity_3_3_0 + TestIdentity_3_2_0 + TestTurn_3_2 + TestTurn_3_1 + TestTurn_3_3 + TestIdentity_3_3_1 + TestIdentity_3_1_2 + TestIdentity_3_0_2 + TestIdentity_3_0_1 + TestIdentity_3_2_1 + TestIdentity_3_1_1 + TestIdentity_3_3_3 + TestIdentity_3_1_3 + TestIdentity_3_2_3 + TestIdentity_3_0_3 + TestIdentity_3_2_2 + TestIdentity_3_3_2 + TestIdentity_3_2_4 + TestIdentity_3_3_4 + TestIdentity_3_0_4 + TestIdentity_3_1_4 + AskForSection_3_3 + AskForSection_3_2 + AskForSection_3_1 + AskForSection_3_0 + Idle_3 + CS_3 = 1
invariant :WantSection_0_T + Idle_0 = 1
invariant :WantSection_1_T + Idle_1 = 1
invariant :Turn_2_2 + Turn_2_3 + Turn_2_0 + Turn_2_1 + Turn_2_4 = 1
invariant :IsEndLoop_2_0_0 + IsEndLoop_2_1_0 + IsEndLoop_2_2_0 + IsEndLoop_2_3_0 + IsEndLoop_2_0_1 + IsEndLoop_2_1_1 + IsEndLoop_2_2_1 + IsEndLoop_2_3_1 + IsEndLoop_2_0_2 + IsEndLoop_2_1_2 + IsEndLoop_2_2_2 + IsEndLoop_2_3_2 + IsEndLoop_2_1_3 + IsEndLoop_2_0_3 + IsEndLoop_2_2_3 + IsEndLoop_2_0_4 + IsEndLoop_2_3_3 + IsEndLoop_2_2_4 + IsEndLoop_2_1_4 + IsEndLoop_2_3_4 + EndTurn_2_1 + EndTurn_2_0 + EndTurn_2_2 + BeginLoop_2_0_0 + EndTurn_2_3 + BeginLoop_2_3_0 + BeginLoop_2_1_0 + BeginLoop_2_2_0 + BeginLoop_2_2_1 + BeginLoop_2_0_1 + BeginLoop_2_1_1 + BeginLoop_2_1_2 + BeginLoop_2_2_2 + BeginLoop_2_3_1 + BeginLoop_2_0_2 + BeginLoop_2_0_3 + BeginLoop_2_1_3 + BeginLoop_2_3_2 + BeginLoop_2_0_4 + BeginLoop_2_3_3 + BeginLoop_2_2_3 + BeginLoop_2_3_4 + BeginLoop_2_2_4 + BeginLoop_2_1_4 + TestAlone_2_1_0 + TestAlone_2_0_0 + TestAlone_2_1_1 + TestAlone_2_0_1 + TestAlone_2_3_0 + TestAlone_2_2_0 + TestAlone_2_0_3 + TestAlone_2_1_3 + TestAlone_2_2_1 + TestAlone_2_3_1 + TestAlone_2_2_4 + TestAlone_2_3_4 + TestTurn_2_0 + TestAlone_2_2_3 + TestAlone_2_3_3 + TestAlone_2_0_4 + TestAlone_2_1_4 + TestIdentity_2_1_0 + TestIdentity_2_3_0 + TestIdentity_2_2_0 + TestTurn_2_2 + TestTurn_2_1 + TestIdentity_2_0_0 + TestTurn_2_3 + TestIdentity_2_0_2 + TestIdentity_2_3_1 + TestIdentity_2_1_2 + TestIdentity_2_0_1 + TestIdentity_2_2_1 + TestIdentity_2_1_1 + TestIdentity_2_3_3 + TestIdentity_2_0_4 + TestIdentity_2_1_3 + TestIdentity_2_2_3 + TestIdentity_2_0_3 + TestIdentity_2_2_2 + TestIdentity_2_3_2 + TestIdentity_2_2_4 + TestIdentity_2_3_4 + TestIdentity_2_1_4 + AskForSection_2_3 + AskForSection_2_2 + AskForSection_2_1 + AskForSection_2_0 + Idle_2 + CS_2 = 1
invariant :Turn_3_1 + Turn_3_2 + Turn_3_0 + Turn_3_4 + Turn_3_3 = 1
invariant :WantSection_2_F + -1'Idle_2 = 0
FORMULA Peterson-PT-4-ReachabilityCardinality-00 FALSE TECHNIQUES SAT_SMT K_INDUCTION(0)
FORMULA Peterson-PT-4-ReachabilityCardinality-01 TRUE TECHNIQUES SAT_SMT K_INDUCTION(0)
FORMULA Peterson-PT-4-ReachabilityCardinality-02 TRUE TECHNIQUES SAT_SMT K_INDUCTION(0)
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O3, model.c], workingDir=/home/mcc/execution]
FORMULA Peterson-PT-4-ReachabilityCardinality-06 TRUE TECHNIQUES SAT_SMT K_INDUCTION(0)
Compilation finished in 25807 ms.
Running link step : CommandLine [args=[gcc, -shared, -o, gal.so, model.o], workingDir=/home/mcc/execution]
Link finished in 1027 ms.
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -i, PetersonPT4ReachabilityCardinality03==true], workingDir=/home/mcc/execution]
LTSmin run took 7144 ms.
Found Violation
FORMULA Peterson-PT-4-ReachabilityCardinality-03 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -i, PetersonPT4ReachabilityCardinality04==true], workingDir=/home/mcc/execution]
FORMULA Peterson-PT-4-ReachabilityCardinality-07 TRUE TECHNIQUES SAT_SMT K_INDUCTION(0)
LTSmin run took 19384 ms.
Found Violation
FORMULA Peterson-PT-4-ReachabilityCardinality-04 TRUE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -i, PetersonPT4ReachabilityCardinality05==true], workingDir=/home/mcc/execution]
FORMULA Peterson-PT-4-ReachabilityCardinality-09 FALSE TECHNIQUES SAT_SMT K_INDUCTION(0)
LTSmin run took 5059 ms.
Found Violation
FORMULA Peterson-PT-4-ReachabilityCardinality-05 TRUE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -i, PetersonPT4ReachabilityCardinality08==true], workingDir=/home/mcc/execution]
FORMULA Peterson-PT-4-ReachabilityCardinality-13 TRUE TECHNIQUES SAT_SMT K_INDUCTION(0)
FORMULA Peterson-PT-4-ReachabilityCardinality-14 TRUE TECHNIQUES SAT_SMT K_INDUCTION(0)
WARNING : LTSmin timed out (>225 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -i, PetersonPT4ReachabilityCardinality08==true], workingDir=/home/mcc/execution]
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -i, PetersonPT4ReachabilityCardinality10==true], workingDir=/home/mcc/execution]
WARNING : LTSmin timed out (>225 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -i, PetersonPT4ReachabilityCardinality10==true], workingDir=/home/mcc/execution]
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -i, PetersonPT4ReachabilityCardinality11==true], workingDir=/home/mcc/execution]
LTSmin run took 80453 ms.
Found Violation
FORMULA Peterson-PT-4-ReachabilityCardinality-11 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -i, PetersonPT4ReachabilityCardinality12==true], workingDir=/home/mcc/execution]
LTSmin run took 40752 ms.
Found Violation
FORMULA Peterson-PT-4-ReachabilityCardinality-12 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -i, PetersonPT4ReachabilityCardinality15==true], workingDir=/home/mcc/execution]
LTSmin run took 2677 ms.
Found Violation
FORMULA Peterson-PT-4-ReachabilityCardinality-15 TRUE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Retrying LTSmin with larger timeout 1800 s
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -i, PetersonPT4ReachabilityCardinality08==true], workingDir=/home/mcc/execution]
WARNING : LTSmin timed out (>1800 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -i, PetersonPT4ReachabilityCardinality08==true], workingDir=/home/mcc/execution]
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -i, PetersonPT4ReachabilityCardinality10==true], workingDir=/home/mcc/execution]

BK_TIME_CONFINEMENT_REACHED

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution ReachabilityCardinality -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -consoleLog -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination ReachabilityCardinality -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
May 24, 2018 6:36:21 PM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, ReachabilityCardinality, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -smt]
May 24, 2018 6:36:21 PM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
May 24, 2018 6:36:21 PM fr.lip6.move.gal.nupn.PTNetReader loadFromXML
INFO: Load time of PNML (sax parser for PT used): 122 ms
May 24, 2018 6:36:21 PM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 480 places.
May 24, 2018 6:36:22 PM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 690 transitions.
May 24, 2018 6:36:22 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.img.gal : 48 ms
May 24, 2018 6:36:22 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 284 ms
May 24, 2018 6:36:22 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 142 ms
May 24, 2018 6:36:22 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/ReachabilityCardinality.pnml.gal : 25 ms
May 24, 2018 6:36:22 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 147 ms
May 24, 2018 6:36:22 PM fr.lip6.move.serialization.SerializationUtil serializePropertiesForITSTools
INFO: Time to serialize properties into /home/mcc/execution/ReachabilityCardinality.prop : 4 ms
May 24, 2018 6:36:23 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 690 transitions.
May 24, 2018 6:36:23 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 690 transitions.
May 24, 2018 6:36:24 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 19 place invariants in 189 ms
May 24, 2018 6:36:24 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd checkProperties
INFO: Ran tautology test, simplified 0 / 16 in 1325 ms.
May 24, 2018 6:36:24 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-00(UNSAT) depth K=0 took 20 ms
May 24, 2018 6:36:24 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-01(UNSAT) depth K=0 took 16 ms
May 24, 2018 6:36:24 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 690 transitions.
May 24, 2018 6:36:24 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-02(UNSAT) depth K=0 took 22 ms
May 24, 2018 6:36:24 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-03(UNSAT) depth K=0 took 14 ms
May 24, 2018 6:36:24 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-04(UNSAT) depth K=0 took 4 ms
May 24, 2018 6:36:24 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-05(UNSAT) depth K=0 took 5 ms
May 24, 2018 6:36:24 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-06(UNSAT) depth K=0 took 15 ms
May 24, 2018 6:36:24 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-07(UNSAT) depth K=0 took 12 ms
May 24, 2018 6:36:24 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-08(UNSAT) depth K=0 took 18 ms
May 24, 2018 6:36:24 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-09(UNSAT) depth K=0 took 16 ms
May 24, 2018 6:36:24 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-10(UNSAT) depth K=0 took 14 ms
May 24, 2018 6:36:24 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-11(UNSAT) depth K=0 took 1 ms
May 24, 2018 6:36:24 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-12(UNSAT) depth K=0 took 3 ms
May 24, 2018 6:36:24 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-13(UNSAT) depth K=0 took 1 ms
May 24, 2018 6:36:24 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-14(UNSAT) depth K=0 took 12 ms
May 24, 2018 6:36:24 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-15(UNSAT) depth K=0 took 1 ms
May 24, 2018 6:36:24 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-00(UNSAT) depth K=1 took 20 ms
May 24, 2018 6:36:24 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-01(UNSAT) depth K=1 took 19 ms
May 24, 2018 6:36:24 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-02(UNSAT) depth K=1 took 7 ms
May 24, 2018 6:36:24 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-03(UNSAT) depth K=1 took 10 ms
May 24, 2018 6:36:24 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-04(UNSAT) depth K=1 took 15 ms
May 24, 2018 6:36:24 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-05(UNSAT) depth K=1 took 30 ms
May 24, 2018 6:36:24 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-06(UNSAT) depth K=1 took 27 ms
May 24, 2018 6:36:24 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-07(UNSAT) depth K=1 took 12 ms
May 24, 2018 6:36:24 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-08(UNSAT) depth K=1 took 20 ms
May 24, 2018 6:36:24 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-09(UNSAT) depth K=1 took 7 ms
May 24, 2018 6:36:24 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-10(UNSAT) depth K=1 took 16 ms
May 24, 2018 6:36:24 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-11(UNSAT) depth K=1 took 16 ms
May 24, 2018 6:36:24 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-12(UNSAT) depth K=1 took 15 ms
May 24, 2018 6:36:24 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-13(UNSAT) depth K=1 took 11 ms
May 24, 2018 6:36:24 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 19 place invariants in 183 ms
May 24, 2018 6:36:24 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-14(UNSAT) depth K=1 took 18 ms
May 24, 2018 6:36:24 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-15(UNSAT) depth K=1 took 18 ms
May 24, 2018 6:36:25 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-00(UNSAT) depth K=2 took 523 ms
May 24, 2018 6:36:25 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-01(UNSAT) depth K=2 took 213 ms
May 24, 2018 6:36:25 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-02(UNSAT) depth K=2 took 199 ms
May 24, 2018 6:36:25 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-03(UNSAT) depth K=2 took 237 ms
May 24, 2018 6:36:26 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-04(UNSAT) depth K=2 took 473 ms
May 24, 2018 6:36:27 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-05(UNSAT) depth K=2 took 1007 ms
May 24, 2018 6:36:27 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-06(UNSAT) depth K=2 took 329 ms
May 24, 2018 6:36:28 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-07(UNSAT) depth K=2 took 704 ms
May 24, 2018 6:36:28 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-08(UNSAT) depth K=2 took 499 ms
May 24, 2018 6:36:29 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-09(UNSAT) depth K=2 took 299 ms
May 24, 2018 6:36:29 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-10(UNSAT) depth K=2 took 547 ms
May 24, 2018 6:36:31 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-11(UNSAT) depth K=2 took 1390 ms
May 24, 2018 6:36:31 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-12(UNSAT) depth K=2 took 568 ms
May 24, 2018 6:36:32 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-13(UNSAT) depth K=2 took 527 ms
May 24, 2018 6:36:32 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-14(UNSAT) depth K=2 took 573 ms
May 24, 2018 6:36:33 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-15(UNSAT) depth K=2 took 551 ms
May 24, 2018 6:36:34 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 480 variables to be positive in 10097 ms
May 24, 2018 6:36:34 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may disable matrix : 690 transitions.
May 24, 2018 6:36:34 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of disable matrix completed :0/690 took 1 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 24, 2018 6:36:34 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete disable matrix. took 146 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 24, 2018 6:36:34 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may enable matrix : 690 transitions.
May 24, 2018 6:36:34 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete enable matrix. took 35 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 24, 2018 6:36:39 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 480 variables to be positive in 15419 ms
May 24, 2018 6:37:11 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-00(UNSAT) depth K=3 took 38644 ms
May 24, 2018 6:37:16 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-01(UNSAT) depth K=3 took 4840 ms
May 24, 2018 6:37:21 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-02(UNSAT) depth K=3 took 4442 ms
May 24, 2018 6:37:24 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-03(UNSAT) depth K=3 took 3481 ms
May 24, 2018 6:37:28 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-04(UNSAT) depth K=3 took 4194 ms
May 24, 2018 6:38:04 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-05(UNSAT) depth K=3 took 35260 ms
May 24, 2018 6:38:56 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-06(UNSAT) depth K=3 took 51945 ms
May 24, 2018 6:39:03 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-07(UNSAT) depth K=3 took 7345 ms
May 24, 2018 6:39:09 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-08(UNSAT) depth K=3 took 6374 ms
May 24, 2018 6:39:44 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-09(UNSAT) depth K=3 took 34638 ms
May 24, 2018 6:39:50 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeCoEnablingMatrix
INFO: Computing symmetric co enabling matrix : 690 transitions.
May 24, 2018 6:39:53 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(0/690) took 2775 ms. Total solver calls (SAT/UNSAT): 137(0/137)
May 24, 2018 6:39:58 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(2/690) took 8153 ms. Total solver calls (SAT/UNSAT): 411(0/411)
May 24, 2018 6:39:59 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-10(UNSAT) depth K=3 took 14642 ms
May 24, 2018 6:40:00 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-11(UNSAT) depth K=3 took 1236 ms
May 24, 2018 6:40:01 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(4/690) took 11157 ms. Total solver calls (SAT/UNSAT): 684(0/684)
May 24, 2018 6:40:06 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(7/690) took 16346 ms. Total solver calls (SAT/UNSAT): 1093(0/1093)
May 24, 2018 6:40:12 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(9/690) took 21700 ms. Total solver calls (SAT/UNSAT): 1364(0/1364)
May 24, 2018 6:40:14 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-12(UNSAT) depth K=3 took 13997 ms
May 24, 2018 6:40:17 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(11/690) took 27392 ms. Total solver calls (SAT/UNSAT): 1635(0/1635)
May 24, 2018 6:40:18 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-13(UNSAT) depth K=3 took 3833 ms
May 24, 2018 6:40:21 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(12/690) took 31161 ms. Total solver calls (SAT/UNSAT): 1770(0/1770)
May 24, 2018 6:40:22 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-14(UNSAT) depth K=3 took 4052 ms
May 24, 2018 6:40:27 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(14/690) took 36757 ms. Total solver calls (SAT/UNSAT): 2040(0/2040)
May 24, 2018 6:40:32 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(16/690) took 41523 ms. Total solver calls (SAT/UNSAT): 2308(0/2308)
May 24, 2018 6:40:33 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-15(UNSAT) depth K=3 took 11297 ms
May 24, 2018 6:40:37 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(18/690) took 46900 ms. Total solver calls (SAT/UNSAT): 2575(0/2575)
May 24, 2018 6:40:41 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(20/690) took 51018 ms. Total solver calls (SAT/UNSAT): 2843(0/2843)
May 24, 2018 6:40:47 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(22/690) took 57212 ms. Total solver calls (SAT/UNSAT): 3108(0/3108)
May 24, 2018 6:40:51 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(23/690) took 60830 ms. Total solver calls (SAT/UNSAT): 3241(0/3241)
May 24, 2018 6:40:57 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(25/690) took 66975 ms. Total solver calls (SAT/UNSAT): 3507(0/3507)
May 24, 2018 6:40:58 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, proved UNreachability of reachability predicate Peterson-PT-4-ReachabilityCardinality-00
May 24, 2018 6:40:58 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, successfully proved induction at step 0 for Peterson-PT-4-ReachabilityCardinality-00
May 24, 2018 6:40:58 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property Peterson-PT-4-ReachabilityCardinality-00(FALSE) depth K=0 took 258562 ms
May 24, 2018 6:41:00 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(26/690) took 70235 ms. Total solver calls (SAT/UNSAT): 3638(0/3638)
May 24, 2018 6:41:03 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(27/690) took 73335 ms. Total solver calls (SAT/UNSAT): 3770(0/3770)
May 24, 2018 6:41:08 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(29/690) took 78232 ms. Total solver calls (SAT/UNSAT): 4034(0/4034)
May 24, 2018 6:41:12 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(30/690) took 81684 ms. Total solver calls (SAT/UNSAT): 4165(0/4165)
May 24, 2018 6:41:17 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(32/690) took 87018 ms. Total solver calls (SAT/UNSAT): 4428(0/4428)
May 24, 2018 6:41:20 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(33/690) took 90105 ms. Total solver calls (SAT/UNSAT): 4559(0/4559)
May 24, 2018 6:41:25 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(35/690) took 94816 ms. Total solver calls (SAT/UNSAT): 4820(0/4820)
May 24, 2018 6:41:30 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(37/690) took 99815 ms. Total solver calls (SAT/UNSAT): 5080(0/5080)
May 24, 2018 6:41:35 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(39/690) took 105291 ms. Total solver calls (SAT/UNSAT): 5340(0/5340)
May 24, 2018 6:41:41 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(41/690) took 111002 ms. Total solver calls (SAT/UNSAT): 5598(0/5598)
May 24, 2018 6:41:44 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(42/690) took 114108 ms. Total solver calls (SAT/UNSAT): 5727(0/5727)
May 24, 2018 6:41:50 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(44/690) took 120144 ms. Total solver calls (SAT/UNSAT): 5984(0/5984)
May 24, 2018 6:41:51 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, proved invariant Peterson-PT-4-ReachabilityCardinality-01
May 24, 2018 6:41:51 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, successfully proved induction at step 0 for Peterson-PT-4-ReachabilityCardinality-01
May 24, 2018 6:41:51 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property Peterson-PT-4-ReachabilityCardinality-01(TRUE) depth K=0 took 53273 ms
May 24, 2018 6:41:55 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(46/690) took 125106 ms. Total solver calls (SAT/UNSAT): 6241(0/6241)
May 24, 2018 6:41:58 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(47/690) took 128146 ms. Total solver calls (SAT/UNSAT): 6369(0/6369)
May 24, 2018 6:42:01 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(48/690) took 131183 ms. Total solver calls (SAT/UNSAT): 6497(0/6497)
May 24, 2018 6:42:04 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(49/690) took 134195 ms. Total solver calls (SAT/UNSAT): 6624(0/6624)
May 24, 2018 6:42:10 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(51/690) took 140042 ms. Total solver calls (SAT/UNSAT): 6878(0/6878)
May 24, 2018 6:42:15 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(53/690) took 145176 ms. Total solver calls (SAT/UNSAT): 7133(0/7133)
May 24, 2018 6:42:19 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(55/690) took 148579 ms. Total solver calls (SAT/UNSAT): 7385(0/7385)
May 24, 2018 6:42:22 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(57/690) took 152239 ms. Total solver calls (SAT/UNSAT): 7638(0/7638)
May 24, 2018 6:42:25 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, proved invariant Peterson-PT-4-ReachabilityCardinality-02
May 24, 2018 6:42:25 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, successfully proved induction at step 0 for Peterson-PT-4-ReachabilityCardinality-02
May 24, 2018 6:42:25 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property Peterson-PT-4-ReachabilityCardinality-02(TRUE) depth K=0 took 33894 ms
May 24, 2018 6:42:27 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(59/690) took 156945 ms. Total solver calls (SAT/UNSAT): 7889(0/7889)
May 24, 2018 6:42:28 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesPeterson-PT-4-ReachabilityCardinality-03
May 24, 2018 6:42:28 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property Peterson-PT-4-ReachabilityCardinality-03(SAT) depth K=0 took 3216 ms
May 24, 2018 6:42:31 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(61/690) took 160463 ms. Total solver calls (SAT/UNSAT): 8139(0/8139)
May 24, 2018 6:42:36 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(63/690) took 165591 ms. Total solver calls (SAT/UNSAT): 8390(0/8390)
SMT solver raised 'unknown', retrying with same input.
SMT solver raised 'unknown' twice, overapproximating result to 1.
May 24, 2018 6:42:37 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Finished co-enabling matrix. took 167013 ms. Total solver calls (SAT/UNSAT): 8403(2/8401)
May 24, 2018 6:42:37 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeDoNotAccord
INFO: Computing Do-Not-Accords matrix : 690 transitions.
May 24, 2018 6:42:38 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesPeterson-PT-4-ReachabilityCardinality-04
May 24, 2018 6:42:38 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property Peterson-PT-4-ReachabilityCardinality-04(SAT) depth K=0 took 9625 ms
May 24, 2018 6:42:45 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesPeterson-PT-4-ReachabilityCardinality-05
May 24, 2018 6:42:45 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property Peterson-PT-4-ReachabilityCardinality-05(SAT) depth K=0 took 6811 ms
May 24, 2018 6:42:51 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-00(UNSAT) depth K=4 took 138187 ms
May 24, 2018 6:43:36 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed DNA matrix. took 58395 ms. Total solver calls (SAT/UNSAT): 2647(0/2647)
May 24, 2018 6:43:36 PM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 433669ms conformant to PINS in folder :/home/mcc/execution
May 24, 2018 6:43:49 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, proved invariant Peterson-PT-4-ReachabilityCardinality-06
May 24, 2018 6:43:49 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, successfully proved induction at step 0 for Peterson-PT-4-ReachabilityCardinality-06
May 24, 2018 6:43:49 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property Peterson-PT-4-ReachabilityCardinality-06(TRUE) depth K=0 took 63787 ms
May 24, 2018 6:44:23 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, proved invariant Peterson-PT-4-ReachabilityCardinality-07
May 24, 2018 6:44:23 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, successfully proved induction at step 0 for Peterson-PT-4-ReachabilityCardinality-07
May 24, 2018 6:44:23 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property Peterson-PT-4-ReachabilityCardinality-07(TRUE) depth K=0 took 34533 ms
May 24, 2018 6:44:31 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesPeterson-PT-4-ReachabilityCardinality-08
May 24, 2018 6:44:31 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property Peterson-PT-4-ReachabilityCardinality-08(SAT) depth K=0 took 7658 ms
May 24, 2018 6:44:34 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, proved UNreachability of reachability predicate Peterson-PT-4-ReachabilityCardinality-09
May 24, 2018 6:44:34 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, successfully proved induction at step 0 for Peterson-PT-4-ReachabilityCardinality-09
May 24, 2018 6:44:34 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property Peterson-PT-4-ReachabilityCardinality-09(FALSE) depth K=0 took 2929 ms
May 24, 2018 6:44:42 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesPeterson-PT-4-ReachabilityCardinality-10
May 24, 2018 6:44:42 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property Peterson-PT-4-ReachabilityCardinality-10(SAT) depth K=0 took 7936 ms
May 24, 2018 6:44:47 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesPeterson-PT-4-ReachabilityCardinality-11
May 24, 2018 6:44:47 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property Peterson-PT-4-ReachabilityCardinality-11(SAT) depth K=0 took 5835 ms
May 24, 2018 6:44:53 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesPeterson-PT-4-ReachabilityCardinality-12
May 24, 2018 6:44:53 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property Peterson-PT-4-ReachabilityCardinality-12(SAT) depth K=0 took 5470 ms
May 24, 2018 6:44:55 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, proved invariant Peterson-PT-4-ReachabilityCardinality-13
May 24, 2018 6:44:55 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, successfully proved induction at step 0 for Peterson-PT-4-ReachabilityCardinality-13
May 24, 2018 6:44:55 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property Peterson-PT-4-ReachabilityCardinality-13(TRUE) depth K=0 took 2351 ms
May 24, 2018 6:44:58 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, proved invariant Peterson-PT-4-ReachabilityCardinality-14
May 24, 2018 6:44:58 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, successfully proved induction at step 0 for Peterson-PT-4-ReachabilityCardinality-14
May 24, 2018 6:44:58 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property Peterson-PT-4-ReachabilityCardinality-14(TRUE) depth K=0 took 3041 ms
May 24, 2018 6:45:07 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesPeterson-PT-4-ReachabilityCardinality-15
May 24, 2018 6:45:07 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property Peterson-PT-4-ReachabilityCardinality-15(SAT) depth K=0 took 8318 ms
May 24, 2018 6:45:45 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesPeterson-PT-4-ReachabilityCardinality-08
May 24, 2018 6:45:45 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property Peterson-PT-4-ReachabilityCardinality-08(SAT) depth K=1 took 38559 ms
May 24, 2018 6:46:03 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-01(UNSAT) depth K=4 took 192077 ms
May 24, 2018 6:46:33 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesPeterson-PT-4-ReachabilityCardinality-10
May 24, 2018 6:46:33 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property Peterson-PT-4-ReachabilityCardinality-10(SAT) depth K=1 took 47654 ms
May 24, 2018 6:47:37 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesPeterson-PT-4-ReachabilityCardinality-11
May 24, 2018 6:47:37 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property Peterson-PT-4-ReachabilityCardinality-11(SAT) depth K=1 took 64206 ms
May 24, 2018 6:48:03 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-02(UNSAT) depth K=4 took 120106 ms
May 24, 2018 6:48:15 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesPeterson-PT-4-ReachabilityCardinality-12
May 24, 2018 6:48:15 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property Peterson-PT-4-ReachabilityCardinality-12(SAT) depth K=1 took 37830 ms
May 24, 2018 6:49:27 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesPeterson-PT-4-ReachabilityCardinality-15
May 24, 2018 6:49:27 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property Peterson-PT-4-ReachabilityCardinality-15(SAT) depth K=1 took 71780 ms
May 24, 2018 6:49:46 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-03(UNSAT) depth K=4 took 102688 ms
May 24, 2018 6:50:49 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesPeterson-PT-4-ReachabilityCardinality-08
May 24, 2018 6:50:49 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property Peterson-PT-4-ReachabilityCardinality-08(SAT) depth K=2 took 82242 ms
May 24, 2018 6:52:40 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-04(UNSAT) depth K=4 took 173899 ms
May 24, 2018 6:53:56 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesPeterson-PT-4-ReachabilityCardinality-10
May 24, 2018 6:53:56 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property Peterson-PT-4-ReachabilityCardinality-10(SAT) depth K=2 took 187261 ms
May 24, 2018 6:55:14 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-05(UNSAT) depth K=4 took 153535 ms
May 24, 2018 6:56:42 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-06(UNSAT) depth K=4 took 88625 ms
May 24, 2018 6:57:22 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesPeterson-PT-4-ReachabilityCardinality-12
May 24, 2018 6:57:22 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property Peterson-PT-4-ReachabilityCardinality-12(SAT) depth K=2 took 206142 ms
May 24, 2018 6:59:57 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-07(UNSAT) depth K=4 took 194910 ms
May 24, 2018 7:01:49 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-08(UNSAT) depth K=4 took 112399 ms
May 24, 2018 7:03:51 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-09(UNSAT) depth K=4 took 121089 ms
May 24, 2018 7:06:03 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-10(UNSAT) depth K=4 took 132276 ms
ITS-tools command line returned an error code 137
May 24, 2018 7:08:03 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-11(UNSAT) depth K=4 took 120421 ms
May 24, 2018 7:09:59 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-12(UNSAT) depth K=4 took 115974 ms
May 24, 2018 7:10:38 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-13(UNSAT) depth K=4 took 38854 ms
May 24, 2018 7:11:20 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-14(UNSAT) depth K=4 took 41416 ms
May 24, 2018 7:14:20 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-15(UNSAT) depth K=4 took 180214 ms
May 24, 2018 7:16:38 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesPeterson-PT-4-ReachabilityCardinality-08
May 24, 2018 7:16:38 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property Peterson-PT-4-ReachabilityCardinality-08(SAT) depth K=3 took 1155461 ms
May 24, 2018 7:19:47 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-08(UNSAT) depth K=5 took 326807 ms
May 24, 2018 7:24:13 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property Peterson-PT-4-ReachabilityCardinality-10(UNSAT) depth K=5 took 266827 ms
May 24, 2018 7:27:31 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesPeterson-PT-4-ReachabilityCardinality-10
May 24, 2018 7:27:31 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property Peterson-PT-4-ReachabilityCardinality-10(SAT) depth K=3 took 653304 ms

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="Peterson-PT-4"
export BK_EXAMINATION="ReachabilityCardinality"
export BK_TOOL="itstools"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

tar xzf /home/mcc/BenchKit/INPUTS/Peterson-PT-4.tgz
mv Peterson-PT-4 execution
cd execution
pwd
ls -lh

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3637"
echo " Executing tool itstools"
echo " Input is Peterson-PT-4, examination is ReachabilityCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r116-csrt-152666475600572"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' ReachabilityCardinality.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;