fond
Model Checking Contest 2018
8th edition, Bratislava, Slovakia, June 26, 2018
Execution of r116-csrt-152666475500503
Last Updated
June 26, 2018

About the Execution of ITS-Tools for PermAdmissibility-PT-20

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
15746.780 2880356.00 3935035.00 534.90 [undef] Cannot compute

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Waiting for the VM to be ready (probing ssh)
..................
/home/mcc/execution
total 868K
-rw-r--r-- 1 mcc users 5.0K May 15 18:54 CTLCardinality.txt
-rw-r--r-- 1 mcc users 25K May 15 18:54 CTLCardinality.xml
-rw-r--r-- 1 mcc users 24K May 15 18:54 CTLFireability.txt
-rw-r--r-- 1 mcc users 90K May 15 18:54 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K May 15 18:50 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.0K May 15 18:50 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.0K May 15 18:54 LTLCardinality.txt
-rw-r--r-- 1 mcc users 12K May 15 18:54 LTLCardinality.xml
-rw-r--r-- 1 mcc users 12K May 15 18:54 LTLFireability.txt
-rw-r--r-- 1 mcc users 41K May 15 18:54 LTLFireability.xml
-rw-r--r-- 1 mcc users 6.6K May 15 18:54 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 33K May 15 18:54 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 114 May 15 18:54 ReachabilityDeadlock.txt
-rw-r--r-- 1 mcc users 352 May 15 18:54 ReachabilityDeadlock.xml
-rw-r--r-- 1 mcc users 15K May 15 18:54 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 55K May 15 18:54 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 2.1K May 15 18:54 UpperBounds.txt
-rw-r--r-- 1 mcc users 4.7K May 15 18:54 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 May 15 18:50 equiv_col
-rw-r--r-- 1 mcc users 3 May 15 18:50 instance
-rw-r--r-- 1 mcc users 6 May 15 18:50 iscolored
-rw-r--r-- 1 mcc users 481K May 15 18:50 model.pnml
=====================================================================
Generated by BenchKit 2-3637
Executing tool itstools
Input is PermAdmissibility-PT-20, examination is ReachabilityDeadlock
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r116-csrt-152666475500503
=====================================================================


--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME PermAdmissibility-PT-20-ReachabilityDeadlock-0

=== Now, execution of the tool begins

BK_START 1527183635862

Flatten gal took : 269 ms
Constant places removed 64 places and 0 transitions.
Iterating post reduction 0 with 64 rules applied. Total rules applied 64 place count 104 transition count 592
Symmetric choice reduction at 1 with 28 rule applications. Total rules 92 place count 104 transition count 592
Constant places removed 28 places and 252 transitions.
Iterating post reduction 1 with 28 rules applied. Total rules applied 120 place count 76 transition count 340
Applied a total of 120 rules in 41 ms. Remains 76 /168 variables (removed 92) and now considering 340/592 (removed 252) transitions.
// Phase 1: matrix 340 rows 76 cols
Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805151631/bin/its-ctl-linux64, --gc-threshold, 2000000, --quiet, -i, /home/mcc/execution/ReachabilityDeadlock.pnml.gal, -t, CGAL, -ctl, DEADLOCK], workingDir=/home/mcc/execution]
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
// Phase 1: matrix 340 rows 76 cols

its-ctl command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805151631/bin/its-ctl-linux64 --gc-threshold 2000000 --quiet -i /home/mcc/execution/ReachabilityDeadlock.pnml.gal -t CGAL -ctl DEADLOCK
No direction supplied, using forward translation only.
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O3, model.c], workingDir=/home/mcc/execution]
Compilation finished in 6088 ms.
Running link step : CommandLine [args=[gcc, -shared, -o, gal.so, model.o], workingDir=/home/mcc/execution]
Link finished in 81 ms.
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -d], workingDir=/home/mcc/execution]
sparsehash FATAL ERROR: failed to allocate 36 groups
WARNING : LTS min runner thread failed on error :java.lang.RuntimeException: Unexpected exception when executing ltsmin :CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -d], workingDir=/home/mcc/execution]
255

BK_STOP 1527186516218

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution ReachabilityDeadlock -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -consoleLog -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination ReachabilityDeadlock -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
May 24, 2018 5:40:37 PM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, ReachabilityDeadlock, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -smt]
May 24, 2018 5:40:38 PM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
May 24, 2018 5:40:38 PM fr.lip6.move.gal.nupn.PTNetReader loadFromXML
INFO: Load time of PNML (sax parser for PT used): 133 ms
May 24, 2018 5:40:38 PM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 168 places.
May 24, 2018 5:40:38 PM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 592 transitions.
May 24, 2018 5:40:38 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.img.gal : 55 ms
May 24, 2018 5:40:38 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 263 ms
May 24, 2018 5:40:38 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.simple.gal : 17 ms
May 24, 2018 5:40:39 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 592 transitions.
May 24, 2018 5:40:39 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/ReachabilityDeadlock.pnml.gal : 4 ms
May 24, 2018 5:40:39 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 340 transitions.
May 24, 2018 5:40:39 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 0 place invariants in 9 ms
May 24, 2018 5:40:40 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 76 variables to be positive in 660 ms
May 24, 2018 5:40:40 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may disable matrix : 340 transitions.
May 24, 2018 5:40:40 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of disable matrix completed :0/340 took 1 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 24, 2018 5:40:40 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete disable matrix. took 65 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 24, 2018 5:40:40 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may enable matrix : 340 transitions.
May 24, 2018 5:40:40 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete enable matrix. took 31 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 24, 2018 5:40:40 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeCoEnablingMatrix
INFO: Computing symmetric co enabling matrix : 340 transitions.
May 24, 2018 5:40:43 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(81/340) took 3002 ms. Total solver calls (SAT/UNSAT): 1113(1113/0)
May 24, 2018 5:40:47 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(122/340) took 6690 ms. Total solver calls (SAT/UNSAT): 3183(3183/0)
May 24, 2018 5:40:50 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(157/340) took 10018 ms. Total solver calls (SAT/UNSAT): 4315(4315/0)
May 24, 2018 5:40:53 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(181/340) took 13234 ms. Total solver calls (SAT/UNSAT): 5405(5405/0)
May 24, 2018 5:40:56 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(234/340) took 16377 ms. Total solver calls (SAT/UNSAT): 7315(7315/0)
May 24, 2018 5:41:00 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(242/340) took 19542 ms. Total solver calls (SAT/UNSAT): 7792(7792/0)
May 24, 2018 5:41:03 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(251/340) took 22591 ms. Total solver calls (SAT/UNSAT): 8218(8218/0)
May 24, 2018 5:41:06 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(269/340) took 25666 ms. Total solver calls (SAT/UNSAT): 8813(8813/0)
May 24, 2018 5:41:09 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(310/340) took 28680 ms. Total solver calls (SAT/UNSAT): 10332(10332/0)
May 24, 2018 5:41:09 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Finished co-enabling matrix. took 29112 ms. Total solver calls (SAT/UNSAT): 10738(10738/0)
May 24, 2018 5:41:09 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeDoNotAccord
INFO: Computing Do-Not-Accords matrix : 340 transitions.
May 24, 2018 5:47:44 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed DNA matrix. took 394710 ms. Total solver calls (SAT/UNSAT): 14905(0/14905)
May 24, 2018 5:47:44 PM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 425050ms conformant to PINS in folder :/home/mcc/execution
ITS-tools command line returned an error code 1
pins2lts-mc, 0.000: Registering PINS so language module
pins2lts-mc, 0.000: Loading model from ./gal.so
pins2lts-mc, 0.001: library has no initializer
pins2lts-mc, 0.001: loading model GAL
pins2lts-mc, 0.010: completed loading model GAL
pins2lts-mc, 0.011: Initializing POR dependencies: labels 340, guards 340
pins2lts-mc, 0.106: There are 340 state labels and 1 edge labels
pins2lts-mc, 0.106: State length is 76, there are 340 groups
pins2lts-mc, 0.106: Running bfs using 1 core (sequential)
pins2lts-mc, 0.106: Using a non-indexing tree table with 2^27 elements
pins2lts-mc, 0.106: Successor permutation: none
pins2lts-mc, 0.106: Visible groups: 0 / 340, labels: 0 / 340
pins2lts-mc, 0.106: POR cycle proviso: none
pins2lts-mc, 0.106: Global bits: 0, count bits: 0, local bits: 0
pins2lts-mc, 0.265: 6 levels 1000 states 5900 transitions
pins2lts-mc, 0.401: 7 levels 2000 states 13324 transitions
pins2lts-mc, 0.640: 8 levels 4000 states 26524 transitions
pins2lts-mc, 1.125: 9 levels 8000 states 50752 transitions
pins2lts-mc, 2.098: 9 levels 16000 states 103252 transitions
pins2lts-mc, 3.898: 10 levels 32000 states 200652 transitions
pins2lts-mc, 7.579: 11 levels 64000 states 412684 transitions
pins2lts-mc, 14.999: 12 levels 128000 states 866160 transitions
pins2lts-mc, 30.692: 13 levels 256000 states 1704532 transitions
pins2lts-mc, 62.664: 13 levels 512000 states 3397832 transitions
pins2lts-mc, 126.540: 14 levels 1024000 states 6822372 transitions
pins2lts-mc, 259.450: 16 levels 2048000 states 14220140 transitions
pins2lts-mc, 513.334: 17 levels 4096000 states 28221716 transitions
pins2lts-mc, 1015.943: 18 levels 8192000 states 56382396 transitions
pins2lts-mc, 2048.737: 19 levels 16384000 states 115574364 transitions
pins2lts-mc, 2444.549: Error: tree leafs table full! Change -s/--ratio.
pins2lts-mc, 2444.549:
pins2lts-mc, 2444.549:
pins2lts-mc, 2444.549: Explored 19324120 states 136055880 transitions, fanout: 7.041
pins2lts-mc, 2444.549: Total exploration time 2444.440 sec (2444.440 sec minimum, 2444.440 sec on average)
pins2lts-mc, 2444.549: States per second: 7905, Transitions per second: 55659
pins2lts-mc, 2444.549:
pins2lts-mc, 2444.549: Queue width: 8B, total height: 13060835, memory: 99.65MB
pins2lts-mc, 2444.549: Tree memory: 503.1MB, 16.3 B/state, compr.: 5.3%
pins2lts-mc, 2444.549: Tree fill ratio (roots/leafs): 24.0%/99.0%
pins2lts-mc, 2444.549: Stored 342 string chucks using 0MB
pins2lts-mc, 2444.549: Total memory used for chunk indexing: 0MB
pins2lts-mc, 2444.549: Est. total memory use: 602.7MB (~1123.6MB paged-in)
java.lang.RuntimeException: Unexpected exception when executing ltsmin :CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -d], workingDir=/home/mcc/execution]
255
at fr.lip6.move.gal.application.LTSminRunner.checkProperty(LTSminRunner.java:167)
at fr.lip6.move.gal.application.LTSminRunner.access$9(LTSminRunner.java:122)
at fr.lip6.move.gal.application.LTSminRunner$1.run(LTSminRunner.java:91)
at java.lang.Thread.run(Thread.java:748)

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="PermAdmissibility-PT-20"
export BK_EXAMINATION="ReachabilityDeadlock"
export BK_TOOL="itstools"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

tar xzf /home/mcc/BenchKit/INPUTS/PermAdmissibility-PT-20.tgz
mv PermAdmissibility-PT-20 execution
cd execution
pwd
ls -lh

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3637"
echo " Executing tool itstools"
echo " Input is PermAdmissibility-PT-20, examination is ReachabilityDeadlock"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r116-csrt-152666475500503"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityDeadlock" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityDeadlock" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityDeadlock.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityDeadlock.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityDeadlock.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' ReachabilityDeadlock.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;