About the Execution of ITS-Tools for PermAdmissibility-PT-01
| Execution Summary | |||||
| Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
| 15755.290 | 16433.00 | 59721.00 | 91.20 | TFTFFTTTFTFTFFFF | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Waiting for the VM to be ready (probing ssh)
....................................................................................
/home/mcc/execution
total 892K
-rw-r--r-- 1 mcc users 5.1K May 15 18:54 CTLCardinality.txt
-rw-r--r-- 1 mcc users 26K May 15 18:54 CTLCardinality.xml
-rw-r--r-- 1 mcc users 17K May 15 18:54 CTLFireability.txt
-rw-r--r-- 1 mcc users 66K May 15 18:54 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K May 15 18:50 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.0K May 15 18:50 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 2.9K May 15 18:54 LTLCardinality.txt
-rw-r--r-- 1 mcc users 12K May 15 18:54 LTLCardinality.xml
-rw-r--r-- 1 mcc users 12K May 15 18:54 LTLFireability.txt
-rw-r--r-- 1 mcc users 44K May 15 18:54 LTLFireability.xml
-rw-r--r-- 1 mcc users 5.6K May 15 18:54 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 27K May 15 18:54 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 114 May 15 18:54 ReachabilityDeadlock.txt
-rw-r--r-- 1 mcc users 352 May 15 18:54 ReachabilityDeadlock.xml
-rw-r--r-- 1 mcc users 28K May 15 18:54 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 104K May 15 18:54 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 2.2K May 15 18:54 UpperBounds.txt
-rw-r--r-- 1 mcc users 5.2K May 15 18:54 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 May 15 18:50 equiv_col
-rw-r--r-- 1 mcc users 3 May 15 18:50 instance
-rw-r--r-- 1 mcc users 6 May 15 18:50 iscolored
-rw-r--r-- 1 mcc users 484K May 15 18:50 model.pnml
=====================================================================
Generated by BenchKit 2-3637
Executing tool itstools
Input is PermAdmissibility-PT-01, examination is ReachabilityCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r116-csrt-152666475400474
=====================================================================
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME PermAdmissibility-PT-01-ReachabilityCardinality-00
FORMULA_NAME PermAdmissibility-PT-01-ReachabilityCardinality-01
FORMULA_NAME PermAdmissibility-PT-01-ReachabilityCardinality-02
FORMULA_NAME PermAdmissibility-PT-01-ReachabilityCardinality-03
FORMULA_NAME PermAdmissibility-PT-01-ReachabilityCardinality-04
FORMULA_NAME PermAdmissibility-PT-01-ReachabilityCardinality-05
FORMULA_NAME PermAdmissibility-PT-01-ReachabilityCardinality-06
FORMULA_NAME PermAdmissibility-PT-01-ReachabilityCardinality-07
FORMULA_NAME PermAdmissibility-PT-01-ReachabilityCardinality-08
FORMULA_NAME PermAdmissibility-PT-01-ReachabilityCardinality-09
FORMULA_NAME PermAdmissibility-PT-01-ReachabilityCardinality-10
FORMULA_NAME PermAdmissibility-PT-01-ReachabilityCardinality-11
FORMULA_NAME PermAdmissibility-PT-01-ReachabilityCardinality-12
FORMULA_NAME PermAdmissibility-PT-01-ReachabilityCardinality-13
FORMULA_NAME PermAdmissibility-PT-01-ReachabilityCardinality-14
FORMULA_NAME PermAdmissibility-PT-01-ReachabilityCardinality-15
=== Now, execution of the tool begins
BK_START 1527181119180
Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805151631/bin/its-reach-linux64, --gc-threshold, 2000000, --quiet, -i, /home/mcc/execution/ReachabilityCardinality.pnml.gal, -t, CGAL, -reachable-file, ReachabilityCardinality.prop, --nowitness], workingDir=/home/mcc/execution]
its-reach command run as :
/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805151631/bin/its-reach-linux64 --gc-threshold 2000000 --quiet -i /home/mcc/execution/ReachabilityCardinality.pnml.gal -t CGAL -reachable-file ReachabilityCardinality.prop --nowitness
Loading property file ReachabilityCardinality.prop.
Read [invariant] property : PermAdmissibility-PT-01-ReachabilityCardinality-00 with value :(((((((((aux11_5+aux11_4)+aux11_3)+aux11_2)+aux11_1)+aux11_0)+aux11_7)+aux11_6)<=c9)||(c9<=(((((((out7_1+out7_0)+out7_3)+out7_2)+out7_5)+out7_4)+out7_7)+out7_6)))
Read [invariant] property : PermAdmissibility-PT-01-ReachabilityCardinality-01 with value :((!(((((((((out2_0+out2_7)+out2_5)+out2_6)+out2_3)+out2_4)+out2_1)+out2_2)<=(((((((aux15_2+aux15_1)+aux15_0)+aux15_6)+aux15_5)+aux15_4)+aux15_3)+aux15_7))||((((aux6_0+aux6_5)+aux6_1)+aux6_4)<=c7)))||(!((((((((out5_1+out5_2)+out5_0)+out5_5)+out5_6)+out5_3)+out5_4)+out5_7)>=1)))
Read [invariant] property : PermAdmissibility-PT-01-ReachabilityCardinality-02 with value :((!((((((((aux9_4+aux9_5)+aux9_6)+aux9_7)+aux9_0)+aux9_1)+aux9_2)+aux9_3)>=3))||((!((((((((out4_0+out4_1)+out4_7)+out4_6)+out4_3)+out4_2)+out4_5)+out4_4)<=(((((((aux13_2+aux13_1)+aux13_0)+aux13_7)+aux13_3)+aux13_4)+aux13_5)+aux13_6)))||(((((aux7_7+aux7_6)+aux7_3)+aux7_2)<=c17)||(c11<=c8))))
Read [invariant] property : PermAdmissibility-PT-01-ReachabilityCardinality-03 with value :((((((((out3_0+out3_1)+out3_6)+out3_7)+out3_2)+out3_3)+out3_4)+out3_5)<=c5)
Read [invariant] property : PermAdmissibility-PT-01-ReachabilityCardinality-04 with value :(((((((((((aux15_2+aux15_1)+aux15_0)+aux15_6)+aux15_5)+aux15_4)+aux15_3)+aux15_7)>=3)||(c110<=(((((((out6_1+out6_2)+out6_0)+out6_6)+out6_5)+out6_4)+out6_3)+out6_7)))&&(((((((((out7_1+out7_0)+out7_3)+out7_2)+out7_5)+out7_4)+out7_7)+out7_6)>=2)&&((((aux6_0+aux6_5)+aux6_1)+aux6_4)>=2)))||(c20<=(((((((aux10_0+aux10_2)+aux10_1)+aux10_4)+aux10_3)+aux10_5)+aux10_6)+aux10_7)))
Read [invariant] property : PermAdmissibility-PT-01-ReachabilityCardinality-05 with value :((((((((((out1_0+out1_6)+out1_5)+out1_7)+out1_2)+out1_1)+out1_4)+out1_3)>=3)||(!(c15>=3)))||((((((((out4_0+out4_1)+out4_7)+out4_6)+out4_3)+out4_2)+out4_5)+out4_4)>=1))
Read [reachable] property : PermAdmissibility-PT-01-ReachabilityCardinality-06 with value :(!(c17<=c9))
Read [reachable] property : PermAdmissibility-PT-01-ReachabilityCardinality-07 with value :(((((((((((out1_0+out1_6)+out1_5)+out1_7)+out1_2)+out1_1)+out1_4)+out1_3)>=2)&&(c13<=c17))||(((((((((aux11_5+aux11_4)+aux11_3)+aux11_2)+aux11_1)+aux11_0)+aux11_7)+aux11_6)<=(((((((out8_1+out8_0)+out8_3)+out8_2)+out8_6)+out8_7)+out8_4)+out8_5))&&(c18>=1)))&&((((((((((out1_0+out1_6)+out1_5)+out1_7)+out1_2)+out1_1)+out1_4)+out1_3)<=(((((((out6_1+out6_2)+out6_0)+out6_6)+out6_5)+out6_4)+out6_3)+out6_7))&&(c16>=1))||(!(c7>=1))))
Read [reachable] property : PermAdmissibility-PT-01-ReachabilityCardinality-08 with value :(((aux11_6>=3)&&((aux11_4>=2)&&(out2_5<=aux14_2)))&&(((c14<=out6_1)||(aux13_5>=3))||((out7_7>=3)||(aux10_5<=out5_6))))
Read [reachable] property : PermAdmissibility-PT-01-ReachabilityCardinality-09 with value :(!(out4_7<=aux9_1))
Read [reachable] property : PermAdmissibility-PT-01-ReachabilityCardinality-10 with value :(c12>=3)
Read [invariant] property : PermAdmissibility-PT-01-ReachabilityCardinality-11 with value :((!((aux15_3<=aux16_0)&&(aux7_2>=2)))||((aux10_4<=out2_4)||((out2_3>=2)||(c18<=aux5_0))))
Read [reachable] property : PermAdmissibility-PT-01-ReachabilityCardinality-12 with value :((in1_0>=2)&&(((aux12_5>=2)||(out3_7<=aux12_0))&&(!(c16>=1))))
Read [reachable] property : PermAdmissibility-PT-01-ReachabilityCardinality-13 with value :((out4_7<=aux14_1)&&(((aux6_0>=3)&&(out4_1>=2))&&((aux10_4>=1)&&(out2_2<=aux12_6))))
Read [reachable] property : PermAdmissibility-PT-01-ReachabilityCardinality-14 with value :(out6_3>=3)
Read [invariant] property : PermAdmissibility-PT-01-ReachabilityCardinality-15 with value :(((!(aux16_7<=aux9_6))||((c18<=out6_3)&&(out1_4<=aux15_3)))||((!(aux9_7<=aux10_4))&&((aux13_6>=2)&&(out2_7<=c20))))
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
// Phase 1: matrix 592 rows 168 cols
invariant :out1_0 + out1_6 + out1_5 + -1'out2_0 + out1_7 + out1_2 + out1_1 + out1_4 + out1_3 + -1'out2_7 + -1'out2_5 + -1'out2_6 + -1'out2_3 + -1'out2_4 + -1'out2_1 + -1'out2_2 = 0
invariant :aux7_7 + aux7_6 + -1'aux5_1 + -1'aux5_0 + -1'aux5_5 + -1'aux5_4 + aux7_3 + aux7_2 + 2'c7 + -4'c5 + 2'in1_1 + 2'in1_0 = 0
invariant :aux6_0 + -1'aux8_7 + -1'aux8_3 + -1'aux8_6 + aux6_5 + -1'aux8_2 + aux6_1 + aux6_4 + -2'c7 + -2'c8 = 0
invariant :-1'aux16_3 + -1'aux16_6 + aux14_2 + aux14_7 + -1'out7_3 + -1'out7_6 + out8_2 + out8_7 + -1'out5_6 + -1'out5_3 + out6_2 + out6_7 + -1'aux15_6 + -1'aux15_3 + aux13_2 + aux13_7 + -1'out3_6 + -1'out3_3 + out4_7 + out4_2 + -1'out1_6 + -1'out1_3 + out2_7 + out2_2 + -1'aux8_3 + -1'aux8_6 + -1'aux12_6 + -1'aux12_3 + aux11_2 + c11 + -1'aux7_6 + -1'aux10_3 + aux11_7 + aux5_1 + aux5_0 + aux5_5 + aux5_4 + -1'aux7_3 + aux9_7 + in4_7 + -1'in2_3 + -1'aux10_6 + aux9_2 + -2'c7 + -1'c8 + 4'c5 + -2'in1_1 + -2'in1_0 = 0
invariant :c18 + out4_0 + out4_1 + out4_7 + out4_6 + out4_3 + out4_2 + out4_5 + out4_4 + -1'out2_0 + -1'out2_7 + -1'out2_5 + -1'out2_6 + -1'out2_3 + -1'out2_4 + -1'out2_1 + -1'out2_2 = 0
invariant :aux16_3 + aux14_3 + out7_3 + out8_3 + out5_3 + out6_3 + aux15_3 + aux13_3 + out3_3 + out4_3 + out1_3 + out2_3 + aux8_3 + aux12_3 + aux11_3 + aux10_3 + aux7_3 + in2_3 + aux9_3 = 1
invariant :in4_6 + in4_7 + -2'c7 + -1'c8 + 2'c5 + -2'in1_1 + -2'in1_0 = 0
invariant :2'c5 + c6 + -1'in1_1 + -1'in1_0 = 0
invariant :-1'aux8_7 + c12 + -1'aux8_3 + -1'aux8_6 + -1'aux8_2 + 2'c11 + 2'aux5_1 + 2'aux5_0 + 2'aux5_5 + 2'aux5_4 + -2'c9 + -4'c7 + -4'c8 + 8'c5 + -4'in1_1 + -4'in1_0 = 0
invariant :in2_2 + in2_3 + -2'c7 + -1'c8 + 2'c5 + -2'in1_1 + -2'in1_0 = 0
invariant :out7_1 + out7_0 + out7_3 + out7_2 + out7_5 + out7_4 + out7_7 + out7_6 + -1'out8_1 + -1'out8_0 + -1'out8_3 + -1'out8_2 + -1'out8_6 + -1'out8_7 + -1'out8_4 + -1'out8_5 = 0
invariant :-1'aux16_1 + aux16_6 + -1'aux14_1 + -1'aux14_2 + -1'aux14_3 + -1'aux14_7 + -1'out7_1 + out7_6 + -1'out8_1 + -1'out8_3 + -1'out8_2 + -1'out8_7 + out5_2 + out5_0 + out5_5 + 2'out5_6 + out5_3 + out5_4 + -2'out6_1 + -2'out6_2 + out5_7 + -1'out6_0 + -1'out6_6 + -1'out6_5 + -1'out6_4 + -2'out6_3 + -1'aux15_1 + -2'out6_7 + aux15_6 + aux13_0 + -1'out3_1 + aux13_4 + aux13_5 + aux13_6 + out3_6 + out4_0 + out4_6 + 2'c17 + out4_5 + out4_4 + out1_6 + 3'out2_0 + -1'out1_1 + 2'out2_7 + 3'out2_5 + 3'out2_6 + 2'out2_3 + 3'out2_4 + 2'out2_1 + 2'out2_2 + 4'aux8_7 + 4'aux8_3 + 5'aux8_6 + 4'aux8_2 + -1'aux6_1 + 3'aux12_6 + 2'aux12_5 + 2'aux12_4 + 2'aux12_3 + 2'aux12_2 + aux12_1 + 2'aux12_0 + -1'aux11_3 + -1'aux11_2 + -1'aux11_1 + -5'c11 + 2'aux12_7 + aux7_6 + -1'aux10_1 + -1'aux11_7 + -6'aux5_1 + -5'aux5_0 + -5'aux5_5 + -5'aux5_4 + -1'aux9_7 + -1'in4_7 + aux10_6 + 4'c9 + -1'aux9_1 + -1'aux9_2 + -1'aux9_3 + -2'c15 + -2'c14 + 14'c7 + 13'c8 + -24'c5 + 13'in1_1 + 14'in1_0 = 2
invariant :-1'aux16_1 + aux16_6 + -1'aux14_1 + -1'aux14_2 + -1'aux14_3 + -1'aux14_7 + -1'out7_1 + out7_6 + -1'out8_1 + -1'out8_3 + -1'out8_2 + -1'out8_7 + out5_2 + out5_0 + out5_5 + 2'out5_6 + out5_3 + out5_4 + -2'out6_1 + -2'out6_2 + out5_7 + -1'out6_0 + -1'out6_6 + -1'out6_5 + -1'out6_4 + -2'out6_3 + -1'aux15_1 + -2'out6_7 + aux15_6 + aux13_0 + -1'out3_1 + aux13_4 + aux13_5 + aux13_6 + out3_6 + out4_0 + out4_6 + out4_5 + out4_4 + out1_6 + out2_0 + -1'out1_1 + out2_5 + out2_6 + out2_4 + 2'aux8_7 + 2'aux8_3 + 3'aux8_6 + 2'aux8_2 + -1'aux6_1 + aux12_6 + -1'aux12_1 + 2'c13 + -1'aux11_3 + -1'aux11_2 + -1'aux11_1 + -3'c11 + aux7_6 + -1'aux10_1 + -1'aux11_7 + -4'aux5_1 + -3'aux5_0 + -3'aux5_5 + -3'aux5_4 + -1'aux9_7 + -1'in4_7 + aux10_6 + 2'c9 + -1'aux9_1 + -1'aux9_2 + -1'aux9_3 + 8'c7 + 7'c8 + -14'c5 + 7'in1_1 + 8'in1_0 = 0
invariant :c19 + out6_1 + out6_2 + out6_0 + out6_6 + out6_5 + out6_4 + out6_3 + out6_7 + -1'out4_0 + -1'out4_1 + -1'out4_7 + -1'out4_6 + -1'out4_3 + -1'out4_2 + -1'out4_5 + -1'out4_4 = 0
invariant :-1'aux16_1 + aux16_6 + -1'aux14_1 + -1'aux14_2 + -1'aux14_3 + -1'aux14_7 + -1'out7_1 + out7_6 + -1'out8_1 + -1'out8_3 + -1'out8_2 + -1'out8_7 + out5_2 + out5_0 + out5_5 + 2'out5_6 + out5_3 + out5_4 + -2'out6_1 + -2'out6_2 + out5_7 + -1'out6_0 + -1'out6_6 + -1'out6_5 + -1'out6_4 + -2'out6_3 + -1'aux15_1 + -2'out6_7 + aux15_6 + aux13_0 + -1'out3_1 + aux13_4 + aux13_5 + aux13_6 + out3_6 + out4_0 + out4_6 + out4_5 + out4_4 + out1_6 + out2_0 + -1'out1_1 + out2_5 + out2_6 + out2_4 + aux8_6 + -1'aux6_1 + aux12_6 + -1'aux12_1 + -1'aux11_3 + -1'aux11_2 + -1'aux11_1 + -1'c11 + aux7_6 + -1'aux10_1 + -1'aux11_7 + -2'aux5_1 + -1'aux5_0 + -1'aux5_5 + -1'aux5_4 + aux9_4 + aux9_5 + aux9_6 + -1'in4_7 + aux10_6 + 2'c9 + aux9_0 + -1'c14 + 4'c7 + 3'c8 + -6'c5 + 3'in1_1 + 4'in1_0 = 0
invariant :c20 + out8_1 + out8_0 + out8_3 + out8_2 + out8_6 + out8_7 + out8_4 + out8_5 + -1'out6_1 + -1'out6_2 + -1'out6_0 + -1'out6_6 + -1'out6_5 + -1'out6_4 + -1'out6_3 + -1'out6_7 = 0
invariant :-1'aux16_0 + aux16_1 + -1'aux16_6 + 2'aux14_1 + 2'aux14_2 + 2'aux14_3 + aux14_4 + aux14_6 + aux14_5 + 2'aux14_7 + out7_1 + -1'out7_0 + -1'out7_6 + 2'out8_1 + 2'out8_3 + 2'out8_2 + out8_6 + 2'out8_7 + out8_4 + out8_5 + -1'out5_2 + -2'out5_0 + -1'out5_5 + -2'out5_6 + -1'out5_3 + -1'out5_4 + 3'out6_1 + 3'out6_2 + -1'out5_7 + out6_0 + 2'out6_6 + 2'out6_5 + 2'out6_4 + 3'out6_3 + aux15_1 + -1'aux15_0 + 3'out6_7 + -1'aux15_6 + -2'aux13_0 + 2'out3_1 + -1'aux13_4 + -1'aux13_5 + -1'aux13_6 + out3_7 + -3'out4_0 + -1'out4_1 + out3_2 + out3_3 + out3_4 + out3_5 + -1'out4_7 + -2'out4_6 + -1'out1_0 + -1'out4_3 + -1'out4_2 + -2'out4_5 + -2'out4_4 + -1'out1_6 + -2'out2_0 + out1_1 + -1'out2_5 + -1'out2_6 + -1'out2_4 + -1'aux8_7 + -1'aux8_3 + -2'aux8_6 + aux6_5 + -1'aux8_2 + 2'aux6_1 + aux6_4 + -1'aux12_6 + aux12_1 + -1'aux12_0 + aux11_3 + aux11_2 + aux11_1 + -1'aux11_0 + c11 + -1'aux7_6 + -1'aux10_0 + aux10_1 + aux11_7 + 2'aux5_1 + aux5_5 + aux5_4 + aux9_7 + in4_7 + -1'aux10_6 + -1'aux9_0 + aux9_1 + aux9_2 + aux9_3 + 2'c14 + -4'c7 + -3'c8 + 4'c5 + -1'in1_1 + -3'in1_0 = 1
invariant :-2'aux16_1 + aux16_6 + -2'aux14_1 + -2'aux14_2 + -2'aux14_3 + -1'aux14_6 + -2'aux14_7 + -2'out7_1 + out7_6 + -2'out8_1 + -2'out8_3 + -2'out8_2 + -1'out8_6 + -2'out8_7 + 2'out5_2 + 2'out5_0 + 2'out5_5 + 3'out5_6 + 2'out5_3 + 2'out5_4 + -4'out6_1 + -4'out6_2 + 2'out5_7 + -2'out6_0 + -3'out6_6 + -2'out6_5 + -2'out6_4 + -4'out6_3 + -2'aux15_1 + -4'out6_7 + aux15_6 + 2'aux13_0 + -2'out3_1 + 2'aux13_4 + 2'aux13_5 + aux13_6 + out3_6 + 2'out4_0 + out4_6 + 2'out4_5 + 2'out4_4 + out1_6 + 2'out2_0 + -2'out1_1 + 2'out2_5 + out2_6 + 2'out2_4 + aux8_6 + -2'aux6_1 + aux12_6 + -2'aux12_1 + aux11_5 + aux11_4 + -1'aux11_3 + -1'aux11_2 + -1'aux11_1 + aux11_0 + aux7_6 + -2'aux10_1 + -1'aux11_7 + -2'aux5_1 + aux9_4 + aux9_5 + -1'aux9_7 + -1'in4_7 + aux10_6 + aux9_0 + -1'aux9_1 + -1'aux9_2 + -1'aux9_3 + -2'c14 + 2'c7 + c8 + -2'c5 + 2'in1_0 = -1
invariant :aux16_1 + -1'aux16_6 + aux14_1 + aux14_2 + aux14_3 + aux14_7 + out7_1 + -1'out7_6 + out8_1 + out8_3 + out8_2 + out8_7 + -1'out5_2 + -1'out5_0 + -1'out5_5 + -2'out5_6 + -1'out5_3 + -1'out5_4 + 2'out6_1 + 2'out6_2 + -1'out5_7 + out6_0 + out6_6 + out6_5 + out6_4 + 2'out6_3 + aux15_1 + 2'out6_7 + -1'aux15_6 + -1'aux13_0 + out3_1 + -1'aux13_4 + -1'aux13_5 + -1'aux13_6 + -1'out3_6 + -1'out4_0 + -1'out4_6 + 2'c17 + -1'out4_5 + -1'out4_4 + -1'out1_6 + out2_0 + out1_1 + 2'out2_7 + out2_5 + out2_6 + 2'out2_3 + out2_4 + 2'out2_1 + 2'out2_2 + -1'aux8_6 + aux6_1 + -1'aux12_6 + aux12_1 + aux11_3 + aux11_2 + aux11_1 + c11 + -1'aux7_6 + aux10_1 + aux11_7 + 2'aux5_1 + aux5_0 + aux5_5 + aux5_4 + aux9_7 + in4_7 + -1'aux10_6 + aux9_1 + aux9_2 + aux9_3 + 2'c16 + 2'c15 + 2'c14 + -2'c7 + -1'c8 + 4'c5 + -1'in1_1 + -2'in1_0 = 2
invariant :-1'aux16_1 + aux16_6 + aux16_7 + -1'aux14_1 + -1'aux14_2 + -1'aux14_3 + -1'out7_1 + out7_7 + out7_6 + -1'out8_1 + -1'out8_3 + -1'out8_2 + out5_2 + out5_0 + out5_5 + 2'out5_6 + out5_3 + out5_4 + -2'out6_1 + -2'out6_2 + 2'out5_7 + -1'out6_0 + -1'out6_6 + -1'out6_5 + -1'out6_4 + -2'out6_3 + -1'aux15_2 + -2'aux15_1 + -1'aux15_0 + -1'out6_7 + -1'aux15_5 + -1'aux15_4 + -1'aux15_3 + aux13_0 + aux13_7 + -1'out3_1 + aux13_4 + aux13_5 + aux13_6 + out3_6 + out3_7 + -1'out4_1 + -1'out4_3 + -1'out4_2 + out1_6 + out1_7 + -1'out1_1 + -1'out2_3 + -1'out2_1 + -1'out2_2 + aux8_7 + aux8_6 + -1'aux6_1 + aux12_6 + -1'aux12_1 + -1'aux11_3 + -1'aux11_2 + -1'aux11_1 + -1'c11 + aux12_7 + -1'aux10_1 + -1'aux5_1 + -1'aux7_3 + -1'aux7_2 + aux10_6 + aux10_7 + -1'aux9_1 + -1'aux9_2 + -1'aux9_3 + -2'c15 + -2'c14 + c8 + -1'in1_1 = -1
invariant :aux16_0 + aux16_1 + aux16_4 + -1'aux14_5 + out7_1 + out7_0 + out7_4 + -1'out8_5 + -1'out5_2 + -1'out5_5 + -1'out5_6 + -1'out5_3 + out6_1 + out6_2 + -1'out5_7 + out6_0 + out6_6 + out6_4 + out6_3 + aux15_1 + aux15_0 + out6_7 + aux15_4 + -1'aux13_5 + -1'out3_6 + -1'out3_7 + out4_0 + out4_1 + -1'out3_2 + -1'out3_3 + -1'out3_5 + out4_7 + out4_6 + out1_0 + out4_3 + out4_2 + out4_4 + out1_1 + out1_4 + -1'out2_5 + aux8_7 + aux8_3 + aux8_6 + -1'aux6_5 + aux8_2 + aux12_4 + aux12_1 + aux12_0 + -1'aux11_5 + -1'c11 + aux10_0 + aux10_1 + aux10_4 + -1'aux5_5 + -1'aux9_5 + in3_4 + 2'c7 + 2'c8 + -2'c5 + in1_1 + in1_0 = 1
invariant :aux16_1 + -1'aux16_6 + -2'aux16_7 + aux14_1 + aux14_2 + aux14_3 + -1'aux14_7 + out7_1 + -2'out7_7 + -1'out7_6 + out8_1 + out8_3 + out8_2 + -1'out8_7 + -1'out5_2 + -1'out5_0 + -1'out5_5 + -2'out5_6 + -1'out5_3 + -1'out5_4 + 2'out6_1 + 2'out6_2 + -3'out5_7 + out6_0 + out6_6 + out6_5 + out6_4 + 2'out6_3 + 2'aux15_2 + 3'aux15_1 + 2'aux15_0 + aux15_6 + 2'aux15_5 + 2'aux15_4 + 2'aux15_3 + -1'aux13_0 + -2'aux13_7 + out3_1 + -1'aux13_4 + -1'aux13_5 + -1'aux13_6 + -1'out3_6 + -2'out3_7 + out4_0 + 2'out4_1 + out4_6 + 2'c17 + 2'out4_3 + 2'out4_2 + out4_5 + out4_4 + -1'out1_6 + 3'out2_0 + -2'out1_7 + out1_1 + 2'out2_7 + 3'out2_5 + 3'out2_6 + 4'out2_3 + 3'out2_4 + 4'out2_1 + 4'out2_2 + -2'aux8_7 + -1'aux8_6 + aux6_1 + -1'aux12_6 + aux12_1 + aux11_3 + aux11_2 + aux11_1 + c11 + -2'aux12_7 + aux7_6 + 2'aux10_0 + 2'aux10_2 + 3'aux10_1 + 2'aux10_4 + 2'aux10_3 + -1'aux11_7 + 4'aux5_1 + 3'aux5_0 + 3'aux5_5 + 3'aux5_4 + 2'aux7_3 + 2'aux7_2 + -1'aux9_7 + -1'in4_7 + 2'aux10_5 + aux10_6 + -4'c9 + aux9_1 + aux9_2 + aux9_3 + 2'c15 + 2'c14 + -2'c7 + -5'c8 + 8'c5 + -1'in1_1 + -2'in1_0 = 4
invariant :out5_1 + out5_2 + out5_0 + out5_5 + out5_6 + out5_3 + out5_4 + -1'out6_1 + -1'out6_2 + out5_7 + -1'out6_0 + -1'out6_6 + -1'out6_5 + -1'out6_4 + -1'out6_3 + -1'out6_7 = 0
invariant :aux16_1 + aux14_1 + out7_1 + out8_1 + -1'out5_2 + -1'out5_0 + -1'out5_5 + -1'out5_6 + -1'out5_3 + -1'out5_4 + 2'out6_1 + out6_2 + -1'out5_7 + out6_0 + out6_6 + out6_5 + out6_4 + out6_3 + aux15_1 + out6_7 + aux13_1 + out3_1 + out4_1 + out1_1 + out2_1 + aux6_1 + aux12_1 + aux11_1 + aux10_1 + aux5_1 + aux9_1 + in1_1 = 1
invariant :aux16_0 + aux14_0 + out7_0 + out8_0 + out5_0 + out6_0 + aux15_0 + aux13_0 + -1'out3_1 + -1'out3_6 + -1'out3_7 + 2'out4_0 + out4_1 + -1'out3_2 + -1'out3_3 + -1'out3_4 + -1'out3_5 + out4_7 + out4_6 + out1_0 + out4_3 + out4_2 + out4_5 + out4_4 + out2_0 + aux8_7 + aux8_3 + aux8_6 + -1'aux6_5 + aux8_2 + -1'aux6_1 + -1'aux6_4 + aux12_0 + aux11_0 + aux10_0 + aux5_0 + aux9_0 + 2'c7 + 2'c8 + in1_0 = 1
invariant :c110 + -1'aux5_1 + -1'aux5_0 + -1'aux5_5 + -1'aux5_4 + 2'c9 + 2'c7 + 2'c8 + -4'c5 + 2'in1_1 + 2'in1_0 = 0
invariant :out3_0 + out3_1 + out3_6 + out3_7 + -1'out4_0 + -1'out4_1 + out3_2 + out3_3 + out3_4 + out3_5 + -1'out4_7 + -1'out4_6 + -1'out4_3 + -1'out4_2 + -1'out4_5 + -1'out4_4 = 0
invariant :aux16_1 + aux14_1 + aux14_2 + aux14_3 + aux14_6 + aux14_7 + out7_1 + out8_1 + out8_3 + out8_2 + out8_6 + out8_7 + -1'out5_2 + -1'out5_0 + -1'out5_5 + -1'out5_6 + -1'out5_3 + -1'out5_4 + 2'out6_1 + 2'out6_2 + -1'out5_7 + out6_0 + 2'out6_6 + out6_5 + out6_4 + 2'out6_3 + aux15_1 + 2'out6_7 + -1'aux13_0 + out3_1 + -1'aux13_4 + -1'aux13_5 + -1'out4_0 + -1'out4_5 + -1'out4_4 + -1'out2_0 + out1_1 + -1'out2_5 + -1'out2_4 + aux6_1 + aux12_1 + aux11_3 + aux11_2 + aux11_1 + c11 + aux10_1 + aux11_7 + aux11_6 + 2'aux5_1 + aux5_0 + aux5_5 + aux5_4 + -1'aux9_4 + -1'aux9_5 + -2'c9 + -1'aux9_0 + c14 + -2'c7 + -2'c8 + 4'c5 + -1'in1_1 + -2'in1_0 = 1
invariant :aux16_2 + aux16_3 + aux16_6 + aux16_7 + out7_3 + out7_2 + out7_7 + out7_6 + out5_2 + out5_6 + out5_3 + out5_7 + -1'aux15_1 + -1'aux15_0 + -1'aux15_5 + -1'aux15_4 + out3_6 + out3_7 + -1'out4_0 + -1'out4_1 + out3_2 + out3_3 + -1'out4_7 + -1'out4_6 + -2'c17 + -1'out4_3 + -1'out4_2 + -1'out4_5 + -1'out4_4 + out1_6 + -3'out2_0 + out1_7 + out1_2 + out1_3 + -3'out2_7 + -3'out2_5 + -3'out2_6 + -3'out2_3 + -3'out2_4 + -3'out2_1 + -3'out2_2 + -1'aux8_7 + -1'aux8_3 + -1'aux8_6 + -1'aux8_2 + -1'aux12_5 + -1'aux12_4 + -1'aux12_1 + -1'aux12_0 + c11 + -1'aux10_0 + -1'aux10_1 + -1'aux10_4 + -1'aux10_5 + -2'c7 + -2'c8 + 2'c5 + -2'in1_1 + -2'in1_0 = -2
invariant :aux16_1 + -1'aux16_6 + aux14_1 + aux14_2 + aux14_3 + aux14_7 + out7_1 + -1'out7_6 + out8_1 + out8_3 + out8_2 + out8_7 + -1'out5_2 + -1'out5_0 + -1'out5_5 + -2'out5_6 + -1'out5_3 + -1'out5_4 + 2'out6_1 + 2'out6_2 + -1'out5_7 + out6_0 + out6_6 + out6_5 + out6_4 + 2'out6_3 + aux15_2 + 2'aux15_1 + aux15_0 + 2'out6_7 + aux15_5 + aux15_4 + aux15_3 + -1'aux13_0 + aux15_7 + out3_1 + -1'aux13_4 + -1'aux13_5 + -1'aux13_6 + -1'out3_6 + out4_1 + out4_7 + out4_3 + out4_2 + -1'out1_6 + out1_1 + out2_7 + out2_3 + out2_1 + out2_2 + -1'aux8_6 + aux6_1 + -1'aux12_6 + aux12_1 + aux11_3 + aux11_2 + aux11_1 + c11 + -1'aux7_6 + aux10_1 + aux11_7 + 2'aux5_1 + aux5_0 + aux5_5 + aux5_4 + aux9_7 + in4_7 + -1'aux10_6 + aux9_1 + aux9_2 + aux9_3 + 2'c15 + 2'c14 + -2'c7 + -1'c8 + 4'c5 + -1'in1_1 + -2'in1_0 = 2
invariant :in3_5 + in3_4 + -1'in1_1 + -1'in1_0 = 0
invariant :aux16_5 + aux14_5 + -1'out7_1 + -1'out7_0 + -1'out7_3 + -1'out7_2 + -1'out7_4 + -1'out7_7 + -1'out7_6 + out8_1 + out8_0 + out8_3 + out8_2 + out8_6 + out8_7 + out8_4 + 2'out8_5 + out5_5 + out6_5 + aux15_5 + aux13_5 + out3_5 + -1'out1_0 + out4_5 + -1'out1_6 + out2_0 + -1'out1_7 + -1'out1_2 + -1'out1_1 + -1'out1_4 + -1'out1_3 + out2_7 + 2'out2_5 + out2_6 + out2_3 + out2_4 + out2_1 + out2_2 + aux6_5 + aux12_5 + aux11_5 + aux5_5 + aux9_5 + aux10_5 + -1'in3_4 + in1_1 + in1_0 = 1
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
// Phase 1: matrix 592 rows 168 cols
invariant :out1_0 + out1_6 + out1_5 + -1'out2_0 + out1_7 + out1_2 + out1_1 + out1_4 + out1_3 + -1'out2_7 + -1'out2_5 + -1'out2_6 + -1'out2_3 + -1'out2_4 + -1'out2_1 + -1'out2_2 = 0
invariant :aux7_7 + aux7_6 + -1'aux5_1 + -1'aux5_0 + -1'aux5_5 + -1'aux5_4 + aux7_3 + aux7_2 + 2'c7 + -4'c5 + 2'in1_1 + 2'in1_0 = 0
invariant :aux6_0 + -1'aux8_7 + -1'aux8_3 + -1'aux8_6 + aux6_5 + -1'aux8_2 + aux6_1 + aux6_4 + -2'c7 + -2'c8 = 0
invariant :-1'aux16_3 + -1'aux16_6 + aux14_2 + aux14_7 + -1'out7_3 + -1'out7_6 + out8_2 + out8_7 + -1'out5_6 + -1'out5_3 + out6_2 + out6_7 + -1'aux15_6 + -1'aux15_3 + aux13_2 + aux13_7 + -1'out3_6 + -1'out3_3 + out4_7 + out4_2 + -1'out1_6 + -1'out1_3 + out2_7 + out2_2 + -1'aux8_3 + -1'aux8_6 + -1'aux12_6 + -1'aux12_3 + aux11_2 + c11 + -1'aux7_6 + -1'aux10_3 + aux11_7 + aux5_1 + aux5_0 + aux5_5 + aux5_4 + -1'aux7_3 + aux9_7 + in4_7 + -1'in2_3 + -1'aux10_6 + aux9_2 + -2'c7 + -1'c8 + 4'c5 + -2'in1_1 + -2'in1_0 = 0
invariant :c18 + out4_0 + out4_1 + out4_7 + out4_6 + out4_3 + out4_2 + out4_5 + out4_4 + -1'out2_0 + -1'out2_7 + -1'out2_5 + -1'out2_6 + -1'out2_3 + -1'out2_4 + -1'out2_1 + -1'out2_2 = 0
invariant :aux16_3 + aux14_3 + out7_3 + out8_3 + out5_3 + out6_3 + aux15_3 + aux13_3 + out3_3 + out4_3 + out1_3 + out2_3 + aux8_3 + aux12_3 + aux11_3 + aux10_3 + aux7_3 + in2_3 + aux9_3 = 1
invariant :in4_6 + in4_7 + -2'c7 + -1'c8 + 2'c5 + -2'in1_1 + -2'in1_0 = 0
invariant :2'c5 + c6 + -1'in1_1 + -1'in1_0 = 0
invariant :-1'aux8_7 + c12 + -1'aux8_3 + -1'aux8_6 + -1'aux8_2 + 2'c11 + 2'aux5_1 + 2'aux5_0 + 2'aux5_5 + 2'aux5_4 + -2'c9 + -4'c7 + -4'c8 + 8'c5 + -4'in1_1 + -4'in1_0 = 0
invariant :in2_2 + in2_3 + -2'c7 + -1'c8 + 2'c5 + -2'in1_1 + -2'in1_0 = 0
invariant :out7_1 + out7_0 + out7_3 + out7_2 + out7_5 + out7_4 + out7_7 + out7_6 + -1'out8_1 + -1'out8_0 + -1'out8_3 + -1'out8_2 + -1'out8_6 + -1'out8_7 + -1'out8_4 + -1'out8_5 = 0
invariant :-1'aux16_1 + aux16_6 + -1'aux14_1 + -1'aux14_2 + -1'aux14_3 + -1'aux14_7 + -1'out7_1 + out7_6 + -1'out8_1 + -1'out8_3 + -1'out8_2 + -1'out8_7 + out5_2 + out5_0 + out5_5 + 2'out5_6 + out5_3 + out5_4 + -2'out6_1 + -2'out6_2 + out5_7 + -1'out6_0 + -1'out6_6 + -1'out6_5 + -1'out6_4 + -2'out6_3 + -1'aux15_1 + -2'out6_7 + aux15_6 + aux13_0 + -1'out3_1 + aux13_4 + aux13_5 + aux13_6 + out3_6 + out4_0 + out4_6 + 2'c17 + out4_5 + out4_4 + out1_6 + 3'out2_0 + -1'out1_1 + 2'out2_7 + 3'out2_5 + 3'out2_6 + 2'out2_3 + 3'out2_4 + 2'out2_1 + 2'out2_2 + 4'aux8_7 + 4'aux8_3 + 5'aux8_6 + 4'aux8_2 + -1'aux6_1 + 3'aux12_6 + 2'aux12_5 + 2'aux12_4 + 2'aux12_3 + 2'aux12_2 + aux12_1 + 2'aux12_0 + -1'aux11_3 + -1'aux11_2 + -1'aux11_1 + -5'c11 + 2'aux12_7 + aux7_6 + -1'aux10_1 + -1'aux11_7 + -6'aux5_1 + -5'aux5_0 + -5'aux5_5 + -5'aux5_4 + -1'aux9_7 + -1'in4_7 + aux10_6 + 4'c9 + -1'aux9_1 + -1'aux9_2 + -1'aux9_3 + -2'c15 + -2'c14 + 14'c7 + 13'c8 + -24'c5 + 13'in1_1 + 14'in1_0 = 2
invariant :-1'aux16_1 + aux16_6 + -1'aux14_1 + -1'aux14_2 + -1'aux14_3 + -1'aux14_7 + -1'out7_1 + out7_6 + -1'out8_1 + -1'out8_3 + -1'out8_2 + -1'out8_7 + out5_2 + out5_0 + out5_5 + 2'out5_6 + out5_3 + out5_4 + -2'out6_1 + -2'out6_2 + out5_7 + -1'out6_0 + -1'out6_6 + -1'out6_5 + -1'out6_4 + -2'out6_3 + -1'aux15_1 + -2'out6_7 + aux15_6 + aux13_0 + -1'out3_1 + aux13_4 + aux13_5 + aux13_6 + out3_6 + out4_0 + out4_6 + out4_5 + out4_4 + out1_6 + out2_0 + -1'out1_1 + out2_5 + out2_6 + out2_4 + 2'aux8_7 + 2'aux8_3 + 3'aux8_6 + 2'aux8_2 + -1'aux6_1 + aux12_6 + -1'aux12_1 + 2'c13 + -1'aux11_3 + -1'aux11_2 + -1'aux11_1 + -3'c11 + aux7_6 + -1'aux10_1 + -1'aux11_7 + -4'aux5_1 + -3'aux5_0 + -3'aux5_5 + -3'aux5_4 + -1'aux9_7 + -1'in4_7 + aux10_6 + 2'c9 + -1'aux9_1 + -1'aux9_2 + -1'aux9_3 + 8'c7 + 7'c8 + -14'c5 + 7'in1_1 + 8'in1_0 = 0
invariant :c19 + out6_1 + out6_2 + out6_0 + out6_6 + out6_5 + out6_4 + out6_3 + out6_7 + -1'out4_0 + -1'out4_1 + -1'out4_7 + -1'out4_6 + -1'out4_3 + -1'out4_2 + -1'out4_5 + -1'out4_4 = 0
invariant :-1'aux16_1 + aux16_6 + -1'aux14_1 + -1'aux14_2 + -1'aux14_3 + -1'aux14_7 + -1'out7_1 + out7_6 + -1'out8_1 + -1'out8_3 + -1'out8_2 + -1'out8_7 + out5_2 + out5_0 + out5_5 + 2'out5_6 + out5_3 + out5_4 + -2'out6_1 + -2'out6_2 + out5_7 + -1'out6_0 + -1'out6_6 + -1'out6_5 + -1'out6_4 + -2'out6_3 + -1'aux15_1 + -2'out6_7 + aux15_6 + aux13_0 + -1'out3_1 + aux13_4 + aux13_5 + aux13_6 + out3_6 + out4_0 + out4_6 + out4_5 + out4_4 + out1_6 + out2_0 + -1'out1_1 + out2_5 + out2_6 + out2_4 + aux8_6 + -1'aux6_1 + aux12_6 + -1'aux12_1 + -1'aux11_3 + -1'aux11_2 + -1'aux11_1 + -1'c11 + aux7_6 + -1'aux10_1 + -1'aux11_7 + -2'aux5_1 + -1'aux5_0 + -1'aux5_5 + -1'aux5_4 + aux9_4 + aux9_5 + aux9_6 + -1'in4_7 + aux10_6 + 2'c9 + aux9_0 + -1'c14 + 4'c7 + 3'c8 + -6'c5 + 3'in1_1 + 4'in1_0 = 0
invariant :c20 + out8_1 + out8_0 + out8_3 + out8_2 + out8_6 + out8_7 + out8_4 + out8_5 + -1'out6_1 + -1'out6_2 + -1'out6_0 + -1'out6_6 + -1'out6_5 + -1'out6_4 + -1'out6_3 + -1'out6_7 = 0
invariant :-1'aux16_0 + aux16_1 + -1'aux16_6 + 2'aux14_1 + 2'aux14_2 + 2'aux14_3 + aux14_4 + aux14_6 + aux14_5 + 2'aux14_7 + out7_1 + -1'out7_0 + -1'out7_6 + 2'out8_1 + 2'out8_3 + 2'out8_2 + out8_6 + 2'out8_7 + out8_4 + out8_5 + -1'out5_2 + -2'out5_0 + -1'out5_5 + -2'out5_6 + -1'out5_3 + -1'out5_4 + 3'out6_1 + 3'out6_2 + -1'out5_7 + out6_0 + 2'out6_6 + 2'out6_5 + 2'out6_4 + 3'out6_3 + aux15_1 + -1'aux15_0 + 3'out6_7 + -1'aux15_6 + -2'aux13_0 + 2'out3_1 + -1'aux13_4 + -1'aux13_5 + -1'aux13_6 + out3_7 + -3'out4_0 + -1'out4_1 + out3_2 + out3_3 + out3_4 + out3_5 + -1'out4_7 + -2'out4_6 + -1'out1_0 + -1'out4_3 + -1'out4_2 + -2'out4_5 + -2'out4_4 + -1'out1_6 + -2'out2_0 + out1_1 + -1'out2_5 + -1'out2_6 + -1'out2_4 + -1'aux8_7 + -1'aux8_3 + -2'aux8_6 + aux6_5 + -1'aux8_2 + 2'aux6_1 + aux6_4 + -1'aux12_6 + aux12_1 + -1'aux12_0 + aux11_3 + aux11_2 + aux11_1 + -1'aux11_0 + c11 + -1'aux7_6 + -1'aux10_0 + aux10_1 + aux11_7 + 2'aux5_1 + aux5_5 + aux5_4 + aux9_7 + in4_7 + -1'aux10_6 + -1'aux9_0 + aux9_1 + aux9_2 + aux9_3 + 2'c14 + -4'c7 + -3'c8 + 4'c5 + -1'in1_1 + -3'in1_0 = 1
invariant :-2'aux16_1 + aux16_6 + -2'aux14_1 + -2'aux14_2 + -2'aux14_3 + -1'aux14_6 + -2'aux14_7 + -2'out7_1 + out7_6 + -2'out8_1 + -2'out8_3 + -2'out8_2 + -1'out8_6 + -2'out8_7 + 2'out5_2 + 2'out5_0 + 2'out5_5 + 3'out5_6 + 2'out5_3 + 2'out5_4 + -4'out6_1 + -4'out6_2 + 2'out5_7 + -2'out6_0 + -3'out6_6 + -2'out6_5 + -2'out6_4 + -4'out6_3 + -2'aux15_1 + -4'out6_7 + aux15_6 + 2'aux13_0 + -2'out3_1 + 2'aux13_4 + 2'aux13_5 + aux13_6 + out3_6 + 2'out4_0 + out4_6 + 2'out4_5 + 2'out4_4 + out1_6 + 2'out2_0 + -2'out1_1 + 2'out2_5 + out2_6 + 2'out2_4 + aux8_6 + -2'aux6_1 + aux12_6 + -2'aux12_1 + aux11_5 + aux11_4 + -1'aux11_3 + -1'aux11_2 + -1'aux11_1 + aux11_0 + aux7_6 + -2'aux10_1 + -1'aux11_7 + -2'aux5_1 + aux9_4 + aux9_5 + -1'aux9_7 + -1'in4_7 + aux10_6 + aux9_0 + -1'aux9_1 + -1'aux9_2 + -1'aux9_3 + -2'c14 + 2'c7 + c8 + -2'c5 + 2'in1_0 = -1
invariant :aux16_1 + -1'aux16_6 + aux14_1 + aux14_2 + aux14_3 + aux14_7 + out7_1 + -1'out7_6 + out8_1 + out8_3 + out8_2 + out8_7 + -1'out5_2 + -1'out5_0 + -1'out5_5 + -2'out5_6 + -1'out5_3 + -1'out5_4 + 2'out6_1 + 2'out6_2 + -1'out5_7 + out6_0 + out6_6 + out6_5 + out6_4 + 2'out6_3 + aux15_1 + 2'out6_7 + -1'aux15_6 + -1'aux13_0 + out3_1 + -1'aux13_4 + -1'aux13_5 + -1'aux13_6 + -1'out3_6 + -1'out4_0 + -1'out4_6 + 2'c17 + -1'out4_5 + -1'out4_4 + -1'out1_6 + out2_0 + out1_1 + 2'out2_7 + out2_5 + out2_6 + 2'out2_3 + out2_4 + 2'out2_1 + 2'out2_2 + -1'aux8_6 + aux6_1 + -1'aux12_6 + aux12_1 + aux11_3 + aux11_2 + aux11_1 + c11 + -1'aux7_6 + aux10_1 + aux11_7 + 2'aux5_1 + aux5_0 + aux5_5 + aux5_4 + aux9_7 + in4_7 + -1'aux10_6 + aux9_1 + aux9_2 + aux9_3 + 2'c16 + 2'c15 + 2'c14 + -2'c7 + -1'c8 + 4'c5 + -1'in1_1 + -2'in1_0 = 2
invariant :-1'aux16_1 + aux16_6 + aux16_7 + -1'aux14_1 + -1'aux14_2 + -1'aux14_3 + -1'out7_1 + out7_7 + out7_6 + -1'out8_1 + -1'out8_3 + -1'out8_2 + out5_2 + out5_0 + out5_5 + 2'out5_6 + out5_3 + out5_4 + -2'out6_1 + -2'out6_2 + 2'out5_7 + -1'out6_0 + -1'out6_6 + -1'out6_5 + -1'out6_4 + -2'out6_3 + -1'aux15_2 + -2'aux15_1 + -1'aux15_0 + -1'out6_7 + -1'aux15_5 + -1'aux15_4 + -1'aux15_3 + aux13_0 + aux13_7 + -1'out3_1 + aux13_4 + aux13_5 + aux13_6 + out3_6 + out3_7 + -1'out4_1 + -1'out4_3 + -1'out4_2 + out1_6 + out1_7 + -1'out1_1 + -1'out2_3 + -1'out2_1 + -1'out2_2 + aux8_7 + aux8_6 + -1'aux6_1 + aux12_6 + -1'aux12_1 + -1'aux11_3 + -1'aux11_2 + -1'aux11_1 + -1'c11 + aux12_7 + -1'aux10_1 + -1'aux5_1 + -1'aux7_3 + -1'aux7_2 + aux10_6 + aux10_7 + -1'aux9_1 + -1'aux9_2 + -1'aux9_3 + -2'c15 + -2'c14 + c8 + -1'in1_1 = -1
invariant :aux16_0 + aux16_1 + aux16_4 + -1'aux14_5 + out7_1 + out7_0 + out7_4 + -1'out8_5 + -1'out5_2 + -1'out5_5 + -1'out5_6 + -1'out5_3 + out6_1 + out6_2 + -1'out5_7 + out6_0 + out6_6 + out6_4 + out6_3 + aux15_1 + aux15_0 + out6_7 + aux15_4 + -1'aux13_5 + -1'out3_6 + -1'out3_7 + out4_0 + out4_1 + -1'out3_2 + -1'out3_3 + -1'out3_5 + out4_7 + out4_6 + out1_0 + out4_3 + out4_2 + out4_4 + out1_1 + out1_4 + -1'out2_5 + aux8_7 + aux8_3 + aux8_6 + -1'aux6_5 + aux8_2 + aux12_4 + aux12_1 + aux12_0 + -1'aux11_5 + -1'c11 + aux10_0 + aux10_1 + aux10_4 + -1'aux5_5 + -1'aux9_5 + in3_4 + 2'c7 + 2'c8 + -2'c5 + in1_1 + in1_0 = 1
invariant :aux16_1 + -1'aux16_6 + -2'aux16_7 + aux14_1 + aux14_2 + aux14_3 + -1'aux14_7 + out7_1 + -2'out7_7 + -1'out7_6 + out8_1 + out8_3 + out8_2 + -1'out8_7 + -1'out5_2 + -1'out5_0 + -1'out5_5 + -2'out5_6 + -1'out5_3 + -1'out5_4 + 2'out6_1 + 2'out6_2 + -3'out5_7 + out6_0 + out6_6 + out6_5 + out6_4 + 2'out6_3 + 2'aux15_2 + 3'aux15_1 + 2'aux15_0 + aux15_6 + 2'aux15_5 + 2'aux15_4 + 2'aux15_3 + -1'aux13_0 + -2'aux13_7 + out3_1 + -1'aux13_4 + -1'aux13_5 + -1'aux13_6 + -1'out3_6 + -2'out3_7 + out4_0 + 2'out4_1 + out4_6 + 2'c17 + 2'out4_3 + 2'out4_2 + out4_5 + out4_4 + -1'out1_6 + 3'out2_0 + -2'out1_7 + out1_1 + 2'out2_7 + 3'out2_5 + 3'out2_6 + 4'out2_3 + 3'out2_4 + 4'out2_1 + 4'out2_2 + -2'aux8_7 + -1'aux8_6 + aux6_1 + -1'aux12_6 + aux12_1 + aux11_3 + aux11_2 + aux11_1 + c11 + -2'aux12_7 + aux7_6 + 2'aux10_0 + 2'aux10_2 + 3'aux10_1 + 2'aux10_4 + 2'aux10_3 + -1'aux11_7 + 4'aux5_1 + 3'aux5_0 + 3'aux5_5 + 3'aux5_4 + 2'aux7_3 + 2'aux7_2 + -1'aux9_7 + -1'in4_7 + 2'aux10_5 + aux10_6 + -4'c9 + aux9_1 + aux9_2 + aux9_3 + 2'c15 + 2'c14 + -2'c7 + -5'c8 + 8'c5 + -1'in1_1 + -2'in1_0 = 4
invariant :out5_1 + out5_2 + out5_0 + out5_5 + out5_6 + out5_3 + out5_4 + -1'out6_1 + -1'out6_2 + out5_7 + -1'out6_0 + -1'out6_6 + -1'out6_5 + -1'out6_4 + -1'out6_3 + -1'out6_7 = 0
invariant :aux16_1 + aux14_1 + out7_1 + out8_1 + -1'out5_2 + -1'out5_0 + -1'out5_5 + -1'out5_6 + -1'out5_3 + -1'out5_4 + 2'out6_1 + out6_2 + -1'out5_7 + out6_0 + out6_6 + out6_5 + out6_4 + out6_3 + aux15_1 + out6_7 + aux13_1 + out3_1 + out4_1 + out1_1 + out2_1 + aux6_1 + aux12_1 + aux11_1 + aux10_1 + aux5_1 + aux9_1 + in1_1 = 1
invariant :aux16_0 + aux14_0 + out7_0 + out8_0 + out5_0 + out6_0 + aux15_0 + aux13_0 + -1'out3_1 + -1'out3_6 + -1'out3_7 + 2'out4_0 + out4_1 + -1'out3_2 + -1'out3_3 + -1'out3_4 + -1'out3_5 + out4_7 + out4_6 + out1_0 + out4_3 + out4_2 + out4_5 + out4_4 + out2_0 + aux8_7 + aux8_3 + aux8_6 + -1'aux6_5 + aux8_2 + -1'aux6_1 + -1'aux6_4 + aux12_0 + aux11_0 + aux10_0 + aux5_0 + aux9_0 + 2'c7 + 2'c8 + in1_0 = 1
invariant :c110 + -1'aux5_1 + -1'aux5_0 + -1'aux5_5 + -1'aux5_4 + 2'c9 + 2'c7 + 2'c8 + -4'c5 + 2'in1_1 + 2'in1_0 = 0
invariant :out3_0 + out3_1 + out3_6 + out3_7 + -1'out4_0 + -1'out4_1 + out3_2 + out3_3 + out3_4 + out3_5 + -1'out4_7 + -1'out4_6 + -1'out4_3 + -1'out4_2 + -1'out4_5 + -1'out4_4 = 0
invariant :aux16_1 + aux14_1 + aux14_2 + aux14_3 + aux14_6 + aux14_7 + out7_1 + out8_1 + out8_3 + out8_2 + out8_6 + out8_7 + -1'out5_2 + -1'out5_0 + -1'out5_5 + -1'out5_6 + -1'out5_3 + -1'out5_4 + 2'out6_1 + 2'out6_2 + -1'out5_7 + out6_0 + 2'out6_6 + out6_5 + out6_4 + 2'out6_3 + aux15_1 + 2'out6_7 + -1'aux13_0 + out3_1 + -1'aux13_4 + -1'aux13_5 + -1'out4_0 + -1'out4_5 + -1'out4_4 + -1'out2_0 + out1_1 + -1'out2_5 + -1'out2_4 + aux6_1 + aux12_1 + aux11_3 + aux11_2 + aux11_1 + c11 + aux10_1 + aux11_7 + aux11_6 + 2'aux5_1 + aux5_0 + aux5_5 + aux5_4 + -1'aux9_4 + -1'aux9_5 + -2'c9 + -1'aux9_0 + c14 + -2'c7 + -2'c8 + 4'c5 + -1'in1_1 + -2'in1_0 = 1
invariant :aux16_2 + aux16_3 + aux16_6 + aux16_7 + out7_3 + out7_2 + out7_7 + out7_6 + out5_2 + out5_6 + out5_3 + out5_7 + -1'aux15_1 + -1'aux15_0 + -1'aux15_5 + -1'aux15_4 + out3_6 + out3_7 + -1'out4_0 + -1'out4_1 + out3_2 + out3_3 + -1'out4_7 + -1'out4_6 + -2'c17 + -1'out4_3 + -1'out4_2 + -1'out4_5 + -1'out4_4 + out1_6 + -3'out2_0 + out1_7 + out1_2 + out1_3 + -3'out2_7 + -3'out2_5 + -3'out2_6 + -3'out2_3 + -3'out2_4 + -3'out2_1 + -3'out2_2 + -1'aux8_7 + -1'aux8_3 + -1'aux8_6 + -1'aux8_2 + -1'aux12_5 + -1'aux12_4 + -1'aux12_1 + -1'aux12_0 + c11 + -1'aux10_0 + -1'aux10_1 + -1'aux10_4 + -1'aux10_5 + -2'c7 + -2'c8 + 2'c5 + -2'in1_1 + -2'in1_0 = -2
invariant :aux16_1 + -1'aux16_6 + aux14_1 + aux14_2 + aux14_3 + aux14_7 + out7_1 + -1'out7_6 + out8_1 + out8_3 + out8_2 + out8_7 + -1'out5_2 + -1'out5_0 + -1'out5_5 + -2'out5_6 + -1'out5_3 + -1'out5_4 + 2'out6_1 + 2'out6_2 + -1'out5_7 + out6_0 + out6_6 + out6_5 + out6_4 + 2'out6_3 + aux15_2 + 2'aux15_1 + aux15_0 + 2'out6_7 + aux15_5 + aux15_4 + aux15_3 + -1'aux13_0 + aux15_7 + out3_1 + -1'aux13_4 + -1'aux13_5 + -1'aux13_6 + -1'out3_6 + out4_1 + out4_7 + out4_3 + out4_2 + -1'out1_6 + out1_1 + out2_7 + out2_3 + out2_1 + out2_2 + -1'aux8_6 + aux6_1 + -1'aux12_6 + aux12_1 + aux11_3 + aux11_2 + aux11_1 + c11 + -1'aux7_6 + aux10_1 + aux11_7 + 2'aux5_1 + aux5_0 + aux5_5 + aux5_4 + aux9_7 + in4_7 + -1'aux10_6 + aux9_1 + aux9_2 + aux9_3 + 2'c15 + 2'c14 + -2'c7 + -1'c8 + 4'c5 + -1'in1_1 + -2'in1_0 = 2
invariant :in3_5 + in3_4 + -1'in1_1 + -1'in1_0 = 0
invariant :aux16_5 + aux14_5 + -1'out7_1 + -1'out7_0 + -1'out7_3 + -1'out7_2 + -1'out7_4 + -1'out7_7 + -1'out7_6 + out8_1 + out8_0 + out8_3 + out8_2 + out8_6 + out8_7 + out8_4 + 2'out8_5 + out5_5 + out6_5 + aux15_5 + aux13_5 + out3_5 + -1'out1_0 + out4_5 + -1'out1_6 + out2_0 + -1'out1_7 + -1'out1_2 + -1'out1_1 + -1'out1_4 + -1'out1_3 + out2_7 + 2'out2_5 + out2_6 + out2_3 + out2_4 + out2_1 + out2_2 + aux6_5 + aux12_5 + aux11_5 + aux5_5 + aux9_5 + aux10_5 + -1'in3_4 + in1_1 + in1_0 = 1
FORMULA PermAdmissibility-PT-01-ReachabilityCardinality-00 TRUE TECHNIQUES SAT_SMT K_INDUCTION(0)
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
PermAdmissibility\_PT\_01\_flat\_flat,52537,12.0627,230796,2,49937,5,147174,6,0,1098,59698,0
Total reachable state count : 52537
Verifying 16 reachability properties.
Invariant property PermAdmissibility-PT-01-ReachabilityCardinality-00 is true.
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
PermAdmissibility-PT-01-ReachabilityCardinality-00,0,12.1224,231064,1,0,5,147174,7,0,1132,59698,0
Invariant property PermAdmissibility-PT-01-ReachabilityCardinality-01 does not hold.
FORMULA PermAdmissibility-PT-01-ReachabilityCardinality-01 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
PermAdmissibility-PT-01-ReachabilityCardinality-01,1,12.1511,231168,2,169,6,147174,8,0,1189,59698,0
Invariant property PermAdmissibility-PT-01-ReachabilityCardinality-02 is true.
FORMULA PermAdmissibility-PT-01-ReachabilityCardinality-02 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
PermAdmissibility-PT-01-ReachabilityCardinality-02,0,12.2119,231168,1,0,6,147174,9,0,1218,59698,0
Invariant property PermAdmissibility-PT-01-ReachabilityCardinality-03 does not hold.
FORMULA PermAdmissibility-PT-01-ReachabilityCardinality-03 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
PermAdmissibility-PT-01-ReachabilityCardinality-03,1,12.2294,231168,2,169,6,147174,10,0,1230,59698,0
Invariant property PermAdmissibility-PT-01-ReachabilityCardinality-04 does not hold.
FORMULA PermAdmissibility-PT-01-ReachabilityCardinality-04 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
PermAdmissibility-PT-01-ReachabilityCardinality-04,16,12.2823,231168,2,424,7,147174,11,0,1320,59698,0
Invariant property PermAdmissibility-PT-01-ReachabilityCardinality-05 is true.
FORMULA PermAdmissibility-PT-01-ReachabilityCardinality-05 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
PermAdmissibility-PT-01-ReachabilityCardinality-05,0,12.3173,231168,1,0,7,147174,12,0,1334,59698,0
Reachability property PermAdmissibility-PT-01-ReachabilityCardinality-06 is true.
FORMULA PermAdmissibility-PT-01-ReachabilityCardinality-06 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
PermAdmissibility-PT-01-ReachabilityCardinality-06,36,12.3263,231168,2,1064,8,147174,13,0,1339,59698,0
Reachability property PermAdmissibility-PT-01-ReachabilityCardinality-07 is true.
FORMULA PermAdmissibility-PT-01-ReachabilityCardinality-07 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
PermAdmissibility-PT-01-ReachabilityCardinality-07,1,12.3773,231168,2,169,9,147174,14,0,1412,59698,0
Reachability property PermAdmissibility-PT-01-ReachabilityCardinality-08 does not hold.
FORMULA PermAdmissibility-PT-01-ReachabilityCardinality-08 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING
No reachable states exhibit your property : PermAdmissibility-PT-01-ReachabilityCardinality-08
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
PermAdmissibility-PT-01-ReachabilityCardinality-08,0,12.4454,231168,1,0,9,147174,15,0,1421,59698,0
Reachability property PermAdmissibility-PT-01-ReachabilityCardinality-09 is true.
FORMULA PermAdmissibility-PT-01-ReachabilityCardinality-09 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
PermAdmissibility-PT-01-ReachabilityCardinality-09,5256,12.4856,231168,2,9863,10,147174,16,0,1427,59698,0
Reachability property PermAdmissibility-PT-01-ReachabilityCardinality-10 does not hold.
FORMULA PermAdmissibility-PT-01-ReachabilityCardinality-10 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING
No reachable states exhibit your property : PermAdmissibility-PT-01-ReachabilityCardinality-10
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
PermAdmissibility-PT-01-ReachabilityCardinality-10,0,12.5243,231168,1,0,10,147174,17,0,1428,59698,0
Invariant property PermAdmissibility-PT-01-ReachabilityCardinality-11 is true.
FORMULA PermAdmissibility-PT-01-ReachabilityCardinality-11 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
PermAdmissibility-PT-01-ReachabilityCardinality-11,0,12.5859,231168,1,0,10,147174,18,0,1442,59698,0
Reachability property PermAdmissibility-PT-01-ReachabilityCardinality-12 does not hold.
FORMULA PermAdmissibility-PT-01-ReachabilityCardinality-12 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING
No reachable states exhibit your property : PermAdmissibility-PT-01-ReachabilityCardinality-12
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
PermAdmissibility-PT-01-ReachabilityCardinality-12,0,12.6333,231168,1,0,10,147174,19,0,1453,59698,0
Reachability property PermAdmissibility-PT-01-ReachabilityCardinality-13 does not hold.
FORMULA PermAdmissibility-PT-01-ReachabilityCardinality-13 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING
No reachable states exhibit your property : PermAdmissibility-PT-01-ReachabilityCardinality-13
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
PermAdmissibility-PT-01-ReachabilityCardinality-13,0,12.744,231168,1,0,10,147174,20,0,1458,59698,0
Reachability property PermAdmissibility-PT-01-ReachabilityCardinality-14 does not hold.
FORMULA PermAdmissibility-PT-01-ReachabilityCardinality-14 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING
No reachable states exhibit your property : PermAdmissibility-PT-01-ReachabilityCardinality-14
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
PermAdmissibility-PT-01-ReachabilityCardinality-14,0,12.7639,231168,1,0,10,147174,21,0,1459,59698,0
Invariant property PermAdmissibility-PT-01-ReachabilityCardinality-15 does not hold.
FORMULA PermAdmissibility-PT-01-ReachabilityCardinality-15 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
PermAdmissibility-PT-01-ReachabilityCardinality-15,2,12.7755,231168,2,206,11,147174,22,0,1480,59698,0
ITS tools runner thread asked to quit. Dying gracefully.
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O3, model.c], workingDir=/home/mcc/execution]
WARNING : LTS min runner thread was asked to interrupt. Dying gracefully.
BK_STOP 1527181135613
--------------------
content from stderr:
+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution ReachabilityCardinality -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -consoleLog -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination ReachabilityCardinality -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
May 24, 2018 4:58:41 PM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, ReachabilityCardinality, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -smt]
May 24, 2018 4:58:41 PM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
May 24, 2018 4:58:41 PM fr.lip6.move.gal.nupn.PTNetReader loadFromXML
INFO: Load time of PNML (sax parser for PT used): 116 ms
May 24, 2018 4:58:41 PM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 168 places.
May 24, 2018 4:58:41 PM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 592 transitions.
May 24, 2018 4:58:41 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.img.gal : 35 ms
May 24, 2018 4:58:41 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 229 ms
May 24, 2018 4:58:42 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 208 ms
May 24, 2018 4:58:42 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/ReachabilityCardinality.pnml.gal : 11 ms
May 24, 2018 4:58:42 PM fr.lip6.move.serialization.SerializationUtil serializePropertiesForITSTools
INFO: Time to serialize properties into /home/mcc/execution/ReachabilityCardinality.prop : 1 ms
May 24, 2018 4:58:42 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 283 ms
May 24, 2018 4:58:42 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 592 transitions.
May 24, 2018 4:58:42 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 592 transitions.
May 24, 2018 4:58:42 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 32 place invariants in 138 ms
May 24, 2018 4:58:42 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd checkProperties
INFO: Ran tautology test, simplified 0 / 16 in 792 ms.
May 24, 2018 4:58:43 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-PT-01-ReachabilityCardinality-00(UNSAT) depth K=0 took 20 ms
May 24, 2018 4:58:43 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-PT-01-ReachabilityCardinality-01(UNSAT) depth K=0 took 14 ms
May 24, 2018 4:58:43 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-PT-01-ReachabilityCardinality-02(UNSAT) depth K=0 took 12 ms
May 24, 2018 4:58:43 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-PT-01-ReachabilityCardinality-03(UNSAT) depth K=0 took 15 ms
May 24, 2018 4:58:43 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-PT-01-ReachabilityCardinality-04(UNSAT) depth K=0 took 18 ms
May 24, 2018 4:58:43 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-PT-01-ReachabilityCardinality-05(UNSAT) depth K=0 took 1 ms
May 24, 2018 4:58:43 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-PT-01-ReachabilityCardinality-06(UNSAT) depth K=0 took 27 ms
May 24, 2018 4:58:43 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-PT-01-ReachabilityCardinality-07(UNSAT) depth K=0 took 12 ms
May 24, 2018 4:58:43 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-PT-01-ReachabilityCardinality-08(UNSAT) depth K=0 took 19 ms
May 24, 2018 4:58:43 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-PT-01-ReachabilityCardinality-09(UNSAT) depth K=0 took 7 ms
May 24, 2018 4:58:43 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-PT-01-ReachabilityCardinality-10(UNSAT) depth K=0 took 3 ms
May 24, 2018 4:58:43 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-PT-01-ReachabilityCardinality-11(UNSAT) depth K=0 took 2 ms
May 24, 2018 4:58:43 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-PT-01-ReachabilityCardinality-12(UNSAT) depth K=0 took 2 ms
May 24, 2018 4:58:43 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-PT-01-ReachabilityCardinality-13(UNSAT) depth K=0 took 1 ms
May 24, 2018 4:58:43 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 592 transitions.
May 24, 2018 4:58:43 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-PT-01-ReachabilityCardinality-14(UNSAT) depth K=0 took 0 ms
May 24, 2018 4:58:43 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-PT-01-ReachabilityCardinality-15(UNSAT) depth K=0 took 1 ms
May 24, 2018 4:58:43 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-PT-01-ReachabilityCardinality-00(UNSAT) depth K=1 took 12 ms
May 24, 2018 4:58:43 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-PT-01-ReachabilityCardinality-01(UNSAT) depth K=1 took 15 ms
May 24, 2018 4:58:43 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-PT-01-ReachabilityCardinality-02(UNSAT) depth K=1 took 15 ms
May 24, 2018 4:58:43 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-PT-01-ReachabilityCardinality-03(UNSAT) depth K=1 took 16 ms
May 24, 2018 4:58:43 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-PT-01-ReachabilityCardinality-04(UNSAT) depth K=1 took 15 ms
May 24, 2018 4:58:43 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-PT-01-ReachabilityCardinality-05(UNSAT) depth K=1 took 20 ms
May 24, 2018 4:58:43 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-PT-01-ReachabilityCardinality-06(UNSAT) depth K=1 took 30 ms
May 24, 2018 4:58:43 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-PT-01-ReachabilityCardinality-07(UNSAT) depth K=1 took 11 ms
May 24, 2018 4:58:43 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-PT-01-ReachabilityCardinality-08(UNSAT) depth K=1 took 2 ms
May 24, 2018 4:58:43 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-PT-01-ReachabilityCardinality-09(UNSAT) depth K=1 took 5 ms
May 24, 2018 4:58:43 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-PT-01-ReachabilityCardinality-10(UNSAT) depth K=1 took 14 ms
May 24, 2018 4:58:43 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-PT-01-ReachabilityCardinality-11(UNSAT) depth K=1 took 6 ms
May 24, 2018 4:58:43 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-PT-01-ReachabilityCardinality-12(UNSAT) depth K=1 took 25 ms
May 24, 2018 4:58:43 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-PT-01-ReachabilityCardinality-13(UNSAT) depth K=1 took 7 ms
May 24, 2018 4:58:43 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-PT-01-ReachabilityCardinality-14(UNSAT) depth K=1 took 20 ms
May 24, 2018 4:58:43 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-PT-01-ReachabilityCardinality-15(UNSAT) depth K=1 took 12 ms
May 24, 2018 4:58:43 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-PT-01-ReachabilityCardinality-00(UNSAT) depth K=2 took 139 ms
May 24, 2018 4:58:43 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 32 place invariants in 136 ms
May 24, 2018 4:58:43 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-PT-01-ReachabilityCardinality-01(UNSAT) depth K=2 took 110 ms
May 24, 2018 4:58:43 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-PT-01-ReachabilityCardinality-02(UNSAT) depth K=2 took 128 ms
May 24, 2018 4:58:43 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-PT-01-ReachabilityCardinality-03(UNSAT) depth K=2 took 100 ms
May 24, 2018 4:58:43 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-PT-01-ReachabilityCardinality-04(UNSAT) depth K=2 took 118 ms
May 24, 2018 4:58:44 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-PT-01-ReachabilityCardinality-05(UNSAT) depth K=2 took 62 ms
May 24, 2018 4:58:44 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-PT-01-ReachabilityCardinality-06(UNSAT) depth K=2 took 102 ms
May 24, 2018 4:58:44 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-PT-01-ReachabilityCardinality-07(UNSAT) depth K=2 took 83 ms
May 24, 2018 4:58:44 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-PT-01-ReachabilityCardinality-08(UNSAT) depth K=2 took 100 ms
May 24, 2018 4:58:44 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-PT-01-ReachabilityCardinality-09(UNSAT) depth K=2 took 42 ms
May 24, 2018 4:58:44 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-PT-01-ReachabilityCardinality-10(UNSAT) depth K=2 took 77 ms
May 24, 2018 4:58:44 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-PT-01-ReachabilityCardinality-11(UNSAT) depth K=2 took 50 ms
May 24, 2018 4:58:44 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-PT-01-ReachabilityCardinality-12(UNSAT) depth K=2 took 54 ms
May 24, 2018 4:58:44 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-PT-01-ReachabilityCardinality-13(UNSAT) depth K=2 took 172 ms
May 24, 2018 4:58:44 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-PT-01-ReachabilityCardinality-14(UNSAT) depth K=2 took 84 ms
May 24, 2018 4:58:44 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-PT-01-ReachabilityCardinality-15(UNSAT) depth K=2 took 74 ms
May 24, 2018 4:58:45 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-PT-01-ReachabilityCardinality-00(UNSAT) depth K=3 took 150 ms
May 24, 2018 4:58:45 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-PT-01-ReachabilityCardinality-01(UNSAT) depth K=3 took 198 ms
May 24, 2018 4:58:45 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 168 variables to be positive in 2548 ms
May 24, 2018 4:58:45 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may disable matrix : 592 transitions.
May 24, 2018 4:58:45 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of disable matrix completed :0/592 took 1 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 24, 2018 4:58:45 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete disable matrix. took 99 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 24, 2018 4:58:45 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may enable matrix : 592 transitions.
May 24, 2018 4:58:45 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete enable matrix. took 32 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 24, 2018 4:58:45 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-PT-01-ReachabilityCardinality-02(UNSAT) depth K=3 took 235 ms
May 24, 2018 4:58:45 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-PT-01-ReachabilityCardinality-03(UNSAT) depth K=3 took 171 ms
May 24, 2018 4:58:45 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 168 variables to be positive in 2264 ms
May 24, 2018 4:58:45 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-PT-01-ReachabilityCardinality-04(UNSAT) depth K=3 took 157 ms
May 24, 2018 4:58:46 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-PT-01-ReachabilityCardinality-05(UNSAT) depth K=3 took 176 ms
May 24, 2018 4:58:46 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-PT-01-ReachabilityCardinality-06(UNSAT) depth K=3 took 133 ms
May 24, 2018 4:58:46 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-PT-01-ReachabilityCardinality-07(UNSAT) depth K=3 took 324 ms
May 24, 2018 4:58:46 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-PT-01-ReachabilityCardinality-08(UNSAT) depth K=3 took 303 ms
May 24, 2018 4:58:46 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-PT-01-ReachabilityCardinality-09(UNSAT) depth K=3 took 121 ms
May 24, 2018 4:58:47 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-PT-01-ReachabilityCardinality-10(UNSAT) depth K=3 took 251 ms
May 24, 2018 4:58:47 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-PT-01-ReachabilityCardinality-11(UNSAT) depth K=3 took 158 ms
May 24, 2018 4:58:47 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-PT-01-ReachabilityCardinality-12(UNSAT) depth K=3 took 210 ms
May 24, 2018 4:58:47 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-PT-01-ReachabilityCardinality-13(UNSAT) depth K=3 took 109 ms
May 24, 2018 4:58:47 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-PT-01-ReachabilityCardinality-14(UNSAT) depth K=3 took 127 ms
May 24, 2018 4:58:48 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-PT-01-ReachabilityCardinality-15(UNSAT) depth K=3 took 350 ms
May 24, 2018 4:58:48 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-PT-01-ReachabilityCardinality-00(UNSAT) depth K=4 took 676 ms
May 24, 2018 4:58:50 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-PT-01-ReachabilityCardinality-01(UNSAT) depth K=4 took 1232 ms
May 24, 2018 4:58:51 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-PT-01-ReachabilityCardinality-02(UNSAT) depth K=4 took 1066 ms
May 24, 2018 4:58:51 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-PT-01-ReachabilityCardinality-03(UNSAT) depth K=4 took 457 ms
May 24, 2018 4:58:52 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-PT-01-ReachabilityCardinality-04(UNSAT) depth K=4 took 799 ms
May 24, 2018 4:58:53 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-PT-01-ReachabilityCardinality-05(UNSAT) depth K=4 took 772 ms
May 24, 2018 4:58:53 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-PT-01-ReachabilityCardinality-06(UNSAT) depth K=4 took 584 ms
May 24, 2018 4:58:53 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, proved invariant PermAdmissibility-PT-01-ReachabilityCardinality-00
May 24, 2018 4:58:53 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, successfully proved induction at step 0 for PermAdmissibility-PT-01-ReachabilityCardinality-00
May 24, 2018 4:58:53 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property PermAdmissibility-PT-01-ReachabilityCardinality-00(TRUE) depth K=0 took 8258 ms
May 24, 2018 4:58:54 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesPermAdmissibility-PT-01-ReachabilityCardinality-01
May 24, 2018 4:58:54 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property PermAdmissibility-PT-01-ReachabilityCardinality-01(SAT) depth K=0 took 729 ms
May 24, 2018 4:58:55 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd checkProperties
WARNING: Interrupting SMT solver.
May 24, 2018 4:58:55 PM fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver checkSat
WARNING: SMT solver unexpectedly returned 'unknown' answer, retrying.
Skipping mayMatrices nes/nds SMT solver raised an error :unknown
May 24, 2018 4:58:55 PM fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver checkSat
WARNING: SMT solver unexpectedly returned 'unknown' answer, retrying.
java.lang.RuntimeException: SMT solver raised an error :unknown
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:318)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:305)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.verifyAssertion(NextBMCSolver.java:452)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.verify(NextBMCSolver.java:435)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.runBMC(Gal2SMTFrontEnd.java:378)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.access$0(Gal2SMTFrontEnd.java:350)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd$1.run(Gal2SMTFrontEnd.java:159)
at java.lang.Thread.run(Thread.java:748)
java.lang.RuntimeException: SMT solver raised an exception or timeout :(error "Failed to check-sat")
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:297)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:305)
at fr.lip6.move.gal.gal2smt.bmc.KInductionSolver.verify(KInductionSolver.java:573)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.runKInduction(Gal2SMTFrontEnd.java:301)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.access$1(Gal2SMTFrontEnd.java:274)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd$2.run(Gal2SMTFrontEnd.java:166)
at java.lang.Thread.run(Thread.java:748)
java.lang.RuntimeException: SMT solver raised an error :unknown
at fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver.computeAblingForPredicate(NecessaryEnablingsolver.java:766)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.printLabels(Gal2PinsTransformerNext.java:502)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.printDependencyMatrix(Gal2PinsTransformerNext.java:209)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.buildBodyFile(Gal2PinsTransformerNext.java:85)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.transform(Gal2PinsTransformerNext.java:830)
at fr.lip6.move.gal.application.LTSminRunner$1.run(LTSminRunner.java:71)
at java.lang.Thread.run(Thread.java:748)
May 24, 2018 4:58:55 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
WARNING: Unexpected error occurred while running SMT. Was verifying PermAdmissibility-PT-01-ReachabilityCardinality-07 SMT depth 4
java.lang.RuntimeException: java.lang.RuntimeException: SMT solver raised an error :unknown
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.runBMC(Gal2SMTFrontEnd.java:404)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.access$0(Gal2SMTFrontEnd.java:350)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd$1.run(Gal2SMTFrontEnd.java:159)
at java.lang.Thread.run(Thread.java:748)
Caused by: java.lang.RuntimeException: SMT solver raised an error :unknown
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:318)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:305)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.verifyAssertion(NextBMCSolver.java:452)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.verify(NextBMCSolver.java:435)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.runBMC(Gal2SMTFrontEnd.java:378)
... 3 more
May 24, 2018 4:58:55 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
WARNING: Unexpected error occurred while running SMT. Was verifying PermAdmissibility-PT-01-ReachabilityCardinality-02 K-induction depth 0
Exception in thread "Thread-8" java.lang.RuntimeException: java.lang.RuntimeException: SMT solver raised an exception or timeout :(error "Failed to check-sat")
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.runKInduction(Gal2SMTFrontEnd.java:336)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.access$1(Gal2SMTFrontEnd.java:274)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd$2.run(Gal2SMTFrontEnd.java:166)
at java.lang.Thread.run(Thread.java:748)
Caused by: java.lang.RuntimeException: SMT solver raised an exception or timeout :(error "Failed to check-sat")
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:297)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:305)
at fr.lip6.move.gal.gal2smt.bmc.KInductionSolver.verify(KInductionSolver.java:573)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.runKInduction(Gal2SMTFrontEnd.java:301)
... 3 more
May 24, 2018 4:58:55 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: During BMC, SMT solver timed out at depth 4
May 24, 2018 4:58:55 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solving timed out (3600000 secs) at depth 4
May 24, 2018 4:58:55 PM fr.lip6.move.gal.application.SMTRunner$2 run
INFO: SMT solved 1/ 16 properties. Interrupting other analysis methods.
May 24, 2018 4:58:55 PM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 13370ms conformant to PINS in folder :/home/mcc/execution
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="PermAdmissibility-PT-01"
export BK_EXAMINATION="ReachabilityCardinality"
export BK_TOOL="itstools"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
tar xzf /home/mcc/BenchKit/INPUTS/PermAdmissibility-PT-01.tgz
mv PermAdmissibility-PT-01 execution
cd execution
pwd
ls -lh
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3637"
echo " Executing tool itstools"
echo " Input is PermAdmissibility-PT-01, examination is ReachabilityCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r116-csrt-152666475400474"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;