fond
Model Checking Contest 2018
8th edition, Bratislava, Slovakia, June 26, 2018
Execution of r116-csrt-152666474900089
Last Updated
June 26, 2018

About the Execution of ITS-Tools for LamportFastMutEx-COL-6

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
15741.170 3600000.00 9417894.00 1083.90 ??FT?F?????????? normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Waiting for the VM to be ready (probing ssh)
................................................................................
/home/mcc/execution
total 204K
-rw-r--r-- 1 mcc users 3.3K May 15 18:54 CTLCardinality.txt
-rw-r--r-- 1 mcc users 17K May 15 18:54 CTLCardinality.xml
-rw-r--r-- 1 mcc users 2.6K May 15 18:54 CTLFireability.txt
-rw-r--r-- 1 mcc users 15K May 15 18:54 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K May 15 18:50 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.3K May 15 18:50 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 2.6K May 15 18:54 LTLCardinality.txt
-rw-r--r-- 1 mcc users 12K May 15 18:54 LTLCardinality.xml
-rw-r--r-- 1 mcc users 1.9K May 15 18:54 LTLFireability.txt
-rw-r--r-- 1 mcc users 8.1K May 15 18:54 LTLFireability.xml
-rw-r--r-- 1 mcc users 3.9K May 15 18:54 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 20K May 15 18:54 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 113 May 15 18:54 ReachabilityDeadlock.txt
-rw-r--r-- 1 mcc users 351 May 15 18:54 ReachabilityDeadlock.xml
-rw-r--r-- 1 mcc users 2.7K May 15 18:54 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 14K May 15 18:54 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.7K May 15 18:54 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.8K May 15 18:54 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 May 15 18:50 equiv_pt
-rw-r--r-- 1 mcc users 2 May 15 18:50 instance
-rw-r--r-- 1 mcc users 5 May 15 18:50 iscolored
-rw-r--r-- 1 mcc users 42K May 15 18:50 model.pnml
=====================================================================
Generated by BenchKit 2-3637
Executing tool itstools
Input is LamportFastMutEx-COL-6, examination is ReachabilityCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r116-csrt-152666474900089
=====================================================================


--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME LamportFastMutEx-COL-6-ReachabilityCardinality-00
FORMULA_NAME LamportFastMutEx-COL-6-ReachabilityCardinality-01
FORMULA_NAME LamportFastMutEx-COL-6-ReachabilityCardinality-02
FORMULA_NAME LamportFastMutEx-COL-6-ReachabilityCardinality-03
FORMULA_NAME LamportFastMutEx-COL-6-ReachabilityCardinality-04
FORMULA_NAME LamportFastMutEx-COL-6-ReachabilityCardinality-05
FORMULA_NAME LamportFastMutEx-COL-6-ReachabilityCardinality-06
FORMULA_NAME LamportFastMutEx-COL-6-ReachabilityCardinality-07
FORMULA_NAME LamportFastMutEx-COL-6-ReachabilityCardinality-08
FORMULA_NAME LamportFastMutEx-COL-6-ReachabilityCardinality-09
FORMULA_NAME LamportFastMutEx-COL-6-ReachabilityCardinality-10
FORMULA_NAME LamportFastMutEx-COL-6-ReachabilityCardinality-11
FORMULA_NAME LamportFastMutEx-COL-6-ReachabilityCardinality-12
FORMULA_NAME LamportFastMutEx-COL-6-ReachabilityCardinality-13
FORMULA_NAME LamportFastMutEx-COL-6-ReachabilityCardinality-14
FORMULA_NAME LamportFastMutEx-COL-6-ReachabilityCardinality-15

=== Now, execution of the tool begins

BK_START 1527164333729

12:18:56.584 [main] ERROR PNML validation - The rng grammar file can't be accessed : www.pnml.org
12:18:56.587 [main] ERROR import - Grammar file errors have been raised, the validation can't be done, process will continue without Grammar validation
Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805151631/bin/its-reach-linux64, --gc-threshold, 2000000, --quiet, -i, /home/mcc/execution/ReachabilityCardinality.pnml.gal, -t, CGAL, -reachable-file, ReachabilityCardinality.prop, --nowitness], workingDir=/home/mcc/execution]

its-reach command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805151631/bin/its-reach-linux64 --gc-threshold 2000000 --quiet -i /home/mcc/execution/ReachabilityCardinality.pnml.gal -t CGAL -reachable-file ReachabilityCardinality.prop --nowitness
Loading property file ReachabilityCardinality.prop.
Read [invariant] property : LamportFastMutEx-COL-6-ReachabilityCardinality-00 with value :(((((((P_ifyi_15_0+P_ifyi_15_1)+P_ifyi_15_2)+P_ifyi_15_3)+P_ifyi_15_4)+P_ifyi_15_5)+P_ifyi_15_6)<=((((((P_sety_9_0+P_sety_9_1)+P_sety_9_2)+P_sety_9_3)+P_sety_9_4)+P_sety_9_5)+P_sety_9_6))
Read [invariant] property : LamportFastMutEx-COL-6-ReachabilityCardinality-01 with value :((((((((((P_ifxi_10_0+P_ifxi_10_1)+P_ifxi_10_2)+P_ifxi_10_3)+P_ifxi_10_4)+P_ifxi_10_5)+P_ifxi_10_6)<=(((((((((((((b_0+b_1)+b_2)+b_3)+b_4)+b_5)+b_6)+b_7)+b_8)+b_9)+b_10)+b_11)+b_12)+b_13))||(((((((x_0+x_1)+x_2)+x_3)+x_4)+x_5)+x_6)>=3))||(((((((P_start_1_0+P_start_1_1)+P_start_1_2)+P_start_1_3)+P_start_1_4)+P_start_1_5)+P_start_1_6)<=(((((((((((((b_0+b_1)+b_2)+b_3)+b_4)+b_5)+b_6)+b_7)+b_8)+b_9)+b_10)+b_11)+b_12)+b_13)))&&(!(((((((P_setbi_11_0+P_setbi_11_1)+P_setbi_11_2)+P_setbi_11_3)+P_setbi_11_4)+P_setbi_11_5)+P_setbi_11_6)>=3)))
Read [reachable] property : LamportFastMutEx-COL-6-ReachabilityCardinality-02 with value :(!((!(((((((y_0+y_1)+y_2)+y_3)+y_4)+y_5)+y_6)>=3))||(!(((((((P_setbi_11_0+P_setbi_11_1)+P_setbi_11_2)+P_setbi_11_3)+P_setbi_11_4)+P_setbi_11_5)+P_setbi_11_6)<=((((((P_fordo_12_0+P_fordo_12_1)+P_fordo_12_2)+P_fordo_12_3)+P_fordo_12_4)+P_fordo_12_5)+P_fordo_12_6)))))
Read [invariant] property : LamportFastMutEx-COL-6-ReachabilityCardinality-03 with value :((!(((((((((((((((b_0+b_1)+b_2)+b_3)+b_4)+b_5)+b_6)+b_7)+b_8)+b_9)+b_10)+b_11)+b_12)+b_13)<=((((((y_0+y_1)+y_2)+y_3)+y_4)+y_5)+y_6))&&(((((((P_CS_21_0+P_CS_21_1)+P_CS_21_2)+P_CS_21_3)+P_CS_21_4)+P_CS_21_5)+P_CS_21_6)<=((((((P_ifyi_15_0+P_ifyi_15_1)+P_ifyi_15_2)+P_ifyi_15_3)+P_ifyi_15_4)+P_ifyi_15_5)+P_ifyi_15_6))))||(((((((P_setbi_24_0+P_setbi_24_1)+P_setbi_24_2)+P_setbi_24_3)+P_setbi_24_4)+P_setbi_24_5)+P_setbi_24_6)<=(((((((((((((b_0+b_1)+b_2)+b_3)+b_4)+b_5)+b_6)+b_7)+b_8)+b_9)+b_10)+b_11)+b_12)+b_13)))
Read [invariant] property : LamportFastMutEx-COL-6-ReachabilityCardinality-04 with value :(!(((((((((P_ifxi_10_0+P_ifxi_10_1)+P_ifxi_10_2)+P_ifxi_10_3)+P_ifxi_10_4)+P_ifxi_10_5)+P_ifxi_10_6)>=2)||(((((((((((((((((((((((((((((((((((((((((((((((((wait_0+wait_1)+wait_2)+wait_3)+wait_4)+wait_5)+wait_6)+wait_7)+wait_8)+wait_9)+wait_10)+wait_11)+wait_12)+wait_13)+wait_14)+wait_15)+wait_16)+wait_17)+wait_18)+wait_19)+wait_20)+wait_21)+wait_22)+wait_23)+wait_24)+wait_25)+wait_26)+wait_27)+wait_28)+wait_29)+wait_30)+wait_31)+wait_32)+wait_33)+wait_34)+wait_35)+wait_36)+wait_37)+wait_38)+wait_39)+wait_40)+wait_41)+wait_42)+wait_43)+wait_44)+wait_45)+wait_46)+wait_47)+wait_48)>=1))&&((((((((P_setbi_5_0+P_setbi_5_1)+P_setbi_5_2)+P_setbi_5_3)+P_setbi_5_4)+P_setbi_5_5)+P_setbi_5_6)>=3)||(((((((((((((((((((((((((((((((((((((((((((((((((done_0+done_1)+done_2)+done_3)+done_4)+done_5)+done_6)+done_7)+done_8)+done_9)+done_10)+done_11)+done_12)+done_13)+done_14)+done_15)+done_16)+done_17)+done_18)+done_19)+done_20)+done_21)+done_22)+done_23)+done_24)+done_25)+done_26)+done_27)+done_28)+done_29)+done_30)+done_31)+done_32)+done_33)+done_34)+done_35)+done_36)+done_37)+done_38)+done_39)+done_40)+done_41)+done_42)+done_43)+done_44)+done_45)+done_46)+done_47)+done_48)>=1))))
Read [reachable] property : LamportFastMutEx-COL-6-ReachabilityCardinality-05 with value :(((((((((P_sety_9_0+P_sety_9_1)+P_sety_9_2)+P_sety_9_3)+P_sety_9_4)+P_sety_9_5)+P_sety_9_6)<=((((((P_setbi_24_0+P_setbi_24_1)+P_setbi_24_2)+P_setbi_24_3)+P_setbi_24_4)+P_setbi_24_5)+P_setbi_24_6))&&(((((((P_ifyi_15_0+P_ifyi_15_1)+P_ifyi_15_2)+P_ifyi_15_3)+P_ifyi_15_4)+P_ifyi_15_5)+P_ifyi_15_6)<=((((((P_setbi_5_0+P_setbi_5_1)+P_setbi_5_2)+P_setbi_5_3)+P_setbi_5_4)+P_setbi_5_5)+P_setbi_5_6)))&&(!((((((((P_ifyi_15_0+P_ifyi_15_1)+P_ifyi_15_2)+P_ifyi_15_3)+P_ifyi_15_4)+P_ifyi_15_5)+P_ifyi_15_6)>=3)||((((((((((((((b_0+b_1)+b_2)+b_3)+b_4)+b_5)+b_6)+b_7)+b_8)+b_9)+b_10)+b_11)+b_12)+b_13)>=1))))
Read [reachable] property : LamportFastMutEx-COL-6-ReachabilityCardinality-06 with value :(!(((((((((P_await_13_0+P_await_13_1)+P_await_13_2)+P_await_13_3)+P_await_13_4)+P_await_13_5)+P_await_13_6)<=((((((P_setbi_24_0+P_setbi_24_1)+P_setbi_24_2)+P_setbi_24_3)+P_setbi_24_4)+P_setbi_24_5)+P_setbi_24_6))||(((((((y_0+y_1)+y_2)+y_3)+y_4)+y_5)+y_6)<=((((((P_setbi_5_0+P_setbi_5_1)+P_setbi_5_2)+P_setbi_5_3)+P_setbi_5_4)+P_setbi_5_5)+P_setbi_5_6)))||(((((((P_setbi_24_0+P_setbi_24_1)+P_setbi_24_2)+P_setbi_24_3)+P_setbi_24_4)+P_setbi_24_5)+P_setbi_24_6)>=2)))
Read [invariant] property : LamportFastMutEx-COL-6-ReachabilityCardinality-07 with value :((((((((((P_setx_3_0+P_setx_3_1)+P_setx_3_2)+P_setx_3_3)+P_setx_3_4)+P_setx_3_5)+P_setx_3_6)>=3)||(((((((P_start_1_0+P_start_1_1)+P_start_1_2)+P_start_1_3)+P_start_1_4)+P_start_1_5)+P_start_1_6)>=1))||((((((((P_setbi_5_0+P_setbi_5_1)+P_setbi_5_2)+P_setbi_5_3)+P_setbi_5_4)+P_setbi_5_5)+P_setbi_5_6)<=((((((P_fordo_12_0+P_fordo_12_1)+P_fordo_12_2)+P_fordo_12_3)+P_fordo_12_4)+P_fordo_12_5)+P_fordo_12_6))||(((((((((((((((((((((((((((((((((((((((((((((((((wait_0+wait_1)+wait_2)+wait_3)+wait_4)+wait_5)+wait_6)+wait_7)+wait_8)+wait_9)+wait_10)+wait_11)+wait_12)+wait_13)+wait_14)+wait_15)+wait_16)+wait_17)+wait_18)+wait_19)+wait_20)+wait_21)+wait_22)+wait_23)+wait_24)+wait_25)+wait_26)+wait_27)+wait_28)+wait_29)+wait_30)+wait_31)+wait_32)+wait_33)+wait_34)+wait_35)+wait_36)+wait_37)+wait_38)+wait_39)+wait_40)+wait_41)+wait_42)+wait_43)+wait_44)+wait_45)+wait_46)+wait_47)+wait_48)<=((((((P_setbi_24_0+P_setbi_24_1)+P_setbi_24_2)+P_setbi_24_3)+P_setbi_24_4)+P_setbi_24_5)+P_setbi_24_6))))&&(!(((((((x_0+x_1)+x_2)+x_3)+x_4)+x_5)+x_6)>=3)))
Read [reachable] property : LamportFastMutEx-COL-6-ReachabilityCardinality-08 with value :((!((((((((P_CS_21_0+P_CS_21_1)+P_CS_21_2)+P_CS_21_3)+P_CS_21_4)+P_CS_21_5)+P_CS_21_6)>=3)&&(((((((P_sety_9_0+P_sety_9_1)+P_sety_9_2)+P_sety_9_3)+P_sety_9_4)+P_sety_9_5)+P_sety_9_6)<=((((((x_0+x_1)+x_2)+x_3)+x_4)+x_5)+x_6))))&&((((((((P_ifyi_15_0+P_ifyi_15_1)+P_ifyi_15_2)+P_ifyi_15_3)+P_ifyi_15_4)+P_ifyi_15_5)+P_ifyi_15_6)>=3)&&(((((((P_sety_9_0+P_sety_9_1)+P_sety_9_2)+P_sety_9_3)+P_sety_9_4)+P_sety_9_5)+P_sety_9_6)>=1)))
Read [invariant] property : LamportFastMutEx-COL-6-ReachabilityCardinality-09 with value :(!((((((((P_setx_3_0+P_setx_3_1)+P_setx_3_2)+P_setx_3_3)+P_setx_3_4)+P_setx_3_5)+P_setx_3_6)>=2)&&(((((((P_setbi_11_0+P_setbi_11_1)+P_setbi_11_2)+P_setbi_11_3)+P_setbi_11_4)+P_setbi_11_5)+P_setbi_11_6)>=3)))
Read [reachable] property : LamportFastMutEx-COL-6-ReachabilityCardinality-10 with value :((((((((P_fordo_12_0+P_fordo_12_1)+P_fordo_12_2)+P_fordo_12_3)+P_fordo_12_4)+P_fordo_12_5)+P_fordo_12_6)>=1)&&((!(((((((y_0+y_1)+y_2)+y_3)+y_4)+y_5)+y_6)>=2))&&((((((((x_0+x_1)+x_2)+x_3)+x_4)+x_5)+x_6)>=1)&&(((((((P_sety_9_0+P_sety_9_1)+P_sety_9_2)+P_sety_9_3)+P_sety_9_4)+P_sety_9_5)+P_sety_9_6)>=2))))
Read [invariant] property : LamportFastMutEx-COL-6-ReachabilityCardinality-11 with value :((((((((P_ifyi_15_0+P_ifyi_15_1)+P_ifyi_15_2)+P_ifyi_15_3)+P_ifyi_15_4)+P_ifyi_15_5)+P_ifyi_15_6)>=2)||((((((((P_ifyi_15_0+P_ifyi_15_1)+P_ifyi_15_2)+P_ifyi_15_3)+P_ifyi_15_4)+P_ifyi_15_5)+P_ifyi_15_6)<=((((((P_CS_21_0+P_CS_21_1)+P_CS_21_2)+P_CS_21_3)+P_CS_21_4)+P_CS_21_5)+P_CS_21_6))&&((((((((y_0+y_1)+y_2)+y_3)+y_4)+y_5)+y_6)<=((((((P_ify0_4_0+P_ify0_4_1)+P_ify0_4_2)+P_ify0_4_3)+P_ify0_4_4)+P_ify0_4_5)+P_ify0_4_6))||((((((((((((((b_0+b_1)+b_2)+b_3)+b_4)+b_5)+b_6)+b_7)+b_8)+b_9)+b_10)+b_11)+b_12)+b_13)>=1))))
Read [reachable] property : LamportFastMutEx-COL-6-ReachabilityCardinality-12 with value :(!(((((((((P_await_13_0+P_await_13_1)+P_await_13_2)+P_await_13_3)+P_await_13_4)+P_await_13_5)+P_await_13_6)<=((((((P_setbi_24_0+P_setbi_24_1)+P_setbi_24_2)+P_setbi_24_3)+P_setbi_24_4)+P_setbi_24_5)+P_setbi_24_6))||(((((((((((((((((((((((((((((((((((((((((((((((((wait_0+wait_1)+wait_2)+wait_3)+wait_4)+wait_5)+wait_6)+wait_7)+wait_8)+wait_9)+wait_10)+wait_11)+wait_12)+wait_13)+wait_14)+wait_15)+wait_16)+wait_17)+wait_18)+wait_19)+wait_20)+wait_21)+wait_22)+wait_23)+wait_24)+wait_25)+wait_26)+wait_27)+wait_28)+wait_29)+wait_30)+wait_31)+wait_32)+wait_33)+wait_34)+wait_35)+wait_36)+wait_37)+wait_38)+wait_39)+wait_40)+wait_41)+wait_42)+wait_43)+wait_44)+wait_45)+wait_46)+wait_47)+wait_48)<=((((((P_fordo_12_0+P_fordo_12_1)+P_fordo_12_2)+P_fordo_12_3)+P_fordo_12_4)+P_fordo_12_5)+P_fordo_12_6)))||(((((((P_CS_21_0+P_CS_21_1)+P_CS_21_2)+P_CS_21_3)+P_CS_21_4)+P_CS_21_5)+P_CS_21_6)<=((((((P_await_13_0+P_await_13_1)+P_await_13_2)+P_await_13_3)+P_await_13_4)+P_await_13_5)+P_await_13_6))))
Read [reachable] property : LamportFastMutEx-COL-6-ReachabilityCardinality-13 with value :((((((((P_ifxi_10_0+P_ifxi_10_1)+P_ifxi_10_2)+P_ifxi_10_3)+P_ifxi_10_4)+P_ifxi_10_5)+P_ifxi_10_6)>=2)||((((((((P_fordo_12_0+P_fordo_12_1)+P_fordo_12_2)+P_fordo_12_3)+P_fordo_12_4)+P_fordo_12_5)+P_fordo_12_6)>=2)&&((((((((((((((((((((((((((((((((((((((((((((((((((done_0+done_1)+done_2)+done_3)+done_4)+done_5)+done_6)+done_7)+done_8)+done_9)+done_10)+done_11)+done_12)+done_13)+done_14)+done_15)+done_16)+done_17)+done_18)+done_19)+done_20)+done_21)+done_22)+done_23)+done_24)+done_25)+done_26)+done_27)+done_28)+done_29)+done_30)+done_31)+done_32)+done_33)+done_34)+done_35)+done_36)+done_37)+done_38)+done_39)+done_40)+done_41)+done_42)+done_43)+done_44)+done_45)+done_46)+done_47)+done_48)<=((((((P_ify0_4_0+P_ify0_4_1)+P_ify0_4_2)+P_ify0_4_3)+P_ify0_4_4)+P_ify0_4_5)+P_ify0_4_6))&&(((((((P_setbi_5_0+P_setbi_5_1)+P_setbi_5_2)+P_setbi_5_3)+P_setbi_5_4)+P_setbi_5_5)+P_setbi_5_6)>=3))))
Read [invariant] property : LamportFastMutEx-COL-6-ReachabilityCardinality-14 with value :(!(((((((((P_setx_3_0+P_setx_3_1)+P_setx_3_2)+P_setx_3_3)+P_setx_3_4)+P_setx_3_5)+P_setx_3_6)>=2)||(((((((P_setx_3_0+P_setx_3_1)+P_setx_3_2)+P_setx_3_3)+P_setx_3_4)+P_setx_3_5)+P_setx_3_6)>=1))&&((((((((((((((((((((((((((((((((((((((((((((((((((done_0+done_1)+done_2)+done_3)+done_4)+done_5)+done_6)+done_7)+done_8)+done_9)+done_10)+done_11)+done_12)+done_13)+done_14)+done_15)+done_16)+done_17)+done_18)+done_19)+done_20)+done_21)+done_22)+done_23)+done_24)+done_25)+done_26)+done_27)+done_28)+done_29)+done_30)+done_31)+done_32)+done_33)+done_34)+done_35)+done_36)+done_37)+done_38)+done_39)+done_40)+done_41)+done_42)+done_43)+done_44)+done_45)+done_46)+done_47)+done_48)>=1)&&(((((((((((((((((((((((((((((((((((((((((((((((((wait_0+wait_1)+wait_2)+wait_3)+wait_4)+wait_5)+wait_6)+wait_7)+wait_8)+wait_9)+wait_10)+wait_11)+wait_12)+wait_13)+wait_14)+wait_15)+wait_16)+wait_17)+wait_18)+wait_19)+wait_20)+wait_21)+wait_22)+wait_23)+wait_24)+wait_25)+wait_26)+wait_27)+wait_28)+wait_29)+wait_30)+wait_31)+wait_32)+wait_33)+wait_34)+wait_35)+wait_36)+wait_37)+wait_38)+wait_39)+wait_40)+wait_41)+wait_42)+wait_43)+wait_44)+wait_45)+wait_46)+wait_47)+wait_48)>=2))))
Read [reachable] property : LamportFastMutEx-COL-6-ReachabilityCardinality-15 with value :((((((((P_awaity_0+P_awaity_1)+P_awaity_2)+P_awaity_3)+P_awaity_4)+P_awaity_5)+P_awaity_6)<=((((((x_0+x_1)+x_2)+x_3)+x_4)+x_5)+x_6))&&((((((((((((((b_0+b_1)+b_2)+b_3)+b_4)+b_5)+b_6)+b_7)+b_8)+b_9)+b_10)+b_11)+b_12)+b_13)<=((((((P_ify0_4_0+P_ify0_4_1)+P_ify0_4_2)+P_ify0_4_3)+P_ify0_4_4)+P_ify0_4_5)+P_ify0_4_6)))
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
Normalized transition count is 315
// Phase 1: matrix 315 rows 217 cols
invariant :wait_41 + -1'P_await_13_5 + done_41 = 0
invariant :wait_24 + -1'P_await_13_3 + done_24 = 0
invariant :wait_3 + -1'P_await_13_0 + done_3 = 0
invariant :wait_47 + -1'P_await_13_6 + done_47 = 0
invariant :b_2 + b_3 = 1
invariant :wait_14 + done_14 = 0
invariant :wait_48 + -1'P_await_13_6 + done_48 = 0
invariant :wait_33 + -1'P_await_13_4 + done_33 = 0
invariant :wait_38 + -1'P_await_13_5 + done_38 = 0
invariant :wait_23 + -1'P_await_13_3 + done_23 = 0
invariant :wait_0 + done_0 = 0
invariant :wait_25 + -1'P_await_13_3 + done_25 = 0
invariant :wait_7 + done_7 = 0
invariant :P_start_1_5 + P_setx_3_5 + P_setbi_5_5 + P_ify0_4_5 + P_sety_9_5 + P_ifxi_10_5 + P_setbi_11_5 + P_fordo_12_5 + P_await_13_5 + P_ifyi_15_5 + P_awaity_5 + P_CS_21_5 + P_setbi_24_5 = 1
invariant :wait_26 + -1'P_await_13_3 + done_26 = 0
invariant :wait_31 + -1'P_await_13_4 + done_31 = 0
invariant :wait_15 + -1'P_await_13_2 + done_15 = 0
invariant :wait_5 + -1'P_await_13_0 + done_5 = 0
invariant :wait_8 + -1'P_await_13_1 + done_8 = 0
invariant :b_8 + b_9 = 1
invariant :wait_37 + -1'P_await_13_5 + done_37 = 0
invariant :wait_12 + -1'P_await_13_1 + done_12 = 0
invariant :wait_28 + done_28 = 0
invariant :wait_39 + -1'P_await_13_5 + done_39 = 0
invariant :wait_32 + -1'P_await_13_4 + done_32 = 0
invariant :P_start_1_4 + P_setx_3_4 + P_setbi_5_4 + P_ify0_4_4 + P_sety_9_4 + P_ifxi_10_4 + P_setbi_11_4 + P_fordo_12_4 + P_await_13_4 + P_ifyi_15_4 + P_awaity_4 + P_CS_21_4 + P_setbi_24_4 = 1
invariant :wait_29 + -1'P_await_13_4 + done_29 = 0
invariant :wait_18 + -1'P_await_13_2 + done_18 = 0
invariant :wait_11 + -1'P_await_13_1 + done_11 = 0
invariant :P_start_1_3 + P_setx_3_3 + P_setbi_5_3 + P_ify0_4_3 + P_sety_9_3 + P_ifxi_10_3 + P_setbi_11_3 + P_fordo_12_3 + P_await_13_3 + P_ifyi_15_3 + P_awaity_3 + P_CS_21_3 + P_setbi_24_3 = 1
invariant :wait_40 + -1'P_await_13_5 + done_40 = 0
invariant :x_0 + x_1 + x_2 + x_3 + x_4 + x_5 + x_6 = 1
invariant :wait_1 + -1'P_await_13_0 + done_1 = 0
invariant :wait_36 + -1'P_await_13_5 + done_36 = 0
invariant :wait_17 + -1'P_await_13_2 + done_17 = 0
invariant :b_12 + b_13 = 1
invariant :wait_19 + -1'P_await_13_2 + done_19 = 0
invariant :P_start_1_0 + P_setx_3_0 + P_setbi_5_0 + P_ify0_4_0 + P_sety_9_0 + P_ifxi_10_0 + P_setbi_11_0 + P_fordo_12_0 + P_await_13_0 + P_ifyi_15_0 + P_awaity_0 + P_CS_21_0 + P_setbi_24_0 = 0
invariant :wait_21 + done_21 = 0
invariant :b_10 + b_11 = 1
invariant :wait_22 + -1'P_await_13_3 + done_22 = 0
invariant :P_start_1_2 + P_setx_3_2 + P_setbi_5_2 + P_ify0_4_2 + P_sety_9_2 + P_ifxi_10_2 + P_setbi_11_2 + P_fordo_12_2 + P_await_13_2 + P_ifyi_15_2 + P_awaity_2 + P_CS_21_2 + P_setbi_24_2 = 1
invariant :wait_30 + -1'P_await_13_4 + done_30 = 0
invariant :b_4 + b_5 = 1
invariant :wait_2 + -1'P_await_13_0 + done_2 = 0
invariant :wait_9 + -1'P_await_13_1 + done_9 = 0
invariant :wait_27 + -1'P_await_13_3 + done_27 = 0
invariant :wait_13 + -1'P_await_13_1 + done_13 = 0
invariant :wait_35 + done_35 = 0
invariant :wait_34 + -1'P_await_13_4 + done_34 = 0
invariant :wait_10 + -1'P_await_13_1 + done_10 = 0
invariant :wait_20 + -1'P_await_13_2 + done_20 = 0
invariant :P_start_1_6 + P_setx_3_6 + P_setbi_5_6 + P_ify0_4_6 + P_sety_9_6 + P_ifxi_10_6 + P_setbi_11_6 + P_fordo_12_6 + P_await_13_6 + P_ifyi_15_6 + P_awaity_6 + P_CS_21_6 + P_setbi_24_6 = 1
invariant :wait_44 + -1'P_await_13_6 + done_44 = 0
invariant :wait_42 + done_42 = 0
invariant :wait_46 + -1'P_await_13_6 + done_46 = 0
invariant :b_6 + b_7 = 1
invariant :wait_16 + -1'P_await_13_2 + done_16 = 0
invariant :wait_43 + -1'P_await_13_6 + done_43 = 0
invariant :b_0 + b_1 = 0
invariant :wait_45 + -1'P_await_13_6 + done_45 = 0
invariant :P_start_1_1 + P_setx_3_1 + P_setbi_5_1 + P_ify0_4_1 + P_sety_9_1 + P_ifxi_10_1 + P_setbi_11_1 + P_fordo_12_1 + P_await_13_1 + P_ifyi_15_1 + P_awaity_1 + P_CS_21_1 + P_setbi_24_1 = 1
invariant :wait_6 + -1'P_await_13_0 + done_6 = 0
invariant :y_0 + y_1 + y_2 + y_3 + y_4 + y_5 + y_6 = 1
invariant :wait_4 + -1'P_await_13_0 + done_4 = 0
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
Normalized transition count is 315
// Phase 1: matrix 315 rows 217 cols
invariant :wait_41 + -1'P_await_13_5 + done_41 = 0
invariant :wait_24 + -1'P_await_13_3 + done_24 = 0
invariant :wait_3 + -1'P_await_13_0 + done_3 = 0
invariant :wait_47 + -1'P_await_13_6 + done_47 = 0
invariant :b_2 + b_3 = 1
invariant :wait_14 + done_14 = 0
invariant :wait_48 + -1'P_await_13_6 + done_48 = 0
invariant :wait_33 + -1'P_await_13_4 + done_33 = 0
invariant :wait_38 + -1'P_await_13_5 + done_38 = 0
invariant :wait_23 + -1'P_await_13_3 + done_23 = 0
invariant :wait_0 + done_0 = 0
invariant :wait_25 + -1'P_await_13_3 + done_25 = 0
invariant :wait_7 + done_7 = 0
invariant :P_start_1_5 + P_setx_3_5 + P_setbi_5_5 + P_ify0_4_5 + P_sety_9_5 + P_ifxi_10_5 + P_setbi_11_5 + P_fordo_12_5 + P_await_13_5 + P_ifyi_15_5 + P_awaity_5 + P_CS_21_5 + P_setbi_24_5 = 1
invariant :wait_26 + -1'P_await_13_3 + done_26 = 0
invariant :wait_31 + -1'P_await_13_4 + done_31 = 0
invariant :wait_15 + -1'P_await_13_2 + done_15 = 0
invariant :wait_5 + -1'P_await_13_0 + done_5 = 0
invariant :wait_8 + -1'P_await_13_1 + done_8 = 0
invariant :b_8 + b_9 = 1
invariant :wait_37 + -1'P_await_13_5 + done_37 = 0
invariant :wait_12 + -1'P_await_13_1 + done_12 = 0
invariant :wait_28 + done_28 = 0
invariant :wait_39 + -1'P_await_13_5 + done_39 = 0
invariant :wait_32 + -1'P_await_13_4 + done_32 = 0
invariant :P_start_1_4 + P_setx_3_4 + P_setbi_5_4 + P_ify0_4_4 + P_sety_9_4 + P_ifxi_10_4 + P_setbi_11_4 + P_fordo_12_4 + P_await_13_4 + P_ifyi_15_4 + P_awaity_4 + P_CS_21_4 + P_setbi_24_4 = 1
invariant :wait_29 + -1'P_await_13_4 + done_29 = 0
invariant :wait_18 + -1'P_await_13_2 + done_18 = 0
invariant :wait_11 + -1'P_await_13_1 + done_11 = 0
invariant :P_start_1_3 + P_setx_3_3 + P_setbi_5_3 + P_ify0_4_3 + P_sety_9_3 + P_ifxi_10_3 + P_setbi_11_3 + P_fordo_12_3 + P_await_13_3 + P_ifyi_15_3 + P_awaity_3 + P_CS_21_3 + P_setbi_24_3 = 1
invariant :wait_40 + -1'P_await_13_5 + done_40 = 0
invariant :x_0 + x_1 + x_2 + x_3 + x_4 + x_5 + x_6 = 1
invariant :wait_1 + -1'P_await_13_0 + done_1 = 0
invariant :wait_36 + -1'P_await_13_5 + done_36 = 0
invariant :wait_17 + -1'P_await_13_2 + done_17 = 0
invariant :b_12 + b_13 = 1
invariant :wait_19 + -1'P_await_13_2 + done_19 = 0
invariant :P_start_1_0 + P_setx_3_0 + P_setbi_5_0 + P_ify0_4_0 + P_sety_9_0 + P_ifxi_10_0 + P_setbi_11_0 + P_fordo_12_0 + P_await_13_0 + P_ifyi_15_0 + P_awaity_0 + P_CS_21_0 + P_setbi_24_0 = 0
invariant :wait_21 + done_21 = 0
invariant :b_10 + b_11 = 1
invariant :wait_22 + -1'P_await_13_3 + done_22 = 0
invariant :P_start_1_2 + P_setx_3_2 + P_setbi_5_2 + P_ify0_4_2 + P_sety_9_2 + P_ifxi_10_2 + P_setbi_11_2 + P_fordo_12_2 + P_await_13_2 + P_ifyi_15_2 + P_awaity_2 + P_CS_21_2 + P_setbi_24_2 = 1
invariant :wait_30 + -1'P_await_13_4 + done_30 = 0
invariant :b_4 + b_5 = 1
invariant :wait_2 + -1'P_await_13_0 + done_2 = 0
invariant :wait_9 + -1'P_await_13_1 + done_9 = 0
invariant :wait_27 + -1'P_await_13_3 + done_27 = 0
invariant :wait_13 + -1'P_await_13_1 + done_13 = 0
invariant :wait_35 + done_35 = 0
invariant :wait_34 + -1'P_await_13_4 + done_34 = 0
invariant :wait_10 + -1'P_await_13_1 + done_10 = 0
invariant :wait_20 + -1'P_await_13_2 + done_20 = 0
invariant :P_start_1_6 + P_setx_3_6 + P_setbi_5_6 + P_ify0_4_6 + P_sety_9_6 + P_ifxi_10_6 + P_setbi_11_6 + P_fordo_12_6 + P_await_13_6 + P_ifyi_15_6 + P_awaity_6 + P_CS_21_6 + P_setbi_24_6 = 1
invariant :wait_44 + -1'P_await_13_6 + done_44 = 0
invariant :wait_42 + done_42 = 0
invariant :wait_46 + -1'P_await_13_6 + done_46 = 0
invariant :b_6 + b_7 = 1
invariant :wait_16 + -1'P_await_13_2 + done_16 = 0
invariant :wait_43 + -1'P_await_13_6 + done_43 = 0
invariant :b_0 + b_1 = 0
invariant :wait_45 + -1'P_await_13_6 + done_45 = 0
invariant :P_start_1_1 + P_setx_3_1 + P_setbi_5_1 + P_ify0_4_1 + P_sety_9_1 + P_ifxi_10_1 + P_setbi_11_1 + P_fordo_12_1 + P_await_13_1 + P_ifyi_15_1 + P_awaity_1 + P_CS_21_1 + P_setbi_24_1 = 1
invariant :wait_6 + -1'P_await_13_0 + done_6 = 0
invariant :y_0 + y_1 + y_2 + y_3 + y_4 + y_5 + y_6 = 1
invariant :wait_4 + -1'P_await_13_0 + done_4 = 0
FORMULA LamportFastMutEx-COL-6-ReachabilityCardinality-02 FALSE TECHNIQUES SAT_SMT K_INDUCTION(0)
FORMULA LamportFastMutEx-COL-6-ReachabilityCardinality-03 TRUE TECHNIQUES SAT_SMT K_INDUCTION(0)
FORMULA LamportFastMutEx-COL-6-ReachabilityCardinality-05 FALSE TECHNIQUES SAT_SMT K_INDUCTION(0)
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O3, model.c], workingDir=/home/mcc/execution]
Compilation finished in 17558 ms.
Running link step : CommandLine [args=[gcc, -shared, -o, gal.so, model.o], workingDir=/home/mcc/execution]
Link finished in 980 ms.
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -i, LamportFastMutExCOL6ReachabilityCardinality00==true], workingDir=/home/mcc/execution]
WARNING : LTSmin timed out (>225 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -i, LamportFastMutExCOL6ReachabilityCardinality00==true], workingDir=/home/mcc/execution]
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -i, LamportFastMutExCOL6ReachabilityCardinality01==true], workingDir=/home/mcc/execution]
WARNING : LTS min runner thread failed on error :java.lang.RuntimeException: Unexpected exception when executing ltsmin :CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -i, LamportFastMutExCOL6ReachabilityCardinality01==true], workingDir=/home/mcc/execution]
255

BK_TIME_CONFINEMENT_REACHED

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution ReachabilityCardinality -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -consoleLog -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination ReachabilityCardinality -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
May 24, 2018 12:18:56 PM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, ReachabilityCardinality, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -smt]
May 24, 2018 12:18:56 PM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
May 24, 2018 12:18:56 PM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Detected file is not PT type :http://www.pnml.org/version-2009/grammar/symmetricnet
May 24, 2018 12:18:57 PM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Load time of PNML (colored model parsed with PNMLFW) : 939 ms
May 24, 2018 12:18:57 PM fr.lip6.move.gal.pnml.togal.HLGALTransformer handlePage
INFO: Transformed 18 places.
May 24, 2018 12:18:57 PM fr.lip6.move.gal.pnml.togal.HLGALTransformer handlePage
INFO: Computed order using colors.
May 24, 2018 12:18:57 PM fr.lip6.move.gal.pnml.togal.HLGALTransformer handlePage
INFO: sort/places :pid * pid->wait,done,
pid * bool->b,
pid->P-start_1,x,y,P-setx_3,P-setbi_5,P-ify0_4,P-sety_9,P-ifxi_10,P-setbi_11,P-fordo_12,P-await_13,P-ifyi_15,P-awaity,P-CS_21,P-setbi_24,

May 24, 2018 12:18:57 PM fr.lip6.move.gal.pnml.togal.HLGALTransformer handlePage
INFO: Transformed 17 transitions.
May 24, 2018 12:18:57 PM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Computed order based on color domains.
May 24, 2018 12:18:57 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.img.gal : 7 ms
May 24, 2018 12:18:57 PM fr.lip6.move.gal.instantiate.Instantiator fuseEqualParameters
INFO: Fused parameters : $i and $y of transition T_yeqi_15
May 24, 2018 12:18:57 PM fr.lip6.move.gal.instantiate.Instantiator fuseEqualParameters
INFO: Fused parameters : $i and $x of transition T_xeqi_10
May 24, 2018 12:18:57 PM fr.lip6.move.gal.instantiate.Instantiator instantiateParameters
INFO: On-the-fly reduction of False transitions avoided exploring 15.0 instantiations of transitions. Total transitions/syncs built is 423
May 24, 2018 12:18:57 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 161 ms
May 24, 2018 12:18:58 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 86 ms
May 24, 2018 12:18:58 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/ReachabilityCardinality.pnml.gal : 8 ms
May 24, 2018 12:18:58 PM fr.lip6.move.serialization.SerializationUtil serializePropertiesForITSTools
INFO: Time to serialize properties into /home/mcc/execution/ReachabilityCardinality.prop : 3 ms
May 24, 2018 12:18:58 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 103 ms
May 24, 2018 12:18:58 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was not deterministic with 95 transitions. Expanding to a total of 514 deterministic transitions.
May 24, 2018 12:18:58 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was not deterministic with 95 transitions. Expanding to a total of 514 deterministic transitions.
May 24, 2018 12:18:58 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Determinization took 33 ms.
May 24, 2018 12:18:59 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Determinization took 48 ms.
May 24, 2018 12:19:00 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 65 place invariants in 140 ms
May 24, 2018 12:19:00 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd checkProperties
INFO: Ran tautology test, simplified 0 / 16 in 2049 ms.
May 24, 2018 12:19:00 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-00(UNSAT) depth K=0 took 31 ms
May 24, 2018 12:19:00 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was not deterministic with 95 transitions. Expanding to a total of 514 deterministic transitions.
May 24, 2018 12:19:00 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-01(UNSAT) depth K=0 took 21 ms
May 24, 2018 12:19:00 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-02(UNSAT) depth K=0 took 6 ms
May 24, 2018 12:19:00 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Determinization took 14 ms.
May 24, 2018 12:19:00 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-03(UNSAT) depth K=0 took 180 ms
May 24, 2018 12:19:00 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-04(UNSAT) depth K=0 took 39 ms
May 24, 2018 12:19:00 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-05(UNSAT) depth K=0 took 47 ms
May 24, 2018 12:19:00 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-06(UNSAT) depth K=0 took 24 ms
May 24, 2018 12:19:00 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-07(UNSAT) depth K=0 took 5 ms
May 24, 2018 12:19:00 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-08(UNSAT) depth K=0 took 14 ms
May 24, 2018 12:19:00 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-09(UNSAT) depth K=0 took 7 ms
May 24, 2018 12:19:00 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-10(UNSAT) depth K=0 took 5 ms
May 24, 2018 12:19:00 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-11(UNSAT) depth K=0 took 21 ms
May 24, 2018 12:19:00 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-12(UNSAT) depth K=0 took 4 ms
May 24, 2018 12:19:00 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-13(UNSAT) depth K=0 took 75 ms
May 24, 2018 12:19:01 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-14(UNSAT) depth K=0 took 60 ms
May 24, 2018 12:19:01 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-15(UNSAT) depth K=0 took 10 ms
May 24, 2018 12:19:01 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 65 place invariants in 57 ms
May 24, 2018 12:19:01 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-00(UNSAT) depth K=1 took 31 ms
May 24, 2018 12:19:01 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-01(UNSAT) depth K=1 took 16 ms
May 24, 2018 12:19:01 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-02(UNSAT) depth K=1 took 11 ms
May 24, 2018 12:19:01 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-03(UNSAT) depth K=1 took 51 ms
May 24, 2018 12:19:01 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-04(UNSAT) depth K=1 took 81 ms
May 24, 2018 12:19:01 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-05(UNSAT) depth K=1 took 39 ms
May 24, 2018 12:19:01 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-06(UNSAT) depth K=1 took 92 ms
May 24, 2018 12:19:01 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-07(UNSAT) depth K=1 took 40 ms
May 24, 2018 12:19:01 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-08(UNSAT) depth K=1 took 12 ms
May 24, 2018 12:19:01 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-09(UNSAT) depth K=1 took 6 ms
May 24, 2018 12:19:01 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-10(UNSAT) depth K=1 took 13 ms
May 24, 2018 12:19:01 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-11(UNSAT) depth K=1 took 14 ms
May 24, 2018 12:19:01 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-12(UNSAT) depth K=1 took 24 ms
May 24, 2018 12:19:01 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-13(UNSAT) depth K=1 took 16 ms
May 24, 2018 12:19:01 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-14(UNSAT) depth K=1 took 17 ms
May 24, 2018 12:19:01 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-15(UNSAT) depth K=1 took 7 ms
May 24, 2018 12:19:01 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-00(UNSAT) depth K=2 took 116 ms
May 24, 2018 12:19:01 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-01(UNSAT) depth K=2 took 274 ms
May 24, 2018 12:19:02 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-02(UNSAT) depth K=2 took 120 ms
May 24, 2018 12:19:02 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-03(UNSAT) depth K=2 took 678 ms
May 24, 2018 12:19:02 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 217 variables to be positive in 2756 ms
May 24, 2018 12:19:02 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may disable matrix : 420 transitions.
May 24, 2018 12:19:02 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of disable matrix completed :0/420 took 1 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 24, 2018 12:19:02 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete disable matrix. took 50 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 24, 2018 12:19:02 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may enable matrix : 420 transitions.
May 24, 2018 12:19:02 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete enable matrix. took 16 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 24, 2018 12:19:03 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-04(UNSAT) depth K=2 took 277 ms
May 24, 2018 12:19:03 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-05(UNSAT) depth K=2 took 180 ms
May 24, 2018 12:19:03 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-06(UNSAT) depth K=2 took 103 ms
May 24, 2018 12:19:03 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 217 variables to be positive in 2404 ms
May 24, 2018 12:19:03 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-07(UNSAT) depth K=2 took 357 ms
May 24, 2018 12:19:03 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-08(UNSAT) depth K=2 took 181 ms
May 24, 2018 12:19:03 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-6-ReachabilityCardinality-00
May 24, 2018 12:19:03 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-00(SAT) depth K=0 took 472 ms
May 24, 2018 12:19:03 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-09(UNSAT) depth K=2 took 109 ms
May 24, 2018 12:19:04 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-10(UNSAT) depth K=2 took 391 ms
May 24, 2018 12:19:04 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-6-ReachabilityCardinality-01
May 24, 2018 12:19:04 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-01(SAT) depth K=0 took 571 ms
May 24, 2018 12:19:04 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-11(UNSAT) depth K=2 took 206 ms
May 24, 2018 12:19:04 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-12(UNSAT) depth K=2 took 163 ms
May 24, 2018 12:19:04 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-13(UNSAT) depth K=2 took 162 ms
May 24, 2018 12:19:05 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-14(UNSAT) depth K=2 took 1027 ms
May 24, 2018 12:19:06 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, proved UNreachability of reachability predicate LamportFastMutEx-COL-6-ReachabilityCardinality-02
May 24, 2018 12:19:06 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, successfully proved induction at step 0 for LamportFastMutEx-COL-6-ReachabilityCardinality-02
May 24, 2018 12:19:06 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-02(FALSE) depth K=0 took 1625 ms
May 24, 2018 12:19:06 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-15(UNSAT) depth K=2 took 446 ms
May 24, 2018 12:19:10 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, proved invariant LamportFastMutEx-COL-6-ReachabilityCardinality-03
May 24, 2018 12:19:10 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, successfully proved induction at step 0 for LamportFastMutEx-COL-6-ReachabilityCardinality-03
May 24, 2018 12:19:10 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-03(TRUE) depth K=0 took 4442 ms
May 24, 2018 12:19:11 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-6-ReachabilityCardinality-04
May 24, 2018 12:19:11 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-04(SAT) depth K=0 took 963 ms
May 24, 2018 12:19:12 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, proved UNreachability of reachability predicate LamportFastMutEx-COL-6-ReachabilityCardinality-05
May 24, 2018 12:19:12 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, successfully proved induction at step 0 for LamportFastMutEx-COL-6-ReachabilityCardinality-05
May 24, 2018 12:19:12 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-05(FALSE) depth K=0 took 540 ms
May 24, 2018 12:19:14 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-6-ReachabilityCardinality-06
May 24, 2018 12:19:14 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-06(SAT) depth K=0 took 2500 ms
May 24, 2018 12:19:15 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-6-ReachabilityCardinality-07
May 24, 2018 12:19:15 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-07(SAT) depth K=0 took 908 ms
May 24, 2018 12:19:16 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-6-ReachabilityCardinality-08
May 24, 2018 12:19:16 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-08(SAT) depth K=0 took 1089 ms
May 24, 2018 12:19:17 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-00(UNSAT) depth K=3 took 10637 ms
May 24, 2018 12:19:17 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-6-ReachabilityCardinality-09
May 24, 2018 12:19:17 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-09(SAT) depth K=0 took 884 ms
May 24, 2018 12:19:18 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-6-ReachabilityCardinality-10
May 24, 2018 12:19:18 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-10(SAT) depth K=0 took 1024 ms
May 24, 2018 12:19:19 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-6-ReachabilityCardinality-11
May 24, 2018 12:19:19 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-11(SAT) depth K=0 took 803 ms
May 24, 2018 12:19:26 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-6-ReachabilityCardinality-12
May 24, 2018 12:19:26 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-12(SAT) depth K=0 took 7103 ms
May 24, 2018 12:19:28 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-6-ReachabilityCardinality-13
May 24, 2018 12:19:28 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-13(SAT) depth K=0 took 2431 ms
May 24, 2018 12:19:30 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-6-ReachabilityCardinality-14
May 24, 2018 12:19:30 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-14(SAT) depth K=0 took 2219 ms
May 24, 2018 12:19:31 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-01(UNSAT) depth K=3 took 14701 ms
May 24, 2018 12:19:32 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-6-ReachabilityCardinality-15
May 24, 2018 12:19:32 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-15(SAT) depth K=0 took 2002 ms
May 24, 2018 12:19:38 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-6-ReachabilityCardinality-00
May 24, 2018 12:19:38 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-00(SAT) depth K=1 took 5296 ms
May 24, 2018 12:19:44 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-03(UNSAT) depth K=3 took 13020 ms
May 24, 2018 12:19:51 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-04(UNSAT) depth K=3 took 7098 ms
May 24, 2018 12:20:03 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-05(UNSAT) depth K=3 took 11650 ms
May 24, 2018 12:20:09 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-6-ReachabilityCardinality-01
May 24, 2018 12:20:09 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-01(SAT) depth K=1 took 30809 ms
May 24, 2018 12:20:09 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-06(UNSAT) depth K=3 took 5955 ms
May 24, 2018 12:20:16 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-07(UNSAT) depth K=3 took 7535 ms
May 24, 2018 12:20:18 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-08(UNSAT) depth K=3 took 1960 ms
May 24, 2018 12:20:19 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeCoEnablingMatrix
INFO: Computing symmetric co enabling matrix : 420 transitions.
May 24, 2018 12:20:19 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(0/420) took 549 ms. Total solver calls (SAT/UNSAT): 65(0/65)
May 24, 2018 12:20:20 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-09(UNSAT) depth K=3 took 1592 ms
May 24, 2018 12:20:22 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-6-ReachabilityCardinality-04
May 24, 2018 12:20:22 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-04(SAT) depth K=1 took 13885 ms
May 24, 2018 12:20:23 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(5/420) took 4583 ms. Total solver calls (SAT/UNSAT): 387(12/375)
May 24, 2018 12:20:24 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-10(UNSAT) depth K=3 took 3521 ms
May 24, 2018 12:20:27 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(8/420) took 7879 ms. Total solver calls (SAT/UNSAT): 581(24/557)
May 24, 2018 12:20:28 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-11(UNSAT) depth K=3 took 4728 ms
May 24, 2018 12:20:30 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(11/420) took 11585 ms. Total solver calls (SAT/UNSAT): 774(30/744)
May 24, 2018 12:20:31 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-6-ReachabilityCardinality-06
May 24, 2018 12:20:31 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-06(SAT) depth K=1 took 8753 ms
May 24, 2018 12:20:33 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-12(UNSAT) depth K=3 took 4388 ms
May 24, 2018 12:20:34 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(13/420) took 14902 ms. Total solver calls (SAT/UNSAT): 903(36/867)
May 24, 2018 12:20:34 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-13(UNSAT) depth K=3 took 1558 ms
May 24, 2018 12:20:39 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(15/420) took 20009 ms. Total solver calls (SAT/UNSAT): 1184(47/1137)
May 24, 2018 12:20:40 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-14(UNSAT) depth K=3 took 5267 ms
May 24, 2018 12:20:43 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(17/420) took 24103 ms. Total solver calls (SAT/UNSAT): 1461(66/1395)
May 24, 2018 12:20:46 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(20/420) took 27531 ms. Total solver calls (SAT/UNSAT): 1869(87/1782)
May 24, 2018 12:20:50 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-15(UNSAT) depth K=3 took 10248 ms
May 24, 2018 12:20:50 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(22/420) took 31058 ms. Total solver calls (SAT/UNSAT): 2136(98/2038)
May 24, 2018 12:20:50 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-6-ReachabilityCardinality-07
May 24, 2018 12:20:50 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-07(SAT) depth K=1 took 19068 ms
May 24, 2018 12:20:55 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(24/420) took 35827 ms. Total solver calls (SAT/UNSAT): 2399(117/2282)
May 24, 2018 12:20:59 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(26/420) took 40165 ms. Total solver calls (SAT/UNSAT): 2658(132/2526)
May 24, 2018 12:20:59 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-6-ReachabilityCardinality-08
May 24, 2018 12:20:59 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-08(SAT) depth K=1 took 8725 ms
May 24, 2018 12:21:03 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(28/420) took 44226 ms. Total solver calls (SAT/UNSAT): 2913(138/2775)
May 24, 2018 12:21:06 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(30/420) took 47247 ms. Total solver calls (SAT/UNSAT): 3164(159/3005)
May 24, 2018 12:21:10 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(33/420) took 50931 ms. Total solver calls (SAT/UNSAT): 3533(183/3350)
May 24, 2018 12:21:10 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-6-ReachabilityCardinality-09
May 24, 2018 12:21:10 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-09(SAT) depth K=1 took 11131 ms
May 24, 2018 12:21:14 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(35/420) took 55120 ms. Total solver calls (SAT/UNSAT): 3774(189/3585)
May 24, 2018 12:21:17 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(36/420) took 58542 ms. Total solver calls (SAT/UNSAT): 3893(200/3693)
May 24, 2018 12:21:18 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-6-ReachabilityCardinality-10
May 24, 2018 12:21:18 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-10(SAT) depth K=1 took 7552 ms
May 24, 2018 12:21:19 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-6-ReachabilityCardinality-11
May 24, 2018 12:21:19 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-11(SAT) depth K=1 took 1361 ms
May 24, 2018 12:21:22 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(38/420) took 63056 ms. Total solver calls (SAT/UNSAT): 4128(219/3909)
May 24, 2018 12:21:26 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(40/420) took 67342 ms. Total solver calls (SAT/UNSAT): 4359(234/4125)
May 24, 2018 12:21:30 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(42/420) took 71575 ms. Total solver calls (SAT/UNSAT): 4586(240/4346)
May 24, 2018 12:21:32 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-00(UNSAT) depth K=4 took 42021 ms
May 24, 2018 12:21:35 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(44/420) took 76453 ms. Total solver calls (SAT/UNSAT): 4809(261/4548)
May 24, 2018 12:21:40 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(46/420) took 81553 ms. Total solver calls (SAT/UNSAT): 5028(278/4750)
May 24, 2018 12:21:43 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(48/420) took 84629 ms. Total solver calls (SAT/UNSAT): 5243(291/4952)
May 24, 2018 12:21:46 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-6-ReachabilityCardinality-12
May 24, 2018 12:21:46 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-12(SAT) depth K=1 took 26926 ms
May 24, 2018 12:21:47 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-6-ReachabilityCardinality-13
May 24, 2018 12:21:47 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-13(SAT) depth K=1 took 1211 ms
May 24, 2018 12:21:48 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(52/420) took 88740 ms. Total solver calls (SAT/UNSAT): 5661(321/5340)
May 24, 2018 12:21:52 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(54/420) took 92695 ms. Total solver calls (SAT/UNSAT): 5864(336/5528)
May 24, 2018 12:21:55 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(58/420) took 96264 ms. Total solver calls (SAT/UNSAT): 6258(363/5895)
May 24, 2018 12:21:59 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(61/420) took 100239 ms. Total solver calls (SAT/UNSAT): 6543(387/6156)
May 24, 2018 12:22:04 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(63/420) took 105623 ms. Total solver calls (SAT/UNSAT): 6860(393/6467)
May 24, 2018 12:22:09 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(64/420) took 110357 ms. Total solver calls (SAT/UNSAT): 7083(416/6667)
May 24, 2018 12:22:13 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-6-ReachabilityCardinality-14
May 24, 2018 12:22:13 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-14(SAT) depth K=1 took 25370 ms
May 24, 2018 12:22:13 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(65/420) took 114477 ms. Total solver calls (SAT/UNSAT): 7305(438/6867)
May 24, 2018 12:22:18 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(67/420) took 118964 ms. Total solver calls (SAT/UNSAT): 7746(479/7267)
May 24, 2018 12:22:22 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(69/420) took 123498 ms. Total solver calls (SAT/UNSAT): 8183(516/7667)
May 24, 2018 12:22:22 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-6-ReachabilityCardinality-15
May 24, 2018 12:22:22 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-15(SAT) depth K=1 took 9793 ms
May 24, 2018 12:22:26 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(70/420) took 126718 ms. Total solver calls (SAT/UNSAT): 8400(516/7884)
May 24, 2018 12:22:30 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(71/420) took 130921 ms. Total solver calls (SAT/UNSAT): 8616(539/8077)
May 24, 2018 12:22:33 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(72/420) took 134548 ms. Total solver calls (SAT/UNSAT): 8831(561/8270)
May 24, 2018 12:22:37 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-01(UNSAT) depth K=4 took 64871 ms
May 24, 2018 12:22:38 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(73/420) took 138683 ms. Total solver calls (SAT/UNSAT): 9045(582/8463)
May 24, 2018 12:22:41 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(74/420) took 142641 ms. Total solver calls (SAT/UNSAT): 9258(602/8656)
May 24, 2018 12:22:46 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(75/420) took 146895 ms. Total solver calls (SAT/UNSAT): 9470(621/8849)
May 24, 2018 12:22:50 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(76/420) took 151224 ms. Total solver calls (SAT/UNSAT): 9681(639/9042)
May 24, 2018 12:22:55 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(77/420) took 155730 ms. Total solver calls (SAT/UNSAT): 9891(639/9252)
May 24, 2018 12:22:59 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(78/420) took 159878 ms. Total solver calls (SAT/UNSAT): 10100(662/9438)
May 24, 2018 12:23:03 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(79/420) took 164585 ms. Total solver calls (SAT/UNSAT): 10308(684/9624)
May 24, 2018 12:23:05 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-6-ReachabilityCardinality-00
May 24, 2018 12:23:05 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-00(SAT) depth K=2 took 42433 ms
May 24, 2018 12:23:06 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-04(UNSAT) depth K=4 took 29704 ms
May 24, 2018 12:23:08 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(80/420) took 169159 ms. Total solver calls (SAT/UNSAT): 10515(705/9810)
May 24, 2018 12:23:10 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-6-ReachabilityCardinality-01
May 24, 2018 12:23:10 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-01(SAT) depth K=2 took 5239 ms
May 24, 2018 12:23:12 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(81/420) took 173569 ms. Total solver calls (SAT/UNSAT): 10721(725/9996)
May 24, 2018 12:23:16 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(82/420) took 177601 ms. Total solver calls (SAT/UNSAT): 10926(744/10182)
May 24, 2018 12:23:21 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(83/420) took 181993 ms. Total solver calls (SAT/UNSAT): 11130(762/10368)
May 24, 2018 12:23:26 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(85/420) took 187003 ms. Total solver calls (SAT/UNSAT): 11535(785/10750)
May 24, 2018 12:23:30 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(87/420) took 190678 ms. Total solver calls (SAT/UNSAT): 11936(828/11108)
May 24, 2018 12:23:33 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(88/420) took 193796 ms. Total solver calls (SAT/UNSAT): 12135(848/11287)
May 24, 2018 12:23:37 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(89/420) took 198474 ms. Total solver calls (SAT/UNSAT): 12333(867/11466)
May 24, 2018 12:23:39 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-06(UNSAT) depth K=4 took 32616 ms
May 24, 2018 12:23:42 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(90/420) took 202771 ms. Total solver calls (SAT/UNSAT): 12530(885/11645)
May 24, 2018 12:23:45 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(91/420) took 206583 ms. Total solver calls (SAT/UNSAT): 12726(885/11841)
May 24, 2018 12:23:49 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(92/420) took 210535 ms. Total solver calls (SAT/UNSAT): 12921(908/12013)
May 24, 2018 12:23:53 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(93/420) took 214622 ms. Total solver calls (SAT/UNSAT): 13115(930/12185)
May 24, 2018 12:23:57 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(94/420) took 218422 ms. Total solver calls (SAT/UNSAT): 13308(951/12357)
May 24, 2018 12:24:01 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(95/420) took 222060 ms. Total solver calls (SAT/UNSAT): 13500(971/12529)
May 24, 2018 12:24:05 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(96/420) took 225760 ms. Total solver calls (SAT/UNSAT): 13691(990/12701)
May 24, 2018 12:24:09 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(97/420) took 230383 ms. Total solver calls (SAT/UNSAT): 13881(1008/12873)
May 24, 2018 12:24:14 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(98/420) took 235377 ms. Total solver calls (SAT/UNSAT): 14070(1008/13062)
May 24, 2018 12:24:19 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(100/420) took 240546 ms. Total solver calls (SAT/UNSAT): 14445(1053/13392)
May 24, 2018 12:24:24 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(102/420) took 245475 ms. Total solver calls (SAT/UNSAT): 14816(1094/13722)
May 24, 2018 12:24:28 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(103/420) took 249120 ms. Total solver calls (SAT/UNSAT): 15000(1113/13887)
May 24, 2018 12:24:31 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(105/420) took 252608 ms. Total solver calls (SAT/UNSAT): 15233(1131/14102)
May 24, 2018 12:24:33 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-6-ReachabilityCardinality-04
May 24, 2018 12:24:33 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-04(SAT) depth K=2 took 82618 ms
May 24, 2018 12:24:35 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(109/420) took 256372 ms. Total solver calls (SAT/UNSAT): 15431(1143/14288)
May 24, 2018 12:24:39 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(113/420) took 260414 ms. Total solver calls (SAT/UNSAT): 15629(1155/14474)
May 24, 2018 12:24:41 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-07(UNSAT) depth K=4 took 61644 ms
May 24, 2018 12:24:43 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(116/420) took 263935 ms. Total solver calls (SAT/UNSAT): 15777(1161/14616)
May 24, 2018 12:24:47 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(119/420) took 267725 ms. Total solver calls (SAT/UNSAT): 16056(1167/14889)
May 24, 2018 12:24:50 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(120/420) took 270861 ms. Total solver calls (SAT/UNSAT): 16235(1196/15039)
May 24, 2018 12:24:53 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(121/420) took 274005 ms. Total solver calls (SAT/UNSAT): 16413(1224/15189)
May 24, 2018 12:24:58 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(123/420) took 279470 ms. Total solver calls (SAT/UNSAT): 16766(1277/15489)
May 24, 2018 12:25:01 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(124/420) took 282663 ms. Total solver calls (SAT/UNSAT): 16941(1302/15639)
May 24, 2018 12:25:06 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(126/420) took 286709 ms. Total solver calls (SAT/UNSAT): 17288(1326/15962)
May 24, 2018 12:25:09 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(127/420) took 290520 ms. Total solver calls (SAT/UNSAT): 17460(1349/16111)
May 24, 2018 12:25:13 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(128/420) took 293975 ms. Total solver calls (SAT/UNSAT): 17631(1371/16260)
May 24, 2018 12:25:17 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(129/420) took 297701 ms. Total solver calls (SAT/UNSAT): 17801(1392/16409)
May 24, 2018 12:25:20 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(130/420) took 301245 ms. Total solver calls (SAT/UNSAT): 17970(1412/16558)
May 24, 2018 12:25:24 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(131/420) took 305293 ms. Total solver calls (SAT/UNSAT): 18138(1431/16707)
May 24, 2018 12:25:27 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-6-ReachabilityCardinality-06
May 24, 2018 12:25:27 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-06(SAT) depth K=2 took 54656 ms
May 24, 2018 12:25:28 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(132/420) took 308799 ms. Total solver calls (SAT/UNSAT): 18305(1449/16856)
May 24, 2018 12:25:29 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-08(UNSAT) depth K=4 took 48771 ms
May 24, 2018 12:25:31 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(133/420) took 312283 ms. Total solver calls (SAT/UNSAT): 18471(1449/17022)
May 24, 2018 12:25:35 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(134/420) took 315973 ms. Total solver calls (SAT/UNSAT): 18636(1466/17170)
May 24, 2018 12:25:38 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(135/420) took 319002 ms. Total solver calls (SAT/UNSAT): 18800(1482/17318)
May 24, 2018 12:25:44 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(137/420) took 325476 ms. Total solver calls (SAT/UNSAT): 19125(1511/17614)
May 24, 2018 12:25:48 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(139/420) took 328919 ms. Total solver calls (SAT/UNSAT): 19446(1536/17910)
May 24, 2018 12:25:54 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(141/420) took 334717 ms. Total solver calls (SAT/UNSAT): 19763(1553/18210)
May 24, 2018 12:25:57 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(142/420) took 337991 ms. Total solver calls (SAT/UNSAT): 19920(1569/18351)
May 24, 2018 12:26:02 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(144/420) took 343453 ms. Total solver calls (SAT/UNSAT): 20231(1598/18633)
May 24, 2018 12:26:06 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(147/420) took 347581 ms. Total solver calls (SAT/UNSAT): 20690(1623/19067)
May 24, 2018 12:26:10 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(149/420) took 350679 ms. Total solver calls (SAT/UNSAT): 20991(1656/19335)
May 24, 2018 12:26:14 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(152/420) took 355172 ms. Total solver calls (SAT/UNSAT): 21435(1698/19737)
May 24, 2018 12:26:17 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(153/420) took 358374 ms. Total solver calls (SAT/UNSAT): 21581(1710/19871)
May 24, 2018 12:26:22 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(155/420) took 363180 ms. Total solver calls (SAT/UNSAT): 21870(1727/20143)
May 24, 2018 12:26:30 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(157/420) took 371327 ms. Total solver calls (SAT/UNSAT): 22155(1758/20397)
May 24, 2018 12:26:33 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(158/420) took 374587 ms. Total solver calls (SAT/UNSAT): 22296(1772/20524)
May 24, 2018 12:26:36 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-09(UNSAT) depth K=4 took 66951 ms
May 24, 2018 12:26:37 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(160/420) took 378659 ms. Total solver calls (SAT/UNSAT): 22575(1797/20778)
May 24, 2018 12:26:41 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(163/420) took 382653 ms. Total solver calls (SAT/UNSAT): 22986(1830/21156)
May 24, 2018 12:26:46 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(166/420) took 386955 ms. Total solver calls (SAT/UNSAT): 23388(1872/21516)
May 24, 2018 12:26:49 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(169/420) took 390434 ms. Total solver calls (SAT/UNSAT): 23781(1901/21880)
May 24, 2018 12:26:53 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(172/420) took 394602 ms. Total solver calls (SAT/UNSAT): 24165(1946/22219)
May 24, 2018 12:26:56 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-6-ReachabilityCardinality-07
May 24, 2018 12:26:56 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-07(SAT) depth K=2 took 89006 ms
May 24, 2018 12:26:57 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(175/420) took 398039 ms. Total solver calls (SAT/UNSAT): 24540(1971/22569)
May 24, 2018 12:27:00 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(178/420) took 401165 ms. Total solver calls (SAT/UNSAT): 24906(2019/22887)
May 24, 2018 12:27:03 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(180/420) took 404653 ms. Total solver calls (SAT/UNSAT): 25145(2046/23099)
May 24, 2018 12:27:07 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(184/420) took 408453 ms. Total solver calls (SAT/UNSAT): 25485(2073/23412)
May 24, 2018 12:27:11 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(187/420) took 412109 ms. Total solver calls (SAT/UNSAT): 25698(2079/23619)
May 24, 2018 12:27:12 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-10(UNSAT) depth K=4 took 35401 ms
May 24, 2018 12:27:15 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(190/420) took 415960 ms. Total solver calls (SAT/UNSAT): 25902(2088/23814)
May 24, 2018 12:27:18 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(193/420) took 419080 ms. Total solver calls (SAT/UNSAT): 26097(2094/24003)
May 24, 2018 12:27:21 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(196/420) took 422622 ms. Total solver calls (SAT/UNSAT): 26283(2103/24180)
May 24, 2018 12:27:25 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(200/420) took 426108 ms. Total solver calls (SAT/UNSAT): 26517(2109/24408)
May 24, 2018 12:27:28 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(207/420) took 429373 ms. Total solver calls (SAT/UNSAT): 26888(2129/24759)
May 24, 2018 12:27:31 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(214/420) took 432423 ms. Total solver calls (SAT/UNSAT): 27210(2148/25062)
May 24, 2018 12:27:34 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(221/420) took 435503 ms. Total solver calls (SAT/UNSAT): 27483(2166/25317)
May 24, 2018 12:27:36 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-6-ReachabilityCardinality-08
May 24, 2018 12:27:36 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-08(SAT) depth K=2 took 39666 ms
May 24, 2018 12:27:38 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(230/420) took 438837 ms. Total solver calls (SAT/UNSAT): 27780(2187/25593)
May 24, 2018 12:27:41 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(235/420) took 442219 ms. Total solver calls (SAT/UNSAT): 27942(2199/25743)
May 24, 2018 12:27:44 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(245/420) took 445293 ms. Total solver calls (SAT/UNSAT): 28212(2205/26007)
May 24, 2018 12:27:47 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(254/420) took 448399 ms. Total solver calls (SAT/UNSAT): 28471(2225/26246)
May 24, 2018 12:27:51 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(260/420) took 451922 ms. Total solver calls (SAT/UNSAT): 28636(2265/26371)
May 24, 2018 12:27:54 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(267/420) took 455198 ms. Total solver calls (SAT/UNSAT): 28821(2308/26513)
May 24, 2018 12:27:57 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(273/420) took 458381 ms. Total solver calls (SAT/UNSAT): 28972(2337/26635)
May 24, 2018 12:28:00 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(286/420) took 461489 ms. Total solver calls (SAT/UNSAT): 29283(2395/26888)
May 24, 2018 12:28:05 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(301/420) took 465691 ms. Total solver calls (SAT/UNSAT): 29661(2427/27234)
May 24, 2018 12:28:08 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(303/420) took 468927 ms. Total solver calls (SAT/UNSAT): 29858(2448/27410)
May 24, 2018 12:28:11 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(305/420) took 472537 ms. Total solver calls (SAT/UNSAT): 30051(2465/27586)
May 24, 2018 12:28:12 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-11(UNSAT) depth K=4 took 59935 ms
May 24, 2018 12:28:15 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(307/420) took 475862 ms. Total solver calls (SAT/UNSAT): 30240(2472/27768)
May 24, 2018 12:28:16 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-6-ReachabilityCardinality-09
May 24, 2018 12:28:16 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-09(SAT) depth K=2 took 39708 ms
May 24, 2018 12:28:18 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(309/420) took 479016 ms. Total solver calls (SAT/UNSAT): 30425(2493/27932)
May 24, 2018 12:28:22 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(312/420) took 482898 ms. Total solver calls (SAT/UNSAT): 30695(2517/28178)
May 24, 2018 12:28:25 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(316/420) took 486104 ms. Total solver calls (SAT/UNSAT): 31041(2547/28494)
May 24, 2018 12:28:28 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(319/420) took 489348 ms. Total solver calls (SAT/UNSAT): 31290(2562/28728)
May 24, 2018 12:28:32 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(322/420) took 493161 ms. Total solver calls (SAT/UNSAT): 31530(2592/28938)
May 24, 2018 12:28:34 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-12(UNSAT) depth K=4 took 22098 ms
May 24, 2018 12:28:36 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(325/420) took 497449 ms. Total solver calls (SAT/UNSAT): 31761(2607/29154)
May 24, 2018 12:28:40 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(326/420) took 500945 ms. Total solver calls (SAT/UNSAT): 31836(2618/29218)
May 24, 2018 12:28:43 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(329/420) took 504608 ms. Total solver calls (SAT/UNSAT): 32055(2645/29410)
May 24, 2018 12:28:47 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(331/420) took 508220 ms. Total solver calls (SAT/UNSAT): 32196(2652/29544)
May 24, 2018 12:28:51 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(334/420) took 512644 ms. Total solver calls (SAT/UNSAT): 32400(2682/29718)
May 24, 2018 12:28:56 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(337/420) took 516846 ms. Total solver calls (SAT/UNSAT): 32595(2697/29898)
May 24, 2018 12:29:00 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(340/420) took 520912 ms. Total solver calls (SAT/UNSAT): 32781(2727/30054)
May 24, 2018 12:29:02 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-6-ReachabilityCardinality-10
May 24, 2018 12:29:02 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-10(SAT) depth K=2 took 46481 ms
May 24, 2018 12:29:03 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(343/420) took 524257 ms. Total solver calls (SAT/UNSAT): 32958(2742/30216)
May 24, 2018 12:29:07 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(345/420) took 527855 ms. Total solver calls (SAT/UNSAT): 33071(2754/30317)
May 24, 2018 12:29:10 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(348/420) took 531543 ms. Total solver calls (SAT/UNSAT): 33233(2772/30461)
May 24, 2018 12:29:14 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(357/420) took 535109 ms. Total solver calls (SAT/UNSAT): 33419(2778/30641)
May 24, 2018 12:29:17 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(361/420) took 538273 ms. Total solver calls (SAT/UNSAT): 33609(2792/30817)
May 24, 2018 12:29:20 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(367/420) took 541618 ms. Total solver calls (SAT/UNSAT): 33864(2805/31059)
May 24, 2018 12:29:24 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(371/420) took 544978 ms. Total solver calls (SAT/UNSAT): 34014(2808/31206)
May 24, 2018 12:29:26 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-13(UNSAT) depth K=4 took 51816 ms
May 24, 2018 12:29:27 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(382/420) took 548593 ms. Total solver calls (SAT/UNSAT): 34344(2837/31507)
May 24, 2018 12:29:31 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(392/420) took 551699 ms. Total solver calls (SAT/UNSAT): 34539(2853/31686)
May 24, 2018 12:29:32 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Finished co-enabling matrix. took 553081 ms. Total solver calls (SAT/UNSAT): 34650(2883/31767)
May 24, 2018 12:29:32 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeDoNotAccord
INFO: Computing Do-Not-Accords matrix : 420 transitions.
May 24, 2018 12:29:39 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed DNA matrix. took 6807 ms. Total solver calls (SAT/UNSAT): 339(0/339)
May 24, 2018 12:29:39 PM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 640752ms conformant to PINS in folder :/home/mcc/execution
May 24, 2018 12:29:47 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-6-ReachabilityCardinality-11
May 24, 2018 12:29:47 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-11(SAT) depth K=2 took 44649 ms
May 24, 2018 12:29:57 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-14(UNSAT) depth K=4 took 31021 ms
May 24, 2018 12:31:12 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-6-ReachabilityCardinality-12
May 24, 2018 12:31:12 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-12(SAT) depth K=2 took 84923 ms
May 24, 2018 12:31:48 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-15(UNSAT) depth K=4 took 111352 ms
May 24, 2018 12:32:35 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-6-ReachabilityCardinality-13
May 24, 2018 12:32:35 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-13(SAT) depth K=2 took 82986 ms
pins2lts-mc, 0.000: Registering PINS so language module
pins2lts-mc, 0.000, ** error **: out of memory trying to get 4294967296
java.lang.RuntimeException: Unexpected exception when executing ltsmin :CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -i, LamportFastMutExCOL6ReachabilityCardinality01==true], workingDir=/home/mcc/execution]
255
at fr.lip6.move.gal.application.LTSminRunner.checkProperty(LTSminRunner.java:167)
at fr.lip6.move.gal.application.LTSminRunner.access$9(LTSminRunner.java:122)
at fr.lip6.move.gal.application.LTSminRunner$1.run(LTSminRunner.java:91)
at java.lang.Thread.run(Thread.java:748)
May 24, 2018 12:34:16 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-6-ReachabilityCardinality-14
May 24, 2018 12:34:16 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-14(SAT) depth K=2 took 101591 ms
May 24, 2018 12:34:35 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-6-ReachabilityCardinality-15
May 24, 2018 12:34:35 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-15(SAT) depth K=2 took 18613 ms
May 24, 2018 12:34:57 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-00(UNSAT) depth K=5 took 188597 ms
May 24, 2018 12:35:57 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-6-ReachabilityCardinality-00
May 24, 2018 12:35:57 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-00(SAT) depth K=3 took 82127 ms
May 24, 2018 12:37:16 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-6-ReachabilityCardinality-01
May 24, 2018 12:37:16 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-01(SAT) depth K=3 took 78962 ms
May 24, 2018 12:40:16 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-6-ReachabilityCardinality-04
May 24, 2018 12:40:16 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-04(SAT) depth K=3 took 179886 ms
May 24, 2018 12:40:20 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-6-ReachabilityCardinality-06
May 24, 2018 12:40:20 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-06(SAT) depth K=3 took 4344 ms
ITS-tools command line returned an error code 137
May 24, 2018 12:43:45 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-6-ReachabilityCardinality-07
May 24, 2018 12:43:45 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-07(SAT) depth K=3 took 205042 ms
May 24, 2018 12:44:56 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-01(UNSAT) depth K=5 took 599425 ms
May 24, 2018 12:45:41 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-6-ReachabilityCardinality-08
May 24, 2018 12:45:41 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-08(SAT) depth K=3 took 115936 ms
May 24, 2018 12:46:53 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-6-ReachabilityCardinality-09
May 24, 2018 12:46:53 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-09(SAT) depth K=3 took 71793 ms
May 24, 2018 12:46:59 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-04(UNSAT) depth K=5 took 123179 ms
May 24, 2018 12:47:15 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-6-ReachabilityCardinality-10
May 24, 2018 12:47:15 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-10(SAT) depth K=3 took 22008 ms
May 24, 2018 12:49:03 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-6-ReachabilityCardinality-11
May 24, 2018 12:49:03 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-11(SAT) depth K=3 took 107937 ms
May 24, 2018 12:49:12 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-06(UNSAT) depth K=5 took 132843 ms
May 24, 2018 12:50:40 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-6-ReachabilityCardinality-12
May 24, 2018 12:50:40 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-12(SAT) depth K=3 took 96540 ms
May 24, 2018 12:52:08 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-6-ReachabilityCardinality-13
May 24, 2018 12:52:08 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-13(SAT) depth K=3 took 88428 ms
May 24, 2018 12:54:11 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-6-ReachabilityCardinality-14
May 24, 2018 12:54:11 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-14(SAT) depth K=3 took 123288 ms
May 24, 2018 12:54:38 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-07(UNSAT) depth K=5 took 325745 ms
May 24, 2018 12:55:08 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-6-ReachabilityCardinality-15
May 24, 2018 12:55:08 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-15(SAT) depth K=3 took 57128 ms
May 24, 2018 12:56:14 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-08(UNSAT) depth K=5 took 95761 ms
May 24, 2018 12:57:50 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-09(UNSAT) depth K=5 took 96628 ms
May 24, 2018 12:59:11 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-10(UNSAT) depth K=5 took 81241 ms
May 24, 2018 12:59:55 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-6-ReachabilityCardinality-00
May 24, 2018 12:59:55 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-00(SAT) depth K=4 took 286181 ms
May 24, 2018 1:02:19 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-6-ReachabilityCardinality-01
May 24, 2018 1:02:19 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-01(SAT) depth K=4 took 144447 ms
May 24, 2018 1:05:56 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-11(UNSAT) depth K=5 took 404461 ms
May 24, 2018 1:06:03 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-6-ReachabilityCardinality-04
May 24, 2018 1:06:03 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-04(SAT) depth K=4 took 223767 ms
May 24, 2018 1:07:37 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-12(UNSAT) depth K=5 took 101392 ms
May 24, 2018 1:08:51 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-6-ReachabilityCardinality-06
May 24, 2018 1:08:51 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-06(SAT) depth K=4 took 168075 ms
May 24, 2018 1:10:05 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-13(UNSAT) depth K=5 took 148058 ms
May 24, 2018 1:11:56 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-14(UNSAT) depth K=5 took 110581 ms
May 24, 2018 1:13:44 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-6-ReachabilityCardinality-07
May 24, 2018 1:13:44 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-07(SAT) depth K=4 took 293292 ms
May 24, 2018 1:16:44 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-15(UNSAT) depth K=5 took 287849 ms
May 24, 2018 1:17:08 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-6-ReachabilityCardinality-08
May 24, 2018 1:17:08 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-6-ReachabilityCardinality-08(SAT) depth K=4 took 204023 ms

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="LamportFastMutEx-COL-6"
export BK_EXAMINATION="ReachabilityCardinality"
export BK_TOOL="itstools"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

tar xzf /home/mcc/BenchKit/INPUTS/LamportFastMutEx-COL-6.tgz
mv LamportFastMutEx-COL-6 execution
cd execution
pwd
ls -lh

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3637"
echo " Executing tool itstools"
echo " Input is LamportFastMutEx-COL-6, examination is ReachabilityCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r116-csrt-152666474900089"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' ReachabilityCardinality.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;