Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Waiting for the VM to be ready (probing ssh)
..........................
/home/mcc/execution
total 1.3M
-rw-r--r-- 1 mcc users 40K May 15 18:54 CTLCardinality.txt
-rw-r--r-- 1 mcc users 114K May 15 18:54 CTLCardinality.xml
-rw-r--r-- 1 mcc users 24K May 15 18:54 CTLFireability.txt
-rw-r--r-- 1 mcc users 82K May 15 18:54 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K May 15 18:50 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.0K May 15 18:50 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 20K May 15 18:54 LTLCardinality.txt
-rw-r--r-- 1 mcc users 56K May 15 18:54 LTLCardinality.xml
-rw-r--r-- 1 mcc users 9.8K May 15 18:54 LTLFireability.txt
-rw-r--r-- 1 mcc users 32K May 15 18:54 LTLFireability.xml
-rw-r--r-- 1 mcc users 37K May 15 18:54 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 106K May 15 18:54 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 104 May 15 18:54 ReachabilityDeadlock.txt
-rw-r--r-- 1 mcc users 342 May 15 18:54 ReachabilityDeadlock.xml
-rw-r--r-- 1 mcc users 29K May 15 18:54 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 100K May 15 18:54 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 12K May 15 18:54 UpperBounds.txt
-rw-r--r-- 1 mcc users 25K May 15 18:54 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 May 15 18:50 equiv_col
-rw-r--r-- 1 mcc users 2 May 15 18:50 instance
-rw-r--r-- 1 mcc users 6 May 15 18:50 iscolored
-rw-r--r-- 1 mcc users 511K May 15 18:50 model.pnml
=====================================================================
Generated by BenchKit 2-3637
Executing tool irma4mcc-full
Input is Peterson-PT-4, examination is CTLCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r114-csrt-152666472800570
=====================================================================

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME Peterson-PT-4-CTLCardinality-00
FORMULA_NAME Peterson-PT-4-CTLCardinality-01
FORMULA_NAME Peterson-PT-4-CTLCardinality-02
FORMULA_NAME Peterson-PT-4-CTLCardinality-03
FORMULA_NAME Peterson-PT-4-CTLCardinality-04
FORMULA_NAME Peterson-PT-4-CTLCardinality-05
FORMULA_NAME Peterson-PT-4-CTLCardinality-06
FORMULA_NAME Peterson-PT-4-CTLCardinality-07
FORMULA_NAME Peterson-PT-4-CTLCardinality-08
FORMULA_NAME Peterson-PT-4-CTLCardinality-09
FORMULA_NAME Peterson-PT-4-CTLCardinality-10
FORMULA_NAME Peterson-PT-4-CTLCardinality-11
FORMULA_NAME Peterson-PT-4-CTLCardinality-12
FORMULA_NAME Peterson-PT-4-CTLCardinality-13
FORMULA_NAME Peterson-PT-4-CTLCardinality-14
FORMULA_NAME Peterson-PT-4-CTLCardinality-15

=== Now, execution of the tool begins

BK_START 1527142898096


BK_STOP 1527143123083

--------------------
content from stderr:

Prefix is 65b80f64.
Reading known information in /usr/share/mcc4mcc/65b80f64-known.json.
Reading learned information in /usr/share/mcc4mcc/65b80f64-learned.json.
Reading value translations in /usr/share/mcc4mcc/65b80f64-values.json.
Using directory /home/mcc/execution for input, as it contains a model.pnml file.
Using Peterson-PT-4 as instance name.
Using Peterson as model name.
Using algorithm or tool bmdt.
Model characteristics are: {'Examination': 'CTLCardinality', 'Place/Transition': True, 'Colored': True, 'Relative-Time': 1, 'Relative-Memory': 1, 'Ordinary': True, 'Simple Free Choice': False, 'Extended Free Choice': False, 'State Machine': False, 'Marked Graph': False, 'Connected': True, 'Strongly Connected': True, 'Source Place': False, 'Sink Place': False, 'Source Transition': False, 'Sink Transition': False, 'Loop Free': False, 'Conservative': True, 'Sub-Conservative': True, 'Nested Units': False, 'Safe': True, 'Deadlock': False, 'Reversible': True, 'Quasi Live': None, 'Live': None}.
Known tools are: [{'Time': 1351828, 'Memory': 15936.59, 'Tool': 'lola'}, {'Time': 1509035, 'Memory': 5607.04, 'Tool': 'lola'}].
Learned tools are: [{'Tool': 'lola'}].
Learned tool lola is 1.0x far from the best tool lola.
CTLCardinality lola Peterson-PT-4...

Time: 3600 - MCC
----- Start make prepare stdout -----
----- Start make prepare stderr -----
===========================================================================================
Peterson-PT-4: translating PT Petri net model.pnml into LoLA format
===========================================================================================
translating PT Petri net complete


checking for too many tokens
===========================================================================================
Peterson-PT-4: translating PT formula CTLCardinality into LoLA format
===========================================================================================
translating formula complete
touch formulae;
----- Start make result stderr -----
----- Start make result stdout -----
CTLCardinality @ Peterson-PT-4 @ 3539 seconds
Makefile:222: recipe for target 'verify' failed
----- Start make result stdout -----
make: [verify] Error 134 (ignored)
----- Start make result stderr -----
lola: LoLA will run for 3539 seconds at most (--timelimit)
lola: NET
lola: reading net from model.pnml.lola
lola: finished parsing
lola: closed net file model.pnml.lola
lola: 1170/65536 symbol table entries, 0 collisions
lola: preprocessing...
lola: finding significant places
lola: 480 places, 690 transitions, 461 significant places
lola: computing forward-conflicting sets
lola: computing back-conflicting sets
lola: 1055 transition conflict sets
lola: TASK
lola: reading formula from Peterson-PT-4-CTLCardinality.task
lola: ((TestTurn_0_0 + TestTurn_0_1 + TestTurn_0_2 + TestTurn_0_3 + TestTurn_1_0 + TestTurn_1_1 + TestTurn_1_2 + TestTurn_1_3 + TestTurn_2_0 + TestTurn_2_1 + TestTurn_2_2 + TestTurn_2_3 + TestTurn_3_0 + TestTurn_3_1 + TestTurn_3_2 + TestTurn_3_3 + TestTurn_4_0 + TestTurn_4_1 + TestTurn_4_2 + TestTurn_4_3 + 1 <= AskForSection_0_0 + AskForSection_0_1 + AskForSection_0_2 + AskForSection_0_3 + AskForSection_1_0 + AskForSection_1_1 + AskForSection_1_2 + AskForSection_1_3 + AskForSection_2_0 + AskForSection_2_1 + AskForSection_2_2 + AskForSection_2_3 + AskForSection_3_0 + AskForSection_3_1 + AskForSection_3_2 + AskForSection_3_3 + AskForSection_4_3 + AskForSection_4_0 + AskForSection_4_1 + AskForSection_4_2) OR A (G ((((1 <= IsEndLoop_0_0_0 + IsEndLoop_0_0_1 + IsEndLoop_0_0_2 + IsEndLoop_0_0_3 + IsEndLoop_0_0_4 + IsEndLoop_0_1_0 + IsEndLoop_0_1_1 + IsEndLoop_0_1_2 + IsEndLoop_0_1_3 + IsEndLoop_0_1_4 + IsEndLoop_3_0_0 + IsEndLoop_3_0_1 + IsEndLoop_3_0_2 + IsEndLoop_3_0_3 + IsEndLoop_3_0_4 + IsEndLoop_0_2_0 + IsEndLoop_0_2_1 + IsEndLoop_0_2_2 + IsEndLoop_0_2_3 + IsEndLoop_0_2_4 + IsEndLoop_3_1_0 + IsEndLoop_3_1_1 + IsEndLoop_3_1_2 + IsEndLoop_3_1_3 + IsEndLoop_3_1_4 + IsEndLoop_0_3_0 + IsEndLoop_0_3_1 + IsEndLoop_0_3_2 + IsEndLoop_0_3_3 + IsEndLoop_0_3_4 + IsEndLoop_3_2_0 + IsEndLoop_3_2_1 + IsEndLoop_3_2_2 + IsEndLoop_3_2_3 + IsEndLoop_3_2_4 + IsEndLoop_3_3_0 + IsEndLoop_3_3_1 + IsEndLoop_3_3_2 + IsEndLoop_3_3_3 + IsEndLoop_3_3_4 + IsEndLoop_1_0_0 + IsEndLoop_1_0_1 + IsEndLoop_1_0_2 + IsEndLoop_1_0_3 + IsEndLoop_1_0_4 + IsEndLoop_1_1_0 + IsEndLoop_1_1_1 + IsEndLoop_1_1_2 + IsEndLoop_1_1_3 + IsEndLoop_1_1_4 + IsEndLoop_4_0_0 + IsEndLoop_4_0_1 + IsEndLoop_4_0_2 + IsEndLoop_4_0_3 + IsEndLoop_4_0_4 + IsEndLoop_1_2_0 + IsEndLoop_1_2_1 + IsEndLoop_1_2_2 + IsEndLoop_1_2_3 + IsEndLoop_1_2_4 + IsEndLoop_4_1_0 + IsEndLoop_4_1_1 + IsEndLoop_4_1_2 + IsEndLoop_4_1_3 + IsEndLoop_4_1_4 + IsEndLoop_1_3_0 + IsEndLoop_1_3_1 + IsEndLoop_1_3_2 + IsEndLoop_1_3_3 + IsEndLoop_1_3_4 + IsEndLoop_4_2_0 + IsEndLoop_4_2_1 + IsEndLoop_4_2_2 + IsEndLoop_4_2_3 + IsEndLoop_4_2_4 + IsEndLoop_4_3_0 + IsEndLoop_4_3_1 + IsEndLoop_4_3_2 + IsEndLoop_4_3_3 + IsEndLoop_4_3_4 + IsEndLoop_2_0_0 + IsEndLoop_2_0_1 + IsEndLoop_2_0_2 + IsEndLoop_2_0_3 + IsEndLoop_2_0_4 + IsEndLoop_2_1_0 + IsEndLoop_2_1_1 + IsEndLoop_2_1_2 + IsEndLoop_2_1_3 + IsEndLoop_2_1_4 + IsEndLoop_2_2_0 + IsEndLoop_2_2_1 + IsEndLoop_2_2_2 + IsEndLoop_2_2_3 + IsEndLoop_2_2_4 + IsEndLoop_2_3_0 + IsEndLoop_2_3_1 + IsEndLoop_2_3_2 + IsEndLoop_2_3_3 + IsEndLoop_2_3_4) AND (CS_0 + CS_1 + CS_2 + CS_3 + CS_4 <= EndTurn_0_2 + EndTurn_1_0 + EndTurn_1_1 + EndTurn_1_2 + EndTurn_1_3 + EndTurn_0_1 + EndTurn_2_0 + EndTurn_2_1 + EndTurn_2_2 + EndTurn_2_3 + EndTurn_3_0 + EndTurn_3_1 + EndTurn_3_2 + EndTurn_3_3 + EndTurn_4_0 + EndTurn_4_1 + EndTurn_4_2 + EndTurn_4_3 + EndTurn_0_0 + EndTurn_0_3)) OR (CS_0 + CS_1 + CS_2 + CS_3 + CS_4 <= 1))))) : E (G (((TestTurn_0_0 + TestTurn_0_1 + TestTurn_0_2 + TestTurn_0_3 + TestTurn_1_0 + TestTurn_1_1 + TestTurn_1_2 + TestTurn_1_3 + TestTurn_2_0 + TestTurn_2_1 + TestTurn_2_2 + TestTurn_2_3 + TestTurn_3_0 + TestTurn_3_1 + TestTurn_3_2 + TestTurn_3_3 + TestTurn_4_0 + TestTurn_4_1 + TestTurn_4_2 + TestTurn_4_3 <= CS_0 + CS_1 + CS_2 + CS_3 + CS_4) OR (2 <= TestAlone_4_3_0 + TestAlone_4_3_1 + TestAlone_4_3_2 + TestAlone_4_3_3 + TestAlone_2_0_0 + TestAlone_2_0_1 + TestAlone_2_0_3 + TestAlone_2_0_4 + TestAlone_2_1_0 + TestAlone_2_1_1 + TestAlone_2_1_3 + TestAlone_2_1_4 + TestAlone_2_2_0 + TestAlone_2_2_1 + TestAlone_2_2_3 + TestAlone_2_2_4 + TestAlone_2_3_0 + TestAlone_2_3_1 + TestAlone_2_3_3 + TestAlone_2_3_4 + TestAlone_0_0_1 + TestAlone_0_0_2 + TestAlone_0_0_3 + TestAlone_0_0_4 + TestAlone_0_1_1 + TestAlone_0_1_2 + TestAlone_0_1_3 + TestAlone_0_1_4 + TestAlone_3_0_0 + TestAlone_3_0_1 + TestAlone_3_0_2 + TestAlone_3_0_4 + TestAlone_4_2_2 + TestAlone_0_2_1 + TestAlone_0_2_2 + TestAlone_0_2_3 + TestAlone_0_2_4 + TestAlone_3_1_0 + TestAlone_3_1_1 + TestAlone_3_1_2 + TestAlone_3_1_4 + TestAlone_4_2_1 + TestAlone_4_2_0 + TestAlone_0_3_1 + TestAlone_0_3_2 + TestAlone_0_3_3 + TestAlone_0_3_4 + TestAlone_3_2_0 + TestAlone_3_2_1 + TestAlone_3_2_2 + TestAlone_3_2_4 + TestAlone_3_3_0 + TestAlone_3_3_1 + TestAlone_3_3_2 + TestAlone_3_3_4 + TestAlone_1_0_0 + TestAlone_1_0_2 + TestAlone_1_0_3 + TestAlone_1_0_4 + TestAlone_1_1_0 + TestAlone_1_1_2 + TestAlone_1_1_3 + TestAlone_1_1_4 + TestAlone_4_0_0 + TestAlone_4_0_1 + TestAlone_4_0_2 + TestAlone_4_0_3 + TestAlone_1_2_0 + TestAlone_1_2_2 + TestAlone_1_2_3 + TestAlone_1_2_4 + TestAlone_4_1_0 + TestAlone_4_1_1 + TestAlone_4_1_2 + TestAlone_4_1_3 + TestAlone_1_3_0 + TestAlone_1_3_2 + TestAlone_1_3_3 + TestAlone_1_3_4 + TestAlone_4_2_3) OR (3 <= BeginLoop_4_3_0 + BeginLoop_4_3_1 + BeginLoop_4_3_2 + BeginLoop_4_3_3 + BeginLoop_4_3_4 + BeginLoop_2_0_0 + BeginLoop_2_0_1 + BeginLoop_2_0_2 + BeginLoop_2_0_3 + BeginLoop_2_0_4 + BeginLoop_2_1_0 + BeginLoop_2_1_1 + BeginLoop_2_1_2 + BeginLoop_2_1_3 + BeginLoop_2_1_4 + BeginLoop_2_2_0 + BeginLoop_2_2_1 + BeginLoop_2_2_2 + BeginLoop_2_2_3 + BeginLoop_2_2_4 + BeginLoop_2_3_0 + BeginLoop_2_3_1 + BeginLoop_2_3_2 + BeginLoop_2_3_3 + BeginLoop_2_3_4 + BeginLoop_0_0_0 + BeginLoop_0_0_1 + BeginLoop_0_0_2 + BeginLoop_0_0_3 + BeginLoop_0_0_4 + BeginLoop_0_1_0 + BeginLoop_0_1_1 + BeginLoop_0_1_2 + BeginLoop_0_1_3 + BeginLoop_0_1_4 + BeginLoop_3_0_0 + BeginLoop_3_0_1 + BeginLoop_3_0_2 + BeginLoop_3_0_3 + BeginLoop_3_0_4 + BeginLoop_0_2_0 + BeginLoop_0_2_1 + BeginLoop_0_2_2 + BeginLoop_0_2_3 + BeginLoop_0_2_4 + BeginLoop_3_1_0 + BeginLoop_3_1_1 + BeginLoop_3_1_2 + BeginLoop_3_1_3 + BeginLoop_3_1_4 + BeginLoop_0_3_0 + BeginLoop_0_3_1 + BeginLoop_0_3_2 + BeginLoop_0_3_3 + BeginLoop_0_3_4 + BeginLoop_3_2_0 + BeginLoop_3_2_1 + BeginLoop_3_2_2 + BeginLoop_3_2_3 + BeginLoop_3_2_4 + BeginLoop_3_3_0 + BeginLoop_3_3_1 + BeginLoop_3_3_2 + BeginLoop_3_3_3 + BeginLoop_3_3_4 + BeginLoop_4_2_4 + BeginLoop_4_2_3 + BeginLoop_1_0_0 + BeginLoop_1_0_1 + BeginLoop_1_0_2 + BeginLoop_1_0_3 + BeginLoop_1_0_4 + BeginLoop_1_1_0 + BeginLoop_1_1_1 + BeginLoop_1_1_2 + BeginLoop_1_1_3 + BeginLoop_1_1_4 + BeginLoop_4_0_0 + BeginLoop_4_0_1 + BeginLoop_4_0_2 + BeginLoop_4_0_3 + BeginLoop_4_0_4 + BeginLoop_1_2_0 + BeginLoop_1_2_1 + BeginLoop_1_2_2 + BeginLoop_1_2_3 + BeginLoop_1_2_4 + BeginLoop_4_1_0 + BeginLoop_4_1_1 + BeginLoop_4_1_2 + BeginLoop_4_1_3 + BeginLoop_4_1_4 + BeginLoop_4_2_2 + BeginLoop_1_3_0 + BeginLoop_1_3_1 + BeginLoop_1_3_2 + BeginLoop_1_3_3 + BeginLoop_1_3_4 + BeginLoop_4_2_1 + BeginLoop_4_2_0) OR (((TestTurn_0_0 + TestTurn_0_1 + TestTurn_0_2 + TestTurn_0_3 + TestTurn_1_0 + TestTurn_1_1 + TestTurn_1_2 + TestTurn_1_3 + TestTurn_2_0 + TestTurn_2_1 + TestTurn_2_2 + TestTurn_2_3 + TestTurn_3_0 + TestTurn_3_1 + TestTurn_3_2 + TestTurn_3_3 + TestTurn_4_0 + TestTurn_4_1 + TestTurn_4_2 + TestTurn_4_3 <= EndTurn_0_2 + EndTurn_1_0 + EndTurn_1_1 + EndTurn_1_2 + EndTurn_1_3 + EndTurn_0_1 + EndTurn_2_0 + EndTurn_2_1 + EndTurn_2_2 + EndTurn_2_3 + EndTurn_3_0 + EndTurn_3_1 + EndTurn_3_2 + EndTurn_3_3 + EndTurn_4_0 + EndTurn_4_1 + EndTurn_4_2 + EndTurn_4_3 + EndTurn_0_0 + EndTurn_0_3) OR (AskForSection_0_0 + AskForSection_0_1 + AskForSection_0_2 + AskForSection_0_3 + AskForSection_1_0 + AskForSection_1_1 + AskForSection_1_2 + AskForSection_1_3 + AskForSection_2_0 + AskForSection_2_1 + AskForSection_2_2 + AskForSection_2_3 + AskForSection_3_0 + AskForSection_3_1 + AskForSection_3_2 + AskForSection_3_3 + AskForSection_4_3 + AskForSection_4_0 + AskForSection_4_1 + AskForSection_4_2 <= TestIdentity_1_0_0 + TestIdentity_1_0_1 + TestIdentity_1_0_2 + TestIdentity_1_0_3 + TestIdentity_1_0_4 + TestIdentity_1_1_0 + TestIdentity_1_1_1 + TestIdentity_1_1_2 + TestIdentity_1_1_3 + TestIdentity_1_1_4 + TestIdentity_4_0_0 + TestIdentity_4_0_1 + TestIdentity_4_0_2 + TestIdentity_4_0_3 + TestIdentity_4_0_4 + TestIdentity_1_2_0 + TestIdentity_1_2_1 + TestIdentity_1_2_2 + TestIdentity_1_2_3 + TestIdentity_1_2_4 + TestIdentity_4_1_0 + TestIdentity_4_1_1 + TestIdentity_4_1_2 + TestIdentity_4_1_3 + TestIdentity_4_1_4 + TestIdentity_1_3_0 + TestIdentity_1_3_1 + TestIdentity_1_3_2 + TestIdentity_1_3_3 + TestIdentity_1_3_4 + TestIdentity_4_2_0 + TestIdentity_4_2_1 + TestIdentity_4_2_2 + TestIdentity_4_2_3 + TestIdentity_4_2_4 + TestIdentity_4_3_0 + TestIdentity_4_3_1 + TestIdentity_4_3_2 + TestIdentity_4_3_3 + TestIdentity_4_3_4 + TestIdentity_2_0_0 + TestIdentity_2_0_1 + TestIdentity_2_0_2 + TestIdentity_2_0_3 + TestIdentity_2_0_4 + TestIdentity_2_1_0 + TestIdentity_2_1_1 + TestIdentity_2_1_2 + TestIdentity_2_1_3 + TestIdentity_2_1_4 + TestIdentity_2_2_0 + TestIdentity_2_2_1 + TestIdentity_2_2_2 + TestIdentity_2_2_3 + TestIdentity_2_2_4 + TestIdentity_2_3_0 + TestIdentity_2_3_1 + TestIdentity_2_3_2 + TestIdentity_2_3_3 + TestIdentity_2_3_4 + TestIdentity_0_0_0 + TestIdentity_0_0_1 + TestIdentity_0_0_2 + TestIdentity_0_0_3 + TestIdentity_0_0_4 + TestIdentity_0_1_0 + TestIdentity_0_1_1 + TestIdentity_0_1_2 + TestIdentity_0_1_3 + TestIdentity_0_1_4 + TestIdentity_3_0_0 + TestIdentity_3_0_1 + TestIdentity_3_0_2 + TestIdentity_3_0_3 + TestIdentity_3_0_4 + TestIdentity_0_2_0 + TestIdentity_0_2_1 + TestIdentity_0_2_2 + TestIdentity_0_2_3 + TestIdentity_0_2_4 + TestIdentity_3_1_0 + TestIdentity_3_1_1 + TestIdentity_3_1_2 + TestIdentity_3_1_3 + TestIdentity_3_1_4 + TestIdentity_0_3_0 + TestIdentity_0_3_1 + TestIdentity_0_3_2 + TestIdentity_0_3_3 + TestIdentity_0_3_4 + TestIdentity_3_2_0 + TestIdentity_3_2_1 + TestIdentity_3_2_2 + TestIdentity_3_2_3 + TestIdentity_3_2_4 + TestIdentity_3_3_0 + TestIdentity_3_3_1 + TestIdentity_3_3_2 + TestIdentity_3_3_3 + TestIdentity_3_3_4)) AND (AskForSection_0_0 + AskForSection_0_1 + AskForSection_0_2 + AskForSection_0_3 + AskForSection_1_0 + AskForSection_1_1 + AskForSection_1_2 + AskForSection_1_3 + AskForSection_2_0 + AskForSection_2_1 + AskForSection_2_2 + AskForSection_2_3 + AskForSection_3_0 + AskForSection_3_1 + AskForSection_3_2 + AskForSection_3_3 + AskForSection_4_3 + AskForSection_4_0 + AskForSection_4_1 + AskForSection_4_2 <= TestTurn_0_0 + TestTurn_0_1 + TestTurn_0_2 + TestTurn_0_3 + TestTurn_1_0 + TestTurn_1_1 + TestTurn_1_2 + TestTurn_1_3 + TestTurn_2_0 + TestTurn_2_1 + TestTurn_2_2 + TestTurn_2_3 + TestTurn_3_0 + TestTurn_3_1 + TestTurn_3_2 + TestTurn_3_3 + TestTurn_4_0 + TestTurn_4_1 + TestTurn_4_2 + TestTurn_4_3))))) : (((1 <= TestIdentity_1_0_0 + TestIdentity_1_0_1 + TestIdentity_1_0_2 + TestIdentity_1_0_3 + TestIdentity_1_0_4 + TestIdentity_1_1_0 + TestIdentity_1_1_1 + TestIdentity_1_1_2 + TestIdentity_1_1_3 + TestIdentity_1_1_4 + TestIdentity_4_0_0 + TestIdentity_4_0_1 + TestIdentity_4_0_2 + TestIdentity_4_0_3 + TestIdentity_4_0_4 + TestIdentity_1_2_0 + TestIdentity_1_2_1 + TestIdentity_1_2_2 + TestIdentity_1_2_3 + TestIdentity_1_2_4 + TestIdentity_4_1_0 + TestIdentity_4_1_1 + TestIdentity_4_1_2 + TestIdentity_4_1_3 + TestIdentity_4_1_4 + TestIdentity_1_3_0 + TestIdentity_1_3_1 + TestIdentity_1_3_2 + TestIdentity_1_3_3 + TestIdentity_1_3_4 + TestIdentity_4_2_0 + TestIdentity_4_2_1 + TestIdentity_4_2_2 + TestIdentity_4_2_3 + TestIdentity_4_2_4 + TestIdentity_4_3_0 + TestIdentity_4_3_1 + TestIdentity_4_3_2 + TestIdentity_4_3_3 + TestIdentity_4_3_4 + TestIdentity_2_0_0 + TestIdentity_2_0_1 + TestIdentity_2_0_2 + TestIdentity_2_0_3 + TestIdentity_2_0_4 + TestIdentity_2_1_0 + TestIdentity_2_1_1 + TestIdentity_2_1_2 + TestIdentity_2_1_3 + TestIdentity_2_1_4 + TestIdentity_2_2_0 + TestIdentity_2_2_1 + TestIdentity_2_2_2 + TestIdentity_2_2_3 + TestIdentity_2_2_4 + TestIdentity_2_3_0 + TestIdentity_2_3_1 + TestIdentity_2_3_2 + TestIdentity_2_3_3 + TestIdentity_2_3_4 + TestIdentity_0_0_0 + TestIdentity_0_0_1 + TestIdentity_0_0_2 + TestIdentity_0_0_3 + TestIdentity_0_0_4 + TestIdentity_0_1_0 + TestIdentity_0_1_1 + TestIdentity_0_1_2 + TestIdentity_0_1_3 + TestIdentity_0_1_4 + TestIdentity_3_0_0 + TestIdentity_3_0_1 + TestIdentity_3_0_2 + TestIdentity_3_0_3 + TestIdentity_3_0_4 + TestIdentity_0_2_0 + TestIdentity_0_2_1 + TestIdentity_0_2_2 + TestIdentity_0_2_3 + TestIdentity_0_2_4 + TestIdentity_3_1_0 + TestIdentity_3_1_1 + TestIdentity_3_1_2 + TestIdentity_3_1_3 + TestIdentity_3_1_4 + TestIdentity_0_3_0 + TestIdentity_0_3_1 + TestIdentity_0_3_2 + TestIdentity_0_3_3 + TestIdentity_0_3_4 + TestIdentity_3_2_0 + TestIdentity_3_2_1 + TestIdentity_3_2_2 + TestIdentity_3_2_3 + TestIdentity_3_2_4 + TestIdentity_3_3_0 + TestIdentity_3_3_1 + TestIdentity_3_3_2 + TestIdentity_3_3_3 + TestIdentity_3_3_4)) OR (A (G ((AskForSection_0_0 + AskForSection_0_1 + AskForSection_0_2 + AskForSection_0_3 + AskForSection_1_0 + AskForSection_1_1 + AskForSection_1_2 + AskForSection_1_3 + AskForSection_2_0 + AskForSection_2_1 + AskForSection_2_2 + AskForSection_2_3 + AskForSection_3_0 + AskForSection_3_1 + AskForSection_3_2 + AskForSection_3_3 + AskForSection_4_3 + AskForSection_4_0 + AskForSection_4_1 + AskForSection_4_2 <= WantSection_4_T + WantSection_4_F + WantSection_3_T + WantSection_3_F + WantSection_2_T + WantSection_2_F + WantSection_1_T + WantSection_1_F + WantSection_0_T + WantSection_0_F))) OR NOT(A (X ((3 <= Idle_0 + Idle_1 + Idle_2 + Idle_3 + Idle_4)))))) : ((E (F ((3 <= IsEndLoop_0_0_0 + IsEndLoop_0_0_1 + IsEndLoop_0_0_2 + IsEndLoop_0_0_3 + IsEndLoop_0_0_4 + IsEndLoop_0_1_0 + IsEndLoop_0_1_1 + IsEndLoop_0_1_2 + IsEndLoop_0_1_3 + IsEndLoop_0_1_4 + IsEndLoop_3_0_0 + IsEndLoop_3_0_1 + IsEndLoop_3_0_2 + IsEndLoop_3_0_3 + IsEndLoop_3_0_4 + IsEndLoop_0_2_0 + IsEndLoop_0_2_1 + IsEndLoop_0_2_2 + IsEndLoop_0_2_3 + IsEndLoop_0_2_4 + IsEndLoop_3_1_0 + IsEndLoop_3_1_1 + IsEndLoop_3_1_2 + IsEndLoop_3_1_3 + IsEndLoop_3_1_4 + IsEndLoop_0_3_0 + IsEndLoop_0_3_1 + IsEndLoop_0_3_2 + IsEndLoop_0_3_3 + IsEndLoop_0_3_4 + IsEndLoop_3_2_0 + IsEndLoop_3_2_1 + IsEndLoop_3_2_2 + IsEndLoop_3_2_3 + IsEndLoop_3_2_4 + IsEndLoop_3_3_0 + IsEndLoop_3_3_1 + IsEndLoop_3_3_2 + IsEndLoop_3_3_3 + IsEndLoop_3_3_4 + IsEndLoop_1_0_0 + IsEndLoop_1_0_1 + IsEndLoop_1_0_2 + IsEndLoop_1_0_3 + IsEndLoop_1_0_4 + IsEndLoop_1_1_0 + IsEndLoop_1_1_1 + IsEndLoop_1_1_2 + IsEndLoop_1_1_3 + IsEndLoop_1_1_4 + IsEndLoop_4_0_0 + IsEndLoop_4_0_1 + IsEndLoop_4_0_2 + IsEndLoop_4_0_3 + IsEndLoop_4_0_4 + IsEndLoop_1_2_0 + IsEndLoop_1_2_1 + IsEndLoop_1_2_2 + IsEndLoop_1_2_3 + IsEndLoop_1_2_4 + IsEndLoop_4_1_0 + IsEndLoop_4_1_1 + IsEndLoop_4_1_2 + IsEndLoop_4_1_3 + IsEndLoop_4_1_4 + IsEndLoop_1_3_0 + IsEndLoop_1_3_1 + IsEndLoop_1_3_2 + IsEndLoop_1_3_3 + IsEndLoop_1_3_4 + IsEndLoop_4_2_0 + IsEndLoop_4_2_1 + IsEndLoop_4_2_2 + IsEndLoop_4_2_3 + IsEndLoop_4_2_4 + IsEndLoop_4_3_0 + IsEndLoop_4_3_1 + IsEndLoop_4_3_2 + IsEndLoop_4_3_3 + IsEndLoop_4_3_4 + IsEndLoop_2_0_0 + IsEndLoop_2_0_1 + IsEndLoop_2_0_2 + IsEndLoop_2_0_3 + IsEndLoop_2_0_4 + IsEndLoop_2_1_0 + IsEndLoop_2_1_1 + IsEndLoop_2_1_2 + IsEndLoop_2_1_3 + IsEndLoop_2_1_4 + IsEndLoop_2_2_0 + IsEndLoop_2_2_1 + IsEndLoop_2_2_2 + IsEndLoop_2_2_3 + IsEndLoop_2_2_4 + IsEndLoop_2_3_0 + IsEndLoop_2_3_1 + IsEndLoop_2_3_2 + IsEndLoop_2_3_3 + IsEndLoop_2_3_4))) OR ((3 <= TestTurn_0_0 + TestTurn_0_1 + TestTurn_0_2 + TestTurn_0_3 + TestTurn_1_0 + TestTurn_1_1 + TestTurn_1_2 + TestTurn_1_3 + TestTurn_2_0 + TestTurn_2_1 + TestTurn_2_2 + TestTurn_2_3 + TestTurn_3_0 + TestTurn_3_1 + TestTurn_3_2 + TestTurn_3_3 + TestTurn_4_0 + TestTurn_4_1 + TestTurn_4_2 + TestTurn_4_3) AND ((Turn_2_0 + Turn_2_1 + Turn_2_2 + Turn_2_3 + Turn_3_0 + Turn_3_1 + Turn_3_2 + Turn_3_3 + Turn_1_3 + Turn_1_2 + Turn_1_1 + Turn_1_0 + Turn_0_0 + Turn_0_1 + Turn_0_2 + Turn_0_3 + Turn_0_4 + Turn_1_4 + Turn_3_4 + Turn_2_4 <= WantSection_4_T + WantSection_4_F + WantSection_3_T + WantSection_3_F + WantSection_2_T + WantSection_2_F + WantSection_1_T + WantSection_1_F + WantSection_0_T + WantSection_0_F) OR (TestIdentity_1_0_0 + TestIdentity_1_0_1 + TestIdentity_1_0_2 + TestIdentity_1_0_3 + TestIdentity_1_0_4 + TestIdentity_1_1_0 + TestIdentity_1_1_1 + TestIdentity_1_1_2 + TestIdentity_1_1_3 + TestIdentity_1_1_4 + TestIdentity_4_0_0 + TestIdentity_4_0_1 + TestIdentity_4_0_2 + TestIdentity_4_0_3 + TestIdentity_4_0_4 + TestIdentity_1_2_0 + TestIdentity_1_2_1 + TestIdentity_1_2_2 + TestIdentity_1_2_3 + TestIdentity_1_2_4 + TestIdentity_4_1_0 + TestIdentity_4_1_1 + TestIdentity_4_1_2 + TestIdentity_4_1_3 + TestIdentity_4_1_4 + TestIdentity_1_3_0 + TestIdentity_1_3_1 + TestIdentity_1_3_2 + TestIdentity_1_3_3 + TestIdentity_1_3_4 + TestIdentity_4_2_0 + TestIdentity_4_2_1 + TestIdentity_4_2_2 + TestIdentity_4_2_3 + TestIdentity_4_2_4 + TestIdentity_4_3_0 + TestIdentity_4_3
_1 + TestIdentity_4_3_2 + TestIdentity_4_3_3 + TestIdentity_4_3_4 + TestIdentity_2_0_0 + TestIdentity_2_0_1 + TestIdentity_2_0_2 + TestIdentity_2_0_3 + TestIdentity_2_0_4 + TestIdentity_2_1_0 + TestIdentity_2_1_1 + TestIdentity_2_1_2 + TestIdentity_2_1_3 + TestIdentity_2_1_4 + TestIdentity_2_2_0 + TestIdentity_2_2_1 + TestIdentity_2_2_2 + TestIdentity_2_2_3 + TestIdentity_2_2_4 + TestIdentity_2_3_0 + TestIdentity_2_3_1 + TestIdentity_2_3_2 + TestIdentity_2_3_3 + TestIdentity_2_3_4 + TestIdentity_0_0_0 + TestIdentity_0_0_1 + TestIdentity_0_0_2 + TestIdentity_0_0_3 + TestIdentity_0_0_4 + TestIdentity_0_1_0 + TestIdentity_0_1_1 + TestIdentity_0_1_2 + TestIdentity_0_1_3 + TestIdentity_0_1_4 + TestIdentity_3_0_0 + TestIdentity_3_0_1 + TestIdentity_3_0_2 + TestIdentity_3_0_3 + TestIdentity_3_0_4 + TestIdentity_0_2_0 + TestIdentity_0_2_1 + TestIdentity_0_2_2 + TestIdentity_0_2_3 + TestIdentity_0_2_4 + TestIdentity_3_1_0 + TestIdentity_3_1_1 + TestIdentity_3_1_2 + TestIdentity_3_1_3 + TestIdentity_3_1_4 + TestIdentity_0_3_0 + TestIdentity_0_3_1 + TestIdentity_0_3_2 + TestIdentity_0_3_3 + TestIdentity_0_3_4 + TestIdentity_3_2_0 + TestIdentity_3_2_1 + TestIdentity_3_2_2 + TestIdentity_3_2_3 + TestIdentity_3_2_4 + TestIdentity_3_3_0 + TestIdentity_3_3_1 + TestIdentity_3_3_2 + TestIdentity_3_3_3 + TestIdentity_3_3_4 <= Turn_2_0 + Turn_2_1 + Turn_2_2 + Turn_2_3 + Turn_3_0 + Turn_3_1 + Turn_3_2 + Turn_3_3 + Turn_1_3 + Turn_1_2 + Turn_1_1 + Turn_1_0 + Turn_0_0 + Turn_0_1 + Turn_0_2 + Turn_0_3 + Turn_0_4 + Turn_1_4 + Turn_3_4 + Turn_2_4) OR (1 <= WantSection_4_T + WantSection_4_F + WantSection_3_T + WantSection_3_F + WantSection_2_T + WantSection_2_F + WantSection_1_T + WantSection_1_F + WantSection_0_T + WantSection_0_F)))) OR NOT(E (F ((TestTurn_0_0 + TestTurn_0_1 + TestTurn_0_2 + TestTurn_0_3 + TestTurn_1_0 + TestTurn_1_1 + TestTurn_1_2 + TestTurn_1_3 + TestTurn_2_0 + TestTurn_2_1 + TestTurn_2_2 + TestTurn_2_3 + TestTurn_3_0 + TestTurn_3_1 + TestTurn_3_2 + TestTurn_3_3 + TestTurn_4_0 + TestTurn_4_1 + TestTurn_4_2 + TestTurn_4_3 <= IsEndLoop_0_0_0 + IsEndLoop_0_0_1 + IsEndLoop_0_0_2 + IsEndLoop_0_0_3 + IsEndLoop_0_0_4 + IsEndLoop_0_1_0 + IsEndLoop_0_1_1 + IsEndLoop_0_1_2 + IsEndLoop_0_1_3 + IsEndLoop_0_1_4 + IsEndLoop_3_0_0 + IsEndLoop_3_0_1 + IsEndLoop_3_0_2 + IsEndLoop_3_0_3 + IsEndLoop_3_0_4 + IsEndLoop_0_2_0 + IsEndLoop_0_2_1 + IsEndLoop_0_2_2 + IsEndLoop_0_2_3 + IsEndLoop_0_2_4 + IsEndLoop_3_1_0 + IsEndLoop_3_1_1 + IsEndLoop_3_1_2 + IsEndLoop_3_1_3 + IsEndLoop_3_1_4 + IsEndLoop_0_3_0 + IsEndLoop_0_3_1 + IsEndLoop_0_3_2 + IsEndLoop_0_3_3 + IsEndLoop_0_3_4 + IsEndLoop_3_2_0 + IsEndLoop_3_2_1 + IsEndLoop_3_2_2 + IsEndLoop_3_2_3 + IsEndLoop_3_2_4 + IsEndLoop_3_3_0 + IsEndLoop_3_3_1 + IsEndLoop_3_3_2 + IsEndLoop_3_3_3 + IsEndLoop_3_3_4 + IsEndLoop_1_0_0 + IsEndLoop_1_0_1 + IsEndLoop_1_0_2 + IsEndLoop_1_0_3 + IsEndLoop_1_0_4 + IsEndLoop_1_1_0 + IsEndLoop_1_1_1 + IsEndLoop_1_1_2 + IsEndLoop_1_1_3 + IsEndLoop_1_1_4 + IsEndLoop_4_0_0 + IsEndLoop_4_0_1 + IsEndLoop_4_0_2 + IsEndLoop_4_0_3 + IsEndLoop_4_0_4 + IsEndLoop_1_2_0 + IsEndLoop_1_2_1 + IsEndLoop_1_2_2 + IsEndLoop_1_2_3 + IsEndLoop_1_2_4 + IsEndLoop_4_1_0 + IsEndLoop_4_1_1 + IsEndLoop_4_1_2 + IsEndLoop_4_1_3 + IsEndLoop_4_1_4 + IsEndLoop_1_3_0 + IsEndLoop_1_3_1 + IsEndLoop_1_3_2 + IsEndLoop_1_3_3 + IsEndLoop_1_3_4 + IsEndLoop_4_2_0 + IsEndLoop_4_2_1 + IsEndLoop_4_2_2 + IsEndLoop_4_2_3 + IsEndLoop_4_2_4 + IsEndLoop_4_3_0 + IsEndLoop_4_3_1 + IsEndLoop_4_3_2 + IsEndLoop_4_3_3 + IsEndLoop_4_3_4 + IsEndLoop_2_0_0 + IsEndLoop_2_0_1 + IsEndLoop_2_0_2 + IsEndLoop_2_0_3 + IsEndLoop_2_0_4 + IsEndLoop_2_1_0 + IsEndLoop_2_1_1 + IsEndLoop_2_1_2 + IsEndLoop_2_1_3 + IsEndLoop_2_1_4 + IsEndLoop_2_2_0 + IsEndLoop_2_2_1 + IsEndLoop_2_2_2 + IsEndLoop_2_2_3 + IsEndLoop_2_2_4 + IsEndLoop_2_3_0 + IsEndLoop_2_3_1 + IsEndLoop_2_3_2 + IsEndLoop_2_3_3 + IsEndLoop_2_3_4))))) : E (G (E (F ((WantSection_4_T + WantSection_4_F + WantSection_3_T + WantSection_3_F + WantSection_2_T + WantSection_2_F + WantSection_1_T + WantSection_1_F + WantSection_0_T + WantSection_0_F <= 1))))) : A (G (E (F (((1 <= Idle_0 + Idle_1 + Idle_2 + Idle_3 + Idle_4) AND (AskForSection_0_0 + AskForSection_0_1 + AskForSection_0_2 + AskForSection_0_3 + AskForSection_1_0 + AskForSection_1_1 + AskForSection_1_2 + AskForSection_1_3 + AskForSection_2_0 + AskForSection_2_1 + AskForSection_2_2 + AskForSection_2_3 + AskForSection_3_0 + AskForSection_3_1 + AskForSection_3_2 + AskForSection_3_3 + AskForSection_4_3 + AskForSection_4_0 + AskForSection_4_1 + AskForSection_4_2 <= Idle_0 + Idle_1 + Idle_2 + Idle_3 + Idle_4)))))) : A (G (E (((EndTurn_0_2 + EndTurn_1_0 + EndTurn_1_1 + EndTurn_1_2 + EndTurn_1_3 + EndTurn_0_1 + EndTurn_2_0 + EndTurn_2_1 + EndTurn_2_2 + EndTurn_2_3 + EndTurn_3_0 + EndTurn_3_1 + EndTurn_3_2 + EndTurn_3_3 + EndTurn_4_0 + EndTurn_4_1 + EndTurn_4_2 + EndTurn_4_3 + EndTurn_0_0 + EndTurn_0_3 <= Idle_0 + Idle_1 + Idle_2 + Idle_3 + Idle_4) U (CS_0 + CS_1 + CS_2 + CS_3 + CS_4 <= AskForSection_0_0 + AskForSection_0_1 + AskForSection_0_2 + AskForSection_0_3 + AskForSection_1_0 + AskForSection_1_1 + AskForSection_1_2 + AskForSection_1_3 + AskForSection_2_0 + AskForSection_2_1 + AskForSection_2_2 + AskForSection_2_3 + AskForSection_3_0 + AskForSection_3_1 + AskForSection_3_2 + AskForSection_3_3 + AskForSection_4_3 + AskForSection_4_0 + AskForSection_4_1 + AskForSection_4_2))))) : (E (F (((1 <= TestAlone_4_3_0 + TestAlone_4_3_1 + TestAlone_4_3_2 + TestAlone_4_3_3 + TestAlone_2_0_0 + TestAlone_2_0_1 + TestAlone_2_0_3 + TestAlone_2_0_4 + TestAlone_2_1_0 + TestAlone_2_1_1 + TestAlone_2_1_3 + TestAlone_2_1_4 + TestAlone_2_2_0 + TestAlone_2_2_1 + TestAlone_2_2_3 + TestAlone_2_2_4 + TestAlone_2_3_0 + TestAlone_2_3_1 + TestAlone_2_3_3 + TestAlone_2_3_4 + TestAlone_0_0_1 + TestAlone_0_0_2 + TestAlone_0_0_3 + TestAlone_0_0_4 + TestAlone_0_1_1 + TestAlone_0_1_2 + TestAlone_0_1_3 + TestAlone_0_1_4 + TestAlone_3_0_0 + TestAlone_3_0_1 + TestAlone_3_0_2 + TestAlone_3_0_4 + TestAlone_4_2_2 + TestAlone_0_2_1 + TestAlone_0_2_2 + TestAlone_0_2_3 + TestAlone_0_2_4 + TestAlone_3_1_0 + TestAlone_3_1_1 + TestAlone_3_1_2 + TestAlone_3_1_4 + TestAlone_4_2_1 + TestAlone_4_2_0 + TestAlone_0_3_1 + TestAlone_0_3_2 + TestAlone_0_3_3 + TestAlone_0_3_4 + TestAlone_3_2_0 + TestAlone_3_2_1 + TestAlone_3_2_2 + TestAlone_3_2_4 + TestAlone_3_3_0 + TestAlone_3_3_1 + TestAlone_3_3_2 + TestAlone_3_3_4 + TestAlone_1_0_0 + TestAlone_1_0_2 + TestAlone_1_0_3 + TestAlone_1_0_4 + TestAlone_1_1_0 + TestAlone_1_1_2 + TestAlone_1_1_3 + TestAlone_1_1_4 + TestAlone_4_0_0 + TestAlone_4_0_1 + TestAlone_4_0_2 + TestAlone_4_0_3 + TestAlone_1_2_0 + TestAlone_1_2_2 + TestAlone_1_2_3 + TestAlone_1_2_4 + TestAlone_4_1_0 + TestAlone_4_1_1 + TestAlone_4_1_2 + TestAlone_4_1_3 + TestAlone_1_3_0 + TestAlone_1_3_2 + TestAlone_1_3_3 + TestAlone_1_3_4 + TestAlone_4_2_3) AND (BeginLoop_4_3_0 + BeginLoop_4_3_1 + BeginLoop_4_3_2 + BeginLoop_4_3_3 + BeginLoop_4_3_4 + BeginLoop_2_0_0 + BeginLoop_2_0_1 + BeginLoop_2_0_2 + BeginLoop_2_0_3 + BeginLoop_2_0_4 + BeginLoop_2_1_0 + BeginLoop_2_1_1 + BeginLoop_2_1_2 + BeginLoop_2_1_3 + BeginLoop_2_1_4 + BeginLoop_2_2_0 + BeginLoop_2_2_1 + BeginLoop_2_2_2 + BeginLoop_2_2_3 + BeginLoop_2_2_4 + BeginLoop_2_3_0 + BeginLoop_2_3_1 + BeginLoop_2_3_2 + BeginLoop_2_3_3 + BeginLoop_2_3_4 + BeginLoop_0_0_0 + BeginLoop_0_0_1 + BeginLoop_0_0_2 + BeginLoop_0_0_3 + BeginLoop_0_0_4 + BeginLoop_0_1_0 + BeginLoop_0_1_1 + BeginLoop_0_1_2 + BeginLoop_0_1_3 + BeginLoop_0_1_4 + BeginLoop_3_0_0 + BeginLoop_3_0_1 + BeginLoop_3_0_2 + BeginLoop_3_0_3 + BeginLoop_3_0_4 + BeginLoop_0_2_0 + BeginLoop_0_2_1 + BeginLoop_0_2_2 + BeginLoop_0_2_3 + BeginLoop_0_2_4 + BeginLoop_3_1_0 + BeginLoop_3_1_1 + BeginLoop_3_1_2 + BeginLoop_3_1_3 + BeginLoop_3_1_4 + BeginLoop_0_3_0 + BeginLoop_0_3_1 + BeginLoop_0_3_2 + BeginLoop_0_3_3 + BeginLoop_0_3_4 + BeginLoop_3_2_0 + BeginLoop_3_2_1 + BeginLoop_3_2_2 + BeginLoop_3_2_3 + BeginLoop_3_2_4 + BeginLoop_3_3_0 + BeginLoop_3_3_1 + BeginLoop_3_3_2 + BeginLoop_3_3_3 + BeginLoop_3_3_4 + BeginLoop_4_2_4 + BeginLoop_4_2_3 + BeginLoop_1_0_0 + BeginLoop_1_0_1 + BeginLoop_1_0_2 + BeginLoop_1_0_3 + BeginLoop_1_0_4 + BeginLoop_1_1_0 + BeginLoop_1_1_1 + BeginLoop_1_1_2 + BeginLoop_1_1_3 + BeginLoop_1_1_4 + BeginLoop_4_0_0 + BeginLoop_4_0_1 + BeginLoop_4_0_2 + BeginLoop_4_0_3 + BeginLoop_4_0_4 + BeginLoop_1_2_0 + BeginLoop_1_2_1 + BeginLoop_1_2_2 + BeginLoop_1_2_3 + BeginLoop_1_2_4 + BeginLoop_4_1_0 + BeginLoop_4_1_1 + BeginLoop_4_1_2 + BeginLoop_4_1_3 + BeginLoop_4_1_4 + BeginLoop_4_2_2 + BeginLoop_1_3_0 + BeginLoop_1_3_1 + BeginLoop_1_3_2 + BeginLoop_1_3_3 + BeginLoop_1_3_4 + BeginLoop_4_2_1 + BeginLoop_4_2_0 <= Idle_0 + Idle_1 + Idle_2 + Idle_3 + Idle_4) AND (TestIdentity_1_0_0 + TestIdentity_1_0_1 + TestIdentity_1_0_2 + TestIdentity_1_0_3 + TestIdentity_1_0_4 + TestIdentity_1_1_0 + TestIdentity_1_1_1 + TestIdentity_1_1_2 + TestIdentity_1_1_3 + TestIdentity_1_1_4 + TestIdentity_4_0_0 + TestIdentity_4_0_1 + TestIdentity_4_0_2 + TestIdentity_4_0_3 + TestIdentity_4_0_4 + TestIdentity_1_2_0 + TestIdentity_1_2_1 + TestIdentity_1_2_2 + TestIdentity_1_2_3 + TestIdentity_1_2_4 + TestIdentity_4_1_0 + TestIdentity_4_1_1 + TestIdentity_4_1_2 + TestIdentity_4_1_3 + TestIdentity_4_1_4 + TestIdentity_1_3_0 + TestIdentity_1_3_1 + TestIdentity_1_3_2 + TestIdentity_1_3_3 + TestIdentity_1_3_4 + TestIdentity_4_2_0 + TestIdentity_4_2_1 + TestIdentity_4_2_2 + TestIdentity_4_2_3 + TestIdentity_4_2_4 + TestIdentity_4_3_0 + TestIdentity_4_3_1 + TestIdentity_4_3_2 + TestIdentity_4_3_3 + TestIdentity_4_3_4 + TestIdentity_2_0_0 + TestIdentity_2_0_1 + TestIdentity_2_0_2 + TestIdentity_2_0_3 + TestIdentity_2_0_4 + TestIdentity_2_1_0 + TestIdentity_2_1_1 + TestIdentity_2_1_2 + TestIdentity_2_1_3 + TestIdentity_2_1_4 + TestIdentity_2_2_0 + TestIdentity_2_2_1 + TestIdentity_2_2_2 + TestIdentity_2_2_3 + TestIdentity_2_2_4 + TestIdentity_2_3_0 + TestIdentity_2_3_1 + TestIdentity_2_3_2 + TestIdentity_2_3_3 + TestIdentity_2_3_4 + TestIdentity_0_0_0 + TestIdentity_0_0_1 + TestIdentity_0_0_2 + TestIdentity_0_0_3 + TestIdentity_0_0_4 + TestIdentity_0_1_0 + TestIdentity_0_1_1 + TestIdentity_0_1_2 + TestIdentity_0_1_3 + TestIdentity_0_1_4 + TestIdentity_3_0_0 + TestIdentity_3_0_1 + TestIdentity_3_0_2 + TestIdentity_3_0_3 + TestIdentity_3_0_4 + TestIdentity_0_2_0 + TestIdentity_0_2_1 + TestIdentity_0_2_2 + TestIdentity_0_2_3 + TestIdentity_0_2_4 + TestIdentity_3_1_0 + TestIdentity_3_1_1 + TestIdentity_3_1_2 + TestIdentity_3_1_3 + TestIdentity_3_1_4 + TestIdentity_0_3_0 + TestIdentity_0_3_1 + TestIdentity_0_3_2 + TestIdentity_0_3_3 + TestIdentity_0_3_4 + TestIdentity_3_2_0 + TestIdentity_3_2_1 + TestIdentity_3_2_2 + TestIdentity_3_2_3 + TestIdentity_3_2_4 + TestIdentity_3_3_0 + TestIdentity_3_3_1 + TestIdentity_3_3_2 + TestIdentity_3_3_3 + TestIdentity_3_3_4 <= 1)))) AND (((TestAlone_4_3_0 + TestAlone_4_3_1 + TestAlone_4_3_2 + TestAlone_4_3_3 + TestAlone_2_0_0 + TestAlone_2_0_1 + TestAlone_2_0_3 + TestAlone_2_0_4 + TestAlone_2_1_0 + TestAlone_2_1_1 + TestAlone_2_1_3 + TestAlone_2_1_4 + TestAlone_2_2_0 + TestAlone_2_2_1 + TestAlone_2_2_3 + TestAlone_2_2_4 + TestAlone_2_3_0 + TestAlone_2_3_1 + TestAlone_2_3_3 + TestAlone_2_3_4 + TestAlone_0_0_1 + TestAlone_0_0_2 + TestAlone_0_0_3 + TestAlone_0_0_4 + TestAlone_0_1_1 + TestAlone_0_1_2 + TestAlone_0_1_3 + TestAlone_0_1_4 + TestAlone_3_0_0 + TestAlone_3_0_1 + TestAlone_3_0_2 + TestAlone_3_0_4 + TestAlone_4_2_2 + TestAlone_0_2_1 + TestAlone_0_2_2 + TestAlone_0_2_3 + TestAlone_0_2_4 + TestAlone_3_1_0 + TestAlone_3_1_1 + TestAlone_3_1_2 + TestAlone_3_1_4 + TestAlone_4_2_1 + TestAlone_4_2_0 + TestAlone_0_3_1 + TestAlone_0_3_2 + TestAlone_0_3_3 + TestAlone_0_3_4 + TestAlone_3_2_0 + TestAlone_3_2_1 + TestAlone_3_2_2 + TestAlone_3_2_4 + TestAlone_3_3_0 + TestAlone_3_3_1 + TestAlone_3_3_2 + TestAlone_3_3_4 + TestAlone_1_0_0 + TestAlone_1_0_2 + TestAlone_1_0_3 + TestAlone_1_0_4 + TestAlone_1_1_0 + TestAlone_1_1_2 + TestAlone_1_1_3 + TestAlone_1_1_4 + TestAlone_4_0_0 + TestAlone_4_0_1 + TestAlone_4_0_2 + TestAlone_4_0_3 + TestAlone_1_2_0 + TestAlone_1_2_2 + TestAlone_1_2_3 + TestAlone_1_2_4 + TestAlone_4_1_0 + TestAlone_4_1_1 + TestAlone_4_1_2 + TestAlone_4_1_3 + TestAlone_1_3_0 + TestAlone_1_3_2 + TestAlone_1_3_3 + TestAlone_1_3_4 + TestAlone_4_2_3 <= Turn_2_0 + Turn_2_1 + Turn_2_2 + Turn_2_3 + Turn_3_0 + Turn_3_1 + Turn_3_2 + Turn_3_3 + Turn_1_3 + Turn_1_2 + Turn_1_1 + Turn_1_0 + Turn_0_0 + Turn_0_1 + Turn_0_2 + Turn_0_3 + Turn_0_4 + Turn_1_4 + Turn_3_4 + Turn_2_4) OR (TestIdentity_1_0_0 + TestIdentity_1_0_1 + TestIdentity_1_0_2 + TestIdentity_1_0_3 + TestIdentity_1_0_4 + TestIdentity_1_1_0 + TestIdentity_1_1_1 + TestIdentity_1_1_2 + TestIdentity_1_1_3 + TestIdentity_1_1_4 + TestIdentity_4_0_0 + TestIdentity_4_0_1 + TestIdentity_4_0_2 + TestIdentity_4_0_3 + TestIdentity_4_0_4 + TestIdentity_1_2_0 + TestIdentity_1_2_1 + TestIdentity_1_2_2 + TestIdentity_1_2_3 + TestIdentity_1_2_4 + TestIdentity_4_1_0 + TestIdentity_4_1_1 + TestIdentity_4_1_2 + TestIdentity_4_1_3 + TestIdentity_4_1_4 + TestIdentity_1_3_0 + TestIdentity_1_3_1 + TestIdentity_1_3_2 + TestIdentity_1_3_3 + TestIdentity_1_3_4 + TestIdentity_4_2_0 + TestIdentity_4_2_1 + TestIdentity_4_2_2 + TestIdentity_4_2_3 + TestIdentity_4_2_4 + TestIdentity_4_3_0 + TestIdentity_4_3_1 + TestIdentity_4_3_2 + TestIdentity_4_3_3 + TestIdentity_4_3_4 + TestIdentity_2_0_0 + TestIdentity_2_0_1 + TestIdentity_2_0_2 + TestIdentity_2_0_3 + TestIdentity_2_0_4 + TestIdentity_2_1_0 + TestIdentity_2_1_1 + TestIdentity_2_1_2 + TestIdentity_2_1_3 + TestIdentity_2_1_4 + TestIdentity_2_2_0 + TestIdentity_2_2_1 + TestIdentity_2_2_2 + TestIdentity_2_2_3 + TestIdentity_2_2_4 + TestIdentity_2_3_0 + TestIdentity_2_3_1 + TestIdentity_2_3_2 + TestIdentity_2_3_3 + TestIdentity_2_3_4 + TestIdentity_0_0_0 + TestIdentity_0_0_1 + TestIdentity_0_0_2 + TestIdentity_0_0_3 + TestIdentity_0_0_4 + TestIdentity_0_1_0 + TestIdentity_0_1_1 + TestIdentity_0_1_2 + TestIdentity_0_1_3 + TestIdentity_0_1_4 + TestIdentity_3_0_0 + TestIdentity_3_0_1 + TestIdentity_3_0_2 + TestIdentity_3_0_3 + TestIdentity_3_0_4 + TestIdentity_0_2_0 + TestIdentity_0_2_1 + TestIdentity_0_2_2 + TestIdentity_0_2_3 + TestIdentity_0_2_4 + TestIdentity_3_1_0 + TestIdentity_3_1_1 + TestIdentity_3_1_2 + TestIdentity_3_1_3 + TestIdentity_3_1_4 + TestIdentity_0_3_0 + TestIdentity_0_3_1 + TestIdentity_0_3_2 + TestIdentity_0_3_3 + TestIdentity_0_3_4 + TestIdentity_3_2_0 + TestIdentity_3_2_1 + TestIdentity_3_2_2 + TestIdentity_3_2_3 + TestIdentity_3_2_4 + TestIdentity_3_3_0 + TestIdentity_3_3_1 + TestIdentity_3_3_2 + TestIdentity_3_3_3 + TestIdentity_3_3_4 <= IsEndLoop_0_0_0 + IsEndLoop_0_0_1 + IsEndLoop_0_0_2 + IsEndLoop_0_0_3 + IsEndLoop_0_0_4 + IsEndLoop_0_1_0 + IsEndLoop_0_1_1 + IsEndLoop_0_1_2 + IsEndLoop_0_1_3 + IsEndLoop_0_1_4 + IsEndLoop_3_0_0 + IsEndLoop_3_0_1 + IsEndLoop_3_0_2 + IsEndLoop_3_0_3 + IsEndLoop_3_0_4 + IsEndLoop_0_2_0 + IsEndLoop_0_2_1 + IsEndLoop_0_2_2 + IsEndLoop_0_2_3 + IsEndLoop_0_2_4 + IsEndLoop_3_1_0 + IsEndLoop_3_1_1 + IsEndLoop_3_1_2 + IsEndLoop_3_1_3 + IsEndLoop_3_1_4 + IsEndLoop_0_3_0 + IsEndLoop_0_3_1 + IsEndLoop_0_3_2 + IsEndLoop_0_3_3 + IsEndLoop_0_3_4 + IsEndLoop_3_2_0 + IsEndLoop_3_2_1 + IsEndLoop_3_2_2 + IsEndLoop_3_2_3 + IsEndLoop_3_2_4 + IsEndLoop_3_3_0 + IsEndLoop_3_3_1 + IsEndLoop_3_3_2 + IsEndLoop_3_3_3 + IsEndLoop_3_3_4 + IsEndLoop_1_0_0 + IsEndLoop_1_0_1 + IsEndLoop_1_0_2 + IsEndLoop_1_0_3 + IsEndLoop_1_0_4 + IsEndLoop_1_1_0 + IsEndLoop_1_1_1 + IsEndLoop_1_1_2 + IsEndLoop_1_1_3 + IsEndLoop_1_1_4 + IsEndLoop_4_0_0 + IsEndLoop_4_0_1 + IsEndLoop_4_0_2 + IsEndLoop_4_0_3 + IsEndLoop_4_0_4 + IsEndLoop_1_2_0 + IsEndLoop_1_2_1 + IsEndLoop_1_2_2 + IsEndLoop_1_2_3 + IsEndLoop_1_2_4 + IsEndLoop_4_1_0 + IsEndLoop_4_1_1 + IsEndLoop_4_1_2 + IsEndLoop_4_1_3 + IsEndLoop_4_1_4 + IsEndLoop_1_3_0 + IsEndLoop_1_3_1 + IsEndLoop_1_3_2 + IsEndLoop_1_3_3 + IsEndLoop_1_3_4 + IsEndLoop_4_2_0 + IsEndLoop_4_2_1 + IsEndLoop_4_2_2 + IsEndLoop_4_2_3 + IsEndLoop_4_2_4 + IsEndLoop_4_3_0 + IsEndLoop_4_3_1 + IsEndLoop_4_3_2 + IsEndLoop_4_3_3 + IsEndLoop_4_3_4 + IsEndLoop_2_0_0 + IsEndLoop_2_0_1 + IsEndLoop_2_0_2 + IsEndLoop_2_0_3 + IsEndLoop_2_0_4 + IsEndLoop_2_1_0 + IsEndLoop_2_1_1 + IsEndLoop_2_1_2 + IsEndLoop_2_1_3 + IsEndLoop_2_1_4 + IsEndLoop_2_2_0 + IsEndLoop_2_2_1 + IsEndLoop_2_2_2 + IsEndLoop_2_2_3 + IsEndLoop_2_2_4 + IsEndLoop_2_3_0 + IsEndLoop_2_3_1 + IsEndLoop_2_3_2 + IsEndLoop_2_3_3 + IsEndLoop_2_3_4)) AND NOT(A (G ((TestAlone_4_3_0 +
TestAlone_4_3_1 + TestAlone_4_3_2 + TestAlone_4_3_3 + TestAlone_2_0_0 + TestAlone_2_0_1 + TestAlone_2_0_3 + TestAlone_2_0_4 + TestAlone_2_1_0 + TestAlone_2_1_1 + TestAlone_2_1_3 + TestAlone_2_1_4 + TestAlone_2_2_0 + TestAlone_2_2_1 + TestAlone_2_2_3 + TestAlone_2_2_4 + TestAlone_2_3_0 + TestAlone_2_3_1 + TestAlone_2_3_3 + TestAlone_2_3_4 + TestAlone_0_0_1 + TestAlone_0_0_2 + TestAlone_0_0_3 + TestAlone_0_0_4 + TestAlone_0_1_1 + TestAlone_0_1_2 + TestAlone_0_1_3 + TestAlone_0_1_4 + TestAlone_3_0_0 + TestAlone_3_0_1 + TestAlone_3_0_2 + TestAlone_3_0_4 + TestAlone_4_2_2 + TestAlone_0_2_1 + TestAlone_0_2_2 + TestAlone_0_2_3 + TestAlone_0_2_4 + TestAlone_3_1_0 + TestAlone_3_1_1 + TestAlone_3_1_2 + TestAlone_3_1_4 + TestAlone_4_2_1 + TestAlone_4_2_0 + TestAlone_0_3_1 + TestAlone_0_3_2 + TestAlone_0_3_3 + TestAlone_0_3_4 + TestAlone_3_2_0 + TestAlone_3_2_1 + TestAlone_3_2_2 + TestAlone_3_2_4 + TestAlone_3_3_0 + TestAlone_3_3_1 + TestAlone_3_3_2 + TestAlone_3_3_4 + TestAlone_1_0_0 + TestAlone_1_0_2 + TestAlone_1_0_3 + TestAlone_1_0_4 + TestAlone_1_1_0 + TestAlone_1_1_2 + TestAlone_1_1_3 + TestAlone_1_1_4 + TestAlone_4_0_0 + TestAlone_4_0_1 + TestAlone_4_0_2 + TestAlone_4_0_3 + TestAlone_1_2_0 + TestAlone_1_2_2 + TestAlone_1_2_3 + TestAlone_1_2_4 + TestAlone_4_1_0 + TestAlone_4_1_1 + TestAlone_4_1_2 + TestAlone_4_1_3 + TestAlone_1_3_0 + TestAlone_1_3_2 + TestAlone_1_3_3 + TestAlone_1_3_4 + TestAlone_4_2_3 <= Turn_2_0 + Turn_2_1 + Turn_2_2 + Turn_2_3 + Turn_3_0 + Turn_3_1 + Turn_3_2 + Turn_3_3 + Turn_1_3 + Turn_1_2 + Turn_1_1 + Turn_1_0 + Turn_0_0 + Turn_0_1 + Turn_0_2 + Turn_0_3 + Turn_0_4 + Turn_1_4 + Turn_3_4 + Turn_2_4)))))) : (((TestIdentity_4_3_3 <= TestIdentity_4_2_1) AND E (F (((3 <= TestAlone_3_0_1) AND (BeginLoop_4_2_4 <= BeginLoop_4_3_1))))) OR (IsEndLoop_4_1_3 + 1 <= BeginLoop_2_3_1)) : A (F ((BeginLoop_4_1_2 + 1 <= WantSection_0_T))) : NOT((NOT(E (F ((1 <= TestIdentity_0_3_3)))) AND ((IsEndLoop_3_2_3 <= TestAlone_3_3_4) OR (3 <= BeginLoop_0_1_1)))) : (A (G (A (F ((2 <= IsEndLoop_0_1_2))))) OR (((AskForSection_0_0 <= TestIdentity_3_2_1) AND (EndTurn_4_1 <= Idle_1) AND ((1 <= TestIdentity_4_2_3) OR (3 <= IsEndLoop_4_0_1)) AND (3 <= EndTurn_3_1)) OR (A (G ((TestAlone_3_2_2 <= TestAlone_0_1_4))) OR (((AskForSection_0_1 <= TestIdentity_4_0_2) AND (2 <= TestAlone_2_3_4)) OR (1 <= IsEndLoop_1_0_4))))) : E (G (E (((TestAlone_4_0_0 <= TestIdentity_3_3_1) U (3 <= TestIdentity_3_3_3))))) : NOT(A (F (((Idle_0 <= TestAlone_4_3_0) AND (IsEndLoop_3_2_0 <= TestIdentity_3_3_1) AND (EndTurn_2_1 <= IsEndLoop_2_2_4))))) : (E (G ((2 <= TestIdentity_4_1_4))) OR A (G (E (F ((BeginLoop_0_2_4 <= BeginLoop_2_2_0)))))) : E ((((TestIdentity_1_3_1 <= IsEndLoop_0_2_3) AND (BeginLoop_1_0_4 <= IsEndLoop_4_0_3) AND ((IsEndLoop_2_2_1 <= WantSection_3_F) OR (1 <= AskForSection_3_2))) U (((3 <= BeginLoop_3_3_4) AND (TestAlone_2_2_1 <= TestIdentity_3_0_0)) OR (3 <= BeginLoop_2_1_4))))
lola: computing a collection of formulas
lola: RUNNING
lola: subprocess 0 will run for 221 seconds at most (--localtimelimit=-1)
lola: ========================================
lola: ...considering subproblem: ((TestTurn_0_0 + TestTurn_0_1 + TestTurn_0_2 + TestTurn_0_3 + TestTurn_1_0 + TestTurn_1_1 + TestTurn_1_2 + TestTurn_1_3 + TestTurn_2_0 + TestTurn_2_1 + TestTurn_2_2 + TestTurn_2_3 + TestTurn_3_0 + TestTurn_3_1 + TestTurn_3_2 + TestTurn_3_3 + TestTurn_4_0 + TestTurn_4_1 + TestTurn_4_2 + TestTurn_4_3 + 1 <= AskForSection_0_0 + AskForSection_0_1 + AskForSection_0_2 + AskForSection_0_3 + AskForSection... (shortened)
lola: ========================================
lola: SUBTASK
lola: checking a Boolean combination of formulas
lola: RUNNING
lola: subprocess 0 will run for 221 seconds at most (--localtimelimit=-1)
lola: ========================================
lola: ...considering subproblem: (TestTurn_0_0 + TestTurn_0_1 + TestTurn_0_2 + TestTurn_0_3 + TestTurn_1_0 + TestTurn_1_1 + TestTurn_1_2 + TestTurn_1_3 + TestTurn_2_0 + TestTurn_2_1 + TestTurn_2_2 + TestTurn_2_3 + TestTurn_3_0 + TestTurn_3_1 + TestTurn_3_2 + TestTurn_3_3 + TestTurn_4_0 + TestTurn_4_1 + TestTurn_4_2 + TestTurn_4_3 + 1 <= AskForSection_0_0 + AskForSection_0_1 + AskForSection_0_2 + AskForSection_0_3 + AskForSection_... (shortened)
lola: ========================================
lola: SUBTASK
lola: checking initial satisfaction
lola: processed formula: (TestTurn_0_0 + TestTurn_0_1 + TestTurn_0_2 + TestTurn_0_3 + TestTurn_1_0 + TestTurn_1_1 + TestTurn_1_2 + TestTurn_1_3 + TestTurn_2_0 + TestTurn_2_1 + TestTurn_2_2 + TestTurn_2_3 + TestTurn_3_0 + TestTurn_3_1 + TestTurn_3_2 + TestTurn_3_3 + TestTurn_4_0 + TestTurn_4_1 + TestTurn_4_2 + TestTurn_4_3 + 1 <= AskForSection_0_0 + AskForSection_0_1 + AskForSection_0_2 + AskForSection_0_3 + AskForSection_... (shortened)
lola: processed formula length: 704
lola: 0 rewrites
lola: formula mentions 0 of 480 places; total mentions: 0
lola: closed formula file Peterson-PT-4-CTLCardinality.task
lola: processed formula with 1 atomic propositions
lola: RUNNING
lola: SUBRESULT
lola: result: no
lola: produced by: preprocessing
lola: The net violates the given property already in its initial state.
lola: 0 markings, 0 edges
lola: ========================================
lola: subprocess 1 will run for 235 seconds at most (--localtimelimit=-1)
lola: ========================================
lola: ...considering subproblem: A (G ((((1 <= IsEndLoop_0_0_0 + IsEndLoop_0_0_1 + IsEndLoop_0_0_2 + IsEndLoop_0_0_3 + IsEndLoop_0_0_4 + IsEndLoop_0_1_0 + IsEndLoop_0_1_1 + IsEndLoop_0_1_2 + IsEndLoop_0_1_3 + IsEndLoop_0_1_4 + IsEndLoop_3_0_0 + IsEndLoop_3_0_1 + IsEndLoop_3_0_2 + IsEndLoop_3_0_3 + IsEndLoop_3_0_4 + IsEndLoop_0_2_0 + IsEndLoop_0_2_1 + IsEndLoop_0_2_2 + IsEndLoop_0_2_3 + IsEndLoop_0_2_4 + IsEndLoop_3_1_0 + IsEndLoo... (shortened)
lola: ========================================
lola: SUBTASK
lola: checking invariance
lola: Planning: workflow for reachability check: stateequation||search (--findpath=off)
lola: STORE
lola: using a bit-perfect encoder (--encoder=bit)
lola: using 60 bytes per marking, with 19 unused bits
lola: using a prefix tree store (--store=prefix)
lola: SEARCH (state space)
lola: state space: using reachability graph (--search=depth)
lola: state space: using reachability preserving stubborn set method with insertion algorithm (--stubborn=tarjan)
lola: RUNNING
lola: state equation: Generated DNF with 4 literals and 2 conjunctive subformulas
lola: state equation: write sara problem file to Peterson-PT-4-CTLCardinality.sara
lola: state equation: calling and running sara
sara: try reading problem file Peterson-PT-4-CTLCardinality.sara.
sara: place or transition ordering is non-deterministic
lola: sara is running 0 secs || 230549 markings, 906794 edges, 46110 markings/sec, 0 secs
lola: sara is running 5 secs || 384644 markings, 1551604 edges, 30819 markings/sec, 5 secs
lola: sara is running 10 secs || 626775 markings, 2521087 edges, 48426 markings/sec, 10 secs
lola: sara is running 15 secs || 862728 markings, 3462885 edges, 47191 markings/sec, 15 secs
lola: sara is running 20 secs || 1095579 markings, 4431129 edges, 46570 markings/sec, 20 secs
sara: warning, failure of lp_solve (at job 3690)
lola: sara is running 25 secs || 1321785 markings, 5367312 edges, 45241 markings/sec, 25 secs
lola: sara is running 30 secs || 1561922 markings, 6327787 edges, 48027 markings/sec, 30 secs
lola: sara is running 35 secs || 1789230 markings, 7262297 edges, 45462 markings/sec, 35 secs
lola: sara is running 40 secs || 2021185 markings, 8209905 edges, 46391 markings/sec, 40 secs
lola: sara is running 45 secs || 2255093 markings, 9166264 edges, 46782 markings/sec, 45 secs
lola: sara is running 50 secs || 2489102 markings, 10155730 edges, 46802 markings/sec, 50 secs
lola: sara is running 55 secs || 2720152 markings, 11090890 edges, 46210 markings/sec, 55 secs
lola: sara is running 60 secs || 2946069 markings, 12034692 edges, 45183 markings/sec, 60 secs
lola: sara is running 65 secs || 3172696 markings, 12965045 edges, 45325 markings/sec, 65 secs
lola: sara is running 70 secs || 3400882 markings, 13876904 edges, 45637 markings/sec, 70 secs
lola: sara is running 75 secs || 3628819 markings, 14791814 edges, 45587 markings/sec, 75 secs
lola: sara is running 80 secs || 3877935 markings, 15795730 edges, 49823 markings/sec, 80 secs
lola: sara is running 85 secs || 4126310 markings, 16823709 edges, 49675 markings/sec, 85 secs
lola: sara is running 90 secs || 4367433 markings, 17791552 edges, 48225 markings/sec, 90 secs
lola: sara is running 95 secs || 4601754 markings, 18763081 edges, 46864 markings/sec, 95 secs
lola: sara is running 100 secs || 4829989 markings, 19677032 edges, 45647 markings/sec, 100 secs
lola: sara is running 105 secs || 5055274 markings, 20588023 edges, 45057 markings/sec, 105 secs
lola: sara is running 110 secs || 5277248 markings, 21523076 edges, 44395 markings/sec, 110 secs
lola: sara is running 115 secs || 5506742 markings, 22482654 edges, 45899 markings/sec, 115 secs
lola: sara is running 120 secs || 5748966 markings, 23454523 edges, 48445 markings/sec, 120 secs
lola: sara is running 125 secs || 5978280 markings, 24410678 edges, 45863 markings/sec, 125 secs
lola: sara is running 130 secs || 6196302 markings, 25362474 edges, 43604 markings/sec, 130 secs
lola: sara is running 135 secs || 6442125 markings, 26362751 edges, 49165 markings/sec, 135 secs
lola: sara is running 140 secs || 6700522 markings, 27402242 edges, 51679 markings/sec, 140 secs
lola: sara is running 145 secs || 6953339 markings, 28408466 edges, 50563 markings/sec, 145 secs
lola: sara is running 150 secs || 7194939 markings, 29397776 edges, 48320 markings/sec, 150 secs
lola: sara is running 155 secs || 7435612 markings, 30412942 edges, 48135 markings/sec, 155 secs
lola: sara is running 160 secs || 7666782 markings, 31412956 edges, 46234 markings/sec, 160 secs
lola: sara is running 165 secs || 7889242 markings, 32388674 edges, 44492 markings/sec, 165 secs
lola: sara is running 170 secs || 8109444 markings, 33343301 edges, 44040 markings/sec, 170 secs
lola: sara is running 175 secs || 8323124 markings, 34319136 edges, 42736 markings/sec, 175 secs
lola: sara is running 180 secs || 8538482 markings, 35266958 edges, 43072 markings/sec, 180 secs
lola: sara is running 185 secs || 8749184 markings, 36175525 edges, 42140 markings/sec, 185 secs
lola: sara is running 190 secs || 8961547 markings, 37136474 edges, 42473 markings/sec, 190 secs
lola: sara is running 195 secs || 9173570 markings, 38078220 edges, 42405 markings/sec, 195 secs
lola: sara is running 200 secs || 9388024 markings, 39026934 edges, 42891 markings/sec, 200 secs
lola: sara is running 205 secs || 9606484 markings, 39952913 edges, 43692 markings/sec, 205 secs
lola: sara is running 210 secs || 9831926 markings, 40869599 edges, 45088 markings/sec, 210 secs
lola: sara is running 215 secs || 10054862 markings, 41805448 edges, 44587 markings/sec, 215 secs
lola: local time limit reached - aborting
lola: caught signal User defined signal 1 - aborting LoLA
lola: Child process aborted or communication problem between parent and child process
terminate called after throwing an instance of 'std::runtime_error'
what(): parse error at position 0: unexpected character, last read: '\ufffd'
Aborted (core dumped)
FORMULA Peterson-PT-4-CTLCardinality-0 CANNOT_COMPUTE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION STUBBORN_SETS TOPOLOGICAL USE_NUPN
FORMULA Peterson-PT-4-CTLCardinality-1 CANNOT_COMPUTE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION STUBBORN_SETS TOPOLOGICAL USE_NUPN
FORMULA Peterson-PT-4-CTLCardinality-2 CANNOT_COMPUTE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION STUBBORN_SETS TOPOLOGICAL USE_NUPN
FORMULA Peterson-PT-4-CTLCardinality-3 CANNOT_COMPUTE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION STUBBORN_SETS TOPOLOGICAL USE_NUPN
FORMULA Peterson-PT-4-CTLCardinality-4 CANNOT_COMPUTE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION STUBBORN_SETS TOPOLOGICAL USE_NUPN
FORMULA Peterson-PT-4-CTLCardinality-5 CANNOT_COMPUTE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION STUBBORN_SETS TOPOLOGICAL USE_NUPN
FORMULA Peterson-PT-4-CTLCardinality-6 CANNOT_COMPUTE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION STUBBORN_SETS TOPOLOGICAL USE_NUPN
FORMULA Peterson-PT-4-CTLCardinality-7 CANNOT_COMPUTE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION STUBBORN_SETS TOPOLOGICAL USE_NUPN
FORMULA Peterson-PT-4-CTLCardinality-8 CANNOT_COMPUTE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION STUBBORN_SETS TOPOLOGICAL USE_NUPN
FORMULA Peterson-PT-4-CTLCardinality-9 CANNOT_COMPUTE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION STUBBORN_SETS TOPOLOGICAL USE_NUPN
FORMULA Peterson-PT-4-CTLCardinality-10 CANNOT_COMPUTE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION STUBBORN_SETS TOPOLOGICAL USE_NUPN
FORMULA Peterson-PT-4-CTLCardinality-11 CANNOT_COMPUTE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION STUBBORN_SETS TOPOLOGICAL USE_NUPN
FORMULA Peterson-PT-4-CTLCardinality-12 CANNOT_COMPUTE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION STUBBORN_SETS TOPOLOGICAL USE_NUPN
FORMULA Peterson-PT-4-CTLCardinality-13 CANNOT_COMPUTE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION STUBBORN_SETS TOPOLOGICAL USE_NUPN
FORMULA Peterson-PT-4-CTLCardinality-14 CANNOT_COMPUTE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION STUBBORN_SETS TOPOLOGICAL USE_NUPN
FORMULA Peterson-PT-4-CTLCardinality-15 CANNOT_COMPUTE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION STUBBORN_SETS TOPOLOGICAL USE_NUPN
----- Kill lola and sara stdout -----
----- Kill lola and sara stderr -----
----- Finished stdout -----
----- Finished stderr -----

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="Peterson-PT-4"
export BK_EXAMINATION="CTLCardinality"
export BK_TOOL="irma4mcc-full"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

tar xzf /home/mcc/BenchKit/INPUTS/Peterson-PT-4.tgz
mv Peterson-PT-4 execution
cd execution
pwd
ls -lh

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3637"
echo " Executing tool irma4mcc-full"
echo " Input is Peterson-PT-4, examination is CTLCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r114-csrt-152666472800570"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLCardinality.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;