fond
Model Checking Contest 2018
8th edition, Bratislava, Slovakia, June 26, 2018
Execution of r105-smll-152658635300146
Last Updated
June 26, 2018

About the Execution of ITS-Tools.L for HypertorusGrid-PT-d2k3p2b04

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
15755.820 1709293.00 2900682.00 3476.60 [undef] Cannot compute

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Waiting for the VM to be ready (probing ssh)
......................
/home/mcc/execution
total 256K
-rw-r--r-- 1 mcc users 4.1K May 15 18:54 CTLCardinality.txt
-rw-r--r-- 1 mcc users 20K May 15 18:54 CTLCardinality.xml
-rw-r--r-- 1 mcc users 3.3K May 15 18:54 CTLFireability.txt
-rw-r--r-- 1 mcc users 17K May 15 18:54 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K May 15 18:50 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 5.9K May 15 18:50 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 2.8K May 15 18:54 LTLCardinality.txt
-rw-r--r-- 1 mcc users 12K May 15 18:54 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.4K May 15 18:54 LTLFireability.txt
-rw-r--r-- 1 mcc users 11K May 15 18:54 LTLFireability.xml
-rw-r--r-- 1 mcc users 3.5K May 15 18:54 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 14K May 15 18:54 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 118 May 15 18:54 ReachabilityDeadlock.txt
-rw-r--r-- 1 mcc users 356 May 15 18:54 ReachabilityDeadlock.xml
-rw-r--r-- 1 mcc users 4.6K May 15 18:54 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 24K May 15 18:54 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.9K May 15 18:54 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.9K May 15 18:54 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 15 18:50 equiv_col
-rw-r--r-- 1 mcc users 10 May 15 18:50 instance
-rw-r--r-- 1 mcc users 6 May 15 18:50 iscolored
-rwxr-xr-x 1 mcc users 79K May 15 18:50 model.pnml
=====================================================================
Generated by BenchKit 2-3637
Executing tool itstoolsl
Input is HypertorusGrid-PT-d2k3p2b04, examination is ReachabilityDeadlock
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r105-smll-152658635300146
=====================================================================


--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME HypertorusGrid-PT-d2k3p2b04-ReachabilityDeadlock-0

=== Now, execution of the tool begins

BK_START 1527372954931

Flatten gal took : 108 ms
Applied a total of 0 rules in 13 ms. Remains 117 /117 variables (removed 0) and now considering 144/144 (removed 0) transitions.
// Phase 1: matrix 144 rows 117 cols
Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
Converted graph to binary with : CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.louvain.binaries_1.0.0.201805241334/bin/convert-linux64, -i, /tmp/graph2374044786077483239.txt, -o, /tmp/graph2374044786077483239.bin, -w, /tmp/graph2374044786077483239.weights], workingDir=null]
Built communities with : CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.louvain.binaries_1.0.0.201805241334/bin/louvain-linux64, /tmp/graph2374044786077483239.bin, -l, -1, -v, -w, /tmp/graph2374044786077483239.weights, -q, 0, -e, 0.001], workingDir=null]
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
// Phase 1: matrix 144 rows 117 cols
invariant :po_d2_n1_2_3 + pol_d2_n1_2_3 = 1
invariant :pi_d2_n1_3_2 + pil_d2_n1_3_2 = 1
invariant :pi_d1_n1_2_3 + pil_d1_n1_2_3 = 1
invariant :pi_d1_n1_3_1 + pil_d1_n1_3_1 = 1
invariant :pi_d2_n1_2_2 + pil_d2_n1_2_2 = 1
invariant :pi_d1_n1_2_1 + pil_d1_n1_2_1 = 1
invariant :pb_d1_n1_3_1 + pb_d1_n2_3_1 + pb_d2_n1_3_1 + pb_d2_n2_3_1 + pbl_3_1 = 12
invariant :pb_d1_n1_1_3 + pb_d1_n2_1_3 + pb_d2_n1_1_3 + pb_d2_n2_1_3 + pbl_1_3 = 12
invariant :pi_d1_n1_1_2 + pil_d1_n1_1_2 = 1
invariant :pi_d2_n1_2_1 + pil_d2_n1_2_1 = 1
invariant :po_d2_n1_3_3 + pol_d2_n1_3_3 = 1
invariant :po_d2_n1_3_2 + pol_d2_n1_3_2 = 1
invariant :pi_d2_n1_1_1 + pil_d2_n1_1_1 = 1
invariant :pb_d1_n1_2_2 + pb_d1_n2_2_2 + pb_d2_n1_2_2 + pb_d2_n2_2_2 + -1'pbl_1_1 + -1'pbl_1_2 + -1'pbl_1_3 + -1'pbl_2_1 + -1'pbl_2_3 + -1'pbl_3_1 + -1'pbl_3_2 + -1'pbl_3_3 + -1'pil_d1_n1_1_1 + -1'pil_d1_n1_1_2 + -1'pil_d1_n1_1_3 + -1'pil_d1_n1_2_1 + -1'pil_d1_n1_2_2 + -1'pil_d1_n1_2_3 + -1'pil_d1_n1_3_1 + -1'pil_d1_n1_3_2 + -1'pil_d1_n1_3_3 + -1'pil_d2_n1_1_1 + -1'pil_d2_n1_1_2 + -1'pil_d2_n1_1_3 + -1'pil_d2_n1_2_1 + -1'pil_d2_n1_2_2 + -1'pil_d2_n1_2_3 + -1'pil_d2_n1_3_1 + -1'pil_d2_n1_3_2 + -1'pil_d2_n1_3_3 + -1'pol_d1_n1_1_1 + -1'pol_d1_n1_1_2 + -1'pol_d1_n1_1_3 + -1'pol_d1_n1_2_1 + -1'pol_d1_n1_2_2 + -1'pol_d1_n1_2_3 + -1'pol_d1_n1_3_1 + -1'pol_d1_n1_3_2 + -1'pol_d1_n1_3_3 + -1'pol_d2_n1_1_1 + -1'pol_d2_n1_1_2 + -1'pol_d2_n1_1_3 + -1'pol_d2_n1_2_1 + -1'pol_d2_n1_2_2 + -1'pol_d2_n1_2_3 + -1'pol_d2_n1_3_1 + -1'pol_d2_n1_3_2 + -1'pol_d2_n1_3_3 = -60
invariant :po_d1_n1_3_2 + pol_d1_n1_3_2 = 1
invariant :po_d1_n1_2_1 + pol_d1_n1_2_1 = 1
invariant :pb_d1_n1_2_1 + pb_d1_n2_2_1 + pb_d2_n1_2_1 + pb_d2_n2_2_1 + pbl_2_1 = 12
invariant :po_d1_n1_3_3 + pol_d1_n1_3_3 = 1
invariant :pi_d2_n1_1_3 + pil_d2_n1_1_3 = 1
invariant :pi_d1_n1_3_2 + pil_d1_n1_3_2 = 1
invariant :pi_d1_n1_2_2 + pil_d1_n1_2_2 = 1
invariant :po_d2_n1_2_2 + pol_d2_n1_2_2 = 1
invariant :po_d1_n1_2_2 + pol_d1_n1_2_2 = 1
invariant :pb_d1_n1_1_2 + pb_d1_n2_1_2 + pb_d2_n1_1_2 + pb_d2_n2_1_2 + pbl_1_2 = 12
invariant :pi_d2_n1_2_3 + pil_d2_n1_2_3 = 1
invariant :po_d2_n1_1_2 + pol_d2_n1_1_2 = 1
invariant :po_d2_n1_1_3 + pol_d2_n1_1_3 = 1
invariant :pi_d1_n1_1_3 + pil_d1_n1_1_3 = 1
invariant :pi_d2_n1_3_1 + pil_d2_n1_3_1 = 1
invariant :po_d2_n1_1_1 + pol_d2_n1_1_1 = 1
invariant :pb_d1_n1_3_2 + pb_d1_n2_3_2 + pb_d2_n1_3_2 + pb_d2_n2_3_2 + pbl_3_2 = 12
invariant :po_d2_n1_3_1 + pol_d2_n1_3_1 = 1
invariant :po_d2_n1_2_1 + pol_d2_n1_2_1 = 1
invariant :po_d1_n1_1_3 + pol_d1_n1_1_3 = 1
invariant :pi_d2_n1_1_2 + pil_d2_n1_1_2 = 1
invariant :pi_d1_n1_1_1 + pil_d1_n1_1_1 = 1
invariant :po_d1_n1_2_3 + pol_d1_n1_2_3 = 1
invariant :po_d1_n1_3_1 + pol_d1_n1_3_1 = 1
invariant :pbl_1_1 + pbl_1_2 + pbl_1_3 + pbl_2_1 + pbl_2_2 + pbl_2_3 + pbl_3_1 + pbl_3_2 + pbl_3_3 + pil_d1_n1_1_1 + pil_d1_n1_1_2 + pil_d1_n1_1_3 + pil_d1_n1_2_1 + pil_d1_n1_2_2 + pil_d1_n1_2_3 + pil_d1_n1_3_1 + pil_d1_n1_3_2 + pil_d1_n1_3_3 + pil_d2_n1_1_1 + pil_d2_n1_1_2 + pil_d2_n1_1_3 + pil_d2_n1_2_1 + pil_d2_n1_2_2 + pil_d2_n1_2_3 + pil_d2_n1_3_1 + pil_d2_n1_3_2 + pil_d2_n1_3_3 + pol_d1_n1_1_1 + pol_d1_n1_1_2 + pol_d1_n1_1_3 + pol_d1_n1_2_1 + pol_d1_n1_2_2 + pol_d1_n1_2_3 + pol_d1_n1_3_1 + pol_d1_n1_3_2 + pol_d1_n1_3_3 + pol_d2_n1_1_1 + pol_d2_n1_1_2 + pol_d2_n1_1_3 + pol_d2_n1_2_1 + pol_d2_n1_2_2 + pol_d2_n1_2_3 + pol_d2_n1_3_1 + pol_d2_n1_3_2 + pol_d2_n1_3_3 = 72
invariant :pi_d1_n1_3_3 + pil_d1_n1_3_3 = 1
invariant :pi_d2_n1_3_3 + pil_d2_n1_3_3 = 1
invariant :pb_d1_n1_2_3 + pb_d1_n2_2_3 + pb_d2_n1_2_3 + pb_d2_n2_2_3 + pbl_2_3 = 12
invariant :po_d1_n1_1_1 + pol_d1_n1_1_1 = 1
invariant :pb_d1_n1_3_3 + pb_d1_n2_3_3 + pb_d2_n1_3_3 + pb_d2_n2_3_3 + pbl_3_3 = 12
invariant :po_d1_n1_1_2 + pol_d1_n1_1_2 = 1
invariant :pb_d1_n1_1_1 + pb_d1_n2_1_1 + pb_d2_n1_1_1 + pb_d2_n2_1_1 + pbl_1_1 = 12
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805241334/bin/its-ctl-linux64, --gc-threshold, 2000000, --quiet, -i, /home/mcc/execution/ReachabilityDeadlock.pnml.gal, -t, CGAL, -ctl, DEADLOCK], workingDir=/home/mcc/execution]

its-ctl command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805241334/bin/its-ctl-linux64 --gc-threshold 2000000 --quiet -i /home/mcc/execution/ReachabilityDeadlock.pnml.gal -t CGAL -ctl DEADLOCK
No direction supplied, using forward translation only.
built 27 ordering constraints for composite.
built 20 ordering constraints for composite.
built 20 ordering constraints for composite.
built 20 ordering constraints for composite.
built 20 ordering constraints for composite.
built 20 ordering constraints for composite.
built 20 ordering constraints for composite.
built 20 ordering constraints for composite.
built 20 ordering constraints for composite.
built 20 ordering constraints for composite.
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O3, model.c], workingDir=/home/mcc/execution]
Compilation finished in 2616 ms.
Running link step : CommandLine [args=[gcc, -shared, -o, gal.so, model.o], workingDir=/home/mcc/execution]
Link finished in 53 ms.
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -d], workingDir=/home/mcc/execution]
terminate called after throwing an instance of 'std::bad_alloc'
what(): std::bad_alloc
WARNING : LTS min runner thread failed on error :java.lang.RuntimeException: Unexpected exception when executing ltsmin :CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -d], workingDir=/home/mcc/execution]
255

BK_STOP 1527374664224

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution ReachabilityDeadlock -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -louvain -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -consoleLog -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination ReachabilityDeadlock -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -louvain -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
May 26, 2018 10:15:57 PM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, ReachabilityDeadlock, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -louvain, -smt]
May 26, 2018 10:15:57 PM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
May 26, 2018 10:15:57 PM fr.lip6.move.gal.nupn.PTNetReader loadFromXML
INFO: Load time of PNML (sax parser for PT used): 73 ms
May 26, 2018 10:15:57 PM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 117 places.
May 26, 2018 10:15:57 PM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 144 transitions.
May 26, 2018 10:15:57 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.img.gal : 18 ms
May 26, 2018 10:15:58 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 104 ms
May 26, 2018 10:15:58 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.simple.gal : 7 ms
May 26, 2018 10:15:58 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 144 transitions.
May 26, 2018 10:15:58 PM fr.lip6.move.gal.application.MccTranslator applyOrder
INFO: Applying decomposition
May 26, 2018 10:15:58 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 50 ms
May 26, 2018 10:15:58 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 51 ms
May 26, 2018 10:15:58 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 144 transitions.
Begin: Sat May 26 22:15:58 2018

Computation of communities with the Newman-Girvan Modularity quality function

level 0:
start computation: Sat May 26 22:15:58 2018
network size: 117 nodes, 576 links, 288 weight
quality increased from -0.0121528 to 0.465278
end computation: Sat May 26 22:15:58 2018
level 1:
start computation: Sat May 26 22:15:58 2018
network size: 45 nodes, 189 links, 288 weight
quality increased from 0.465278 to 0.763889
end computation: Sat May 26 22:15:58 2018
level 2:
start computation: Sat May 26 22:15:58 2018
network size: 9 nodes, 45 links, 288 weight
quality increased from 0.763889 to 0.763889
end computation: Sat May 26 22:15:58 2018
End: Sat May 26 22:15:58 2018
Total duration: 0 sec
0.763889
May 26, 2018 10:15:58 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 46 place invariants in 24 ms
May 26, 2018 10:15:58 PM fr.lip6.move.gal.instantiate.CompositeBuilder decomposeWithOrder
INFO: Decomposing Gal with order
May 26, 2018 10:15:58 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 51 ms
May 26, 2018 10:15:58 PM fr.lip6.move.gal.instantiate.CompositeBuilder rewriteArraysToAllowPartition
INFO: Rewriting arrays to variables to allow decomposition.
May 26, 2018 10:15:58 PM fr.lip6.move.gal.instantiate.Instantiator fuseIsomorphicEffects
INFO: Removed a total of 144 redundant transitions.
May 26, 2018 10:15:58 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/ReachabilityDeadlock.pnml.gal : 9 ms
May 26, 2018 10:15:59 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 117 variables to be positive in 873 ms
May 26, 2018 10:15:59 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may disable matrix : 144 transitions.
May 26, 2018 10:15:59 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of disable matrix completed :0/144 took 0 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 26, 2018 10:15:59 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete disable matrix. took 13 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 26, 2018 10:15:59 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may enable matrix : 144 transitions.
May 26, 2018 10:15:59 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete enable matrix. took 12 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 26, 2018 10:15:59 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeCoEnablingMatrix
INFO: Computing symmetric co enabling matrix : 144 transitions.
May 26, 2018 10:16:02 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(3/144) took 3035 ms. Total solver calls (SAT/UNSAT): 566(562/4)
May 26, 2018 10:16:06 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(7/144) took 6413 ms. Total solver calls (SAT/UNSAT): 1116(1108/8)
May 26, 2018 10:16:09 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(11/144) took 9496 ms. Total solver calls (SAT/UNSAT): 1650(1638/12)
May 26, 2018 10:16:12 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(16/144) took 12714 ms. Total solver calls (SAT/UNSAT): 2295(2278/17)
May 26, 2018 10:16:15 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(21/144) took 16228 ms. Total solver calls (SAT/UNSAT): 2915(2893/22)
May 26, 2018 10:16:19 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(26/144) took 19856 ms. Total solver calls (SAT/UNSAT): 3510(3483/27)
May 26, 2018 10:16:22 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(30/144) took 23063 ms. Total solver calls (SAT/UNSAT): 3968(3937/31)
May 26, 2018 10:16:25 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(34/144) took 26093 ms. Total solver calls (SAT/UNSAT): 4410(4375/35)
May 26, 2018 10:16:29 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(39/144) took 30021 ms. Total solver calls (SAT/UNSAT): 4940(4900/40)
May 26, 2018 10:16:33 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(43/144) took 33477 ms. Total solver calls (SAT/UNSAT): 5346(5302/44)
May 26, 2018 10:16:36 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(47/144) took 36928 ms. Total solver calls (SAT/UNSAT): 5736(5688/48)
May 26, 2018 10:16:39 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(52/144) took 40040 ms. Total solver calls (SAT/UNSAT): 6201(6148/53)
May 26, 2018 10:16:42 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(57/144) took 43142 ms. Total solver calls (SAT/UNSAT): 6641(6583/58)
May 26, 2018 10:16:46 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(63/144) took 46458 ms. Total solver calls (SAT/UNSAT): 7136(7072/64)
May 26, 2018 10:16:49 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(69/144) took 49472 ms. Total solver calls (SAT/UNSAT): 7595(7525/70)
May 26, 2018 10:16:52 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(77/144) took 52913 ms. Total solver calls (SAT/UNSAT): 8151(8073/78)
May 26, 2018 10:16:55 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(84/144) took 56239 ms. Total solver calls (SAT/UNSAT): 8585(8500/85)
May 26, 2018 10:16:59 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(92/144) took 59520 ms. Total solver calls (SAT/UNSAT): 9021(8928/93)
May 26, 2018 10:17:02 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(104/144) took 62727 ms. Total solver calls (SAT/UNSAT): 9555(9450/105)
May 26, 2018 10:17:05 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(119/144) took 65758 ms. Total solver calls (SAT/UNSAT): 10020(9912/108)
May 26, 2018 10:17:07 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Finished co-enabling matrix. took 67643 ms. Total solver calls (SAT/UNSAT): 10296(10188/108)
May 26, 2018 10:17:07 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeDoNotAccord
INFO: Computing Do-Not-Accords matrix : 144 transitions.
May 26, 2018 10:17:17 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed DNA matrix. took 10654 ms. Total solver calls (SAT/UNSAT): 486(0/486)
May 26, 2018 10:17:18 PM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 79486ms conformant to PINS in folder :/home/mcc/execution
ITS-tools command line returned an error code 134
pins2lts-mc, 0.000: Registering PINS so language module
pins2lts-mc, 0.000: Loading model from ./gal.so
pins2lts-mc, 0.001: library has no initializer
pins2lts-mc, 0.001: loading model GAL
pins2lts-mc, 0.001: completed loading model GAL
pins2lts-mc, 0.002: Initializing POR dependencies: labels 144, guards 144
pins2lts-mc, 0.021: There are 144 state labels and 1 edge labels
pins2lts-mc, 0.021: State length is 117, there are 144 groups
pins2lts-mc, 0.021: Running bfs using 1 core (sequential)
pins2lts-mc, 0.021: Using a non-indexing tree table with 2^27 elements
pins2lts-mc, 0.021: Successor permutation: none
pins2lts-mc, 0.021: Visible groups: 0 / 144, labels: 0 / 144
pins2lts-mc, 0.021: POR cycle proviso: none
pins2lts-mc, 0.021: Global bits: 0, count bits: 0, local bits: 0
pins2lts-mc, 0.136: 42 levels 1000 states 5125 transitions
pins2lts-mc, 0.241: 43 levels 2000 states 9271 transitions
pins2lts-mc, 0.402: 43 levels 4000 states 13614 transitions
pins2lts-mc, 0.789: 44 levels 8000 states 28625 transitions
pins2lts-mc, 1.637: 45 levels 16000 states 67810 transitions
pins2lts-mc, 3.435: 45 levels 32000 states 152252 transitions
pins2lts-mc, 6.191: 46 levels 64000 states 263463 transitions
pins2lts-mc, 11.179: 46 levels 128000 states 458451 transitions
pins2lts-mc, 21.593: 47 levels 256000 states 913756 transitions
pins2lts-mc, 46.298: 47 levels 512000 states 2283561 transitions
pins2lts-mc, 85.228: 48 levels 1024000 states 3838295 transitions
pins2lts-mc, 165.255: 48 levels 2048000 states 7038205 transitions
pins2lts-mc, 317.449: 49 levels 4096000 states 14269911 transitions
pins2lts-mc, 628.781: 50 levels 8192000 states 30320931 transitions
pins2lts-mc, 1271.241: 50 levels 16384000 states 63531760 transitions
pins2lts-mc, 1621.614: Error: tree leafs table full! Change -s/--ratio.
pins2lts-mc, 1621.823:
pins2lts-mc, 1621.823:
pins2lts-mc, 1621.823: Explored 20522839 states 80386038 transitions, fanout: 3.917
pins2lts-mc, 1621.826: Total exploration time 1621.800 sec (1621.800 sec minimum, 1621.800 sec on average)
pins2lts-mc, 1621.826: States per second: 12654, Transitions per second: 49566
pins2lts-mc, 1621.826:
pins2lts-mc, 1621.826: Queue width: 8B, total height: 47179907, memory: 359.95MB
pins2lts-mc, 1621.826: Tree memory: 772.5MB, 12.0 B/state, compr.: 2.5%
pins2lts-mc, 1621.826: Tree fill ratio (roots/leafs): 50.0%/99.0%
pins2lts-mc, 1621.826: Stored 144 string chucks using 0MB
pins2lts-mc, 1621.826: Total memory used for chunk indexing: 0MB
pins2lts-mc, 1621.826: Est. total memory use: 1132.5MB (~1384.0MB paged-in)
java.lang.RuntimeException: Unexpected exception when executing ltsmin :CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -d], workingDir=/home/mcc/execution]
255
at fr.lip6.move.gal.application.LTSminRunner.checkProperty(LTSminRunner.java:167)
at fr.lip6.move.gal.application.LTSminRunner.access$9(LTSminRunner.java:122)
at fr.lip6.move.gal.application.LTSminRunner$1.run(LTSminRunner.java:91)
at java.lang.Thread.run(Thread.java:748)

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="HypertorusGrid-PT-d2k3p2b04"
export BK_EXAMINATION="ReachabilityDeadlock"
export BK_TOOL="itstoolsl"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

tar xzf /home/mcc/BenchKit/INPUTS/HypertorusGrid-PT-d2k3p2b04.tgz
mv HypertorusGrid-PT-d2k3p2b04 execution
cd execution
pwd
ls -lh

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3637"
echo " Executing tool itstoolsl"
echo " Input is HypertorusGrid-PT-d2k3p2b04, examination is ReachabilityDeadlock"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r105-smll-152658635300146"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityDeadlock" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityDeadlock" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityDeadlock.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityDeadlock.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityDeadlock.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' ReachabilityDeadlock.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;