Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Waiting for the VM to be ready (probing ssh)
..................
/home/mcc/execution
total 1.4M
-rw-r--r-- 1 mcc users 3.7K May 15 18:54 CTLCardinality.txt
-rw-r--r-- 1 mcc users 20K May 15 18:54 CTLCardinality.xml
-rw-r--r-- 1 mcc users 2.5K May 15 18:54 CTLFireability.txt
-rw-r--r-- 1 mcc users 15K May 15 18:54 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K May 15 18:50 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.1K May 15 18:50 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 2.5K May 15 18:54 LTLCardinality.txt
-rw-r--r-- 1 mcc users 12K May 15 18:54 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.0K May 15 18:54 LTLFireability.txt
-rw-r--r-- 1 mcc users 9.6K May 15 18:54 LTLFireability.xml
-rw-r--r-- 1 mcc users 3.3K May 15 18:54 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 15K May 15 18:54 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 113 May 15 18:54 ReachabilityDeadlock.txt
-rw-r--r-- 1 mcc users 351 May 15 18:54 ReachabilityDeadlock.xml
-rw-r--r-- 1 mcc users 2.8K May 15 18:54 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 16K May 15 18:54 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.7K May 15 18:54 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.8K May 15 18:54 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 15 18:50 equiv_col
-rw-r--r-- 1 mcc users 4 May 15 18:50 instance
-rw-r--r-- 1 mcc users 6 May 15 18:50 iscolored
-rw-r--r-- 1 mcc users 1.2M May 15 18:50 model.pnml
=====================================================================
Generated by BenchKit 2-3637
Executing tool itstoolsl
Input is FlexibleBarrier-PT-18b, examination is ReachabilityDeadlock
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r093-blw7-152650005400209
=====================================================================

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME FlexibleBarrier-PT-18b-ReachabilityDeadlock-0

=== Now, execution of the tool begins

BK_START 1527389729140

Flatten gal took : 540 ms
Constant places removed 1 places and 1 transitions.
Performed 2915 Post agglomeration using F-continuation condition.
Iterating post reduction 0 with 2916 rules applied. Total rules applied 2916 place count 4369 transition count 2121
Constant places removed 2917 places and 2 transitions.
Reduce isomorphic transitions removed 1 transitions.
Iterating post reduction 1 with 2918 rules applied. Total rules applied 5834 place count 1452 transition count 2118
Performed 1 Pre agglomeration using Quasi-Persistent + HF-interchangeable + Divergent Free condition.
Pre-agglomeration after 2 with 1 Pre rules applied. Total rules applied 5834 place count 1452 transition count 2117
Constant places removed 1 places and 0 transitions.
Iterating post reduction 2 with 1 rules applied. Total rules applied 5835 place count 1451 transition count 2117
Symmetric choice reduction at 3 with 583 rule applications. Total rules 6418 place count 1451 transition count 2117
Constant places removed 583 places and 583 transitions.
Reduce isomorphic transitions removed 289 transitions.
Iterating post reduction 3 with 872 rules applied. Total rules applied 7290 place count 868 transition count 1245
Performed 91 Post agglomeration using F-continuation condition.
Constant places removed 91 places and 0 transitions.
Iterating post reduction 4 with 91 rules applied. Total rules applied 7381 place count 777 transition count 1154
Performed 36 Post agglomeration using F-continuation condition.
Constant places removed 36 places and 0 transitions.
Iterating post reduction 5 with 36 rules applied. Total rules applied 7417 place count 741 transition count 1408
Applied a total of 7417 rules in 2360 ms. Remains 741 /4370 variables (removed 3629) and now considering 1408/5037 (removed 3629) transitions.
Normalized transition count is 1354
// Phase 1: matrix 1354 rows 741 cols
Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
Normalized transition count is 1354
// Phase 1: matrix 1354 rows 741 cols
invariant :p1235 + p1239 + p1243 + p1247 + p1251 + p1255 + p1259 + p1263 + p1267 + p1271 + p1275 + p1279 + p1283 + p1287 + p1291 + p1295 + p1302 + p1308 + p1309 + p1311 + p1312 + p1315 + p1321 + p1326 + p1328 = 1
invariant :p1727 + p1731 + p1735 + p1739 + p1743 + p1747 + p1751 + p1755 + p1759 + p1763 + p1767 + p1771 + p1775 + p1779 + p1783 + p1787 + p1794 + p1800 + p1801 + p1803 + p1804 + p1807 + p1813 + p1818 + p1820 = 1
invariant :p2219 + p2223 + p2227 + p2231 + p2235 + p2239 + p2243 + p2247 + p2251 + p2255 + p2259 + p2263 + p2267 + p2271 + p2275 + p2279 + p2286 + p2292 + p2293 + p2295 + p2296 + p2299 + p2305 + p2310 + p2312 = 1
invariant :p87 + p91 + p95 + p99 + p103 + p107 + p111 + p115 + p119 + p123 + p127 + p131 + p135 + p139 + p143 + p147 + p154 + p160 + p161 + p163 + p164 + p167 + p173 + p178 + p180 = 1
invariant :p415 + p419 + p423 + p427 + p431 + p435 + p439 + p443 + p447 + p451 + p455 + p459 + p463 + p467 + p471 + p475 + p482 + p488 + p489 + p491 + p492 + p495 + p501 + p506 + p508 = 1
invariant :p907 + p911 + p915 + p919 + p923 + p927 + p931 + p935 + p939 + p943 + p947 + p951 + p955 + p959 + p963 + p967 + p974 + p980 + p981 + p983 + p984 + p987 + p993 + p998 + p1000 = 1
invariant :p251 + p255 + p259 + p263 + p267 + p271 + p275 + p279 + p283 + p287 + p291 + p295 + p299 + p303 + p307 + p311 + p318 + p324 + p325 + p327 + p328 + p331 + p337 + p342 + p344 = 1
invariant :p1563 + p1567 + p1571 + p1575 + p1579 + p1583 + p1587 + p1591 + p1595 + p1599 + p1603 + p1607 + p1611 + p1615 + p1619 + p1623 + p1630 + p1636 + p1637 + p1639 + p1640 + p1643 + p1649 + p1654 + p1656 = 1
invariant :p2809 + p2813 + p2817 + p2821 + p2825 + p2829 + p2833 + p2837 + p2841 + p2845 + p2849 + p2853 + p2857 + p2861 + p2865 + p2869 + p2873 + p2880 + p2886 + p2887 + p2889 + p2890 + p2893 + p2902 = 1
invariant :p743 + p747 + p751 + p755 + p759 + p763 + p767 + p771 + p775 + p779 + p783 + p787 + p791 + p795 + p799 + p803 + p810 + p816 + p817 + p819 + p820 + p823 + p829 + p834 + p836 = 1
invariant :p1071 + p1075 + p1079 + p1083 + p1087 + p1091 + p1095 + p1099 + p1103 + p1107 + p1111 + p1115 + p1119 + p1123 + p1127 + p1131 + p1138 + p1144 + p1145 + p1147 + p1148 + p1151 + p1157 + p1162 + p1164 = 1
invariant :p2383 + p2387 + p2391 + p2395 + p2399 + p2403 + p2407 + p2411 + p2415 + p2419 + p2423 + p2427 + p2431 + p2435 + p2439 + p2443 + p2450 + p2456 + p2457 + p2459 + p2460 + p2463 + p2469 + p2474 + p2476 = 1
invariant :p579 + p583 + p587 + p591 + p595 + p599 + p603 + p607 + p611 + p615 + p619 + p623 + p627 + p631 + p635 + p639 + p646 + p652 + p653 + p655 + p656 + p659 + p665 + p670 + p672 = 1
invariant :p2911 + p2916 + p2921 + p2926 + p2931 + p2936 + p2941 + p2946 + p2951 + p2956 + p2961 + p2966 + p2971 + p2976 + p2981 + p2986 + p2991 + p2996 + p3001 + p3006 + p3011 + p3016 + p3021 + p3026 + p3031 + p3036 + p3041 + p3046 + p3051 + p3056 + p3061 + p3066 + p3071 + p3076 + p3081 + p3086 + p3091 + p3096 + p3101 + p3106 + p3111 + p3116 + p3121 + p3126 + p3131 + p3136 + p3141 + p3146 + p3151 + p3156 + p3161 + p3166 + p3171 + p3176 + p3181 + p3186 + p3191 + p3196 + p3201 + p3206 + p3211 + p3216 + p3221 + p3226 + p3231 + p3236 + p3241 + p3246 + p3251 + p3256 + p3261 + p3266 + p3271 + p3276 + p3281 + p3286 + p3291 + p3296 + p3301 + p3306 + p3311 + p3316 + p3321 + p3326 + p3331 + p3336 + p3341 + p3346 + p3351 + p3356 + p3361 + p3366 + p3371 + p3376 + p3381 + p3386 + p3391 + p3396 + p3401 + p3406 + p3411 + p3416 + p3421 + p3426 + p3431 + p3436 + p3441 + p3446 + p3451 + p3456 + p3461 + p3466 + p3471 + p3476 + p3481 + p3486 + p3491 + p3496 + p3501 + p3506 + p3511 + p3516 + p3521 + p3526 + p3531 + p3536 + p3541 + p3546 + p3551 + p3556 + p3561 + p3566 + p3571 + p3576 + p3581 + p3586 + p3591 + p3596 + p3601 + p3606 + p3611 + p3616 + p3621 + p3626 + p3631 + p3636 + p3641 + p3646 + p3651 + p3656 + p3661 + p3666 + p3671 + p3676 + p3681 + p3686 + p3691 + p3696 + p3701 + p3706 + p3711 + p3716 + p3721 + p3726 + p3731 + p3736 + p3741 + p3746 + p3751 + p3756 + p3761 + p3766 + p3771 + p3776 + p3781 + p3786 + p3791 + p3796 + p3801 + p3806 + p3811 + p3816 + p3821 + p3826 + p3831 + p3836 + p3841 + p3846 + p3851 + p3856 + p3861 + p3866 + p3871 + p3876 + p3881 + p3886 + p3891 + p3896 + p3901 + p3906 + p3911 + p3916 + p3921 + p3926 + p3931 + p3936 + p3941 + p3946 + p3951 + p3956 + p3961 + p3966 + p3971 + p3976 + p3981 + p3986 + p3991 + p3996 + p4001 + p4006 + p4011 + p4016 + p4021 + p4026 + p4031 + p4036 + p4041 + p4046 + p4051 + p4056 + p4061 + p4066 + p4071 + p4076 + p4081 + p4086 + p4091 + p4096 + p4101 + p4106 + p4111 + p4116 + p4121 + p4126 + p4131 + p4136 + p4141 + p4146 + p4151 + p4156 + p4161 + p4166 + p4171 + p4176 + p4181 + p4186 + p4191 + p4196 + p4201 + p4206 + p4211 + p4216 + p4221 + p4226 + p4231 + p4236 + p4241 + p4246 + p4251 + p4256 + p4261 + p4266 + p4271 + p4276 + p4281 + p4286 + p4291 + p4296 + p4301 + p4306 + p4311 + p4316 + p4321 + p4326 + p4331 + p4336 + p4341 + p4346 + p4351 + p4355 = 1
invariant :p4366 + p4367 = 1
invariant :p2547 + p2551 + p2555 + p2559 + p2563 + p2567 + p2571 + p2575 + p2579 + p2583 + p2587 + p2591 + p2595 + p2599 + p2603 + p2607 + p2614 + p2620 + p2621 + p2623 + p2624 + p2627 + p2633 + p2638 + p2640 = 1
invariant :p2055 + p2059 + p2063 + p2067 + p2071 + p2075 + p2079 + p2083 + p2087 + p2091 + p2095 + p2099 + p2103 + p2107 + p2111 + p2115 + p2122 + p2128 + p2129 + p2131 + p2132 + p2135 + p2141 + p2146 + p2148 = 1
invariant :p2711 + p2715 + p2719 + p2723 + p2727 + p2731 + p2735 + p2739 + p2743 + p2747 + p2751 + p2755 + p2759 + p2763 + p2767 + p2771 + p2778 + p2784 + p2785 + p2787 + p2788 + p2791 + p2797 + p2802 + p2804 = 1
invariant :p1399 + p1403 + p1407 + p1411 + p1415 + p1419 + p1423 + p1427 + p1431 + p1435 + p1439 + p1443 + p1447 + p1451 + p1455 + p1459 + p1466 + p1472 + p1473 + p1475 + p1476 + p1479 + p1485 + p1490 + p1492 = 1
invariant :p1891 + p1895 + p1899 + p1903 + p1907 + p1911 + p1915 + p1919 + p1923 + p1927 + p1931 + p1935 + p1939 + p1943 + p1947 + p1951 + p1958 + p1964 + p1965 + p1967 + p1968 + p1971 + p1977 + p1982 + p1984 = 1
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805241334/bin/its-ctl-linux64, --gc-threshold, 2000000, --quiet, -i, /home/mcc/execution/ReachabilityDeadlock.pnml.gal, -t, CGAL, -ctl, DEADLOCK], workingDir=/home/mcc/execution]

its-ctl command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805241334/bin/its-ctl-linux64 --gc-threshold 2000000 --quiet -i /home/mcc/execution/ReachabilityDeadlock.pnml.gal -t CGAL -ctl DEADLOCK
No direction supplied, using forward translation only.
built 1 ordering constraints for composite.
built 759 ordering constraints for composite.
built 748 ordering constraints for composite.
built 736 ordering constraints for composite.
built 720 ordering constraints for composite.
built 700 ordering constraints for composite.
built 676 ordering constraints for composite.
built 648 ordering constraints for composite.
built 616 ordering constraints for composite.
built 580 ordering constraints for composite.
built 540 ordering constraints for composite.
built 496 ordering constraints for composite.
built 448 ordering constraints for composite.
built 396 ordering constraints for composite.
built 340 ordering constraints for composite.
built 280 ordering constraints for composite.
built 216 ordering constraints for composite.
built 148 ordering constraints for composite.
built 759 ordering constraints for composite.
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
reachable,8.10251e+27,12.5047,423820,43,580,949610,12900,7199,2.0811e+06,1847,4343,0


Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
dead,4.20347e+26,15.9623,424140,6736,42859,949610,335204,22408,2.0811e+06,6766,2.70509e+06,8615

System contains 4.20347e+26 deadlocks (shown below if less than --print-limit option) !
FORMULA FlexibleBarrier-PT-18b-ReachabilityDeadlock-0 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
[ i1={[ u38={[ p4366=1 ]
} u37={[ p3861=1 ]
} ]
} i0={[ u35={[ p2809=1 ]
[ p2813=1 ]
[ p2817=1 ]
[ p2821=1 ]
[ p2825=1 ]
[ p2829=1 ]
[ p2833=1 ]
[ p2837=1 ]
[ p2841=1 ]
[ p2845=1 ]
} i0={[ u34={[ p2711=1 ]
[ p2715=1 ]
[ p2719=1 ]
[ p2723=1 ]
[ p2727=1 ]
[ p2731=1 ]
[ p2735=1 ]
[ p2739=1 ]
[ p2802=1 ]
[ p2743=1 ]
} i0={[ u33={[ p2638=1 ]
} i0={[ u32={[ p2383=1 ]
[ p2387=1 ]
[ p2391=1 ]
[ p2395=1 ]
[ p2399=1 ]
[ p2403=1 ]
[ p2407=1 ]
[ p2411=1 ]
[ p2474=1 ]
[ p2415=1 ]
} i0={[ u31={[ p2219=1 ]
[ p2223=1 ]
[ p2227=1 ]
[ p2231=1 ]
[ p2235=1 ]
[ p2239=1 ]
[ p2243=1 ]
[ p2247=1 ]
[ p2310=1 ]
[ p2251=1 ]
} i0={[ u30={[ p2055=1 ]
[ p2059=1 ]
[ p2063=1 ]
[ p2067=1 ]
[ p2071=1 ]
[ p2075=1 ]
[ p2079=1 ]
[ p2083=1 ]
[ p2146=1 ]
[ p2087=1 ]
} i0={[ u29={[ p1891=1 ]
[ p1895=1 ]
[ p1899=1 ]
[ p1903=1 ]
[ p1907=1 ]
[ p1911=1 ]
[ p1915=1 ]
[ p1919=1 ]
[ p1982=1 ]
[ p1923=1 ]
} i0={[ u28={[ p1727=1 ]
[ p1731=1 ]
[ p1735=1 ]
[ p1739=1 ]
[ p1743=1 ]
[ p1747=1 ]
[ p1751=1 ]
[ p1755=1 ]
[ p1818=1 ]
[ p1759=1 ]
} i0={[ u27={[ p1563=1 ]
[ p1567=1 ]
[ p1571=1 ]
[ p1575=1 ]
[ p1579=1 ]
[ p1583=1 ]
[ p1587=1 ]
[ p1591=1 ]
[ p1654=1 ]
[ p1595=1 ]
} i0={[ u26={[ p1399=1 ]
[ p1403=1 ]
[ p1407=1 ]
[ p1411=1 ]
[ p1415=1 ]
[ p1419=1 ]
[ p1423=1 ]
[ p1427=1 ]
[ p1490=1 ]
[ p1431=1 ]
} i0={[ u25={[ p1235=1 ]
[ p1239=1 ]
[ p1243=1 ]
[ p1247=1 ]
[ p1251=1 ]
[ p1255=1 ]
[ p1259=1 ]
[ p1263=1 ]
[ p1326=1 ]
[ p1267=1 ]
} i0={[ u24={[ p1071=1 ]
[ p1075=1 ]
[ p1079=1 ]
[ p1083=1 ]
[ p1087=1 ]
[ p1091=1 ]
[ p1095=1 ]
[ p1099=1 ]
[ p1162=1 ]
[ p1103=1 ]
} i0={[ u23={[ p907=1 ]
[ p911=1 ]
[ p915=1 ]
[ p919=1 ]
[ p923=1 ]
[ p927=1 ]
[ p931=1 ]
[ p935=1 ]
[ p998=1 ]
[ p939=1 ]
} i0={[ u22={[ p743=1 ]
[ p747=1 ]
[ p751=1 ]
[ p755=1 ]
[ p759=1 ]
[ p763=1 ]
[ p767=1 ]
[ p771=1 ]
[ p834=1 ]
[ p775=1 ]
} i0={[ u21={[ p579=1 ]
[ p583=1 ]
[ p587=1 ]
[ p591=1 ]
[ p595=1 ]
[ p599=1 ]
[ p603=1 ]
[ p607=1 ]
[ p670=1 ]
[ p611=1 ]
} i0={[ u20={[ p415=1 ]
[ p419=1 ]
[ p423=1 ]
[ p427=1 ]
[ p431=1 ]
[ p435=1 ]
[ p439=1 ]
[ p443=1 ]
[ p506=1 ]
[ p447=1 ]
} i0={[ u19={[ p251=1 ]
[ p255=1 ]
[ p259=1 ]
[ p263=1 ]
[ p267=1 ]
[ p271=1 ]
[ p275=1 ]
[ p279=1 ]
[ p342=1 ]
[ p283=1 ]
} u18={[ p87=1 ]
[ p91=1 ]
[ p95=1 ]
[ p99=1 ]
[ p103=1 ]
[ p107=1 ]
[ p111=1 ]
[ p115=1 ]
[ p178=1 ]
[ p119=1 ]
} ]
} ]
} ]
} ]
} ]
} ]
} ]
} ]
} ]
} ]
} ]
} ]
} ]
} ]
} ]
} ]
} ]
} ]
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O3, model.c], workingDir=/home/mcc/execution]
WARNING : LTS min runner thread was asked to interrupt. Dying gracefully.

BK_STOP 1527389755300

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution ReachabilityDeadlock -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -louvain -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -consoleLog -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination ReachabilityDeadlock -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -louvain -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
May 27, 2018 2:55:30 AM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, ReachabilityDeadlock, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -louvain, -smt]
May 27, 2018 2:55:30 AM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
May 27, 2018 2:55:30 AM fr.lip6.move.gal.nupn.PTNetReader loadFromXML
INFO: Load time of PNML (sax parser for PT used): 210 ms
May 27, 2018 2:55:30 AM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 4370 places.
May 27, 2018 2:55:30 AM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 5037 transitions.
May 27, 2018 2:55:30 AM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Found NUPN structural information;
May 27, 2018 2:55:31 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 535 ms
May 27, 2018 2:55:31 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.simple.gal : 57 ms
May 27, 2018 2:55:31 AM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 5037 transitions.
May 27, 2018 2:55:35 AM fr.lip6.move.gal.application.MccTranslator applyOrder
INFO: Applying decomposition
May 27, 2018 2:55:35 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 119 ms
May 27, 2018 2:55:35 AM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 1408 transitions.
May 27, 2018 2:55:35 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 96 ms
May 27, 2018 2:55:35 AM fr.lip6.move.gal.instantiate.CompositeBuilder decomposeWithOrder
INFO: Decomposing Gal with order
May 27, 2018 2:55:35 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 95 ms
May 27, 2018 2:55:35 AM fr.lip6.move.gal.instantiate.CompositeBuilder rewriteArraysToAllowPartition
INFO: Rewriting arrays to variables to allow decomposition.
May 27, 2018 2:55:35 AM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 20 place invariants in 227 ms
May 27, 2018 2:55:37 AM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 741 variables to be positive in 1827 ms
May 27, 2018 2:55:37 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may disable matrix : 1408 transitions.
May 27, 2018 2:55:37 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of disable matrix completed :0/1408 took 1 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 27, 2018 2:55:37 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete disable matrix. took 107 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 27, 2018 2:55:37 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may enable matrix : 1408 transitions.
May 27, 2018 2:55:37 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete enable matrix. took 52 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 27, 2018 2:55:37 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeCoEnablingMatrix
INFO: Computing symmetric co enabling matrix : 1408 transitions.
May 27, 2018 2:55:38 AM fr.lip6.move.gal.instantiate.Instantiator fuseIsomorphicEffects
INFO: Removed a total of 1011 redundant transitions.
May 27, 2018 2:55:38 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/ReachabilityDeadlock.pnml.gal : 43 ms
Skipping mayMatrices nes/nds SMT solver raised an exception or timeout.
java.lang.RuntimeException: SMT solver raised an exception or timeout.
at fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver.computeCoEnablingMatrix(NecessaryEnablingsolver.java:480)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.printLabels(Gal2PinsTransformerNext.java:530)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.printDependencyMatrix(Gal2PinsTransformerNext.java:209)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.buildBodyFile(Gal2PinsTransformerNext.java:85)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.transform(Gal2PinsTransformerNext.java:830)
at fr.lip6.move.gal.application.LTSminRunner$1.run(LTSminRunner.java:71)
at java.lang.Thread.run(Thread.java:748)
May 27, 2018 2:55:55 AM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 19917ms conformant to PINS in folder :/home/mcc/execution

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="FlexibleBarrier-PT-18b"
export BK_EXAMINATION="ReachabilityDeadlock"
export BK_TOOL="itstoolsl"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

tar xzf /home/mcc/BenchKit/INPUTS/FlexibleBarrier-PT-18b.tgz
mv FlexibleBarrier-PT-18b execution
cd execution
pwd
ls -lh

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3637"
echo " Executing tool itstoolsl"
echo " Input is FlexibleBarrier-PT-18b, examination is ReachabilityDeadlock"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r093-blw7-152650005400209"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityDeadlock" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityDeadlock" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityDeadlock.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityDeadlock.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityDeadlock.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' ReachabilityDeadlock.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;