Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Waiting for the VM to be ready (probing ssh)
................
/home/mcc/execution
total 1.1M
-rw-r--r-- 1 mcc users 4.0K May 15 18:54 CTLCardinality.txt
-rw-r--r-- 1 mcc users 23K May 15 18:54 CTLCardinality.xml
-rw-r--r-- 1 mcc users 2.4K May 15 18:54 CTLFireability.txt
-rw-r--r-- 1 mcc users 15K May 15 18:54 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K May 15 18:50 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.1K May 15 18:50 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 2.6K May 15 18:54 LTLCardinality.txt
-rw-r--r-- 1 mcc users 12K May 15 18:54 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.0K May 15 18:54 LTLFireability.txt
-rw-r--r-- 1 mcc users 11K May 15 18:54 LTLFireability.xml
-rw-r--r-- 1 mcc users 3.6K May 15 18:54 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 18K May 15 18:54 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 113 May 15 18:54 ReachabilityDeadlock.txt
-rw-r--r-- 1 mcc users 351 May 15 18:54 ReachabilityDeadlock.xml
-rw-r--r-- 1 mcc users 2.8K May 15 18:54 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 16K May 15 18:54 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.7K May 15 18:54 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.7K May 15 18:54 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 15 18:50 equiv_col
-rw-r--r-- 1 mcc users 4 May 15 18:50 instance
-rw-r--r-- 1 mcc users 6 May 15 18:50 iscolored
-rw-r--r-- 1 mcc users 945K May 15 18:50 model.pnml
=====================================================================
Generated by BenchKit 2-3637
Executing tool itstoolsl
Input is FlexibleBarrier-PT-16b, examination is ReachabilityDeadlock
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r093-blw7-152650005400195
=====================================================================

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME FlexibleBarrier-PT-16b-ReachabilityDeadlock-0

=== Now, execution of the tool begins

BK_START 1527386236096

Flatten gal took : 423 ms
Constant places removed 1 places and 1 transitions.
Performed 2305 Post agglomeration using F-continuation condition.
Iterating post reduction 0 with 2306 rules applied. Total rules applied 2306 place count 3471 transition count 1695
Constant places removed 2307 places and 2 transitions.
Reduce isomorphic transitions removed 1 transitions.
Iterating post reduction 1 with 2308 rules applied. Total rules applied 4614 place count 1164 transition count 1692
Performed 1 Pre agglomeration using Quasi-Persistent + HF-interchangeable + Divergent Free condition.
Pre-agglomeration after 2 with 1 Pre rules applied. Total rules applied 4614 place count 1164 transition count 1691
Constant places removed 1 places and 0 transitions.
Iterating post reduction 2 with 1 rules applied. Total rules applied 4615 place count 1163 transition count 1691
Symmetric choice reduction at 3 with 455 rule applications. Total rules 5070 place count 1163 transition count 1691
Constant places removed 455 places and 455 transitions.
Reduce isomorphic transitions removed 225 transitions.
Iterating post reduction 3 with 680 rules applied. Total rules applied 5750 place count 708 transition count 1011
Performed 81 Post agglomeration using F-continuation condition.
Constant places removed 81 places and 0 transitions.
Iterating post reduction 4 with 81 rules applied. Total rules applied 5831 place count 627 transition count 930
Performed 32 Post agglomeration using F-continuation condition.
Constant places removed 32 places and 0 transitions.
Iterating post reduction 5 with 32 rules applied. Total rules applied 5863 place count 595 transition count 1124
Applied a total of 5863 rules in 1563 ms. Remains 595 /3472 variables (removed 2877) and now considering 1124/4001 (removed 2877) transitions.
Normalized transition count is 1076
// Phase 1: matrix 1076 rows 595 cols
Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
Normalized transition count is 1076
// Phase 1: matrix 1076 rows 595 cols
invariant :p1113 + p1117 + p1121 + p1125 + p1129 + p1133 + p1137 + p1141 + p1145 + p1149 + p1153 + p1157 + p1161 + p1165 + p1172 + p1178 + p1179 + p1181 + p1182 + p1185 + p1191 + p1196 + p1198 = 1
invariant :p2001 + p2005 + p2009 + p2013 + p2017 + p2021 + p2025 + p2029 + p2033 + p2037 + p2041 + p2045 + p2049 + p2053 + p2060 + p2066 + p2067 + p2069 + p2070 + p2073 + p2079 + p2084 + p2086 = 1
invariant :p1557 + p1561 + p1565 + p1569 + p1573 + p1577 + p1581 + p1585 + p1589 + p1593 + p1597 + p1601 + p1605 + p1609 + p1616 + p1622 + p1623 + p1625 + p1626 + p1629 + p1635 + p1640 + p1642 = 1
invariant :p521 + p525 + p529 + p533 + p537 + p541 + p545 + p549 + p553 + p557 + p561 + p565 + p569 + p573 + p580 + p586 + p587 + p589 + p590 + p593 + p599 + p604 + p606 = 1
invariant :p1705 + p1709 + p1713 + p1717 + p1721 + p1725 + p1729 + p1733 + p1737 + p1741 + p1745 + p1749 + p1753 + p1757 + p1764 + p1770 + p1771 + p1773 + p1774 + p1777 + p1783 + p1788 + p1790 = 1
invariant :p1261 + p1265 + p1269 + p1273 + p1277 + p1281 + p1285 + p1289 + p1293 + p1297 + p1301 + p1305 + p1309 + p1313 + p1320 + p1326 + p1327 + p1329 + p1330 + p1333 + p1339 + p1344 + p1346 = 1
invariant :p3468 + p3469 = 1
invariant :p1409 + p1413 + p1417 + p1421 + p1425 + p1429 + p1433 + p1437 + p1441 + p1445 + p1449 + p1453 + p1457 + p1461 + p1468 + p1474 + p1475 + p1477 + p1478 + p1481 + p1487 + p1492 + p1494 = 1
invariant :p77 + p81 + p85 + p89 + p93 + p97 + p101 + p105 + p109 + p113 + p117 + p121 + p125 + p129 + p136 + p142 + p143 + p145 + p146 + p149 + p155 + p160 + p162 = 1
invariant :p2239 + p2243 + p2247 + p2251 + p2255 + p2259 + p2263 + p2267 + p2271 + p2275 + p2279 + p2283 + p2287 + p2291 + p2295 + p2302 + p2308 + p2309 + p2311 + p2312 + p2315 + p2324 = 1
invariant :p2333 + p2338 + p2343 + p2348 + p2353 + p2358 + p2363 + p2368 + p2373 + p2378 + p2383 + p2388 + p2393 + p2398 + p2403 + p2408 + p2413 + p2418 + p2423 + p2428 + p2433 + p2438 + p2443 + p2448 + p2453 + p2458 + p2463 + p2468 + p2473 + p2478 + p2483 + p2488 + p2493 + p2498 + p2503 + p2508 + p2513 + p2518 + p2523 + p2528 + p2533 + p2538 + p2543 + p2548 + p2553 + p2558 + p2563 + p2568 + p2573 + p2578 + p2583 + p2588 + p2593 + p2598 + p2603 + p2608 + p2613 + p2618 + p2623 + p2628 + p2633 + p2638 + p2643 + p2648 + p2653 + p2658 + p2663 + p2668 + p2673 + p2678 + p2683 + p2688 + p2693 + p2698 + p2703 + p2708 + p2713 + p2718 + p2723 + p2728 + p2733 + p2738 + p2743 + p2748 + p2753 + p2758 + p2763 + p2768 + p2773 + p2778 + p2783 + p2788 + p2793 + p2798 + p2803 + p2808 + p2813 + p2818 + p2823 + p2828 + p2833 + p2838 + p2843 + p2848 + p2853 + p2858 + p2863 + p2868 + p2873 + p2878 + p2883 + p2888 + p2893 + p2898 + p2903 + p2908 + p2913 + p2918 + p2923 + p2928 + p2933 + p2938 + p2943 + p2948 + p2953 + p2958 + p2963 + p2968 + p2973 + p2978 + p2983 + p2988 + p2993 + p2998 + p3003 + p3008 + p3013 + p3018 + p3023 + p3028 + p3033 + p3038 + p3043 + p3048 + p3053 + p3058 + p3063 + p3068 + p3073 + p3078 + p3083 + p3088 + p3093 + p3098 + p3103 + p3108 + p3113 + p3118 + p3123 + p3128 + p3133 + p3138 + p3143 + p3148 + p3153 + p3158 + p3163 + p3168 + p3173 + p3178 + p3183 + p3188 + p3193 + p3198 + p3203 + p3208 + p3213 + p3218 + p3223 + p3228 + p3233 + p3238 + p3243 + p3248 + p3253 + p3258 + p3263 + p3268 + p3273 + p3278 + p3283 + p3288 + p3293 + p3298 + p3303 + p3308 + p3313 + p3318 + p3323 + p3328 + p3333 + p3338 + p3343 + p3348 + p3353 + p3358 + p3363 + p3368 + p3373 + p3378 + p3383 + p3388 + p3393 + p3398 + p3403 + p3408 + p3413 + p3418 + p3423 + p3428 + p3433 + p3438 + p3443 + p3448 + p3453 + p3457 = 1
invariant :p965 + p969 + p973 + p977 + p981 + p985 + p989 + p993 + p997 + p1001 + p1005 + p1009 + p1013 + p1017 + p1024 + p1030 + p1031 + p1033 + p1034 + p1037 + p1043 + p1048 + p1050 = 1
invariant :p373 + p377 + p381 + p385 + p389 + p393 + p397 + p401 + p405 + p409 + p413 + p417 + p421 + p425 + p432 + p438 + p439 + p441 + p442 + p445 + p451 + p456 + p458 = 1
invariant :p817 + p821 + p825 + p829 + p833 + p837 + p841 + p845 + p849 + p853 + p857 + p861 + p865 + p869 + p876 + p882 + p883 + p885 + p886 + p889 + p895 + p900 + p902 = 1
invariant :p2149 + p2153 + p2157 + p2161 + p2165 + p2169 + p2173 + p2177 + p2181 + p2185 + p2189 + p2193 + p2197 + p2201 + p2208 + p2214 + p2215 + p2217 + p2218 + p2221 + p2227 + p2232 + p2234 = 1
invariant :p225 + p229 + p233 + p237 + p241 + p245 + p249 + p253 + p257 + p261 + p265 + p269 + p273 + p277 + p284 + p290 + p291 + p293 + p294 + p297 + p303 + p308 + p310 = 1
invariant :p1853 + p1857 + p1861 + p1865 + p1869 + p1873 + p1877 + p1881 + p1885 + p1889 + p1893 + p1897 + p1901 + p1905 + p1912 + p1918 + p1919 + p1921 + p1922 + p1925 + p1931 + p1936 + p1938 = 1
invariant :p669 + p673 + p677 + p681 + p685 + p689 + p693 + p697 + p701 + p705 + p709 + p713 + p717 + p721 + p728 + p734 + p735 + p737 + p738 + p741 + p747 + p752 + p754 = 1
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805241334/bin/its-ctl-linux64, --gc-threshold, 2000000, --quiet, -i, /home/mcc/execution/ReachabilityDeadlock.pnml.gal, -t, CGAL, -ctl, DEADLOCK], workingDir=/home/mcc/execution]

its-ctl command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805241334/bin/its-ctl-linux64 --gc-threshold 2000000 --quiet -i /home/mcc/execution/ReachabilityDeadlock.pnml.gal -t CGAL -ctl DEADLOCK
No direction supplied, using forward translation only.
built 1 ordering constraints for composite.
built 611 ordering constraints for composite.
built 600 ordering constraints for composite.
built 588 ordering constraints for composite.
built 572 ordering constraints for composite.
built 552 ordering constraints for composite.
built 528 ordering constraints for composite.
built 500 ordering constraints for composite.
built 468 ordering constraints for composite.
built 432 ordering constraints for composite.
built 392 ordering constraints for composite.
built 348 ordering constraints for composite.
built 300 ordering constraints for composite.
built 248 ordering constraints for composite.
built 192 ordering constraints for composite.
built 132 ordering constraints for composite.
built 611 ordering constraints for composite.
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
reachable,2.65142e+24,7.11959,226088,39,452,498115,8359,5395,1.10504e+06,1453,4177,0


Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
dead,1.47087e+23,9.5449,226088,4804,26197,498115,155303,16954,1.10504e+06,5322,1.9198e+06,6302

System contains 1.47087e+23 deadlocks (shown below if less than --print-limit option) !
FORMULA FlexibleBarrier-PT-16b-ReachabilityDeadlock-0 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
[ i1={[ u34={[ p3468=1 ]
} u33={[ p3308=1 ]
} ]
} i0={[ u31={[ p2239=1 ]
[ p2243=1 ]
[ p2247=1 ]
[ p2251=1 ]
[ p2255=1 ]
[ p2259=1 ]
[ p2263=1 ]
[ p2267=1 ]
[ p2271=1 ]
[ p2275=1 ]
} i0={[ u30={[ p2232=1 ]
} i0={[ u29={[ p2001=1 ]
[ p2005=1 ]
[ p2009=1 ]
[ p2013=1 ]
[ p2017=1 ]
[ p2021=1 ]
[ p2025=1 ]
[ p2084=1 ]
[ p2029=1 ]
[ p2033=1 ]
} i0={[ u28={[ p1853=1 ]
[ p1857=1 ]
[ p1861=1 ]
[ p1865=1 ]
[ p1869=1 ]
[ p1873=1 ]
[ p1877=1 ]
[ p1936=1 ]
[ p1881=1 ]
[ p1885=1 ]
} i0={[ u27={[ p1705=1 ]
[ p1709=1 ]
[ p1713=1 ]
[ p1717=1 ]
[ p1721=1 ]
[ p1725=1 ]
[ p1729=1 ]
[ p1788=1 ]
[ p1733=1 ]
[ p1737=1 ]
} i0={[ u26={[ p1557=1 ]
[ p1561=1 ]
[ p1565=1 ]
[ p1569=1 ]
[ p1573=1 ]
[ p1577=1 ]
[ p1581=1 ]
[ p1640=1 ]
[ p1585=1 ]
[ p1589=1 ]
} i0={[ u25={[ p1409=1 ]
[ p1413=1 ]
[ p1417=1 ]
[ p1421=1 ]
[ p1425=1 ]
[ p1429=1 ]
[ p1433=1 ]
[ p1492=1 ]
[ p1437=1 ]
[ p1441=1 ]
} i0={[ u24={[ p1261=1 ]
[ p1265=1 ]
[ p1269=1 ]
[ p1273=1 ]
[ p1277=1 ]
[ p1281=1 ]
[ p1285=1 ]
[ p1344=1 ]
[ p1289=1 ]
[ p1293=1 ]
} i0={[ u23={[ p1113=1 ]
[ p1117=1 ]
[ p1121=1 ]
[ p1125=1 ]
[ p1129=1 ]
[ p1133=1 ]
[ p1137=1 ]
[ p1196=1 ]
[ p1141=1 ]
[ p1145=1 ]
} i0={[ u22={[ p965=1 ]
[ p969=1 ]
[ p973=1 ]
[ p977=1 ]
[ p981=1 ]
[ p985=1 ]
[ p989=1 ]
[ p1048=1 ]
[ p993=1 ]
[ p997=1 ]
} i0={[ u21={[ p817=1 ]
[ p821=1 ]
[ p825=1 ]
[ p829=1 ]
[ p833=1 ]
[ p837=1 ]
[ p841=1 ]
[ p900=1 ]
[ p845=1 ]
[ p849=1 ]
} i0={[ u20={[ p669=1 ]
[ p673=1 ]
[ p677=1 ]
[ p681=1 ]
[ p685=1 ]
[ p689=1 ]
[ p693=1 ]
[ p752=1 ]
[ p697=1 ]
[ p701=1 ]
} i0={[ u19={[ p521=1 ]
[ p525=1 ]
[ p529=1 ]
[ p533=1 ]
[ p537=1 ]
[ p541=1 ]
[ p545=1 ]
[ p604=1 ]
[ p549=1 ]
[ p553=1 ]
} i0={[ u18={[ p373=1 ]
[ p377=1 ]
[ p381=1 ]
[ p385=1 ]
[ p389=1 ]
[ p393=1 ]
[ p397=1 ]
[ p456=1 ]
[ p401=1 ]
[ p405=1 ]
} i0={[ u17={[ p225=1 ]
[ p229=1 ]
[ p233=1 ]
[ p237=1 ]
[ p241=1 ]
[ p245=1 ]
[ p249=1 ]
[ p308=1 ]
[ p253=1 ]
[ p257=1 ]
} u16={[ p77=1 ]
[ p81=1 ]
[ p85=1 ]
[ p89=1 ]
[ p93=1 ]
[ p97=1 ]
[ p101=1 ]
[ p160=1 ]
[ p105=1 ]
[ p109=1 ]
} ]
} ]
} ]
} ]
} ]
} ]
} ]
} ]
} ]
} ]
} ]
} ]
} ]
} ]
} ]
} ]
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O3, model.c], workingDir=/home/mcc/execution]
WARNING : LTS min runner thread was asked to interrupt. Dying gracefully.

BK_STOP 1527386253327

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution ReachabilityDeadlock -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -louvain -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -consoleLog -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination ReachabilityDeadlock -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -louvain -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
May 27, 2018 1:57:17 AM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, ReachabilityDeadlock, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -louvain, -smt]
May 27, 2018 1:57:17 AM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
May 27, 2018 1:57:18 AM fr.lip6.move.gal.nupn.PTNetReader loadFromXML
INFO: Load time of PNML (sax parser for PT used): 174 ms
May 27, 2018 1:57:18 AM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 3472 places.
May 27, 2018 1:57:18 AM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 4001 transitions.
May 27, 2018 1:57:18 AM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Found NUPN structural information;
May 27, 2018 1:57:18 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.img.gal : 62 ms
May 27, 2018 1:57:18 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 419 ms
May 27, 2018 1:57:18 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.simple.gal : 16 ms
May 27, 2018 1:57:19 AM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 4001 transitions.
May 27, 2018 1:57:21 AM fr.lip6.move.gal.application.MccTranslator applyOrder
INFO: Applying decomposition
May 27, 2018 1:57:21 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 96 ms
May 27, 2018 1:57:21 AM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 1124 transitions.
May 27, 2018 1:57:21 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 94 ms
May 27, 2018 1:57:21 AM fr.lip6.move.gal.instantiate.CompositeBuilder decomposeWithOrder
INFO: Decomposing Gal with order
May 27, 2018 1:57:21 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 91 ms
May 27, 2018 1:57:21 AM fr.lip6.move.gal.instantiate.CompositeBuilder rewriteArraysToAllowPartition
INFO: Rewriting arrays to variables to allow decomposition.
May 27, 2018 1:57:21 AM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 18 place invariants in 158 ms
May 27, 2018 1:57:23 AM fr.lip6.move.gal.instantiate.Instantiator fuseIsomorphicEffects
INFO: Removed a total of 803 redundant transitions.
May 27, 2018 1:57:23 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/ReachabilityDeadlock.pnml.gal : 34 ms
May 27, 2018 1:57:24 AM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 595 variables to be positive in 2470 ms
May 27, 2018 1:57:24 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may disable matrix : 1124 transitions.
May 27, 2018 1:57:24 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of disable matrix completed :0/1124 took 1 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 27, 2018 1:57:24 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete disable matrix. took 98 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 27, 2018 1:57:24 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may enable matrix : 1124 transitions.
May 27, 2018 1:57:24 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete enable matrix. took 39 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 27, 2018 1:57:24 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeCoEnablingMatrix
INFO: Computing symmetric co enabling matrix : 1124 transitions.
Skipping mayMatrices nes/nds SMT solver raised an exception on push().
java.lang.RuntimeException: SMT solver raised an exception on push().
at fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver.computeCoEnablingMatrix(NecessaryEnablingsolver.java:464)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.printLabels(Gal2PinsTransformerNext.java:530)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.printDependencyMatrix(Gal2PinsTransformerNext.java:209)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.buildBodyFile(Gal2PinsTransformerNext.java:85)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.transform(Gal2PinsTransformerNext.java:830)
at fr.lip6.move.gal.application.LTSminRunner$1.run(LTSminRunner.java:71)
at java.lang.Thread.run(Thread.java:748)
May 27, 2018 1:57:33 AM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 11781ms conformant to PINS in folder :/home/mcc/execution

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="FlexibleBarrier-PT-16b"
export BK_EXAMINATION="ReachabilityDeadlock"
export BK_TOOL="itstoolsl"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

tar xzf /home/mcc/BenchKit/INPUTS/FlexibleBarrier-PT-16b.tgz
mv FlexibleBarrier-PT-16b execution
cd execution
pwd
ls -lh

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3637"
echo " Executing tool itstoolsl"
echo " Input is FlexibleBarrier-PT-16b, examination is ReachabilityDeadlock"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r093-blw7-152650005400195"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityDeadlock" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityDeadlock" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityDeadlock.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityDeadlock.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityDeadlock.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' ReachabilityDeadlock.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;