Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Waiting for the VM to be ready (probing ssh)
..................
/home/mcc/execution
total 115M
-rw-r--r-- 1 mcc users 11K May 15 18:54 CTLCardinality.txt
-rw-r--r-- 1 mcc users 36K May 15 18:54 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.1M May 15 18:54 CTLFireability.txt
-rw-r--r-- 1 mcc users 16M May 15 18:54 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K May 15 18:50 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.0K May 15 18:50 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 9.5K May 15 18:54 LTLCardinality.txt
-rw-r--r-- 1 mcc users 27K May 15 18:54 LTLCardinality.xml
-rw-r--r-- 1 mcc users 1.2M May 15 18:54 LTLFireability.txt
-rw-r--r-- 1 mcc users 3.4M May 15 18:54 LTLFireability.xml
-rw-r--r-- 1 mcc users 22K May 15 18:54 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 67K May 15 18:54 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 116 May 15 18:54 ReachabilityDeadlock.txt
-rw-r--r-- 1 mcc users 354 May 15 18:54 ReachabilityDeadlock.xml
-rw-r--r-- 1 mcc users 5.3M May 15 18:54 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 16M May 15 18:54 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 3.4K May 15 18:54 UpperBounds.txt
-rw-r--r-- 1 mcc users 7.2K May 15 18:54 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 May 15 18:50 equiv_col
-rw-r--r-- 1 mcc users 3 May 15 18:50 instance
-rw-r--r-- 1 mcc users 6 May 15 18:50 iscolored
-rw-r--r-- 1 mcc users 70M May 15 18:50 model.pnml
=====================================================================
Generated by BenchKit 2-3637
Executing tool irma4mcc-structural
Input is GlobalResAllocation-PT-05, examination is ReachabilityDeadlock
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r091-blw7-152650003800419
=====================================================================

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME GlobalResAllocation-PT-05-ReachabilityDeadlock-0

=== Now, execution of the tool begins

BK_START 1527222279441


BK_STOP 1527222308148

--------------------
content from stderr:

Prefix is 75f5f979.
Reading known information in /usr/share/mcc4mcc/75f5f979-known.json.
Reading learned information in /usr/share/mcc4mcc/75f5f979-learned.json.
Reading value translations in /usr/share/mcc4mcc/75f5f979-values.json.
Using directory /home/mcc/execution for input, as it contains a model.pnml file.
Using GlobalResAllocation-PT-05 as instance name.
Using GlobalResAllocation as model name.
Using algorithm or tool decision-tree.
Model characteristics are: {'Examination': 'ReachabilityDeadlock', 'Place/Transition': True, 'Colored': True, 'Relative-Time': 1, 'Relative-Memory': 1, 'Ordinary': False, 'Simple Free Choice': False, 'Extended Free Choice': False, 'State Machine': False, 'Marked Graph': False, 'Connected': True, 'Strongly Connected': True, 'Source Place': False, 'Sink Place': False, 'Source Transition': False, 'Sink Transition': False, 'Loop Free': True, 'Conservative': False, 'Sub-Conservative': False, 'Nested Units': False, 'Safe': False, 'Deadlock': False, 'Reversible': None, 'Quasi Live': True, 'Live': True}.
Known tools are: [{'Time': 1300758, 'Memory': 11976.61, 'Tool': 'itstools'}, {'Time': 1398503, 'Memory': 11873.57, 'Tool': 'itstools'}, {'Time': 1980591, 'Memory': 8469.12, 'Tool': 'marcie'}, {'Time': 2016722, 'Memory': 8469.46, 'Tool': 'marcie'}].
Learned tools are: [{'Tool': 'gspn'}].
ReachabilityDeadlock itstools GlobalResAllocation-PT-05...
May 25, 2018 4:24:45 AM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-z3path, /usr/bin/z3, -yices2path, /usr/bin/yices, -ltsminpath, /usr/bin, -smt, -its, -pnfolder, /mcc-data, -examination, ReachabilityDeadlock]
May 25, 2018 4:24:45 AM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /mcc-data/model.pnml
May 25, 2018 4:24:47 AM fr.lip6.move.gal.nupn.PTNetReader loadFromXML
INFO: Load time of PNML (sax parser for PT used): 1893 ms
May 25, 2018 4:24:47 AM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 75 places.
May 25, 2018 4:24:48 AM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 56105 transitions.
May 25, 2018 4:24:57 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 9541 ms
Flatten gal took : 9544 ms
May 25, 2018 4:24:58 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /mcc-data/model.pnml.simple.gal : 617 ms
May 25, 2018 4:25:04 AM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 56105 transitions.
Reduce isomorphic transitions removed 50775 transitions.
Reduce isomorphic (modulo) transitions removed 50775 transitions.
Iterating post reduction 0 with 50875 rules applied. Total rules applied 50875 place count 75 transition count 5280
Applied a total of 50875 rules in 436 ms. Remains 75 /75 variables (removed 0) and now considering 5280/56105 (removed 50825) transitions.
// Phase 1: matrix 5280 rows 75 cols
FORMULA GlobalResAllocation-PT-05-ReachabilityDeadlock-0 FALSE TECHNIQUES TOPOLOGICAL SAT_SMT STRUCTURAL_REDUCTION

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="GlobalResAllocation-PT-05"
export BK_EXAMINATION="ReachabilityDeadlock"
export BK_TOOL="irma4mcc-structural"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

tar xzf /home/mcc/BenchKit/INPUTS/GlobalResAllocation-PT-05.tgz
mv GlobalResAllocation-PT-05 execution
cd execution
pwd
ls -lh

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3637"
echo " Executing tool irma4mcc-structural"
echo " Input is GlobalResAllocation-PT-05, examination is ReachabilityDeadlock"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r091-blw7-152650003800419"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityDeadlock" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityDeadlock" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityDeadlock.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityDeadlock.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityDeadlock.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' ReachabilityDeadlock.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;