fond
Model Checking Contest 2018
8th edition, Bratislava, Slovakia, June 26, 2018
Execution of r069-smll-152649741900132
Last Updated
June 26, 2018

About the Execution of ITS-Tools.L for DLCround-PT-12a

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
15752.310 5675.00 10803.00 322.50 F normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Waiting for the VM to be ready (probing ssh)
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................................................................................................................................................................................................................................................................................................................................................................................................................................................
/home/mcc/execution
total 1.1M
-rw-r--r-- 1 mcc users 4.0K May 15 18:54 CTLCardinality.txt
-rw-r--r-- 1 mcc users 23K May 15 18:54 CTLCardinality.xml
-rw-r--r-- 1 mcc users 2.3K May 15 18:54 CTLFireability.txt
-rw-r--r-- 1 mcc users 15K May 15 18:54 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K May 15 18:50 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 5.9K May 15 18:50 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 2.5K May 15 18:54 LTLCardinality.txt
-rw-r--r-- 1 mcc users 12K May 15 18:54 LTLCardinality.xml
-rw-r--r-- 1 mcc users 1.9K May 15 18:54 LTLFireability.txt
-rw-r--r-- 1 mcc users 9.5K May 15 18:54 LTLFireability.xml
-rw-r--r-- 1 mcc users 3.8K May 15 18:54 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 21K May 15 18:54 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 106 May 15 18:54 ReachabilityDeadlock.txt
-rw-r--r-- 1 mcc users 344 May 15 18:54 ReachabilityDeadlock.xml
-rw-r--r-- 1 mcc users 2.6K May 15 18:54 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 15K May 15 18:54 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K May 15 18:54 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.6K May 15 18:54 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 15 18:50 equiv_col
-rw-r--r-- 1 mcc users 4 May 15 18:50 instance
-rw-r--r-- 1 mcc users 6 May 15 18:50 iscolored
-rw-r--r-- 1 mcc users 871K May 15 18:50 model.pnml
=====================================================================
Generated by BenchKit 2-3637
Executing tool itstoolsl
Input is DLCround-PT-12a, examination is ReachabilityDeadlock
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r069-smll-152649741900132
=====================================================================


--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME DLCround-PT-12a-ReachabilityDeadlock-0

=== Now, execution of the tool begins

BK_START 1527285283600

Flatten gal took : 748 ms
Constant places removed 1 places and 1 transitions.
Reduce isomorphic transitions removed 315 transitions.
Performed 4 Post agglomeration using F-continuation condition.
Iterating post reduction 0 with 320 rules applied. Total rules applied 320 place count 418 transition count 3087
Constant places removed 264 places and 0 transitions.
Reduce isomorphic transitions removed 2749 transitions.
Performed 30 Post agglomeration using F-continuation condition.
Iterating post reduction 1 with 3043 rules applied. Total rules applied 3363 place count 154 transition count 308
Constant places removed 30 places and 0 transitions.
Reduce isomorphic transitions removed 17 transitions.
Iterating post reduction 2 with 47 rules applied. Total rules applied 3410 place count 124 transition count 291
Performed 17 Post agglomeration using F-continuation condition.
Constant places removed 17 places and 0 transitions.
Reduce isomorphic transitions removed 13 transitions.
Iterating post reduction 3 with 30 rules applied. Total rules applied 3440 place count 107 transition count 261
Performed 13 Post agglomeration using F-continuation condition.
Constant places removed 13 places and 0 transitions.
Reduce isomorphic transitions removed 13 transitions.
Iterating post reduction 4 with 26 rules applied. Total rules applied 3466 place count 94 transition count 261
Applied a total of 3466 rules in 69 ms. Remains 94 /419 variables (removed 325) and now considering 261/3407 (removed 3146) transitions.
Normalized transition count is 168
// Phase 1: matrix 168 rows 94 cols
FORMULA DLCround-PT-12a-ReachabilityDeadlock-0 FALSE TECHNIQUES TOPOLOGICAL SAT_SMT STRUCTURAL_REDUCTION

BK_STOP 1527285289275

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution ReachabilityDeadlock -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -louvain -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -consoleLog -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination ReachabilityDeadlock -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -louvain -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
May 25, 2018 9:54:45 PM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, ReachabilityDeadlock, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -louvain, -smt]
May 25, 2018 9:54:45 PM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
May 25, 2018 9:54:46 PM fr.lip6.move.gal.nupn.PTNetReader loadFromXML
INFO: Load time of PNML (sax parser for PT used): 297 ms
May 25, 2018 9:54:46 PM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 419 places.
May 25, 2018 9:54:46 PM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 3407 transitions.
May 25, 2018 9:54:46 PM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Found NUPN structural information;
May 25, 2018 9:54:46 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.img.gal : 77 ms
May 25, 2018 9:54:47 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 740 ms
May 25, 2018 9:54:47 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.simple.gal : 20 ms
May 25, 2018 9:54:47 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 3407 transitions.

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="DLCround-PT-12a"
export BK_EXAMINATION="ReachabilityDeadlock"
export BK_TOOL="itstoolsl"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

tar xzf /home/mcc/BenchKit/INPUTS/DLCround-PT-12a.tgz
mv DLCround-PT-12a execution
cd execution
pwd
ls -lh

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3637"
echo " Executing tool itstoolsl"
echo " Input is DLCround-PT-12a, examination is ReachabilityDeadlock"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r069-smll-152649741900132"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityDeadlock" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityDeadlock" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityDeadlock.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityDeadlock.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityDeadlock.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' ReachabilityDeadlock.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;