fond
Model Checking Contest 2018
8th edition, Bratislava, Slovakia, June 26, 2018
Execution of r068-smll-152649741200167
Last Updated
June 26, 2018

About the Execution of ITS-Tools for DLCshifumi-PT-2b

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
15752.720 3600000.00 4396116.00 11138.70 [undef] Time out reached

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Waiting for the VM to be ready (probing ssh)
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/home/mcc/execution
total 896K
-rw-r--r-- 1 mcc users 3.4K May 15 18:54 CTLCardinality.txt
-rw-r--r-- 1 mcc users 19K May 15 18:54 CTLCardinality.xml
-rw-r--r-- 1 mcc users 2.6K May 15 18:54 CTLFireability.txt
-rw-r--r-- 1 mcc users 18K May 15 18:54 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K May 15 18:50 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.0K May 15 18:50 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 2.3K May 15 18:54 LTLCardinality.txt
-rw-r--r-- 1 mcc users 9.7K May 15 18:54 LTLCardinality.xml
-rw-r--r-- 1 mcc users 1.9K May 15 18:54 LTLFireability.txt
-rw-r--r-- 1 mcc users 9.8K May 15 18:54 LTLFireability.xml
-rw-r--r-- 1 mcc users 3.0K May 15 18:54 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 14K May 15 18:54 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 107 May 15 18:54 ReachabilityDeadlock.txt
-rw-r--r-- 1 mcc users 345 May 15 18:54 ReachabilityDeadlock.xml
-rw-r--r-- 1 mcc users 2.9K May 15 18:54 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 18K May 15 18:54 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K May 15 18:54 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.7K May 15 18:54 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 15 18:50 equiv_col
-rw-r--r-- 1 mcc users 3 May 15 18:50 instance
-rw-r--r-- 1 mcc users 6 May 15 18:50 iscolored
-rw-r--r-- 1 mcc users 729K May 15 18:50 model.pnml
=====================================================================
Generated by BenchKit 2-3637
Executing tool itstools
Input is DLCshifumi-PT-2b, examination is ReachabilityDeadlock
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r068-smll-152649741200167
=====================================================================


--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME DLCshifumi-PT-2b-ReachabilityDeadlock-0

=== Now, execution of the tool begins

BK_START 1526725258586

Flatten gal took : 657 ms
Constant places removed 1 places and 1 transitions.
Performed 1667 Post agglomeration using F-continuation condition.
Iterating post reduction 0 with 1668 rules applied. Total rules applied 1668 place count 2482 transition count 1515
Constant places removed 1669 places and 2 transitions.
Reduce isomorphic transitions removed 51 transitions.
Performed 49 Post agglomeration using F-continuation condition.
Iterating post reduction 1 with 1769 rules applied. Total rules applied 3437 place count 813 transition count 1413
Constant places removed 49 places and 0 transitions.
Reduce isomorphic transitions removed 15 transitions.
Performed 15 Post agglomeration using F-continuation condition.
Iterating post reduction 2 with 79 rules applied. Total rules applied 3516 place count 764 transition count 1383
Constant places removed 15 places and 0 transitions.
Iterating post reduction 3 with 15 rules applied. Total rules applied 3531 place count 749 transition count 1383
Performed 15 Pre agglomeration using Quasi-Persistent + HF-interchangeable + Divergent Free condition.
Pre-agglomeration after 4 with 15 Pre rules applied. Total rules applied 3531 place count 749 transition count 1368
Constant places removed 15 places and 0 transitions.
Iterating post reduction 4 with 15 rules applied. Total rules applied 3546 place count 734 transition count 1368
Symmetric choice reduction at 5 with 136 rule applications. Total rules 3682 place count 734 transition count 1368
Constant places removed 136 places and 136 transitions.
Iterating post reduction 5 with 136 rules applied. Total rules applied 3818 place count 598 transition count 1232
Performed 6 Pre agglomeration using Quasi-Persistent + HF-interchangeable + Divergent Free condition.
Pre-agglomeration after 6 with 6 Pre rules applied. Total rules applied 3818 place count 598 transition count 1226
Constant places removed 6 places and 0 transitions.
Iterating post reduction 6 with 6 rules applied. Total rules applied 3824 place count 592 transition count 1226
Symmetric choice reduction at 7 with 17 rule applications. Total rules 3841 place count 592 transition count 1226
Constant places removed 17 places and 62 transitions.
Reduce isomorphic transitions removed 15 transitions.
Iterating post reduction 7 with 32 rules applied. Total rules applied 3873 place count 575 transition count 1149
Performed 186 Post agglomeration using F-continuation condition.
Constant places removed 186 places and 0 transitions.
Iterating post reduction 8 with 186 rules applied. Total rules applied 4059 place count 389 transition count 961
Symmetric choice reduction at 9 with 8 rule applications. Total rules 4067 place count 389 transition count 961
Constant places removed 8 places and 128 transitions.
Iterating post reduction 9 with 8 rules applied. Total rules applied 4075 place count 381 transition count 833
Performed 64 Post agglomeration using F-continuation condition.
Constant places removed 64 places and 0 transitions.
Reduce isomorphic transitions removed 17 transitions.
Iterating post reduction 10 with 81 rules applied. Total rules applied 4156 place count 317 transition count 893
Applied a total of 4156 rules in 1291 ms. Remains 317 /2483 variables (removed 2166) and now considering 893/3183 (removed 2290) transitions.
Normalized transition count is 809
// Phase 1: matrix 809 rows 317 cols
Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805151631/bin/its-ctl-linux64, --gc-threshold, 2000000, --quiet, -i, /home/mcc/execution/ReachabilityDeadlock.pnml.gal, -t, CGAL, -ctl, DEADLOCK], workingDir=/home/mcc/execution]

its-ctl command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805151631/bin/its-ctl-linux64 --gc-threshold 2000000 --quiet -i /home/mcc/execution/ReachabilityDeadlock.pnml.gal -t CGAL -ctl DEADLOCK
No direction supplied, using forward translation only.
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
Normalized transition count is 809
// Phase 1: matrix 809 rows 317 cols
invariant :p1966 + p1969 + p1970 = 1
invariant :p2476 + p2479 + p2480 = 1
invariant :p749 + p762 + p768 + p777 + p793 + p802 + p831 = 1
invariant :p2326 + p2329 + p2330 = 1
invariant :p1896 + p1899 + p1900 = 1
invariant :p2366 + p2369 + p2370 = 1
invariant :p2336 + p2339 + p2340 = 1
invariant :p2406 + p2409 + p2410 = 1
invariant :p852 + p865 + p871 + p880 + p896 + p905 + p934 = 1
invariant :p131 + p144 + p150 + p159 + p175 + p184 + p213 = 1
invariant :p2136 + p2139 + p2140 = 1
invariant :p2106 + p2109 + p2110 = 1
invariant :p2056 + p2059 + p2060 = 1
invariant :p2076 + p2079 + p2080 = 1
invariant :p2346 + p2349 + p2350 = 1
invariant :p2416 + p2419 + p2420 = 1
invariant :p2236 + p2239 + p2240 = 1
invariant :p1876 + p1879 + p1880 = 1
invariant :p2266 + p2269 + p2270 = 1
invariant :p1916 + p1919 + p1920 = 1
invariant :p2386 + p2389 + p2390 = 1
invariant :p1956 + p1959 + p1960 = 1
invariant :p2166 + p2169 + p2170 = 1
invariant :p1565 + p1572 + p1584 + p1586 + p1590 + p1592 + p1602 + p1610 + p1612 + p1627 + p1629 + p1654 + p1670 = 1
invariant :p2256 + p2259 + p2260 = 1
invariant :p2466 + p2469 + p2470 = 1
invariant :p2456 + p2459 + p2460 = 1
invariant :p2006 + p2009 + p2010 = 1
invariant :p2206 + p2209 + p2210 = 1
invariant :p2396 + p2399 + p2400 = 1
invariant :p1886 + p1889 + p1890 = 1
invariant :p1946 + p1949 + p1950 = 1
invariant :p2296 + p2299 + p2300 = 1
invariant :p1470 + p1483 + p1489 + p1498 + p1514 + p1523 + p1552 = 1
invariant :p1926 + p1929 + p1930 = 1
invariant :p2226 + p2229 + p2230 = 1
invariant :p2186 + p2189 + p2190 = 1
invariant :p2086 + p2089 + p2090 = 1
invariant :p2356 + p2359 + p2360 = 1
invariant :p2126 + p2129 + p2130 = 1
invariant :p1367 + p1380 + p1386 + p1395 + p1411 + p1420 + p1449 = 1
invariant :p2096 + p2099 + p2100 = 1
invariant :p2016 + p2019 + p2020 = 1
invariant :p955 + p968 + p974 + p983 + p999 + p1008 + p1037 = 1
invariant :p2146 + p2149 + p2150 = 1
invariant :p2196 + p2199 + p2200 = 1
invariant :p1161 + p1174 + p1180 + p1189 + p1205 + p1214 + p1243 = 1
invariant :p1906 + p1909 + p1910 = 1
invariant :p2306 + p2309 + p2310 = 1
invariant :p2156 + p2159 + p2160 = 1
invariant :p2446 + p2449 + p2450 = 1
invariant :p1996 + p1999 + p2000 = 1
invariant :p1986 + p1989 + p1990 = 1
invariant :p1264 + p1277 + p1283 + p1292 + p1308 + p1317 + p1346 = 1
invariant :p2246 + p2249 + p2250 = 1
invariant :p2376 + p2379 + p2380 = 1
invariant :p2426 + p2429 + p2430 = 1
invariant :p1685 + p1692 + p1704 + p1706 + p1710 + p1712 + p1722 + p1730 + p1732 + p1747 + p1749 + p1774 + p1790 = 1
invariant :p2436 + p2439 + p2440 = 1
invariant :p2176 + p2179 + p2180 = 1
invariant :p2316 + p2319 + p2320 = 1
invariant :p1866 + p1869 + p1870 = 1
invariant :p440 + p453 + p459 + p468 + p484 + p493 + p522 = 1
invariant :p2276 + p2279 + p2280 = 1
invariant :p337 + p350 + p356 + p365 + p381 + p390 + p419 = 1
invariant :p2046 + p2049 + p2050 = 1
invariant :p1058 + p1071 + p1077 + p1086 + p1102 + p1111 + p1140 = 1
invariant :p2036 + p2039 + p2040 = 1
invariant :p2216 + p2219 + p2220 = 1
invariant :p28 + p41 + p47 + p56 + p72 + p81 + p110 = 1
invariant :p543 + p556 + p562 + p571 + p587 + p596 + p625 = 1
invariant :p2286 + p2289 + p2290 = 1
invariant :p1936 + p1939 + p1940 = 1
invariant :p2026 + p2029 + p2030 = 1
invariant :p2066 + p2069 + p2070 = 1
invariant :p646 + p659 + p665 + p674 + p690 + p699 + p728 = 1
invariant :p2116 + p2119 + p2120 = 1
invariant :p234 + p247 + p253 + p262 + p278 + p287 + p316 = 1
invariant :p1976 + p1979 + p1980 = 1
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O3, model.c], workingDir=/home/mcc/execution]
Compilation finished in 14113 ms.
Running link step : CommandLine [args=[gcc, -shared, -o, gal.so, model.o], workingDir=/home/mcc/execution]
Link finished in 72 ms.
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -d], workingDir=/home/mcc/execution]
sparsehash FATAL ERROR: failed to allocate 30 groups

BK_TIME_CONFINEMENT_REACHED

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution ReachabilityDeadlock -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -consoleLog -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination ReachabilityDeadlock -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
May 19, 2018 10:21:00 AM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, ReachabilityDeadlock, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -smt]
May 19, 2018 10:21:00 AM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
May 19, 2018 10:21:01 AM fr.lip6.move.gal.nupn.PTNetReader loadFromXML
INFO: Load time of PNML (sax parser for PT used): 301 ms
May 19, 2018 10:21:01 AM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 2483 places.
May 19, 2018 10:21:01 AM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 3183 transitions.
May 19, 2018 10:21:01 AM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Found NUPN structural information;
May 19, 2018 10:21:01 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.img.gal : 65 ms
May 19, 2018 10:21:02 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 650 ms
May 19, 2018 10:21:02 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.simple.gal : 23 ms
May 19, 2018 10:21:02 AM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 3183 transitions.
May 19, 2018 10:21:04 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/ReachabilityDeadlock.pnml.gal : 8 ms
May 19, 2018 10:21:04 AM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 893 transitions.
May 19, 2018 10:21:05 AM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 79 place invariants in 138 ms
May 19, 2018 10:21:06 AM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 317 variables to be positive in 1017 ms
May 19, 2018 10:21:06 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may disable matrix : 893 transitions.
May 19, 2018 10:21:06 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of disable matrix completed :0/893 took 0 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 19, 2018 10:21:06 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete disable matrix. took 121 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 19, 2018 10:21:06 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may enable matrix : 893 transitions.
May 19, 2018 10:21:06 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete enable matrix. took 72 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 19, 2018 10:21:06 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeCoEnablingMatrix
INFO: Computing symmetric co enabling matrix : 893 transitions.
May 19, 2018 10:21:09 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(126/893) took 3120 ms. Total solver calls (SAT/UNSAT): 1855(127/1728)
May 19, 2018 10:21:12 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(188/893) took 6188 ms. Total solver calls (SAT/UNSAT): 5767(450/5317)
May 19, 2018 10:21:15 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(228/893) took 9263 ms. Total solver calls (SAT/UNSAT): 10669(782/9887)
May 19, 2018 10:21:18 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(272/893) took 12289 ms. Total solver calls (SAT/UNSAT): 14861(1156/13705)
May 19, 2018 10:21:21 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(339/893) took 15315 ms. Total solver calls (SAT/UNSAT): 19208(1444/17764)
May 19, 2018 10:21:24 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(389/893) took 18340 ms. Total solver calls (SAT/UNSAT): 23657(1822/21835)
May 19, 2018 10:21:27 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(444/893) took 21392 ms. Total solver calls (SAT/UNSAT): 28313(2201/26112)
May 19, 2018 10:21:31 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(533/893) took 24403 ms. Total solver calls (SAT/UNSAT): 32389(2399/29990)
May 19, 2018 10:21:34 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(712/893) took 27411 ms. Total solver calls (SAT/UNSAT): 34310(2702/31608)
May 19, 2018 10:21:37 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(843/893) took 30440 ms. Total solver calls (SAT/UNSAT): 36042(3322/32720)
May 19, 2018 10:21:38 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Finished co-enabling matrix. took 32174 ms. Total solver calls (SAT/UNSAT): 36800(3876/32924)
May 19, 2018 10:21:38 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeDoNotAccord
INFO: Computing Do-Not-Accords matrix : 893 transitions.
May 19, 2018 10:21:38 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed DNA matrix. took 127 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 19, 2018 10:21:39 AM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 34304ms conformant to PINS in folder :/home/mcc/execution
ITS-tools command line returned an error code 1

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="DLCshifumi-PT-2b"
export BK_EXAMINATION="ReachabilityDeadlock"
export BK_TOOL="itstools"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

tar xzf /home/mcc/BenchKit/INPUTS/DLCshifumi-PT-2b.tgz
mv DLCshifumi-PT-2b execution
cd execution
pwd
ls -lh

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3637"
echo " Executing tool itstools"
echo " Input is DLCshifumi-PT-2b, examination is ReachabilityDeadlock"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r068-smll-152649741200167"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityDeadlock" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityDeadlock" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityDeadlock.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityDeadlock.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityDeadlock.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' ReachabilityDeadlock.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;