About the Execution of ITS-Tools for DLCround-PT-05b
| Execution Summary | |||||
| Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
| 15751.490 | 3600000.00 | 4415877.00 | 7345.80 | [undef] | Time out reached |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Waiting for the VM to be ready (probing ssh)
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/home/mcc/execution
total 840K
-rw-r--r-- 1 mcc users 4.0K May 15 18:54 CTLCardinality.txt
-rw-r--r-- 1 mcc users 24K May 15 18:54 CTLCardinality.xml
-rw-r--r-- 1 mcc users 2.7K May 15 18:54 CTLFireability.txt
-rw-r--r-- 1 mcc users 19K May 15 18:54 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K May 15 18:50 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 5.9K May 15 18:50 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 2.3K May 15 18:54 LTLCardinality.txt
-rw-r--r-- 1 mcc users 9.6K May 15 18:54 LTLCardinality.xml
-rw-r--r-- 1 mcc users 1.8K May 15 18:54 LTLFireability.txt
-rw-r--r-- 1 mcc users 8.2K May 15 18:54 LTLFireability.xml
-rw-r--r-- 1 mcc users 3.3K May 15 18:54 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 16K May 15 18:54 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 106 May 15 18:54 ReachabilityDeadlock.txt
-rw-r--r-- 1 mcc users 344 May 15 18:54 ReachabilityDeadlock.xml
-rw-r--r-- 1 mcc users 2.5K May 15 18:54 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 14K May 15 18:54 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K May 15 18:54 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.6K May 15 18:54 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 15 18:50 equiv_col
-rw-r--r-- 1 mcc users 4 May 15 18:50 instance
-rw-r--r-- 1 mcc users 6 May 15 18:50 iscolored
-rw-r--r-- 1 mcc users 674K May 15 18:50 model.pnml
=====================================================================
Generated by BenchKit 2-3637
Executing tool itstools
Input is DLCround-PT-05b, examination is ReachabilityDeadlock
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r068-smll-152649741000041
=====================================================================
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME DLCround-PT-05b-ReachabilityDeadlock-0
=== Now, execution of the tool begins
BK_START 1526656204333
Flatten gal took : 608 ms
Constant places removed 1 places and 1 transitions.
Performed 1204 Post agglomeration using F-continuation condition.
Iterating post reduction 0 with 1205 rules applied. Total rules applied 1205 place count 1998 transition count 1682
Constant places removed 1206 places and 2 transitions.
Reduce isomorphic transitions removed 30 transitions.
Performed 24 Post agglomeration using F-continuation condition.
Iterating post reduction 1 with 1260 rules applied. Total rules applied 2465 place count 792 transition count 1626
Constant places removed 24 places and 0 transitions.
Reduce isomorphic transitions removed 4 transitions.
Performed 4 Post agglomeration using F-continuation condition.
Iterating post reduction 2 with 32 rules applied. Total rules applied 2497 place count 768 transition count 1618
Constant places removed 4 places and 0 transitions.
Iterating post reduction 3 with 4 rules applied. Total rules applied 2501 place count 764 transition count 1618
Performed 4 Pre agglomeration using Quasi-Persistent + HF-interchangeable + Divergent Free condition.
Pre-agglomeration after 4 with 4 Pre rules applied. Total rules applied 2501 place count 764 transition count 1614
Constant places removed 4 places and 0 transitions.
Iterating post reduction 4 with 4 rules applied. Total rules applied 2505 place count 760 transition count 1614
Symmetric choice reduction at 5 with 136 rule applications. Total rules 2641 place count 760 transition count 1614
Constant places removed 136 places and 136 transitions.
Iterating post reduction 5 with 136 rules applied. Total rules applied 2777 place count 624 transition count 1478
Performed 18 Pre agglomeration using Quasi-Persistent + HF-interchangeable + Divergent Free condition.
Pre-agglomeration after 6 with 18 Pre rules applied. Total rules applied 2777 place count 624 transition count 1460
Constant places removed 18 places and 0 transitions.
Iterating post reduction 6 with 18 rules applied. Total rules applied 2795 place count 606 transition count 1460
Symmetric choice reduction at 7 with 10 rule applications. Total rules 2805 place count 606 transition count 1460
Constant places removed 10 places and 78 transitions.
Reduce isomorphic transitions removed 4 transitions.
Iterating post reduction 7 with 14 rules applied. Total rules applied 2819 place count 596 transition count 1378
Performed 204 Post agglomeration using F-continuation condition.
Constant places removed 204 places and 0 transitions.
Iterating post reduction 8 with 204 rules applied. Total rules applied 3023 place count 392 transition count 1168
Symmetric choice reduction at 9 with 24 rule applications. Total rules 3047 place count 392 transition count 1168
Constant places removed 24 places and 216 transitions.
Iterating post reduction 9 with 24 rules applied. Total rules applied 3071 place count 368 transition count 952
Performed 28 Post agglomeration using F-continuation condition.
Constant places removed 28 places and 0 transitions.
Reduce isomorphic transitions removed 10 transitions.
Iterating post reduction 10 with 38 rules applied. Total rules applied 3109 place count 340 transition count 1088
Applied a total of 3109 rules in 1056 ms. Remains 340 /1999 variables (removed 1659) and now considering 1088/2887 (removed 1799) transitions.
Normalized transition count is 1007
// Phase 1: matrix 1007 rows 340 cols
Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805151631/bin/its-ctl-linux64, --gc-threshold, 2000000, --quiet, -i, /home/mcc/execution/ReachabilityDeadlock.pnml.gal, -t, CGAL, -ctl, DEADLOCK], workingDir=/home/mcc/execution]
its-ctl command run as :
/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805151631/bin/its-ctl-linux64 --gc-threshold 2000000 --quiet -i /home/mcc/execution/ReachabilityDeadlock.pnml.gal -t CGAL -ctl DEADLOCK
No direction supplied, using forward translation only.
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
Normalized transition count is 1007
// Phase 1: matrix 1007 rows 340 cols
invariant :p1382 + p1385 + p1386 = 1
invariant :p1682 + p1685 + p1686 = 1
invariant :p1512 + p1515 + p1516 = 1
invariant :p1942 + p1945 + p1946 = 1
invariant :p1312 + p1315 + p1316 = 1
invariant :p1892 + p1895 + p1896 = 1
invariant :p1232 + p1235 + p1236 = 1
invariant :p1952 + p1955 + p1956 = 1
invariant :p1262 + p1265 + p1266 = 1
invariant :p1582 + p1585 + p1586 = 1
invariant :p665 + p672 + p684 + p686 + p690 + p692 + p702 + p710 + p712 + p727 + p729 + p754 + p770 = 1
invariant :p1772 + p1775 + p1776 = 1
invariant :p1542 + p1545 + p1546 = 1
invariant :p1832 + p1835 + p1836 = 1
invariant :p1322 + p1325 + p1326 = 1
invariant :p1792 + p1795 + p1796 = 1
invariant :p1442 + p1445 + p1446 = 1
invariant :p1402 + p1405 + p1406 = 1
invariant :p227 + p240 + p246 + p255 + p271 + p280 + p309 = 1
invariant :p1722 + p1725 + p1726 = 1
invariant :p1522 + p1525 + p1526 = 1
invariant :p1532 + p1535 + p1536 = 1
invariant :p1242 + p1245 + p1246 = 1
invariant :p1712 + p1715 + p1716 = 1
invariant :p1882 + p1885 + p1886 = 1
invariant :p1922 + p1925 + p1926 = 1
invariant :p1842 + p1845 + p1846 = 1
invariant :p1302 + p1305 + p1306 = 1
invariant :p1672 + p1675 + p1676 = 1
invariant :p21 + p34 + p40 + p49 + p65 + p74 + p103 = 1
invariant :p124 + p137 + p143 + p152 + p168 + p177 + p206 = 1
invariant :p1642 + p1645 + p1646 = 1
invariant :p785 + p792 + p804 + p806 + p810 + p812 + p822 + p830 + p832 + p847 + p849 + p874 + p890 = 1
invariant :p1222 + p1225 + p1226 = 1
invariant :p1602 + p1605 + p1606 = 1
invariant :p1332 + p1335 + p1336 = 1
invariant :p1272 + p1275 + p1276 = 1
invariant :p1762 + p1765 + p1766 = 1
invariant :p1282 + p1285 + p1286 = 1
invariant :p1342 + p1345 + p1346 = 1
invariant :p1872 + p1875 + p1876 = 1
invariant :p1962 + p1965 + p1966 = 1
invariant :p1372 + p1375 + p1376 = 1
invariant :p1862 + p1865 + p1866 = 1
invariant :p1972 + p1975 + p1976 = 1
invariant :p1622 + p1625 + p1626 = 1
invariant :p1912 + p1915 + p1916 = 1
invariant :p1812 + p1815 + p1816 = 1
invariant :p1982 + p1985 + p1986 = 1
invariant :p1752 + p1755 + p1756 = 1
invariant :p1902 + p1905 + p1906 = 1
invariant :p1782 + p1785 + p1786 = 1
invariant :p1702 + p1705 + p1706 = 1
invariant :p1392 + p1395 + p1396 = 1
invariant :p1432 + p1435 + p1436 = 1
invariant :p1692 + p1695 + p1696 = 1
invariant :p1472 + p1475 + p1476 = 1
invariant :p1802 + p1805 + p1806 = 1
invariant :p1742 + p1745 + p1746 = 1
invariant :p1462 + p1465 + p1466 = 1
invariant :p1412 + p1415 + p1416 = 1
invariant :p1852 + p1855 + p1856 = 1
invariant :p1652 + p1655 + p1656 = 1
invariant :p1362 + p1365 + p1366 = 1
invariant :p1662 + p1665 + p1666 = 1
invariant :p1252 + p1255 + p1256 = 1
invariant :p1025 + p1032 + p1044 + p1046 + p1050 + p1052 + p1062 + p1070 + p1072 + p1087 + p1089 + p1114 + p1130 = 1
invariant :p1572 + p1575 + p1576 = 1
invariant :p1592 + p1595 + p1596 = 1
invariant :p1932 + p1935 + p1936 = 1
invariant :p330 + p343 + p349 + p358 + p374 + p383 + p412 = 1
invariant :p1482 + p1485 + p1486 = 1
invariant :p1292 + p1295 + p1296 = 1
invariant :p1492 + p1495 + p1496 = 1
invariant :p905 + p912 + p924 + p926 + p930 + p932 + p942 + p950 + p952 + p967 + p969 + p994 + p1010 = 1
invariant :p1632 + p1635 + p1636 = 1
invariant :p545 + p552 + p564 + p566 + p570 + p572 + p582 + p590 + p592 + p607 + p609 + p634 + p650 = 1
invariant :p1502 + p1505 + p1506 = 1
invariant :p1992 + p1995 + p1996 = 1
invariant :p425 + p432 + p444 + p446 + p450 + p452 + p462 + p470 + p472 + p487 + p489 + p514 + p530 = 1
invariant :p1612 + p1615 + p1616 = 1
invariant :p1422 + p1425 + p1426 = 1
invariant :p1352 + p1355 + p1356 = 1
invariant :p1822 + p1825 + p1826 = 1
invariant :p1732 + p1735 + p1736 = 1
invariant :p1552 + p1555 + p1556 = 1
invariant :p1562 + p1565 + p1566 = 1
invariant :p1452 + p1455 + p1456 = 1
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O3, model.c], workingDir=/home/mcc/execution]
Compilation finished in 14868 ms.
Running link step : CommandLine [args=[gcc, -shared, -o, gal.so, model.o], workingDir=/home/mcc/execution]
Link finished in 87 ms.
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -d], workingDir=/home/mcc/execution]
terminate called after throwing an instance of 'std::bad_alloc'
what(): std::bad_alloc
BK_TIME_CONFINEMENT_REACHED
--------------------
content from stderr:
+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution ReachabilityDeadlock -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -consoleLog -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination ReachabilityDeadlock -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
May 18, 2018 3:10:06 PM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, ReachabilityDeadlock, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -smt]
May 18, 2018 3:10:06 PM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
May 18, 2018 3:10:06 PM fr.lip6.move.gal.nupn.PTNetReader loadFromXML
INFO: Load time of PNML (sax parser for PT used): 270 ms
May 18, 2018 3:10:06 PM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 1999 places.
May 18, 2018 3:10:07 PM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 2887 transitions.
May 18, 2018 3:10:07 PM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Found NUPN structural information;
May 18, 2018 3:10:07 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.img.gal : 66 ms
May 18, 2018 3:10:07 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 601 ms
May 18, 2018 3:10:07 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.simple.gal : 18 ms
May 18, 2018 3:10:08 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 2887 transitions.
May 18, 2018 3:10:09 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/ReachabilityDeadlock.pnml.gal : 6 ms
May 18, 2018 3:10:10 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 1088 transitions.
May 18, 2018 3:10:10 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 88 place invariants in 203 ms
May 18, 2018 3:10:11 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 340 variables to be positive in 1152 ms
May 18, 2018 3:10:11 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may disable matrix : 1088 transitions.
May 18, 2018 3:10:11 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of disable matrix completed :0/1088 took 1 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 18, 2018 3:10:11 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete disable matrix. took 167 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 18, 2018 3:10:11 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may enable matrix : 1088 transitions.
May 18, 2018 3:10:12 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete enable matrix. took 100 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 18, 2018 3:10:12 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeCoEnablingMatrix
INFO: Computing symmetric co enabling matrix : 1088 transitions.
May 18, 2018 3:10:15 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(135/1088) took 3101 ms. Total solver calls (SAT/UNSAT): 1406(68/1338)
May 18, 2018 3:10:18 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(194/1088) took 6111 ms. Total solver calls (SAT/UNSAT): 5256(387/4869)
May 18, 2018 3:10:21 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(245/1088) took 9135 ms. Total solver calls (SAT/UNSAT): 9995(579/9416)
May 18, 2018 3:10:24 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(300/1088) took 12170 ms. Total solver calls (SAT/UNSAT): 14660(881/13779)
May 18, 2018 3:10:27 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(358/1088) took 15218 ms. Total solver calls (SAT/UNSAT): 19033(1237/17796)
May 18, 2018 3:10:30 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(416/1088) took 18240 ms. Total solver calls (SAT/UNSAT): 23358(1569/21789)
May 18, 2018 3:10:33 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(476/1088) took 21272 ms. Total solver calls (SAT/UNSAT): 27687(1878/25809)
May 18, 2018 3:10:36 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(542/1088) took 24295 ms. Total solver calls (SAT/UNSAT): 31734(2130/29604)
May 18, 2018 3:10:39 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(625/1088) took 27323 ms. Total solver calls (SAT/UNSAT): 35642(2354/33288)
May 18, 2018 3:10:42 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(712/1088) took 30339 ms. Total solver calls (SAT/UNSAT): 39035(2518/36517)
May 18, 2018 3:10:45 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(823/1088) took 33357 ms. Total solver calls (SAT/UNSAT): 42414(3196/39218)
May 18, 2018 3:10:48 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(932/1088) took 36373 ms. Total solver calls (SAT/UNSAT): 45605(3873/41732)
May 18, 2018 3:10:51 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(1046/1088) took 39394 ms. Total solver calls (SAT/UNSAT): 46926(4617/42309)
May 18, 2018 3:10:52 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Finished co-enabling matrix. took 40425 ms. Total solver calls (SAT/UNSAT): 47338(4864/42474)
May 18, 2018 3:10:52 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeDoNotAccord
INFO: Computing Do-Not-Accords matrix : 1088 transitions.
May 18, 2018 3:10:52 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed DNA matrix. took 171 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 18, 2018 3:10:52 PM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 42844ms conformant to PINS in folder :/home/mcc/execution
ITS-tools command line returned an error code 134
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="DLCround-PT-05b"
export BK_EXAMINATION="ReachabilityDeadlock"
export BK_TOOL="itstools"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
tar xzf /home/mcc/BenchKit/INPUTS/DLCround-PT-05b.tgz
mv DLCround-PT-05b execution
cd execution
pwd
ls -lh
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3637"
echo " Executing tool itstools"
echo " Input is DLCround-PT-05b, examination is ReachabilityDeadlock"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r068-smll-152649741000041"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityDeadlock" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityDeadlock" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityDeadlock.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityDeadlock.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityDeadlock.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;