fond
Model Checking Contest 2018
8th edition, Bratislava, Slovakia, June 26, 2018
Execution of r068-smll-152649741000033
Last Updated
June 26, 2018

About the Execution of ITS-Tools for DLCround-PT-05a

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
15752.680 5951.00 13428.00 451.60 TTTFFFFFTFTTFTTT normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Waiting for the VM to be ready (probing ssh)
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/home/mcc/execution
total 424K
-rw-r--r-- 1 mcc users 3.4K May 15 18:54 CTLCardinality.txt
-rw-r--r-- 1 mcc users 19K May 15 18:54 CTLCardinality.xml
-rw-r--r-- 1 mcc users 2.2K May 15 18:54 CTLFireability.txt
-rw-r--r-- 1 mcc users 13K May 15 18:54 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K May 15 18:50 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 5.9K May 15 18:50 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 2.2K May 15 18:54 LTLCardinality.txt
-rw-r--r-- 1 mcc users 9.0K May 15 18:54 LTLCardinality.xml
-rw-r--r-- 1 mcc users 1.8K May 15 18:54 LTLFireability.txt
-rw-r--r-- 1 mcc users 9.4K May 15 18:54 LTLFireability.xml
-rw-r--r-- 1 mcc users 3.4K May 15 18:54 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 17K May 15 18:54 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 106 May 15 18:54 ReachabilityDeadlock.txt
-rw-r--r-- 1 mcc users 344 May 15 18:54 ReachabilityDeadlock.xml
-rw-r--r-- 1 mcc users 2.7K May 15 18:54 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 17K May 15 18:54 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K May 15 18:54 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.6K May 15 18:54 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 15 18:50 equiv_col
-rw-r--r-- 1 mcc users 4 May 15 18:50 instance
-rw-r--r-- 1 mcc users 6 May 15 18:50 iscolored
-rw-r--r-- 1 mcc users 259K May 15 18:50 model.pnml
=====================================================================
Generated by BenchKit 2-3637
Executing tool itstools
Input is DLCround-PT-05a, examination is ReachabilityCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r068-smll-152649741000033
=====================================================================


--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME DLCround-PT-05a-ReachabilityCardinality-00
FORMULA_NAME DLCround-PT-05a-ReachabilityCardinality-01
FORMULA_NAME DLCround-PT-05a-ReachabilityCardinality-02
FORMULA_NAME DLCround-PT-05a-ReachabilityCardinality-03
FORMULA_NAME DLCround-PT-05a-ReachabilityCardinality-04
FORMULA_NAME DLCround-PT-05a-ReachabilityCardinality-05
FORMULA_NAME DLCround-PT-05a-ReachabilityCardinality-06
FORMULA_NAME DLCround-PT-05a-ReachabilityCardinality-07
FORMULA_NAME DLCround-PT-05a-ReachabilityCardinality-08
FORMULA_NAME DLCround-PT-05a-ReachabilityCardinality-09
FORMULA_NAME DLCround-PT-05a-ReachabilityCardinality-10
FORMULA_NAME DLCround-PT-05a-ReachabilityCardinality-11
FORMULA_NAME DLCround-PT-05a-ReachabilityCardinality-12
FORMULA_NAME DLCround-PT-05a-ReachabilityCardinality-13
FORMULA_NAME DLCround-PT-05a-ReachabilityCardinality-14
FORMULA_NAME DLCround-PT-05a-ReachabilityCardinality-15

=== Now, execution of the tool begins

BK_START 1526651227417

Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805151631/bin/its-reach-linux64, --gc-threshold, 2000000, --quiet, -i, /home/mcc/execution/ReachabilityCardinality.pnml.gal, -t, CGAL, -reachable-file, ReachabilityCardinality.prop, --nowitness], workingDir=/home/mcc/execution]

its-reach command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805151631/bin/its-reach-linux64 --gc-threshold 2000000 --quiet -i /home/mcc/execution/ReachabilityCardinality.pnml.gal -t CGAL -reachable-file ReachabilityCardinality.prop --nowitness
Loading property file ReachabilityCardinality.prop.
Read [invariant] property : DLCround-PT-05a-ReachabilityCardinality-00 with value :(!(((u77.p155>=3)&&((u5.p37==0)||(u40.p118==1)))&&((u3.p16==0)||(u67.p145==1))))
Read [invariant] property : DLCround-PT-05a-ReachabilityCardinality-01 with value :(!(u4.p25>=3))
Read [invariant] property : DLCround-PT-05a-ReachabilityCardinality-02 with value :(!(((u5.p32>=1)&&((u64.p142==0)||(u88.p166==1)))&&((u44.p122==0)||(u5.p37==1))))
Read [reachable] property : DLCround-PT-05a-ReachabilityCardinality-03 with value :((!((u2.p12==0)||(u56.p134==1)))&&(((u9.p69>=3)||(u59.p137>=3))||((u31.p109==0)||(u32.p110==1))))
Read [reachable] property : DLCround-PT-05a-ReachabilityCardinality-04 with value :(((((u9.p73==0)||(u10.p79==1))||(u10.p81>=3))&&((u10.p81>=3)||(u33.p111>=2)))&&(((u9.p77==0)||(u88.p166==1))||(((u6.p43==0)||(u22.p100==1))&&((u9.p71==0)||(u6.p44==1)))))
Read [reachable] property : DLCround-PT-05a-ReachabilityCardinality-05 with value :(!((u8.p62==0)||(u80.p158==1)))
Read [reachable] property : DLCround-PT-05a-ReachabilityCardinality-06 with value :((u52.p130>=3)&&(u60.p138>=1))
Read [reachable] property : DLCround-PT-05a-ReachabilityCardinality-07 with value :(((u10.p79>=3)||((u56.p134==0)||(u45.p123==1)))&&((((u4.p25==0)||(u8.p60==1))&&(u1.p2>=1))&&(u28.p106>=3)))
Read [invariant] property : DLCround-PT-05a-ReachabilityCardinality-08 with value :(((u53.p131==0)||(u69.p147==1))||((((u11.p89==0)||(u4.p26==1))||((u7.p54==0)||(u35.p113==1)))||(!(u84.p162>=3))))
Read [reachable] property : DLCround-PT-05a-ReachabilityCardinality-09 with value :(!((u10.p84==0)||(u32.p110==1)))
Read [invariant] property : DLCround-PT-05a-ReachabilityCardinality-10 with value :((((u8.p68>=2)&&((u30.p108==0)||(u8.p64==1)))||((u78.p156==0)||(u84.p162==1)))||(((u2.p13>=2)||((u5.p33==0)||(u10.p85==1)))&&(((u42.p120==0)||(u6.p39==1))||(u28.p106>=2))))
Read [invariant] property : DLCround-PT-05a-ReachabilityCardinality-11 with value :(((u1.p5==0)||(u9.p74==1))||((u1.p4==0)||(u10.p87==1)))
Read [reachable] property : DLCround-PT-05a-ReachabilityCardinality-12 with value :(u8.p61>=3)
Read [invariant] property : DLCround-PT-05a-ReachabilityCardinality-13 with value :(((u60.p138==0)||(u88.p166==1))||(u57.p135>=2))
Read [invariant] property : DLCround-PT-05a-ReachabilityCardinality-14 with value :(!((u5.p38>=3)&&((u27.p105>=2)&&(u8.p62>=3))))
Read [invariant] property : DLCround-PT-05a-ReachabilityCardinality-15 with value :((u14.p92==0)||(u59.p137==1))
built 157 ordering constraints for composite.
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
Normalized transition count is 138
// Phase 1: matrix 138 rows 167 cols
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
DLCround\_PT\_05a\_flat\_flat\_mod,2.401e+09,0.331312,7212,184,21,1743,532,1130,1459,68,699,0
Total reachable state count : 2401000001

Verifying 16 reachability properties.
Invariant property DLCround-PT-05a-ReachabilityCardinality-00 is true.
FORMULA DLCround-PT-05a-ReachabilityCardinality-00 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
DLCround-PT-05a-ReachabilityCardinality-00,0,0.332436,7240,1,0,1743,532,1146,1459,73,699,0
Invariant property DLCround-PT-05a-ReachabilityCardinality-01 is true.
FORMULA DLCround-PT-05a-ReachabilityCardinality-01 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
DLCround-PT-05a-ReachabilityCardinality-01,0,0.332723,7592,1,0,1743,532,1150,1459,75,699,0
Invariant property DLCround-PT-05a-ReachabilityCardinality-02 is true.
FORMULA DLCround-PT-05a-ReachabilityCardinality-02 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
DLCround-PT-05a-ReachabilityCardinality-02,0,0.33365,7592,1,0,1743,532,1164,1459,80,699,107
Reachability property DLCround-PT-05a-ReachabilityCardinality-03 does not hold.
FORMULA DLCround-PT-05a-ReachabilityCardinality-03 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN
No reachable states exhibit your property : DLCround-PT-05a-ReachabilityCardinality-03

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
DLCround-PT-05a-ReachabilityCardinality-03,0,0.334923,7592,1,0,1743,532,1179,1459,82,699,301
Reachability property DLCround-PT-05a-ReachabilityCardinality-04 does not hold.
FORMULA DLCround-PT-05a-ReachabilityCardinality-04 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN
No reachable states exhibit your property : DLCround-PT-05a-ReachabilityCardinality-04

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
DLCround-PT-05a-ReachabilityCardinality-04,0,0.337128,7592,1,0,1743,532,1210,1459,93,699,581
Reachability property DLCround-PT-05a-ReachabilityCardinality-05 does not hold.
FORMULA DLCround-PT-05a-ReachabilityCardinality-05 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN
No reachable states exhibit your property : DLCround-PT-05a-ReachabilityCardinality-05

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
DLCround-PT-05a-ReachabilityCardinality-05,0,0.33768,7592,1,0,1743,532,1214,1459,93,699,653
Reachability property DLCround-PT-05a-ReachabilityCardinality-06 does not hold.
FORMULA DLCround-PT-05a-ReachabilityCardinality-06 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN
No reachable states exhibit your property : DLCround-PT-05a-ReachabilityCardinality-06

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
DLCround-PT-05a-ReachabilityCardinality-06,0,0.337957,7592,1,0,1743,532,1217,1459,93,699,655
Reachability property DLCround-PT-05a-ReachabilityCardinality-07 does not hold.
FORMULA DLCround-PT-05a-ReachabilityCardinality-07 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN
No reachable states exhibit your property : DLCround-PT-05a-ReachabilityCardinality-07

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
DLCround-PT-05a-ReachabilityCardinality-07,0,0.339309,7592,1,0,1743,532,1235,1459,97,699,795
Invariant property DLCround-PT-05a-ReachabilityCardinality-08 is true.
FORMULA DLCround-PT-05a-ReachabilityCardinality-08 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
DLCround-PT-05a-ReachabilityCardinality-08,0,0.340369,7592,1,0,1743,532,1255,1459,100,699,993
Reachability property DLCround-PT-05a-ReachabilityCardinality-09 does not hold.
FORMULA DLCround-PT-05a-ReachabilityCardinality-09 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN
No reachable states exhibit your property : DLCround-PT-05a-ReachabilityCardinality-09

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
DLCround-PT-05a-ReachabilityCardinality-09,0,0.340749,7592,1,0,1743,532,1258,1459,100,699,1077
Invariant property DLCround-PT-05a-ReachabilityCardinality-10 is true.
FORMULA DLCround-PT-05a-ReachabilityCardinality-10 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
DLCround-PT-05a-ReachabilityCardinality-10,0,0.342663,7592,1,0,1743,532,1288,1459,103,699,1454
Invariant property DLCround-PT-05a-ReachabilityCardinality-11 is true.
FORMULA DLCround-PT-05a-ReachabilityCardinality-11 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
DLCround-PT-05a-ReachabilityCardinality-11,0,0.343428,7592,1,0,1743,532,1299,1459,104,699,1598
Reachability property DLCround-PT-05a-ReachabilityCardinality-12 does not hold.
FORMULA DLCround-PT-05a-ReachabilityCardinality-12 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN
No reachable states exhibit your property : DLCround-PT-05a-ReachabilityCardinality-12

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
DLCround-PT-05a-ReachabilityCardinality-12,0,0.343995,7592,1,0,1743,532,1300,1459,104,699,1598
Invariant property DLCround-PT-05a-ReachabilityCardinality-13 is true.
FORMULA DLCround-PT-05a-ReachabilityCardinality-13 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
DLCround-PT-05a-ReachabilityCardinality-13,0,0.344436,7592,1,0,1743,532,1306,1459,104,699,1673
Invariant property DLCround-PT-05a-ReachabilityCardinality-14 is true.
FORMULA DLCround-PT-05a-ReachabilityCardinality-14 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
DLCround-PT-05a-ReachabilityCardinality-14,0,0.344789,7592,1,0,1743,532,1315,1459,105,699,1673
Invariant property DLCround-PT-05a-ReachabilityCardinality-15 is true.
FORMULA DLCround-PT-05a-ReachabilityCardinality-15 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
DLCround-PT-05a-ReachabilityCardinality-15,0,0.345219,7592,1,0,1743,532,1319,1459,105,699,1781
invariant :p95 + -1'p166 = 0
invariant :p89 + -1'p166 = 0
invariant :p49 + p50 + p51 + p52 + p53 + p54 + p55 + p56 + p57 + p58 + -1'p166 = 0
invariant :p111 + -1'p166 = 0
invariant :p93 + -1'p166 = 0
invariant :p135 + -1'p166 = 0
invariant :p104 + -1'p166 = 0
invariant :p155 + -1'p166 = 0
invariant :p162 + -1'p166 = 0
invariant :p118 + -1'p166 = 0
invariant :p125 + -1'p166 = 0
invariant :p97 + -1'p166 = 0
invariant :p124 + -1'p166 = 0
invariant :p147 + -1'p166 = 0
invariant :p127 + -1'p166 = 0
invariant :p153 + -1'p166 = 0
invariant :p1 + p2 + p3 + p4 + p5 + p6 + p7 + -1'p166 = 0
invariant :p59 + p60 + p61 + p62 + p63 + p64 + p65 + p66 + p67 + p68 + -1'p166 = 0
invariant :p136 + -1'p166 = 0
invariant :p130 + -1'p166 = 0
invariant :p157 + -1'p166 = 0
invariant :p160 + -1'p166 = 0
invariant :p107 + -1'p166 = 0
invariant :p163 + -1'p166 = 0
invariant :p122 + -1'p166 = 0
invariant :p152 + -1'p166 = 0
invariant :p146 + -1'p166 = 0
invariant :p161 + -1'p166 = 0
invariant :p0 + p166 = 1
invariant :p101 + -1'p166 = 0
invariant :p140 + -1'p166 = 0
invariant :p90 + -1'p166 = 0
invariant :p123 + -1'p166 = 0
invariant :p137 + -1'p166 = 0
invariant :p116 + -1'p166 = 0
invariant :p15 + p16 + p17 + p18 + p19 + p20 + p21 + -1'p166 = 0
invariant :p158 + -1'p166 = 0
invariant :p133 + -1'p166 = 0
invariant :p128 + -1'p166 = 0
invariant :p103 + -1'p166 = 0
invariant :p115 + -1'p166 = 0
invariant :p142 + -1'p166 = 0
invariant :p139 + -1'p166 = 0
invariant :p92 + -1'p166 = 0
invariant :p96 + -1'p166 = 0
invariant :p148 + -1'p166 = 0
invariant :p119 + -1'p166 = 0
invariant :p145 + -1'p166 = 0
invariant :p165 + -1'p166 = 0
invariant :p131 + -1'p166 = 0
invariant :p121 + -1'p166 = 0
invariant :p134 + -1'p166 = 0
invariant :p98 + -1'p166 = 0
invariant :p138 + -1'p166 = 0
invariant :p29 + p30 + p31 + p32 + p33 + p34 + p35 + p36 + p37 + p38 + -1'p166 = 0
invariant :p94 + -1'p166 = 0
invariant :p109 + -1'p166 = 0
invariant :p69 + p70 + p71 + p72 + p73 + p74 + p75 + p76 + p77 + p78 + -1'p166 = 0
invariant :p154 + -1'p166 = 0
invariant :p100 + -1'p166 = 0
invariant :p91 + -1'p166 = 0
invariant :p141 + -1'p166 = 0
invariant :p106 + -1'p166 = 0
invariant :p108 + -1'p166 = 0
invariant :p39 + p40 + p41 + p42 + p43 + p44 + p45 + p46 + p47 + p48 + -1'p166 = 0
invariant :p144 + -1'p166 = 0
invariant :p129 + -1'p166 = 0
invariant :p151 + -1'p166 = 0
invariant :p150 + -1'p166 = 0
invariant :p22 + p23 + p24 + p25 + p26 + p27 + p28 + -1'p166 = 0
invariant :p156 + -1'p166 = 0
invariant :p126 + -1'p166 = 0
invariant :p143 + -1'p166 = 0
invariant :p105 + -1'p166 = 0
invariant :p132 + -1'p166 = 0
invariant :p110 + -1'p166 = 0
invariant :p112 + -1'p166 = 0
invariant :p79 + p80 + p81 + p82 + p83 + p84 + p85 + p86 + p87 + p88 + -1'p166 = 0
invariant :p99 + -1'p166 = 0
invariant :p117 + -1'p166 = 0
invariant :p8 + p9 + p10 + p11 + p12 + p13 + p14 + -1'p166 = 0
invariant :p164 + -1'p166 = 0
invariant :p102 + -1'p166 = 0
invariant :p159 + -1'p166 = 0
invariant :p113 + -1'p166 = 0
invariant :p114 + -1'p166 = 0
invariant :p120 + -1'p166 = 0
invariant :p149 + -1'p166 = 0
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O3, model.c], workingDir=/home/mcc/execution]
WARNING : LTS min runner thread was asked to interrupt. Dying gracefully.

BK_STOP 1526651233368

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution ReachabilityCardinality -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -consoleLog -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination ReachabilityCardinality -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
May 18, 2018 1:47:09 PM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, ReachabilityCardinality, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -smt]
May 18, 2018 1:47:09 PM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
May 18, 2018 1:47:10 PM fr.lip6.move.gal.nupn.PTNetReader loadFromXML
INFO: Load time of PNML (sax parser for PT used): 175 ms
May 18, 2018 1:47:10 PM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 167 places.
May 18, 2018 1:47:10 PM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 1055 transitions.
May 18, 2018 1:47:10 PM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Found NUPN structural information;
May 18, 2018 1:47:10 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.img.gal : 45 ms
May 18, 2018 1:47:10 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 342 ms
May 18, 2018 1:47:10 PM fr.lip6.move.gal.application.MccTranslator applyOrder
INFO: Applying decomposition
May 18, 2018 1:47:10 PM fr.lip6.move.gal.instantiate.CompositeBuilder decomposeWithOrder
INFO: Decomposing Gal with order
May 18, 2018 1:47:11 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 288 ms
May 18, 2018 1:47:11 PM fr.lip6.move.gal.instantiate.CompositeBuilder rewriteArraysToAllowPartition
INFO: Rewriting arrays to variables to allow decomposition.
May 18, 2018 1:47:11 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 374 ms
May 18, 2018 1:47:11 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 1055 transitions.
May 18, 2018 1:47:11 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 1055 transitions.
May 18, 2018 1:47:11 PM fr.lip6.move.gal.instantiate.Instantiator fuseIsomorphicEffects
INFO: Removed a total of 1614 redundant transitions.
May 18, 2018 1:47:11 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/ReachabilityCardinality.pnml.gal : 17 ms
May 18, 2018 1:47:11 PM fr.lip6.move.serialization.SerializationUtil serializePropertiesForITSTools
INFO: Time to serialize properties into /home/mcc/execution/ReachabilityCardinality.prop : 1 ms
May 18, 2018 1:47:12 PM org.smtlib.impl.Script execute
WARNING: Script execution failed on command (define-fun _enabled__956 ((step Int)) Bool (_enabledsrc__956 (select s step))) with error
May 18, 2018 1:47:12 PM org.smtlib.impl.Script execute
WARNING: Script execution failed on command (define-fun trsrc956 ((src (Array Int Int))(dst (Array Int Int))) Bool (and (_enabledsrc__956 src) (= (store (store src 62 (+ (select src 62) 1)) 63 (- (select src 63) 1)) dst))) with error (error "Error writing to Z3 solver: java.io.IOException: Stream closed")
java.lang.RuntimeException: Error when declaring system variables to SMT solver.(error "Error writing to Z3 solver: java.io.IOException: Stream closed")
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.init(NextBMCSolver.java:93)
at fr.lip6.move.gal.gal2smt.smt.ISMTSolver.init(ISMTSolver.java:17)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.checkProperties(Gal2SMTFrontEnd.java:94)
at fr.lip6.move.gal.application.SMTRunner$2.run(SMTRunner.java:110)
at java.lang.Thread.run(Thread.java:748)
May 18, 2018 1:47:12 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 88 place invariants in 106 ms
Skipping mayMatrices nes/nds SMT solver raised an error :(error "Error writing to Z3 solver: java.io.IOException: Stream closed")
java.lang.RuntimeException: SMT solver raised an error :(error "Error writing to Z3 solver: java.io.IOException: Stream closed")
at fr.lip6.move.gal.gal2smt.bmc.KInductionSolver.computeAndDeclareInvariants(KInductionSolver.java:293)
at fr.lip6.move.gal.gal2smt.bmc.KInductionSolver.init(KInductionSolver.java:71)
at fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver.init(NecessaryEnablingsolver.java:71)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.printLabels(Gal2PinsTransformerNext.java:471)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.printDependencyMatrix(Gal2PinsTransformerNext.java:209)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.buildBodyFile(Gal2PinsTransformerNext.java:85)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.transform(Gal2PinsTransformerNext.java:830)
at fr.lip6.move.gal.application.LTSminRunner$1.run(LTSminRunner.java:71)
at java.lang.Thread.run(Thread.java:748)
May 18, 2018 1:47:12 PM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 1268ms conformant to PINS in folder :/home/mcc/execution

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="DLCround-PT-05a"
export BK_EXAMINATION="ReachabilityCardinality"
export BK_TOOL="itstools"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

tar xzf /home/mcc/BenchKit/INPUTS/DLCround-PT-05a.tgz
mv DLCround-PT-05a execution
cd execution
pwd
ls -lh

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3637"
echo " Executing tool itstools"
echo " Input is DLCround-PT-05a, examination is ReachabilityCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r068-smll-152649741000033"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' ReachabilityCardinality.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;