fond
Model Checking Contest 2018
8th edition, Bratislava, Slovakia, June 26, 2018
Execution of r067-smll-152649739700193
Last Updated
June 26, 2018

About the Execution of Irma.struct for DLCshifumi-PT-4b

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
1953.640 227632.00 227078.00 1400.00 ???????????????? normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Waiting for the VM to be ready (probing ssh)
........................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................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/home/mcc/execution
total 5.3M
-rw-r--r-- 1 mcc users 3.4K May 15 18:54 CTLCardinality.txt
-rw-r--r-- 1 mcc users 19K May 15 18:54 CTLCardinality.xml
-rw-r--r-- 1 mcc users 2.2K May 15 18:54 CTLFireability.txt
-rw-r--r-- 1 mcc users 14K May 15 18:54 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K May 15 18:50 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.0K May 15 18:50 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 2.4K May 15 18:54 LTLCardinality.txt
-rw-r--r-- 1 mcc users 11K May 15 18:54 LTLCardinality.xml
-rw-r--r-- 1 mcc users 1.9K May 15 18:54 LTLFireability.txt
-rw-r--r-- 1 mcc users 9.9K May 15 18:54 LTLFireability.xml
-rw-r--r-- 1 mcc users 3.9K May 15 18:54 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 20K May 15 18:54 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 107 May 15 18:54 ReachabilityDeadlock.txt
-rw-r--r-- 1 mcc users 345 May 15 18:54 ReachabilityDeadlock.xml
-rw-r--r-- 1 mcc users 2.6K May 15 18:54 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 15K May 15 18:54 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K May 15 18:54 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.7K May 15 18:54 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 15 18:50 equiv_col
-rw-r--r-- 1 mcc users 3 May 15 18:50 instance
-rw-r--r-- 1 mcc users 6 May 15 18:50 iscolored
-rw-r--r-- 1 mcc users 5.1M May 15 18:50 model.pnml
=====================================================================
Generated by BenchKit 2-3637
Executing tool irma4mcc-structural
Input is DLCshifumi-PT-4b, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r067-smll-152649739700193
=====================================================================


--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME DLCshifumi-PT-4b-CTLFireability-00
FORMULA_NAME DLCshifumi-PT-4b-CTLFireability-01
FORMULA_NAME DLCshifumi-PT-4b-CTLFireability-02
FORMULA_NAME DLCshifumi-PT-4b-CTLFireability-03
FORMULA_NAME DLCshifumi-PT-4b-CTLFireability-04
FORMULA_NAME DLCshifumi-PT-4b-CTLFireability-05
FORMULA_NAME DLCshifumi-PT-4b-CTLFireability-06
FORMULA_NAME DLCshifumi-PT-4b-CTLFireability-07
FORMULA_NAME DLCshifumi-PT-4b-CTLFireability-08
FORMULA_NAME DLCshifumi-PT-4b-CTLFireability-09
FORMULA_NAME DLCshifumi-PT-4b-CTLFireability-10
FORMULA_NAME DLCshifumi-PT-4b-CTLFireability-11
FORMULA_NAME DLCshifumi-PT-4b-CTLFireability-12
FORMULA_NAME DLCshifumi-PT-4b-CTLFireability-13
FORMULA_NAME DLCshifumi-PT-4b-CTLFireability-14
FORMULA_NAME DLCshifumi-PT-4b-CTLFireability-15

=== Now, execution of the tool begins

BK_START 1526656409355


BK_STOP 1526656636987

--------------------
content from stderr:

Prefix is 75f5f979.
Reading known information in /usr/share/mcc4mcc/75f5f979-known.json.
Reading learned information in /usr/share/mcc4mcc/75f5f979-learned.json.
Reading value translations in /usr/share/mcc4mcc/75f5f979-values.json.
Using directory /home/mcc/execution for input, as it contains a model.pnml file.
Using DLCshifumi-PT-4b as instance name.
Using DLCshifumi as model name.
Using algorithm or tool bmdt.
Model characteristics are: {'Examination': 'CTLFireability', 'Place/Transition': True, 'Colored': False, 'Relative-Time': 1, 'Relative-Memory': 1, 'Ordinary': True, 'Simple Free Choice': False, 'Extended Free Choice': False, 'State Machine': False, 'Marked Graph': False, 'Connected': True, 'Strongly Connected': False, 'Source Place': True, 'Sink Place': False, 'Source Transition': False, 'Sink Transition': False, 'Loop Free': None, 'Conservative': False, 'Sub-Conservative': False, 'Nested Units': True, 'Safe': True, 'Deadlock': None, 'Reversible': None, 'Quasi Live': None, 'Live': None}.
Known tools are: [{'Time': 1721955, 'Memory': 10747.99, 'Tool': 'lola'}, {'Time': 1722415, 'Memory': 10656.04, 'Tool': 'lola'}].
Learned tools are: [{'Tool': 'itstools'}].
CTLFireability lola DLCshifumi-PT-4b...

Time: 3600 - MCC
----- Start make prepare stdout -----
----- Start make prepare stderr -----
===========================================================================================
DLCshifumi-PT-4b: translating PT Petri net model.pnml into LoLA format
===========================================================================================
translating PT Petri net complete


checking for too many tokens
===========================================================================================
DLCshifumi-PT-4b: translating PT formula CTLFireability into LoLA format
===========================================================================================
translating formula complete
touch formulae;
----- Start make result stdout -----
----- Start make result stderr -----
CTLFireability @ DLCshifumi-PT-4b @ 3539 seconds
Makefile:222: recipe for target 'verify' failed
make: [verify] Error 134 (ignored)
----- Start make result stdout -----
----- Start make result stderr -----
lola: LoLA will run for 3539 seconds at most (--timelimit)
lola: NET
lola: reading net from model.pnml.lola
lola: finished parsing
lola: closed net file model.pnml.lola
lola: 36356/65536 symbol table entries, 13849 collisions
lola: preprocessing...
lola: finding significant places
lola: 15015 places, 21341 transitions, 14324 significant places
lola: computing forward-conflicting sets
lola: computing back-conflicting sets
lola: 28617 transition conflict sets
lola: TASK
lola: reading formula from DLCshifumi-PT-4b-CTLFireability.task
lola: E (F (A (X (FIREABLE(t9174))))) : E (F (FIREABLE(t12886))) : E (F (A (F (A (F (FIREABLE(t18499))))))) : (NOT(A (F ((NOT FIREABLE(t18724) AND (FIREABLE(t6624) OR FIREABLE(t7838)))))) OR FIREABLE(t7273)) : A (F (E (X (A (F (FIREABLE(t6927))))))) : E (F (E (G ((NOT FIREABLE(t8745) AND FIREABLE(t2123)))))) : NOT((NOT(E (F ((FIREABLE(t20710) AND FIREABLE(t6761))))) OR FIREABLE(t19273))) : (E (G (E (F ((FIREABLE(t13480) OR FIREABLE(t21173)))))) OR ((A ((FIREABLE(t3571) U FIREABLE(t986))) AND A (G ((FIREABLE(t17938) AND FIREABLE(t17460))))) AND (E (F (NOT FIREABLE(t13496))) AND NOT FIREABLE(t6648)))) : A (F (E (F (FIREABLE(t12903))))) : ((A (X ((FIREABLE(t6143) AND NOT FIREABLE(t7895)))) OR E (F (A (G (FIREABLE(t14855)))))) OR A (F (FIREABLE(t10735)))) : NOT(E (G (NOT FIREABLE(t5029)))) : NOT(E ((NOT FIREABLE(t20094) U E (X (FIREABLE(t7547)))))) : E (F (E (G (E (F (FIREABLE(t16481))))))) : E (G (NOT FIREABLE(t19854))) : (E (G ((FIREABLE(t71) AND FIREABLE(t10600)))) OR (A (G (A (F (FIREABLE(t18190))))) OR (A ((FIREABLE(t11872) U FIREABLE(t17826))) OR E (F (FIREABLE(t20801)))))) : (((E (X ((FIREABLE(t10637) OR FIREABLE(t529)))) OR (A (G (FIREABLE(t7120))) OR A (G (FIREABLE(t7204))))) OR E ((NOT FIREABLE(t14852) U FIREABLE(t2504)))) OR FIREABLE(t20037))
lola: computing a collection of formulas
lola: RUNNING
lola: subprocess 0 will run for 221 seconds at most (--localtimelimit=-1)
lola: ========================================
lola: ...considering subproblem: E (F (A (X (FIREABLE(t9174)))))
lola: ========================================
lola: SUBTASK
lola: checking CTL
lola: processed formula: E(TRUE U AX(FIREABLE(t9174)))
lola: processed formula length: 29
lola: 2 rewrites
lola: formula mentions 0 of 15015 places; total mentions: 0
lola: closed formula file DLCshifumi-PT-4b-CTLFireability.task
lola: STORE
lola: using a bit-perfect encoder (--encoder=bit)
lola: using 1792 bytes per marking, with 12 unused bits
lola: using a prefix tree store (--store=prefix)
lola: Formula contains EX or AX operators, stubborn sets not applicable
lola: RUNNING
lola: CTL formula contains 1 significant temporal operators and needs 5 bytes of payload
lola: Ignoring fairness constraints (--fair).
lola: 57804 markings, 75427 edges, 3689348869717491712 markings/sec, 0 secs
lola: 119971 markings, 156521 edges, 12433 markings/sec, 5 secs
lola: 182593 markings, 237049 edges, 12524 markings/sec, 10 secs
lola: 245344 markings, 317069 edges, 12550 markings/sec, 15 secs
lola: 308837 markings, 397257 edges, 12699 markings/sec, 20 secs
lola: 377961 markings, 475031 edges, 13825 markings/sec, 25 secs
lola: 446957 markings, 552566 edges, 13799 markings/sec, 30 secs
lola: 515651 markings, 630410 edges, 13739 markings/sec, 35 secs
lola: 584633 markings, 707928 edges, 13796 markings/sec, 40 secs
lola: 652882 markings, 785277 edges, 13650 markings/sec, 45 secs
lola: 721175 markings, 862039 edges, 13659 markings/sec, 50 secs
lola: 789080 markings, 938353 edges, 13581 markings/sec, 55 secs
lola: 856920 markings, 1015227 edges, 13568 markings/sec, 60 secs
lola: 925480 markings, 1092305 edges, 13712 markings/sec, 65 secs
lola: 994511 markings, 1169639 edges, 13806 markings/sec, 70 secs
lola: 1063282 markings, 1246895 edges, 13754 markings/sec, 75 secs
lola: 1132383 markings, 1324584 edges, 13820 markings/sec, 80 secs
lola: 1201585 markings, 1402350 edges, 13840 markings/sec, 85 secs
lola: 1270708 markings, 1480040 edges, 13825 markings/sec, 90 secs
lola: 1339754 markings, 1557835 edges, 13809 markings/sec, 95 secs
lola: 1409050 markings, 1635910 edges, 13859 markings/sec, 100 secs
lola: 1478081 markings, 1713476 edges, 13806 markings/sec, 105 secs
lola: 1547103 markings, 1791053 edges, 13804 markings/sec, 110 secs
lola: 1615856 markings, 1867349 edges, 13751 markings/sec, 115 secs
lola: 1679740 markings, 1948577 edges, 12777 markings/sec, 120 secs
lola: 1748224 markings, 2025537 edges, 13697 markings/sec, 125 secs
lola: 1817259 markings, 2103110 edges, 13807 markings/sec, 130 secs
lola: 1886425 markings, 2180953 edges, 13833 markings/sec, 135 secs
lola: 1955369 markings, 2258441 edges, 13789 markings/sec, 140 secs
lola: 2024291 markings, 2336083 edges, 13784 markings/sec, 145 secs
lola: 2093141 markings, 2413465 edges, 13770 markings/sec, 150 secs
lola: 2162288 markings, 2491199 edges, 13829 markings/sec, 155 secs
lola: 2231463 markings, 2568939 edges, 13835 markings/sec, 160 secs
lola: 2300533 markings, 2646557 edges, 13814 markings/sec, 165 secs
lola: 2369498 markings, 2724045 edges, 13793 markings/sec, 170 secs
lola: 2438300 markings, 2801371 edges, 13760 markings/sec, 175 secs
lola: 2506636 markings, 2878813 edges, 13667 markings/sec, 180 secs
lola: 2575392 markings, 2956083 edges, 13751 markings/sec, 185 secs
lola: 2643769 markings, 3033574 edges, 13675 markings/sec, 190 secs
lola: 2712890 markings, 3111322 edges, 13824 markings/sec, 195 secs
lola: 2781153 markings, 3188021 edges, 13653 markings/sec, 200 secs
lola: 2848943 markings, 3264176 edges, 13558 markings/sec, 205 secs
lola: 2916911 markings, 3340563 edges, 13594 markings/sec, 210 secs
lola: 2984870 markings, 3416955 edges, 13592 markings/sec, 215 secs
lola: local time limit reached - aborting
lola: Child process aborted or communication problem between parent and child process
terminate called after throwing an instance of 'std::runtime_error'
what(): parse error at position 1: unexpected character, last read: '!'
Aborted (core dumped)
FORMULA DLCshifumi-PT-4b-CTLFireability-0 CANNOT_COMPUTE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION STUBBORN_SETS TOPOLOGICAL USE_NUPN
FORMULA DLCshifumi-PT-4b-CTLFireability-1 CANNOT_COMPUTE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION STUBBORN_SETS TOPOLOGICAL USE_NUPN
FORMULA DLCshifumi-PT-4b-CTLFireability-2 CANNOT_COMPUTE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION STUBBORN_SETS TOPOLOGICAL USE_NUPN
FORMULA DLCshifumi-PT-4b-CTLFireability-3 CANNOT_COMPUTE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION STUBBORN_SETS TOPOLOGICAL USE_NUPN
FORMULA DLCshifumi-PT-4b-CTLFireability-4 CANNOT_COMPUTE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION STUBBORN_SETS TOPOLOGICAL USE_NUPN
FORMULA DLCshifumi-PT-4b-CTLFireability-5 CANNOT_COMPUTE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION STUBBORN_SETS TOPOLOGICAL USE_NUPN
FORMULA DLCshifumi-PT-4b-CTLFireability-6 CANNOT_COMPUTE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION STUBBORN_SETS TOPOLOGICAL USE_NUPN
FORMULA DLCshifumi-PT-4b-CTLFireability-7 CANNOT_COMPUTE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION STUBBORN_SETS TOPOLOGICAL USE_NUPN
FORMULA DLCshifumi-PT-4b-CTLFireability-8 CANNOT_COMPUTE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION STUBBORN_SETS TOPOLOGICAL USE_NUPN
FORMULA DLCshifumi-PT-4b-CTLFireability-9 CANNOT_COMPUTE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION STUBBORN_SETS TOPOLOGICAL USE_NUPN
FORMULA DLCshifumi-PT-4b-CTLFireability-10 CANNOT_COMPUTE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION STUBBORN_SETS TOPOLOGICAL USE_NUPN
FORMULA DLCshifumi-PT-4b-CTLFireability-11 CANNOT_COMPUTE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION STUBBORN_SETS TOPOLOGICAL USE_NUPN
FORMULA DLCshifumi-PT-4b-CTLFireability-12 CANNOT_COMPUTE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION STUBBORN_SETS TOPOLOGICAL USE_NUPN
FORMULA DLCshifumi-PT-4b-CTLFireability-13 CANNOT_COMPUTE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION STUBBORN_SETS TOPOLOGICAL USE_NUPN
FORMULA DLCshifumi-PT-4b-CTLFireability-14 CANNOT_COMPUTE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION STUBBORN_SETS TOPOLOGICAL USE_NUPN
FORMULA DLCshifumi-PT-4b-CTLFireability-15 CANNOT_COMPUTE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION STUBBORN_SETS TOPOLOGICAL USE_NUPN
----- Kill lola and sara stdout -----
----- Kill lola and sara stderr -----
----- Finished stdout -----
----- Finished stderr -----

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="DLCshifumi-PT-4b"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="irma4mcc-structural"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

tar xzf /home/mcc/BenchKit/INPUTS/DLCshifumi-PT-4b.tgz
mv DLCshifumi-PT-4b execution
cd execution
pwd
ls -lh

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3637"
echo " Executing tool irma4mcc-structural"
echo " Input is DLCshifumi-PT-4b, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r067-smll-152649739700193"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;