Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Waiting for the VM to be ready (probing ssh)
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/home/mcc/execution
total 1.1M
-rw-r--r-- 1 mcc users 4.0K May 15 18:54 CTLCardinality.txt
-rw-r--r-- 1 mcc users 23K May 15 18:54 CTLCardinality.xml
-rw-r--r-- 1 mcc users 2.3K May 15 18:54 CTLFireability.txt
-rw-r--r-- 1 mcc users 15K May 15 18:54 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K May 15 18:50 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 5.9K May 15 18:50 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 2.5K May 15 18:54 LTLCardinality.txt
-rw-r--r-- 1 mcc users 12K May 15 18:54 LTLCardinality.xml
-rw-r--r-- 1 mcc users 1.9K May 15 18:54 LTLFireability.txt
-rw-r--r-- 1 mcc users 9.5K May 15 18:54 LTLFireability.xml
-rw-r--r-- 1 mcc users 3.8K May 15 18:54 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 21K May 15 18:54 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 106 May 15 18:54 ReachabilityDeadlock.txt
-rw-r--r-- 1 mcc users 344 May 15 18:54 ReachabilityDeadlock.xml
-rw-r--r-- 1 mcc users 2.6K May 15 18:54 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 15K May 15 18:54 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K May 15 18:54 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.6K May 15 18:54 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 15 18:50 equiv_col
-rw-r--r-- 1 mcc users 4 May 15 18:50 instance
-rw-r--r-- 1 mcc users 6 May 15 18:50 iscolored
-rw-r--r-- 1 mcc users 871K May 15 18:50 model.pnml
=====================================================================
Generated by BenchKit 2-3637
Executing tool irma4mcc-structural
Input is DLCround-PT-12a, examination is ReachabilityDeadlock
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r067-smll-152649739700132
=====================================================================

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME DLCround-PT-12a-ReachabilityDeadlock-0

=== Now, execution of the tool begins

BK_START 1526644526683


BK_STOP 1526644540784

--------------------
content from stderr:

Prefix is 75f5f979.
Reading known information in /usr/share/mcc4mcc/75f5f979-known.json.
Reading learned information in /usr/share/mcc4mcc/75f5f979-learned.json.
Reading value translations in /usr/share/mcc4mcc/75f5f979-values.json.
Using directory /home/mcc/execution for input, as it contains a model.pnml file.
Using DLCround-PT-12a as instance name.
Using DLCround as model name.
Using algorithm or tool decision-tree.
Model characteristics are: {'Examination': 'ReachabilityDeadlock', 'Place/Transition': True, 'Colored': False, 'Relative-Time': 1, 'Relative-Memory': 1, 'Ordinary': True, 'Simple Free Choice': False, 'Extended Free Choice': False, 'State Machine': False, 'Marked Graph': False, 'Connected': True, 'Strongly Connected': False, 'Source Place': True, 'Sink Place': False, 'Source Transition': False, 'Sink Transition': False, 'Loop Free': None, 'Conservative': False, 'Sub-Conservative': False, 'Nested Units': True, 'Safe': True, 'Deadlock': None, 'Reversible': None, 'Quasi Live': None, 'Live': None}.
Known tools are: [{'Time': 7718, 'Memory': 449.09, 'Tool': 'itstools'}].
Learned tools are: [{'Tool': 'lola'}].
ReachabilityDeadlock itstools DLCround-PT-12a...
May 18, 2018 11:55:35 AM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-z3path, /usr/bin/z3, -yices2path, /usr/bin/yices, -ltsminpath, /usr/bin, -smt, -its, -pnfolder, /mcc-data, -examination, ReachabilityDeadlock]
May 18, 2018 11:55:35 AM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /mcc-data/model.pnml
May 18, 2018 11:55:35 AM fr.lip6.move.gal.nupn.PTNetReader loadFromXML
INFO: Load time of PNML (sax parser for PT used): 237 ms
May 18, 2018 11:55:35 AM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 419 places.
May 18, 2018 11:55:36 AM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 3407 transitions.
May 18, 2018 11:55:36 AM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Found NUPN structural information;
May 18, 2018 11:55:36 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /mcc-data/model.pnml.img.gal : 128 ms
May 18, 2018 11:55:37 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 766 ms
Flatten gal took : 773 ms
May 18, 2018 11:55:37 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /mcc-data/model.pnml.simple.gal : 13 ms
May 18, 2018 11:55:37 AM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 3407 transitions.
Constant places removed 1 places and 1 transitions.
Reduce isomorphic transitions removed 315 transitions.
Performed 4 Post agglomeration using F-continuation condition.
Iterating post reduction 0 with 320 rules applied. Total rules applied 320 place count 418 transition count 3087
Constant places removed 264 places and 0 transitions.
Reduce isomorphic transitions removed 2749 transitions.
Performed 30 Post agglomeration using F-continuation condition.
Iterating post reduction 1 with 3043 rules applied. Total rules applied 3363 place count 154 transition count 308
Constant places removed 30 places and 0 transitions.
Reduce isomorphic transitions removed 17 transitions.
Iterating post reduction 2 with 47 rules applied. Total rules applied 3410 place count 124 transition count 291
Performed 17 Post agglomeration using F-continuation condition.
Constant places removed 17 places and 0 transitions.
Reduce isomorphic transitions removed 13 transitions.
Iterating post reduction 3 with 30 rules applied. Total rules applied 3440 place count 107 transition count 261
Performed 13 Post agglomeration using F-continuation condition.
Constant places removed 13 places and 0 transitions.
Reduce isomorphic transitions removed 13 transitions.
Iterating post reduction 4 with 26 rules applied. Total rules applied 3466 place count 94 transition count 261
Applied a total of 3466 rules in 89 ms. Remains 94 /419 variables (removed 325) and now considering 261/3407 (removed 3146) transitions.
Normalized transition count is 168
// Phase 1: matrix 168 rows 94 cols
FORMULA DLCround-PT-12a-ReachabilityDeadlock-0 FALSE TECHNIQUES TOPOLOGICAL SAT_SMT STRUCTURAL_REDUCTION

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="DLCround-PT-12a"
export BK_EXAMINATION="ReachabilityDeadlock"
export BK_TOOL="irma4mcc-structural"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

tar xzf /home/mcc/BenchKit/INPUTS/DLCround-PT-12a.tgz
mv DLCround-PT-12a execution
cd execution
pwd
ls -lh

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3637"
echo " Executing tool irma4mcc-structural"
echo " Input is DLCround-PT-12a, examination is ReachabilityDeadlock"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r067-smll-152649739700132"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityDeadlock" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityDeadlock" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityDeadlock.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityDeadlock.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityDeadlock.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' ReachabilityDeadlock.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;