fond
Model Checking Contest 2018
8th edition, Bratislava, Slovakia, June 26, 2018
Execution of r057-smll-152646384700125
Last Updated
June 26, 2018

About the Execution of ITS-Tools.L for CloudReconfiguration-PT-318

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
15752.450 9958.00 23866.00 452.00 T normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Waiting for the VM to be ready (probing ssh)
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/home/mcc/execution
total 828K
-rw-r--r-- 1 mcc users 3.6K May 15 18:54 CTLCardinality.txt
-rw-r--r-- 1 mcc users 20K May 15 18:54 CTLCardinality.xml
-rw-r--r-- 1 mcc users 2.7K May 15 18:54 CTLFireability.txt
-rw-r--r-- 1 mcc users 17K May 15 18:54 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K May 15 18:49 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.0K May 15 18:49 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 2.5K May 15 18:54 LTLCardinality.txt
-rw-r--r-- 1 mcc users 9.6K May 15 18:54 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.0K May 15 18:54 LTLFireability.txt
-rw-r--r-- 1 mcc users 8.9K May 15 18:54 LTLFireability.xml
-rw-r--r-- 1 mcc users 3.8K May 15 18:54 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 18K May 15 18:54 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 118 May 15 18:54 ReachabilityDeadlock.txt
-rw-r--r-- 1 mcc users 356 May 15 18:54 ReachabilityDeadlock.xml
-rw-r--r-- 1 mcc users 2.7K May 15 18:54 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 14K May 15 18:54 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.8K May 15 18:54 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.8K May 15 18:54 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 15 18:49 equiv_col
-rw-r--r-- 1 mcc users 4 May 15 18:49 instance
-rw-r--r-- 1 mcc users 6 May 15 18:49 iscolored
-rw-r--r-- 1 mcc users 661K May 15 18:49 model.pnml
=====================================================================
Generated by BenchKit 2-3637
Executing tool itstoolsl
Input is CloudReconfiguration-PT-318, examination is ReachabilityDeadlock
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r057-smll-152646384700125
=====================================================================


--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME CloudReconfiguration-PT-318-ReachabilityDeadlock-0

=== Now, execution of the tool begins

BK_START 1527285237550

Flatten gal took : 544 ms
Constant places removed 1 places and 1 transitions.
Performed 1930 Post agglomeration using F-continuation condition.
Iterating post reduction 0 with 1931 rules applied. Total rules applied 1931 place count 2586 transition count 1168
Constant places removed 1931 places and 1 transitions.
Reduce isomorphic transitions removed 92 transitions.
Performed 57 Post agglomeration using F-continuation condition.
Iterating post reduction 1 with 2080 rules applied. Total rules applied 4011 place count 655 transition count 1018
Constant places removed 57 places and 0 transitions.
Reduce isomorphic transitions removed 15 transitions.
Performed 12 Post agglomeration using F-continuation condition.
Iterating post reduction 2 with 84 rules applied. Total rules applied 4095 place count 598 transition count 991
Constant places removed 12 places and 0 transitions.
Reduce isomorphic transitions removed 9 transitions.
Performed 9 Post agglomeration using F-continuation condition.
Iterating post reduction 3 with 30 rules applied. Total rules applied 4125 place count 586 transition count 973
Constant places removed 9 places and 0 transitions.
Reduce isomorphic transitions removed 9 transitions.
Performed 18 Post agglomeration using F-continuation condition.
Iterating post reduction 4 with 36 rules applied. Total rules applied 4161 place count 577 transition count 946
Constant places removed 18 places and 0 transitions.
Iterating post reduction 5 with 18 rules applied. Total rules applied 4179 place count 559 transition count 946
Performed 34 Pre agglomeration using Quasi-Persistent + HF-interchangeable + Divergent Free condition.
Pre-agglomeration after 6 with 34 Pre rules applied. Total rules applied 4179 place count 559 transition count 912
Constant places removed 34 places and 0 transitions.
Iterating post reduction 6 with 34 rules applied. Total rules applied 4213 place count 525 transition count 912
Symmetric choice reduction at 7 with 79 rule applications. Total rules 4292 place count 525 transition count 912
Constant places removed 79 places and 91 transitions.
Reduce isomorphic transitions removed 18 transitions.
Performed 21 Post agglomeration using F-continuation condition.
Iterating post reduction 7 with 118 rules applied. Total rules applied 4410 place count 446 transition count 782
Constant places removed 21 places and 0 transitions.
Reduce isomorphic transitions removed 6 transitions.
Performed 6 Post agglomeration using F-continuation condition.
Iterating post reduction 8 with 33 rules applied. Total rules applied 4443 place count 425 transition count 770
Constant places removed 6 places and 0 transitions.
Iterating post reduction 9 with 6 rules applied. Total rules applied 4449 place count 419 transition count 770
Performed 5 Pre agglomeration using Quasi-Persistent + HF-interchangeable + Divergent Free condition.
Pre-agglomeration after 10 with 5 Pre rules applied. Total rules applied 4449 place count 419 transition count 765
Constant places removed 5 places and 0 transitions.
Iterating post reduction 10 with 5 rules applied. Total rules applied 4454 place count 414 transition count 765
Symmetric choice reduction at 11 with 15 rule applications. Total rules 4469 place count 414 transition count 765
Constant places removed 15 places and 27 transitions.
Reduce isomorphic transitions removed 3 transitions.
Iterating post reduction 11 with 18 rules applied. Total rules applied 4487 place count 399 transition count 735
Symmetric choice reduction at 12 with 9 rule applications. Total rules 4496 place count 399 transition count 735
Constant places removed 9 places and 18 transitions.
Iterating post reduction 12 with 9 rules applied. Total rules applied 4505 place count 390 transition count 717
Symmetric choice reduction at 13 with 3 rule applications. Total rules 4508 place count 390 transition count 717
Constant places removed 3 places and 6 transitions.
Iterating post reduction 13 with 3 rules applied. Total rules applied 4511 place count 387 transition count 711
Performed 170 Post agglomeration using F-continuation condition.
Constant places removed 170 places and 0 transitions.
Reduce isomorphic transitions removed 15 transitions.
Iterating post reduction 14 with 185 rules applied. Total rules applied 4696 place count 217 transition count 451
Performed 18 Post agglomeration using F-continuation condition.
Constant places removed 18 places and 0 transitions.
Reduce isomorphic transitions removed 6 transitions.
Iterating post reduction 15 with 24 rules applied. Total rules applied 4720 place count 199 transition count 427
Performed 3 Post agglomeration using F-continuation condition.
Constant places removed 3 places and 0 transitions.
Reduce isomorphic transitions removed 6 transitions.
Iterating post reduction 16 with 9 rules applied. Total rules applied 4729 place count 196 transition count 418
Performed 27 Post agglomeration using F-continuation condition.
Constant places removed 27 places and 0 transitions.
Reduce isomorphic transitions removed 42 transitions.
Iterating post reduction 17 with 69 rules applied. Total rules applied 4798 place count 169 transition count 865
Symmetric choice reduction at 18 with 3 rule applications. Total rules 4801 place count 169 transition count 865
Constant places removed 3 places and 30 transitions.
Iterating post reduction 18 with 3 rules applied. Total rules applied 4804 place count 166 transition count 835
Applied a total of 4804 rules in 1498 ms. Remains 166 /2587 variables (removed 2421) and now considering 835/3099 (removed 2264) transitions.
Normalized transition count is 688
// Phase 1: matrix 688 rows 166 cols
Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
Normalized transition count is 688
// Phase 1: matrix 688 rows 166 cols
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805241334/bin/its-ctl-linux64, --gc-threshold, 2000000, --quiet, -i, /home/mcc/execution/ReachabilityDeadlock.pnml.gal, -t, CGAL, -ctl, DEADLOCK], workingDir=/home/mcc/execution]

its-ctl command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805241334/bin/its-ctl-linux64 --gc-threshold 2000000 --quiet -i /home/mcc/execution/ReachabilityDeadlock.pnml.gal -t CGAL -ctl DEADLOCK
No direction supplied, using forward translation only.
built 2 ordering constraints for composite.
built 579 ordering constraints for composite.
built 579 ordering constraints for composite.
built 387 ordering constraints for composite.
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
reachable,5.24167e+06,0.697159,14852,165,681,3778,11559,1076,7979,349,69007,0


Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
dead,163636,0.808187,15288,86,670,3778,17757,3333,8004,1479,69007,1291

System contains 163636 deadlocks (shown below if less than --print-limit option) !
FORMULA CloudReconfiguration-PT-318-ReachabilityDeadlock-0 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
[ 163636 states ] showing 10 first states
[ u8={[ p2574=1 ]
} i0={[ u2={[ p13=1 ]
[ p18=1 ]
[ p24=1 ]
[ p30=1 ]
} i1={[ u7={[ p1993=1 ]
[ p1983=1 ]
[ p2030=1 ]
[ p1974=1 ]
[ p2032=1 ]
[ p2063=1 ]
[ p2571=1 ]
[ p2122=1 ]
[ p2096=1 ]
[ p2196=1 ]
} i0={[ u6={[ p1252=1 ]
[ p1253=1 ]
[ p1261=1 ]
[ p1262=1 ]
[ p1278=1 ]
[ p1279=1 ]
[ p1908=1 ]
[ p1400=1 ]
[ p1459=1 ]
[ p1433=1 ]
} u5={[ p589=1 ]
[ p590=1 ]
[ p598=1 ]
[ p599=1 ]
[ p615=1 ]
[ p616=1 ]
[ p667=1 ]
[ p657=1 ]
[ p704=1 ]
[ p648=1 ]
} ]
} ]
} ]
} ]
ITS tools runner thread asked to quit. Dying gracefully.
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O3, model.c], workingDir=/home/mcc/execution]
WARNING : LTS min runner thread was asked to interrupt. Dying gracefully.

BK_STOP 1527285247508

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution ReachabilityDeadlock -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -louvain -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -consoleLog -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination ReachabilityDeadlock -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -louvain -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
May 25, 2018 9:53:59 PM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, ReachabilityDeadlock, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -louvain, -smt]
May 25, 2018 9:53:59 PM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
May 25, 2018 9:54:00 PM fr.lip6.move.gal.nupn.PTNetReader loadFromXML
INFO: Load time of PNML (sax parser for PT used): 275 ms
May 25, 2018 9:54:00 PM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 2587 places.
May 25, 2018 9:54:00 PM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 3099 transitions.
May 25, 2018 9:54:00 PM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Found NUPN structural information;
May 25, 2018 9:54:00 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.img.gal : 62 ms
May 25, 2018 9:54:01 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 538 ms
May 25, 2018 9:54:01 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.simple.gal : 29 ms
May 25, 2018 9:54:01 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 3099 transitions.
May 25, 2018 9:54:03 PM fr.lip6.move.gal.application.MccTranslator applyOrder
INFO: Applying decomposition
May 25, 2018 9:54:03 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 835 transitions.
May 25, 2018 9:54:03 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 212 ms
May 25, 2018 9:54:04 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 154 ms
May 25, 2018 9:54:04 PM fr.lip6.move.gal.instantiate.CompositeBuilder decomposeWithOrder
INFO: Decomposing Gal with order
May 25, 2018 9:54:04 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 107 ms
May 25, 2018 9:54:04 PM fr.lip6.move.gal.instantiate.CompositeBuilder rewriteArraysToAllowPartition
INFO: Rewriting arrays to variables to allow decomposition.
May 25, 2018 9:54:04 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 0 place invariants in 18 ms
May 25, 2018 9:54:05 PM fr.lip6.move.gal.instantiate.Instantiator fuseIsomorphicEffects
INFO: Removed a total of 985 redundant transitions.
May 25, 2018 9:54:05 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/ReachabilityDeadlock.pnml.gal : 22 ms
May 25, 2018 9:54:05 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 166 variables to be positive in 1361 ms
May 25, 2018 9:54:05 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may disable matrix : 835 transitions.
May 25, 2018 9:54:05 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of disable matrix completed :0/835 took 2 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 25, 2018 9:54:05 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete disable matrix. took 140 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 25, 2018 9:54:05 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may enable matrix : 835 transitions.
May 25, 2018 9:54:05 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete enable matrix. took 40 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 25, 2018 9:54:05 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeCoEnablingMatrix
INFO: Computing symmetric co enabling matrix : 835 transitions.
Skipping mayMatrices nes/nds SMT solver raised an exception or timeout.
java.lang.RuntimeException: SMT solver raised an exception or timeout.
at fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver.computeCoEnablingMatrix(NecessaryEnablingsolver.java:480)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.printLabels(Gal2PinsTransformerNext.java:530)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.printDependencyMatrix(Gal2PinsTransformerNext.java:209)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.buildBodyFile(Gal2PinsTransformerNext.java:85)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.transform(Gal2PinsTransformerNext.java:830)
at fr.lip6.move.gal.application.LTSminRunner$1.run(LTSminRunner.java:71)
at java.lang.Thread.run(Thread.java:748)
May 25, 2018 9:54:06 PM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 2495ms conformant to PINS in folder :/home/mcc/execution

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="CloudReconfiguration-PT-318"
export BK_EXAMINATION="ReachabilityDeadlock"
export BK_TOOL="itstoolsl"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

tar xzf /home/mcc/BenchKit/INPUTS/CloudReconfiguration-PT-318.tgz
mv CloudReconfiguration-PT-318 execution
cd execution
pwd
ls -lh

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3637"
echo " Executing tool itstoolsl"
echo " Input is CloudReconfiguration-PT-318, examination is ReachabilityDeadlock"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r057-smll-152646384700125"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityDeadlock" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityDeadlock" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityDeadlock.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityDeadlock.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityDeadlock.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' ReachabilityDeadlock.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;