fond
Model Checking Contest 2018
8th edition, Bratislava, Slovakia, June 26, 2018
Execution of r057-smll-152646384500006
Last Updated
June 26, 2018

About the Execution of ITS-Tools.L for CloudReconfiguration-PT-301

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
15775.790 9919.00 23606.00 455.60 T normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Waiting for the VM to be ready (probing ssh)
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/home/mcc/execution
total 824K
-rw-r--r-- 1 mcc users 4.0K May 15 18:54 CTLCardinality.txt
-rw-r--r-- 1 mcc users 22K May 15 18:54 CTLCardinality.xml
-rw-r--r-- 1 mcc users 3.0K May 15 18:54 CTLFireability.txt
-rw-r--r-- 1 mcc users 20K May 15 18:54 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K May 15 18:49 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.0K May 15 18:49 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 2.5K May 15 18:54 LTLCardinality.txt
-rw-r--r-- 1 mcc users 11K May 15 18:54 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.1K May 15 18:54 LTLFireability.txt
-rw-r--r-- 1 mcc users 10K May 15 18:54 LTLFireability.xml
-rw-r--r-- 1 mcc users 3.4K May 15 18:54 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 16K May 15 18:54 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 118 May 15 18:54 ReachabilityDeadlock.txt
-rw-r--r-- 1 mcc users 356 May 15 18:54 ReachabilityDeadlock.xml
-rw-r--r-- 1 mcc users 2.6K May 15 18:54 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 13K May 15 18:54 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.8K May 15 18:54 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.8K May 15 18:54 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 15 18:49 equiv_col
-rw-r--r-- 1 mcc users 4 May 15 18:49 instance
-rw-r--r-- 1 mcc users 6 May 15 18:49 iscolored
-rw-r--r-- 1 mcc users 660K May 15 18:49 model.pnml
=====================================================================
Generated by BenchKit 2-3637
Executing tool itstoolsl
Input is CloudReconfiguration-PT-301, examination is ReachabilityDeadlock
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r057-smll-152646384500006
=====================================================================


--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME CloudReconfiguration-PT-301-ReachabilityDeadlock-0

=== Now, execution of the tool begins

BK_START 1527227846474

Flatten gal took : 567 ms
Constant places removed 1 places and 1 transitions.
Performed 1935 Post agglomeration using F-continuation condition.
Iterating post reduction 0 with 1936 rules applied. Total rules applied 1936 place count 2583 transition count 1158
Constant places removed 1936 places and 1 transitions.
Reduce isomorphic transitions removed 92 transitions.
Performed 57 Post agglomeration using F-continuation condition.
Iterating post reduction 1 with 2085 rules applied. Total rules applied 4021 place count 647 transition count 1008
Constant places removed 57 places and 0 transitions.
Reduce isomorphic transitions removed 15 transitions.
Performed 12 Post agglomeration using F-continuation condition.
Iterating post reduction 2 with 84 rules applied. Total rules applied 4105 place count 590 transition count 981
Constant places removed 12 places and 0 transitions.
Reduce isomorphic transitions removed 9 transitions.
Performed 9 Post agglomeration using F-continuation condition.
Iterating post reduction 3 with 30 rules applied. Total rules applied 4135 place count 578 transition count 963
Constant places removed 9 places and 0 transitions.
Reduce isomorphic transitions removed 9 transitions.
Performed 18 Post agglomeration using F-continuation condition.
Iterating post reduction 4 with 36 rules applied. Total rules applied 4171 place count 569 transition count 936
Constant places removed 18 places and 0 transitions.
Iterating post reduction 5 with 18 rules applied. Total rules applied 4189 place count 551 transition count 936
Performed 34 Pre agglomeration using Quasi-Persistent + HF-interchangeable + Divergent Free condition.
Pre-agglomeration after 6 with 34 Pre rules applied. Total rules applied 4189 place count 551 transition count 902
Constant places removed 34 places and 0 transitions.
Iterating post reduction 6 with 34 rules applied. Total rules applied 4223 place count 517 transition count 902
Symmetric choice reduction at 7 with 74 rule applications. Total rules 4297 place count 517 transition count 902
Constant places removed 74 places and 86 transitions.
Reduce isomorphic transitions removed 18 transitions.
Performed 21 Post agglomeration using F-continuation condition.
Iterating post reduction 7 with 113 rules applied. Total rules applied 4410 place count 443 transition count 777
Constant places removed 21 places and 0 transitions.
Reduce isomorphic transitions removed 6 transitions.
Performed 6 Post agglomeration using F-continuation condition.
Iterating post reduction 8 with 33 rules applied. Total rules applied 4443 place count 422 transition count 765
Constant places removed 6 places and 0 transitions.
Iterating post reduction 9 with 6 rules applied. Total rules applied 4449 place count 416 transition count 765
Symmetric choice reduction at 10 with 15 rule applications. Total rules 4464 place count 416 transition count 765
Constant places removed 15 places and 27 transitions.
Reduce isomorphic transitions removed 3 transitions.
Iterating post reduction 10 with 18 rules applied. Total rules applied 4482 place count 401 transition count 735
Symmetric choice reduction at 11 with 9 rule applications. Total rules 4491 place count 401 transition count 735
Constant places removed 9 places and 18 transitions.
Iterating post reduction 11 with 9 rules applied. Total rules applied 4500 place count 392 transition count 717
Symmetric choice reduction at 12 with 3 rule applications. Total rules 4503 place count 392 transition count 717
Constant places removed 3 places and 6 transitions.
Iterating post reduction 12 with 3 rules applied. Total rules applied 4506 place count 389 transition count 711
Performed 175 Post agglomeration using F-continuation condition.
Constant places removed 175 places and 0 transitions.
Reduce isomorphic transitions removed 15 transitions.
Iterating post reduction 13 with 190 rules applied. Total rules applied 4696 place count 214 transition count 446
Performed 18 Post agglomeration using F-continuation condition.
Constant places removed 18 places and 0 transitions.
Reduce isomorphic transitions removed 6 transitions.
Iterating post reduction 14 with 24 rules applied. Total rules applied 4720 place count 196 transition count 422
Performed 3 Post agglomeration using F-continuation condition.
Constant places removed 3 places and 0 transitions.
Reduce isomorphic transitions removed 6 transitions.
Iterating post reduction 15 with 9 rules applied. Total rules applied 4729 place count 193 transition count 413
Performed 27 Post agglomeration using F-continuation condition.
Constant places removed 27 places and 0 transitions.
Reduce isomorphic transitions removed 42 transitions.
Iterating post reduction 16 with 69 rules applied. Total rules applied 4798 place count 166 transition count 848
Symmetric choice reduction at 17 with 3 rule applications. Total rules 4801 place count 166 transition count 848
Constant places removed 3 places and 30 transitions.
Iterating post reduction 17 with 3 rules applied. Total rules applied 4804 place count 163 transition count 818
Applied a total of 4804 rules in 1162 ms. Remains 163 /2584 variables (removed 2421) and now considering 818/3094 (removed 2276) transitions.
Normalized transition count is 673
// Phase 1: matrix 673 rows 163 cols
Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
Normalized transition count is 673
// Phase 1: matrix 673 rows 163 cols
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805241334/bin/its-ctl-linux64, --gc-threshold, 2000000, --quiet, -i, /home/mcc/execution/ReachabilityDeadlock.pnml.gal, -t, CGAL, -ctl, DEADLOCK], workingDir=/home/mcc/execution]

its-ctl command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805241334/bin/its-ctl-linux64 --gc-threshold 2000000 --quiet -i /home/mcc/execution/ReachabilityDeadlock.pnml.gal -t CGAL -ctl DEADLOCK
No direction supplied, using forward translation only.
built 2 ordering constraints for composite.
built 562 ordering constraints for composite.
built 562 ordering constraints for composite.
built 375 ordering constraints for composite.
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
reachable,2.37494e+06,0.570416,11624,101,447,1703,5303,997,3381,309,30028,0


Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
dead,75668,0.644072,12248,49,382,1703,10984,3160,3872,1299,35774,748

System contains 75668 deadlocks (shown below if less than --print-limit option) !
FORMULA CloudReconfiguration-PT-301-ReachabilityDeadlock-0 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
[ 75668 states ] showing 10 first states
[ u8={[ ]
} i0={[ u2={[ ]
} i1={[ u7={[ ]
} i0={[ u6={[ ]
} u5={[ ]
} ]
} ]
} ]
} ]
[ u8={[ p2573=1 ]
} i0={[ u2={[ p18=1 ]
[ p24=1 ]
[ p30=1 ]
} i1={[ u7={[ p1993=1 ]
[ p1983=1 ]
[ p2030=1 ]
[ p1974=1 ]
[ p2032=1 ]
} i0={[ u6={[ p1253=1 ]
[ p1252=1 ]
[ p1261=1 ]
[ p1262=1 ]
[ p1278=1 ]
[ p1279=1 ]
[ p1400=1 ]
[ p1908=1 ]
[ p1459=1 ]
} u5={[ p590=1 ]
[ p589=1 ]
[ p598=1 ]
[ p599=1 ]
[ p615=1 ]
[ p616=1 ]
[ p737=1 ]
[ p1245=1 ]
[ p796=1 ]
} ]
} ]
} ]
} ]
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O3, model.c], workingDir=/home/mcc/execution]
WARNING : LTS min runner thread was asked to interrupt. Dying gracefully.

BK_STOP 1527227856393

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution ReachabilityDeadlock -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -louvain -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -consoleLog -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination ReachabilityDeadlock -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -louvain -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
May 25, 2018 5:57:29 AM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, ReachabilityDeadlock, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -louvain, -smt]
May 25, 2018 5:57:29 AM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
May 25, 2018 5:57:29 AM fr.lip6.move.gal.nupn.PTNetReader loadFromXML
INFO: Load time of PNML (sax parser for PT used): 361 ms
May 25, 2018 5:57:29 AM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 2584 places.
May 25, 2018 5:57:29 AM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 3094 transitions.
May 25, 2018 5:57:29 AM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Found NUPN structural information;
May 25, 2018 5:57:30 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.img.gal : 69 ms
May 25, 2018 5:57:30 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 560 ms
May 25, 2018 5:57:30 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.simple.gal : 18 ms
May 25, 2018 5:57:31 AM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 3094 transitions.
May 25, 2018 5:57:32 AM fr.lip6.move.gal.application.MccTranslator applyOrder
INFO: Applying decomposition
May 25, 2018 5:57:32 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 116 ms
May 25, 2018 5:57:32 AM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 818 transitions.
May 25, 2018 5:57:32 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 112 ms
May 25, 2018 5:57:32 AM fr.lip6.move.gal.instantiate.CompositeBuilder decomposeWithOrder
INFO: Decomposing Gal with order
May 25, 2018 5:57:32 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 102 ms
May 25, 2018 5:57:32 AM fr.lip6.move.gal.instantiate.CompositeBuilder rewriteArraysToAllowPartition
INFO: Rewriting arrays to variables to allow decomposition.
May 25, 2018 5:57:33 AM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 0 place invariants in 46 ms
May 25, 2018 5:57:34 AM fr.lip6.move.gal.instantiate.Instantiator fuseIsomorphicEffects
INFO: Removed a total of 954 redundant transitions.
May 25, 2018 5:57:34 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/ReachabilityDeadlock.pnml.gal : 14 ms
May 25, 2018 5:57:34 AM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 163 variables to be positive in 1162 ms
May 25, 2018 5:57:34 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may disable matrix : 818 transitions.
May 25, 2018 5:57:34 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of disable matrix completed :0/818 took 1 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 25, 2018 5:57:34 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete disable matrix. took 146 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 25, 2018 5:57:34 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may enable matrix : 818 transitions.
May 25, 2018 5:57:34 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete enable matrix. took 41 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 25, 2018 5:57:34 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeCoEnablingMatrix
INFO: Computing symmetric co enabling matrix : 818 transitions.
SMT solver raised 'unknown', retrying with same input.
SMT solver raised 'unknown' twice, overapproximating result to 1.
May 25, 2018 5:57:34 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Finished co-enabling matrix. took 190 ms. Total solver calls (SAT/UNSAT): 7(7/0)
Skipping mayMatrices nes/nds SMT solver raised an error on invariants :(error "Failed to assert expression: java.io.IOException: Stream closed (invariants (select s 2))")
java.lang.RuntimeException: SMT solver raised an error on invariants :(error "Failed to assert expression: java.io.IOException: Stream closed (invariants (select s 2))")
at fr.lip6.move.gal.gal2smt.bmc.KInductionSolver.addKnownInvariants(KInductionSolver.java:456)
at fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver.computeDoNotAccord(NecessaryEnablingsolver.java:572)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.printLabels(Gal2PinsTransformerNext.java:538)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.printDependencyMatrix(Gal2PinsTransformerNext.java:209)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.buildBodyFile(Gal2PinsTransformerNext.java:85)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.transform(Gal2PinsTransformerNext.java:830)
at fr.lip6.move.gal.application.LTSminRunner$1.run(LTSminRunner.java:71)
at java.lang.Thread.run(Thread.java:748)
May 25, 2018 5:57:35 AM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 2475ms conformant to PINS in folder :/home/mcc/execution

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="CloudReconfiguration-PT-301"
export BK_EXAMINATION="ReachabilityDeadlock"
export BK_TOOL="itstoolsl"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

tar xzf /home/mcc/BenchKit/INPUTS/CloudReconfiguration-PT-301.tgz
mv CloudReconfiguration-PT-301 execution
cd execution
pwd
ls -lh

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3637"
echo " Executing tool itstoolsl"
echo " Input is CloudReconfiguration-PT-301, examination is ReachabilityDeadlock"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r057-smll-152646384500006"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityDeadlock" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityDeadlock" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityDeadlock.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityDeadlock.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityDeadlock.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' ReachabilityDeadlock.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;