Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Waiting for the VM to be ready (probing ssh)
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/home/mcc/execution
total 21M
-rw-r--r-- 1 mcc users 3.1K May 15 18:54 CTLCardinality.txt
-rw-r--r-- 1 mcc users 16K May 15 18:54 CTLCardinality.xml
-rw-r--r-- 1 mcc users 2.6K May 15 18:54 CTLFireability.txt
-rw-r--r-- 1 mcc users 16K May 15 18:54 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K May 15 18:49 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.3K May 15 18:49 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 2.4K May 15 18:54 LTLCardinality.txt
-rw-r--r-- 1 mcc users 9.8K May 15 18:54 LTLCardinality.xml
-rw-r--r-- 1 mcc users 1.9K May 15 18:54 LTLFireability.txt
-rw-r--r-- 1 mcc users 8.2K May 15 18:54 LTLFireability.xml
-rw-r--r-- 1 mcc users 3.8K May 15 18:54 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 19K May 15 18:54 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 112 May 15 18:54 ReachabilityDeadlock.txt
-rw-r--r-- 1 mcc users 350 May 15 18:54 ReachabilityDeadlock.xml
-rw-r--r-- 1 mcc users 2.8K May 15 18:54 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 17K May 15 18:54 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.7K May 15 18:54 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.7K May 15 18:54 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 15 18:49 equiv_col
-rw-r--r-- 1 mcc users 3 May 15 18:49 instance
-rw-r--r-- 1 mcc users 6 May 15 18:49 iscolored
-rw-r--r-- 1 mcc users 20M May 15 18:49 model.pnml
=====================================================================
Generated by BenchKit 2-3637
Executing tool itstoolsl
Input is CloudDeployment-PT-7b, examination is ReachabilityDeadlock
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r045-smll-152646361800272
=====================================================================

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME CloudDeployment-PT-7b-ReachabilityDeadlock-0

=== Now, execution of the tool begins

BK_START 1527414865585

Flatten gal took : 13213 ms
Constant places removed 9 places and 1 transitions.
Performed 1360 Post agglomeration using F-continuation condition.
Iterating post reduction 0 with 1369 rules applied. Total rules applied 1369 place count 2262 transition count 18391
Constant places removed 1361 places and 1 transitions.
Reduce isomorphic transitions removed 21 transitions.
Performed 14 Post agglomeration using F-continuation condition.
Iterating post reduction 1 with 1396 rules applied. Total rules applied 2765 place count 901 transition count 18355
Constant places removed 14 places and 0 transitions.
Iterating post reduction 2 with 14 rules applied. Total rules applied 2779 place count 887 transition count 18355
Performed 14 Pre agglomeration using Quasi-Persistent + HF-interchangeable + Divergent Free condition.
Pre-agglomeration after 3 with 14 Pre rules applied. Total rules applied 2779 place count 887 transition count 18341
Constant places removed 14 places and 0 transitions.
Iterating post reduction 3 with 14 rules applied. Total rules applied 2793 place count 873 transition count 18341
Symmetric choice reduction at 4 with 313 rule applications. Total rules 3106 place count 873 transition count 18341
Constant places removed 313 places and 16682 transitions.
Reduce isomorphic transitions removed 42 transitions.
Iterating post reduction 4 with 355 rules applied. Total rules applied 3461 place count 560 transition count 1617
Symmetric choice reduction at 5 with 4 rule applications. Total rules 3465 place count 560 transition count 1617
Constant places removed 4 places and 4 transitions.
Iterating post reduction 5 with 4 rules applied. Total rules applied 3469 place count 556 transition count 1613
Symmetric choice reduction at 6 with 3 rule applications. Total rules 3472 place count 556 transition count 1613
Constant places removed 3 places and 3 transitions.
Iterating post reduction 6 with 3 rules applied. Total rules applied 3475 place count 553 transition count 1610
Symmetric choice reduction at 7 with 2 rule applications. Total rules 3477 place count 553 transition count 1610
Constant places removed 2 places and 2 transitions.
Iterating post reduction 7 with 2 rules applied. Total rules applied 3479 place count 551 transition count 1608
Symmetric choice reduction at 8 with 1 rule applications. Total rules 3480 place count 551 transition count 1608
Constant places removed 1 places and 1 transitions.
Iterating post reduction 8 with 1 rules applied. Total rules applied 3481 place count 550 transition count 1607
Performed 148 Post agglomeration using F-continuation condition.
Constant places removed 148 places and 0 transitions.
Iterating post reduction 9 with 148 rules applied. Total rules applied 3629 place count 402 transition count 1459
Performed 101 Post agglomeration using F-continuation condition.
Constant places removed 101 places and 0 transitions.
Reduce isomorphic transitions removed 14 transitions.
Iterating post reduction 10 with 115 rules applied. Total rules applied 3744 place count 301 transition count 4136
Performed 11 Post agglomeration using F-continuation condition.
Constant places removed 11 places and 0 transitions.
Reduce isomorphic transitions removed 1 transitions.
Iterating post reduction 11 with 12 rules applied. Total rules applied 3756 place count 290 transition count 5899
Applied a total of 3756 rules in 46484 ms. Remains 290 /2271 variables (removed 1981) and now considering 5899/19752 (removed 13853) transitions.
Normalized transition count is 5480
// Phase 1: matrix 5480 rows 290 cols
Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O3, model.c], workingDir=/home/mcc/execution]
Compilation finished in 207600 ms.
Running link step : CommandLine [args=[gcc, -shared, -o, gal.so, model.o], workingDir=/home/mcc/execution]
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805241334/bin/its-ctl-linux64, --gc-threshold, 2000000, --quiet, -i, /home/mcc/execution/ReachabilityDeadlock.pnml.gal, -t, CGAL, -ctl, DEADLOCK], workingDir=/home/mcc/execution]

its-ctl command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805241334/bin/its-ctl-linux64 --gc-threshold 2000000 --quiet -i /home/mcc/execution/ReachabilityDeadlock.pnml.gal -t CGAL -ctl DEADLOCK
Link finished in 196 ms.
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -d], workingDir=/home/mcc/execution]
No direction supplied, using forward translation only.
built 2 ordering constraints for composite.
built 5527 ordering constraints for composite.
built 5526 ordering constraints for composite.
built 5077 ordering constraints for composite.
built 4618 ordering constraints for composite.
built 4150 ordering constraints for composite.
built 3673 ordering constraints for composite.
built 3187 ordering constraints for composite.
built 2692 ordering constraints for composite.
built 2692 ordering constraints for composite.
built 2693 ordering constraints for composite.
built 2693 ordering constraints for composite.
built 2694 ordering constraints for composite.
built 2694 ordering constraints for composite.
built 2695 ordering constraints for composite.
built 2695 ordering constraints for composite.
built 2696 ordering constraints for composite.
built 2696 ordering constraints for composite.
built 2697 ordering constraints for composite.
built 2697 ordering constraints for composite.
built 2697 ordering constraints for composite.
built 2697 ordering constraints for composite.
built 5106 ordering constraints for composite.
built 337 ordering constraints for composite.
built 281 ordering constraints for composite.
built 225 ordering constraints for composite.
built 169 ordering constraints for composite.
built 113 ordering constraints for composite.
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
reachable,9.50059e+21,242.225,300528,221,141,1763,2701,22399,3153,262,8188,0


Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
dead,4.74872e+16,245.622,300528,695,220,11020,3344,68243,42293,1078,8188,2295

System contains 4.74872e+16 deadlocks (shown below if less than --print-limit option) !
FORMULA CloudDeployment-PT-7b-ReachabilityDeadlock-0 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
[ 47487166595812399 states ] showing 10 first states
[ u56={[ p2268=1 ]
} i0={[ i1={[ u62={[ ]
} u55={[ ]
} i0={[ u54={[ ]
} i0={[ u53={[ ]
} i0={[ u52={[ ]
} i0={[ u51={[ ]
} i0={[ u50={[ ]
} u49={[ ]
} ]
} ]
} ]
} ]
} ]
} ]
} i0={[ i1={[ u42={[ p1963=1 ]
} i0={[ u41={[ p1916=1 ]
} u40={[ p1862=1 ]
} ]
} ]
} i0={[ i1={[ u37={[ p1655=1 ]
} i0={[ u36={[ p1608=1 ]
} u35={[ p1554=1 ]
} ]
} ]
} i0={[ i1={[ u32={[ p1347=1 ]
} i0={[ u31={[ p1300=1 ]
} u30={[ p1246=1 ]
} ]
} ]
} i0={[ i1={[ u27={[ p1039=1 ]
} i0={[ u26={[ p992=1 ]
} u25={[ p938=1 ]
} ]
} ]
} i0={[ i1={[ u22={[ p731=1 ]
} i0={[ u21={[ p684=1 ]
} u20={[ p630=1 ]
} ]
} ]
} i0={[ i1={[ u17={[ p423=1 ]
} i0={[ u16={[ p376=1 ]
} u15={[ p322=1 ]
} ]
} ]
} i0={[ u12={[ p121=1 ]
[ p311=1 ]
} i0={[ u11={[ p68=1 ]
} u10={[ p14=1 ]
} ]
} ]
} ]
[ i1={[ u17={[ p429=1 ]
[ p619=1 ]
} i0={[ u16={[ p376=1 ]
} u15={[ p322=1 ]
} ]
} ]
} i0={[ u12={[ p121=1 ]
[ p115=1 ]
[ p311=1 ]
} i0={[ u11={[ p68=1 ]
} u10={[ p14=1 ]
} ]
} ]
} ]
} ]
[ i1={[ u22={[ p737=1 ]
[ p927=1 ]
} i0={[ u21={[ p684=1 ]
} u20={[ p630=1 ]
} ]
} ]
} i0={[ i1={[ u17={[ p429=1 ]
[ p423=1 ]
} i0={[ u16={[ p376=1 ]
} u15={[ p322=1 ]
} ]
} ]
} i0={[ u12={[ p121=1 ]
[ p115=1 ]
} i0={[ u11={[ p68=1 ]
} u10={[ p14=1 ]
} ]
} ]
} ]
} ]
} ]
} ]
} ]
} ]
} ]
} ]
ITS tools runner thread asked to quit. Dying gracefully.
WARNING : LTS min runner thread was asked to interrupt. Dying gracefully.

BK_STOP 1527415397993

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution ReachabilityDeadlock -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -louvain -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -consoleLog -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination ReachabilityDeadlock -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -louvain -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
May 27, 2018 9:54:27 AM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, ReachabilityDeadlock, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -louvain, -smt]
May 27, 2018 9:54:27 AM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
May 27, 2018 9:54:29 AM fr.lip6.move.gal.nupn.PTNetReader loadFromXML
INFO: Load time of PNML (sax parser for PT used): 1444 ms
May 27, 2018 9:54:29 AM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 2271 places.
May 27, 2018 9:54:31 AM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 19752 transitions.
May 27, 2018 9:54:31 AM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Found NUPN structural information;
May 27, 2018 9:54:45 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 13206 ms
May 27, 2018 9:54:45 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.simple.gal : 467 ms
May 27, 2018 9:54:51 AM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 19752 transitions.
May 27, 2018 9:55:39 AM fr.lip6.move.gal.application.MccTranslator applyOrder
INFO: Applying decomposition
May 27, 2018 9:55:41 AM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 5899 transitions.
May 27, 2018 9:55:41 AM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Too many transitions (5899) to apply POR reductions. Disabling POR matrices.
May 27, 2018 9:55:43 AM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 3541ms conformant to PINS in folder :/home/mcc/execution
May 27, 2018 9:55:43 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 4059 ms
May 27, 2018 9:55:46 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 3004 ms
May 27, 2018 9:55:47 AM fr.lip6.move.gal.instantiate.CompositeBuilder decomposeWithOrder
INFO: Decomposing Gal with order
May 27, 2018 9:55:50 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 3044 ms
May 27, 2018 9:55:50 AM fr.lip6.move.gal.instantiate.CompositeBuilder rewriteArraysToAllowPartition
INFO: Rewriting arrays to variables to allow decomposition.
May 27, 2018 9:59:10 AM fr.lip6.move.gal.instantiate.Instantiator fuseIsomorphicEffects
INFO: Removed a total of 64318 redundant transitions.
May 27, 2018 9:59:10 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/ReachabilityDeadlock.pnml.gal : 435 ms

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="CloudDeployment-PT-7b"
export BK_EXAMINATION="ReachabilityDeadlock"
export BK_TOOL="itstoolsl"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

tar xzf /home/mcc/BenchKit/INPUTS/CloudDeployment-PT-7b.tgz
mv CloudDeployment-PT-7b execution
cd execution
pwd
ls -lh

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3637"
echo " Executing tool itstoolsl"
echo " Input is CloudDeployment-PT-7b, examination is ReachabilityDeadlock"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r045-smll-152646361800272"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityDeadlock" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityDeadlock" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityDeadlock.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityDeadlock.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityDeadlock.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' ReachabilityDeadlock.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;