Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Waiting for the VM to be ready (probing ssh)
.....................
/home/mcc/execution
total 1.7M
-rw-r--r-- 1 mcc users 82K May 15 18:54 CTLCardinality.txt
-rw-r--r-- 1 mcc users 201K May 15 18:54 CTLCardinality.xml
-rw-r--r-- 1 mcc users 55K May 15 18:54 CTLFireability.txt
-rw-r--r-- 1 mcc users 148K May 15 18:54 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K May 15 18:49 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.1K May 15 18:49 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 29K May 15 18:54 LTLCardinality.txt
-rw-r--r-- 1 mcc users 73K May 15 18:54 LTLCardinality.xml
-rw-r--r-- 1 mcc users 21K May 15 18:54 LTLFireability.txt
-rw-r--r-- 1 mcc users 52K May 15 18:54 LTLFireability.xml
-rw-r--r-- 1 mcc users 44K May 15 18:54 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 110K May 15 18:54 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 102 May 15 18:54 ReachabilityDeadlock.txt
-rw-r--r-- 1 mcc users 340 May 15 18:54 ReachabilityDeadlock.xml
-rw-r--r-- 1 mcc users 64K May 15 18:54 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 169K May 15 18:54 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 14K May 15 18:54 UpperBounds.txt
-rw-r--r-- 1 mcc users 27K May 15 18:54 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 May 15 18:49 equiv_col
-rw-r--r-- 1 mcc users 4 May 15 18:49 instance
-rw-r--r-- 1 mcc users 6 May 15 18:49 iscolored
-rw-r--r-- 1 mcc users 506K May 15 18:49 model.pnml
=====================================================================
Generated by BenchKit 2-3637
Executing tool itstoolsl
Input is BART-PT-002, examination is ReachabilityDeadlock
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r033-ebro-152646310800062
=====================================================================

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME BART-PT-002-ReachabilityDeadlock-0

=== Now, execution of the tool begins

BK_START 1527282431448

Flatten gal took : 370 ms
Performed 130 Post agglomeration using F-continuation condition.
Iterating post reduction 0 with 130 rules applied. Total rules applied 130 place count 264 transition count 274
Constant places removed 130 places and 0 transitions.
Iterating post reduction 1 with 130 rules applied. Total rules applied 260 place count 134 transition count 274
Symmetric choice reduction at 2 with 12 rule applications. Total rules 272 place count 134 transition count 274
Constant places removed 12 places and 12 transitions.
Reduce isomorphic transitions removed 2 transitions.
Performed 2 Post agglomeration using F-continuation condition.
Iterating post reduction 2 with 16 rules applied. Total rules applied 288 place count 122 transition count 258
Constant places removed 2 places and 0 transitions.
Iterating post reduction 3 with 2 rules applied. Total rules applied 290 place count 120 transition count 258
Symmetric choice reduction at 4 with 8 rule applications. Total rules 298 place count 120 transition count 258
Constant places removed 8 places and 8 transitions.
Performed 2 Post agglomeration using F-continuation condition.
Iterating post reduction 4 with 10 rules applied. Total rules applied 308 place count 112 transition count 248
Constant places removed 2 places and 0 transitions.
Iterating post reduction 5 with 2 rules applied. Total rules applied 310 place count 110 transition count 248
Symmetric choice reduction at 6 with 6 rule applications. Total rules 316 place count 110 transition count 248
Constant places removed 6 places and 6 transitions.
Iterating post reduction 6 with 6 rules applied. Total rules applied 322 place count 104 transition count 242
Symmetric choice reduction at 7 with 6 rule applications. Total rules 328 place count 104 transition count 242
Constant places removed 6 places and 6 transitions.
Iterating post reduction 7 with 6 rules applied. Total rules applied 334 place count 98 transition count 236
Symmetric choice reduction at 8 with 4 rule applications. Total rules 338 place count 98 transition count 236
Constant places removed 4 places and 4 transitions.
Iterating post reduction 8 with 4 rules applied. Total rules applied 342 place count 94 transition count 232
Symmetric choice reduction at 9 with 4 rule applications. Total rules 346 place count 94 transition count 232
Constant places removed 4 places and 4 transitions.
Iterating post reduction 9 with 4 rules applied. Total rules applied 350 place count 90 transition count 228
Symmetric choice reduction at 10 with 4 rule applications. Total rules 354 place count 90 transition count 228
Constant places removed 4 places and 4 transitions.
Iterating post reduction 10 with 4 rules applied. Total rules applied 358 place count 86 transition count 224
Symmetric choice reduction at 11 with 2 rule applications. Total rules 360 place count 86 transition count 224
Constant places removed 2 places and 2 transitions.
Iterating post reduction 11 with 2 rules applied. Total rules applied 362 place count 84 transition count 222
Performed 16 Post agglomeration using F-continuation condition.
Constant places removed 16 places and 0 transitions.
Reduce isomorphic transitions removed 8 transitions.
Iterating post reduction 12 with 24 rules applied. Total rules applied 386 place count 68 transition count 198
Performed 4 Post agglomeration using F-continuation condition.
Constant places removed 4 places and 0 transitions.
Reduce isomorphic transitions removed 8 transitions.
Iterating post reduction 13 with 12 rules applied. Total rules applied 398 place count 64 transition count 186
Performed 4 Post agglomeration using F-continuation condition.
Constant places removed 4 places and 0 transitions.
Reduce isomorphic transitions removed 8 transitions.
Iterating post reduction 14 with 12 rules applied. Total rules applied 410 place count 60 transition count 174
Performed 4 Post agglomeration using F-continuation condition.
Constant places removed 4 places and 0 transitions.
Reduce isomorphic transitions removed 8 transitions.
Iterating post reduction 15 with 12 rules applied. Total rules applied 422 place count 56 transition count 162
Performed 4 Post agglomeration using F-continuation condition.
Constant places removed 4 places and 0 transitions.
Reduce isomorphic transitions removed 8 transitions.
Iterating post reduction 16 with 12 rules applied. Total rules applied 434 place count 52 transition count 150
Performed 4 Post agglomeration using F-continuation condition.
Constant places removed 4 places and 0 transitions.
Reduce isomorphic transitions removed 8 transitions.
Iterating post reduction 17 with 12 rules applied. Total rules applied 446 place count 48 transition count 138
Performed 4 Post agglomeration using F-continuation condition.
Constant places removed 4 places and 0 transitions.
Reduce isomorphic transitions removed 8 transitions.
Iterating post reduction 18 with 12 rules applied. Total rules applied 458 place count 44 transition count 126
Performed 4 Post agglomeration using F-continuation condition.
Constant places removed 4 places and 0 transitions.
Reduce isomorphic transitions removed 8 transitions.
Iterating post reduction 19 with 12 rules applied. Total rules applied 470 place count 40 transition count 114
Performed 4 Post agglomeration using F-continuation condition.
Constant places removed 4 places and 0 transitions.
Reduce isomorphic transitions removed 8 transitions.
Iterating post reduction 20 with 12 rules applied. Total rules applied 482 place count 36 transition count 102
Performed 4 Post agglomeration using F-continuation condition.
Constant places removed 4 places and 0 transitions.
Reduce isomorphic transitions removed 8 transitions.
Iterating post reduction 21 with 12 rules applied. Total rules applied 494 place count 32 transition count 90
Performed 4 Post agglomeration using F-continuation condition.
Constant places removed 4 places and 0 transitions.
Reduce isomorphic transitions removed 8 transitions.
Iterating post reduction 22 with 12 rules applied. Total rules applied 506 place count 28 transition count 78
Performed 4 Post agglomeration using F-continuation condition.
Constant places removed 4 places and 0 transitions.
Reduce isomorphic transitions removed 8 transitions.
Iterating post reduction 23 with 12 rules applied. Total rules applied 518 place count 24 transition count 66
Performed 4 Post agglomeration using F-continuation condition.
Constant places removed 4 places and 0 transitions.
Reduce isomorphic transitions removed 8 transitions.
Iterating post reduction 24 with 12 rules applied. Total rules applied 530 place count 20 transition count 54
Performed 4 Post agglomeration using F-continuation condition.
Constant places removed 4 places and 0 transitions.
Reduce isomorphic transitions removed 8 transitions.
Iterating post reduction 25 with 12 rules applied. Total rules applied 542 place count 16 transition count 42
Performed 4 Post agglomeration using F-continuation condition.
Constant places removed 4 places and 0 transitions.
Reduce isomorphic transitions removed 8 transitions.
Iterating post reduction 26 with 12 rules applied. Total rules applied 554 place count 12 transition count 30
Performed 4 Post agglomeration using F-continuation condition.
Constant places removed 4 places and 0 transitions.
Reduce isomorphic transitions removed 8 transitions.
Iterating post reduction 27 with 12 rules applied. Total rules applied 566 place count 8 transition count 18
Performed 4 Post agglomeration using F-continuation condition.
Constant places removed 4 places and 0 transitions.
Reduce isomorphic transitions removed 8 transitions.
Performed 2 Post agglomeration using F-continuation condition.
Iterating post reduction 28 with 14 rules applied. Total rules applied 580 place count 4 transition count 4
Constant places removed 4 places and 0 transitions.
Reduce isomorphic transitions removed 3 transitions.
FORMULA BART-PT-002-ReachabilityDeadlock-0 FALSE TECHNIQUES TOPOLOGICAL STRUCTURAL_REDUCTION

BK_STOP 1527282436271

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution ReachabilityDeadlock -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -louvain -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -consoleLog -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination ReachabilityDeadlock -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -louvain -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
May 25, 2018 9:07:14 PM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, ReachabilityDeadlock, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -louvain, -smt]
May 25, 2018 9:07:14 PM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
May 25, 2018 9:07:14 PM fr.lip6.move.gal.nupn.PTNetReader loadFromXML
INFO: Load time of PNML (sax parser for PT used): 238 ms
May 25, 2018 9:07:14 PM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 474 places.
May 25, 2018 9:07:15 PM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 404 transitions.
May 25, 2018 9:07:15 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.img.gal : 67 ms
May 25, 2018 9:07:15 PM fr.lip6.move.gal.instantiate.DomainAnalyzer computeVariableDomains
INFO: Found a total of 210 fixed domain variables (out of 474 variables) in GAL type BART_PT_002
May 25, 2018 9:07:15 PM fr.lip6.move.gal.instantiate.Simplifier printConstantVars
INFO: Found a total of 210 constant array cells/variables (out of 474 variables) in type BART_PT_002
May 25, 2018 9:07:15 PM fr.lip6.move.gal.instantiate.Simplifier printConstantVars
INFO: NewDistTable_20_1_19,NewDistTable_12_3_9,NewDistTable_39_3_36,DistStation_32,NewDistTable_25_1_24,DistStation_7,NewDistTable_32_3_29,NewDistTable_26_4_22,NewDistTable_33_2_31,NewDistTable_23_3_20,NewDistTable_37_4_33,NewDistTable_20_4_16,NewDistTable_22_5_17,NewDistTable_31_5_26,NewDistTable_23_4_19,DistStation_13,DistStation_25,NewDistTable_2_2_0,NewDistTable_36_1_35,NewDistTable_26_5_21,NewDistTable_9_4_5,NewDistTable_10_3_7,NewDistTable_32_1_31,NewDistTable_32_2_30,NewDistTable_30_3_27,NewDistTable_7_1_6,DistStation_9,NewDistTable_21_5_16,NewDistTable_27_2_25,NewDistTable_29_4_25,NewDistTable_14_5_9,NewDistTable_18_1_17,NewDistTable_20_2_18,NewDistTable_6_3_3,NewDistTable_23_2_21,DistStation_29,NewDistTable_16_1_15,NewDistTable_13_3_10,DistStation_24,DistStation_35,NewDistTable_29_2_27,NewDistTable_31_4_27,DistStation_31,NewDistTable_22_3_19,NewDistTable_17_5_12,NewDistTable_27_3_24,NewDistTable_18_3_15,DistStation_18,NewDistTable_27_5_22,NewDistTable_36_3_33,NewDistTable_30_1_29,NewDistTable_12_1_11,NewDistTable_5_2_3,DistStation_5,NewDistTable_38_1_37,NewDistTable_4_3_1,NewDistTable_8_3_5,NewDistTable_17_3_14,DistStation_39,NewDistTable_12_4_8,DistStation_14,NewDistTable_17_1_16,NewDistTable_19_5_14,NewDistTable_15_3_12,NewDistTable_27_4_23,NewDistTable_22_4_18,NewDistTable_24_2_22,NewDistTable_28_1_27,NewDistTable_39_1_38,NewDistTable_6_1_5,NewDistTable_36_2_34,NewDistTable_4_2_2,NewDistTable_33_1_32,NewDistTable_5_1_4,NewDistTable_8_1_7,DistStation_34,NewDistTable_14_4_10,StopTable_4_10,NewDistTable_11_2_9,NewDistTable_6_2_4,DistStation_40,DistStation_10,NewDistTable_19_4_15,NewDistTable_2_1_1,NewDistTable_21_2_19,NewDistTable_16_5_11,DistStation_33,NewDistTable_25_3_22,NewDistTable_27_1_26,NewDistTable_34_4_30,NewDistTable_11_4_7,NewDistTable_26_3_23,NewDistTable_14_1_13,NewDistTable_13_4_9,NewDistTable_26_1_25,NewDistTable_23_1_22,NewDistTable_9_3_6,NewDistTable_31_2_29,NewDistTable_12_2_10,NewDistTable_15_1_14,NewDistTable_15_4_11,DistStation_19,NewDistTable_14_2_12,NewDistTable_18_5_13,NewDistTable_18_2_16,NewDistTable_32_5_27,NewDistTable_38_2_36,NewDistTable_21_4_17,NewDistTable_20_5_15,NewDistTable_11_5_6,NewDistTable_33_5_28,NewDistTable_15_5_10,NewDistTable_36_4_32,NewDistTable_24_4_20,NewDistTable_26_2_24,NewDistTable_30_2_28,NewDistTable_30_5_25,NewDistTable_25_5_20,NewDistTable_25_4_21,NewDistTable_30_4_26,DistStation_22,NewDistTable_13_1_12,NewDistTable_8_2_6,DistStation_26,NewDistTable_15_2_13,DistStation_21,StopTable_2_3,DistStation_17,NewDistTable_13_5_8,StopTable_3_6,NewDistTable_35_3_32,NewDistTable_17_4_13,DistStation_15,NewDistTable_24_3_21,NewDistTable_5_3_2,NewDistTable_40_2_38,NewDistTable_35_1_34,NewDistTable_23_5_18,NewDistTable_37_3_34,NewDistTable_4_1_3,DistStation_16,NewDistTable_9_2_7,NewDistTable_34_5_29,StopTable_1_1,NewDistTable_3_2_1,NewDistTable_35_2_33,DistStation_36,NewDistTable_39_2_37,NewDistTable_28_2_26,DistStation_38,DistStation_30,NewDistTable_32_4_28,NewDistTable_40_1_39,NewDistTable_24_1_23,StopTable_5_15,NewDistTable_24_5_19,DistStation_12,NewDistTable_10_4_6,DistStation_37,NewDistTable_29_5_24,NewDistTable_28_3_25,NewDistTable_8_4_4,NewDistTable_11_1_10,NewDistTable_16_2_14,NewDistTable_37_1_36,NewDistTable_7_2_5,NewDistTable_12_5_7,DistStation_11,NewDistTable_3_1_2,NewDistTable_13_2_11,NewDistTable_29_3_26,NewDistTable_19_1_18,NewDistTable_16_4_12,NewDistTable_7_4_3,NewDistTable_14_3_11,NewDistTable_31_3_28,NewDistTable_22_1_21,NewDistTable_21_1_20,NewDistTable_10_2_8,NewDistTable_31_1_30,NewDistTable_34_2_32,NewDistTable_7_3_4,NewDistTable_34_1_33,DistStation_27,DistStation_8,NewDistTable_28_5_23,NewDistTable_34_3_31,NewDistTable_11_3_8,DistStation_20,NewDistTable_35_4_31,NewDistTable_28_4_24,NewDistTable_19_3_16,NewDistTable_16_3_13,NewDistTable_25_2_23,NewDistTable_17_2_15,NewDistTable_19_2_17,NewDistTable_37_2_35,NewDistTable_22_2_20,NewDistTable_10_1_9,NewDistTable_33_4_29,NewDistTable_9_1_8,DistStation_28,DistStation_6,NewDistTable_38_3_35,NewDistTable_33_3_30,NewDistTable_20_3_17,NewDistTable_21_3_18,NewDistTable_18_4_14,DistStation_23,NewDistTable_29_1_28,
May 25, 2018 9:07:15 PM fr.lip6.move.gal.instantiate.Simplifier simplifyConstantVariables
INFO: Removed 210 constant variables :NewDistTable_20_1_19=1, NewDistTable_12_3_9=1, NewDistTable_39_3_36=1, DistStation_32=1, NewDistTable_25_1_24=1, DistStation_7=1, NewDistTable_32_3_29=1, NewDistTable_26_4_22=1, NewDistTable_33_2_31=1, NewDistTable_23_3_20=1, NewDistTable_37_4_33=1, NewDistTable_20_4_16=1, NewDistTable_22_5_17=1, NewDistTable_31_5_26=1, NewDistTable_23_4_19=1, DistStation_13=1, DistStation_25=1, NewDistTable_2_2_0=1, NewDistTable_36_1_35=1, NewDistTable_26_5_21=1, NewDistTable_9_4_5=1, NewDistTable_10_3_7=1, NewDistTable_32_1_31=1, NewDistTable_32_2_30=1, NewDistTable_30_3_27=1, NewDistTable_7_1_6=1, DistStation_9=1, NewDistTable_21_5_16=1, NewDistTable_27_2_25=1, NewDistTable_29_4_25=1, NewDistTable_14_5_9=1, NewDistTable_18_1_17=1, NewDistTable_20_2_18=1, NewDistTable_6_3_3=1, NewDistTable_23_2_21=1, DistStation_29=1, NewDistTable_16_1_15=1, NewDistTable_13_3_10=1, DistStation_24=1, DistStation_35=1, NewDistTable_29_2_27=1, NewDistTable_31_4_27=1, DistStation_31=1, NewDistTable_22_3_19=1, NewDistTable_17_5_12=1, NewDistTable_27_3_24=1, NewDistTable_18_3_15=1, DistStation_18=1, NewDistTable_27_5_22=1, NewDistTable_36_3_33=1, NewDistTable_30_1_29=1, NewDistTable_12_1_11=1, NewDistTable_5_2_3=1, DistStation_5=1, NewDistTable_38_1_37=1, NewDistTable_4_3_1=1, NewDistTable_8_3_5=1, NewDistTable_17_3_14=1, DistStation_39=1, NewDistTable_12_4_8=1, DistStation_14=1, NewDistTable_17_1_16=1, NewDistTable_19_5_14=1, NewDistTable_15_3_12=1, NewDistTable_27_4_23=1, NewDistTable_22_4_18=1, NewDistTable_24_2_22=1, NewDistTable_28_1_27=1, NewDistTable_39_1_38=1, NewDistTable_6_1_5=1, NewDistTable_36_2_34=1, NewDistTable_4_2_2=1, NewDistTable_33_1_32=1, NewDistTable_5_1_4=1, NewDistTable_8_1_7=1, DistStation_34=1, NewDistTable_14_4_10=1, StopTable_4_10=1, NewDistTable_11_2_9=1, NewDistTable_6_2_4=1, DistStation_40=1, DistStation_10=1, NewDistTable_19_4_15=1, NewDistTable_2_1_1=1, NewDistTable_21_2_19=1, NewDistTable_16_5_11=1, DistStation_33=1, NewDistTable_25_3_22=1, NewDistTable_27_1_26=1, NewDistTable_34_4_30=1, NewDistTable_11_4_7=1, NewDistTable_26_3_23=1, NewDistTable_14_1_13=1, NewDistTable_13_4_9=1, NewDistTable_26_1_25=1, NewDistTable_23_1_22=1, NewDistTable_9_3_6=1, NewDistTable_31_2_29=1, NewDistTable_12_2_10=1, NewDistTable_15_1_14=1, NewDistTable_15_4_11=1, DistStation_19=1, NewDistTable_14_2_12=1, NewDistTable_18_5_13=1, NewDistTable_18_2_16=1, NewDistTable_32_5_27=1, NewDistTable_38_2_36=1, NewDistTable_21_4_17=1, NewDistTable_20_5_15=1, NewDistTable_11_5_6=1, NewDistTable_33_5_28=1, NewDistTable_15_5_10=1, NewDistTable_36_4_32=1, NewDistTable_24_4_20=1, NewDistTable_26_2_24=1, NewDistTable_30_2_28=1, NewDistTable_30_5_25=1, NewDistTable_25_5_20=1, NewDistTable_25_4_21=1, NewDistTable_30_4_26=1, DistStation_22=1, NewDistTable_13_1_12=1, NewDistTable_8_2_6=1, DistStation_26=1, NewDistTable_15_2_13=1, DistStation_21=1, StopTable_2_3=1, DistStation_17=1, NewDistTable_13_5_8=1, StopTable_3_6=1, NewDistTable_35_3_32=1, NewDistTable_17_4_13=1, DistStation_15=1, NewDistTable_24_3_21=1, NewDistTable_5_3_2=1, NewDistTable_40_2_38=1, NewDistTable_35_1_34=1, NewDistTable_23_5_18=1, NewDistTable_37_3_34=1, NewDistTable_4_1_3=1, DistStation_16=1, NewDistTable_9_2_7=1, NewDistTable_34_5_29=1, StopTable_1_1=1, NewDistTable_3_2_1=1, NewDistTable_35_2_33=1, DistStation_36=1, NewDistTable_39_2_37=1, NewDistTable_28_2_26=1, DistStation_38=1, DistStation_30=1, NewDistTable_32_4_28=1, NewDistTable_40_1_39=1, NewDistTable_24_1_23=1, StopTable_5_15=1, NewDistTable_24_5_19=1, DistStation_12=1, NewDistTable_10_4_6=1, DistStation_37=1, NewDistTable_29_5_24=1, NewDistTable_28_3_25=1, NewDistTable_8_4_4=1, NewDistTable_11_1_10=1, NewDistTable_16_2_14=1, NewDistTable_37_1_36=1, NewDistTable_7_2_5=1, NewDistTable_12_5_7=1, DistStation_11=1, NewDistTable_3_1_2=1, NewDistTable_13_2_11=1, NewDistTable_29_3_26=1, NewDistTable_19_1_18=1, NewDistTable_16_4_12=1, NewDistTable_7_4_3=1, NewDistTable_14_3_11=1, NewDistTable_31_3_28=1, NewDistTable_22_1_21=1, NewDistTable_21_1_20=1, NewDistTable_10_2_8=1, NewDistTable_31_1_30=1, NewDistTable_34_2_32=1, NewDistTable_7_3_4=1, NewDistTable_34_1_33=1, DistStation_27=1, DistStation_8=1, NewDistTable_28_5_23=1, NewDistTable_34_3_31=1, NewDistTable_11_3_8=1, DistStation_20=1, NewDistTable_35_4_31=1, NewDistTable_28_4_24=1, NewDistTable_19_3_16=1, NewDistTable_16_3_13=1, NewDistTable_25_2_23=1, NewDistTable_17_2_15=1, NewDistTable_19_2_17=1, NewDistTable_37_2_35=1, NewDistTable_22_2_20=1, NewDistTable_10_1_9=1, NewDistTable_33_4_29=1, NewDistTable_9_1_8=1, DistStation_28=1, DistStation_6=1, NewDistTable_38_3_35=1, NewDistTable_33_3_30=1, NewDistTable_20_3_17=1, NewDistTable_21_3_18=1, NewDistTable_18_4_14=1, DistStation_23=1, NewDistTable_29_1_28=1
May 25, 2018 9:07:15 PM fr.lip6.move.gal.instantiate.Simplifier simplifyConstantVariables
INFO: Simplified 1216 expressions due to constant valuations.
May 25, 2018 9:07:15 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 363 ms
May 25, 2018 9:07:15 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.simple.gal : 7 ms
May 25, 2018 9:07:15 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 404 transitions.

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="BART-PT-002"
export BK_EXAMINATION="ReachabilityDeadlock"
export BK_TOOL="itstoolsl"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

tar xzf /home/mcc/BenchKit/INPUTS/BART-PT-002.tgz
mv BART-PT-002 execution
cd execution
pwd
ls -lh

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3637"
echo " Executing tool itstoolsl"
echo " Input is BART-PT-002, examination is ReachabilityDeadlock"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r033-ebro-152646310800062"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityDeadlock" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityDeadlock" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityDeadlock.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityDeadlock.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityDeadlock.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' ReachabilityDeadlock.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;