fond
Model Checking Contest 2018
8th edition, Bratislava, Slovakia, June 26, 2018
Execution of r033-ebro-152646310800034
Last Updated
June 26, 2018

About the Execution of ITS-Tools.L for BART-COL-030

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
15754.610 63174.00 98031.00 146.90 F normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Waiting for the VM to be ready (probing ssh)
......................
/home/mcc/execution
total 360K
-rw-r--r-- 1 mcc users 3.7K May 15 18:54 CTLCardinality.txt
-rw-r--r-- 1 mcc users 19K May 15 18:54 CTLCardinality.xml
-rw-r--r-- 1 mcc users 3.0K May 15 18:54 CTLFireability.txt
-rw-r--r-- 1 mcc users 20K May 15 18:54 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K May 15 18:49 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.1K May 15 18:49 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 2.3K May 15 18:54 LTLCardinality.txt
-rw-r--r-- 1 mcc users 9.1K May 15 18:54 LTLCardinality.xml
-rw-r--r-- 1 mcc users 1.8K May 15 18:54 LTLFireability.txt
-rw-r--r-- 1 mcc users 7.7K May 15 18:54 LTLFireability.xml
-rw-r--r-- 1 mcc users 3.1K May 15 18:54 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 14K May 15 18:54 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 103 May 15 18:54 ReachabilityDeadlock.txt
-rw-r--r-- 1 mcc users 341 May 15 18:54 ReachabilityDeadlock.xml
-rw-r--r-- 1 mcc users 2.8K May 15 18:54 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 15K May 15 18:54 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.7K May 15 18:54 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.7K May 15 18:54 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 May 15 18:49 equiv_pt
-rw-r--r-- 1 mcc users 4 May 15 18:49 instance
-rw-r--r-- 1 mcc users 5 May 15 18:49 iscolored
-rw-r--r-- 1 mcc users 201K May 15 18:49 model.pnml
=====================================================================
Generated by BenchKit 2-3637
Executing tool itstoolsl
Input is BART-COL-030, examination is ReachabilityDeadlock
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r033-ebro-152646310800034
=====================================================================


--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME BART-COL-030-ReachabilityDeadlock-0

=== Now, execution of the tool begins

BK_START 1527276022122

19:20:27.077 [main] ERROR PNML validation - The rng grammar file can't be accessed : www.pnml.org
19:20:27.081 [main] ERROR import - Grammar file errors have been raised, the validation can't be done, process will continue without Grammar validation
Flatten gal took : 44807 ms
Constant places removed 2970 places and 3180 transitions.
Performed 1980 Post agglomeration using F-continuation condition.
Iterating post reduction 0 with 4950 rules applied. Total rules applied 4950 place count 4410 transition count 4530
Constant places removed 2280 places and 300 transitions.
Performed 120 Post agglomeration using F-continuation condition.
Iterating post reduction 1 with 2400 rules applied. Total rules applied 7350 place count 2130 transition count 4110
Constant places removed 120 places and 0 transitions.
Iterating post reduction 2 with 120 rules applied. Total rules applied 7470 place count 2010 transition count 4110
Symmetric choice reduction at 3 with 180 rule applications. Total rules 7650 place count 2010 transition count 4110
Constant places removed 180 places and 180 transitions.
Reduce isomorphic transitions removed 30 transitions.
Performed 30 Post agglomeration using F-continuation condition.
Iterating post reduction 3 with 240 rules applied. Total rules applied 7890 place count 1830 transition count 3870
Constant places removed 30 places and 0 transitions.
Iterating post reduction 4 with 30 rules applied. Total rules applied 7920 place count 1800 transition count 3870
Symmetric choice reduction at 5 with 120 rule applications. Total rules 8040 place count 1800 transition count 3870
Constant places removed 120 places and 120 transitions.
Performed 30 Post agglomeration using F-continuation condition.
Iterating post reduction 5 with 150 rules applied. Total rules applied 8190 place count 1680 transition count 3720
Constant places removed 30 places and 0 transitions.
Iterating post reduction 6 with 30 rules applied. Total rules applied 8220 place count 1650 transition count 3720
Symmetric choice reduction at 7 with 90 rule applications. Total rules 8310 place count 1650 transition count 3720
Constant places removed 90 places and 90 transitions.
Iterating post reduction 7 with 90 rules applied. Total rules applied 8400 place count 1560 transition count 3630
Symmetric choice reduction at 8 with 90 rule applications. Total rules 8490 place count 1560 transition count 3630
Constant places removed 90 places and 90 transitions.
Iterating post reduction 8 with 90 rules applied. Total rules applied 8580 place count 1470 transition count 3540
Symmetric choice reduction at 9 with 60 rule applications. Total rules 8640 place count 1470 transition count 3540
Constant places removed 60 places and 60 transitions.
Iterating post reduction 9 with 60 rules applied. Total rules applied 8700 place count 1410 transition count 3480
Symmetric choice reduction at 10 with 60 rule applications. Total rules 8760 place count 1410 transition count 3480
Constant places removed 60 places and 60 transitions.
Iterating post reduction 10 with 60 rules applied. Total rules applied 8820 place count 1350 transition count 3420
Symmetric choice reduction at 11 with 60 rule applications. Total rules 8880 place count 1350 transition count 3420
Constant places removed 60 places and 60 transitions.
Iterating post reduction 11 with 60 rules applied. Total rules applied 8940 place count 1290 transition count 3360
Symmetric choice reduction at 12 with 30 rule applications. Total rules 8970 place count 1290 transition count 3360
Constant places removed 30 places and 30 transitions.
Iterating post reduction 12 with 30 rules applied. Total rules applied 9000 place count 1260 transition count 3330
Performed 240 Post agglomeration using F-continuation condition.
Constant places removed 240 places and 0 transitions.
Reduce isomorphic transitions removed 120 transitions.
Iterating post reduction 13 with 360 rules applied. Total rules applied 9360 place count 1020 transition count 2970
Performed 60 Post agglomeration using F-continuation condition.
Constant places removed 60 places and 0 transitions.
Reduce isomorphic transitions removed 120 transitions.
Iterating post reduction 14 with 180 rules applied. Total rules applied 9540 place count 960 transition count 2790
Performed 60 Post agglomeration using F-continuation condition.
Constant places removed 60 places and 0 transitions.
Reduce isomorphic transitions removed 120 transitions.
Iterating post reduction 15 with 180 rules applied. Total rules applied 9720 place count 900 transition count 2610
Performed 60 Post agglomeration using F-continuation condition.
Constant places removed 60 places and 0 transitions.
Reduce isomorphic transitions removed 120 transitions.
Iterating post reduction 16 with 180 rules applied. Total rules applied 9900 place count 840 transition count 2430
Performed 60 Post agglomeration using F-continuation condition.
Constant places removed 60 places and 0 transitions.
Reduce isomorphic transitions removed 120 transitions.
Iterating post reduction 17 with 180 rules applied. Total rules applied 10080 place count 780 transition count 2250
Performed 60 Post agglomeration using F-continuation condition.
Constant places removed 60 places and 0 transitions.
Reduce isomorphic transitions removed 120 transitions.
Iterating post reduction 18 with 180 rules applied. Total rules applied 10260 place count 720 transition count 2070
Performed 60 Post agglomeration using F-continuation condition.
Constant places removed 60 places and 0 transitions.
Reduce isomorphic transitions removed 120 transitions.
Iterating post reduction 19 with 180 rules applied. Total rules applied 10440 place count 660 transition count 1890
Performed 60 Post agglomeration using F-continuation condition.
Constant places removed 60 places and 0 transitions.
Reduce isomorphic transitions removed 120 transitions.
Iterating post reduction 20 with 180 rules applied. Total rules applied 10620 place count 600 transition count 1710
Performed 60 Post agglomeration using F-continuation condition.
Constant places removed 60 places and 0 transitions.
Reduce isomorphic transitions removed 120 transitions.
Iterating post reduction 21 with 180 rules applied. Total rules applied 10800 place count 540 transition count 1530
Performed 60 Post agglomeration using F-continuation condition.
Constant places removed 60 places and 0 transitions.
Reduce isomorphic transitions removed 120 transitions.
Iterating post reduction 22 with 180 rules applied. Total rules applied 10980 place count 480 transition count 1350
Performed 60 Post agglomeration using F-continuation condition.
Constant places removed 60 places and 0 transitions.
Reduce isomorphic transitions removed 120 transitions.
Iterating post reduction 23 with 180 rules applied. Total rules applied 11160 place count 420 transition count 1170
Performed 60 Post agglomeration using F-continuation condition.
Constant places removed 60 places and 0 transitions.
Reduce isomorphic transitions removed 120 transitions.
Iterating post reduction 24 with 180 rules applied. Total rules applied 11340 place count 360 transition count 990
Performed 60 Post agglomeration using F-continuation condition.
Constant places removed 60 places and 0 transitions.
Reduce isomorphic transitions removed 120 transitions.
Iterating post reduction 25 with 180 rules applied. Total rules applied 11520 place count 300 transition count 810
Performed 60 Post agglomeration using F-continuation condition.
Constant places removed 60 places and 0 transitions.
Reduce isomorphic transitions removed 120 transitions.
Iterating post reduction 26 with 180 rules applied. Total rules applied 11700 place count 240 transition count 630
Performed 60 Post agglomeration using F-continuation condition.
Constant places removed 60 places and 0 transitions.
Reduce isomorphic transitions removed 120 transitions.
Iterating post reduction 27 with 180 rules applied. Total rules applied 11880 place count 180 transition count 450
Performed 60 Post agglomeration using F-continuation condition.
Constant places removed 60 places and 0 transitions.
Reduce isomorphic transitions removed 120 transitions.
Iterating post reduction 28 with 180 rules applied. Total rules applied 12060 place count 120 transition count 270
Performed 60 Post agglomeration using F-continuation condition.
Constant places removed 60 places and 0 transitions.
Reduce isomorphic transitions removed 120 transitions.
Performed 30 Post agglomeration using F-continuation condition.
Iterating post reduction 29 with 210 rules applied. Total rules applied 12270 place count 60 transition count 60
Constant places removed 60 places and 0 transitions.
Reduce isomorphic transitions removed 59 transitions.
FORMULA BART-COL-030-ReachabilityDeadlock-0 FALSE TECHNIQUES TOPOLOGICAL STRUCTURAL_REDUCTION

BK_STOP 1527276085296

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution ReachabilityDeadlock -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -louvain -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -consoleLog -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination ReachabilityDeadlock -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -louvain -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
May 25, 2018 7:20:26 PM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, ReachabilityDeadlock, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -louvain, -smt]
May 25, 2018 7:20:26 PM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
May 25, 2018 7:20:26 PM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Detected file is not PT type :http://www.pnml.org/version-2009/grammar/symmetricnet
May 25, 2018 7:20:28 PM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Load time of PNML (colored model parsed with PNMLFW) : 1851 ms
May 25, 2018 7:20:28 PM fr.lip6.move.gal.pnml.togal.HLGALTransformer handlePage
INFO: Transformed 4 places.
May 25, 2018 7:20:28 PM fr.lip6.move.gal.pnml.togal.HLGALTransformer handlePage
INFO: Computed order using colors.
May 25, 2018 7:20:28 PM fr.lip6.move.gal.pnml.togal.HLGALTransformer handlePage
INFO: sort/places :speedXdist->StopTable,
distXspeedXdist->NewDistTable,
traincontext->TrainState,
distance->DistStation,

May 25, 2018 7:20:28 PM fr.lip6.move.gal.pnml.togal.HLGALTransformer handlePage
INFO: Transformed 7 transitions.
May 25, 2018 7:20:28 PM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Computed order based on color domains.
May 25, 2018 7:20:28 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.img.gal : 105 ms
May 25, 2018 7:20:29 PM fr.lip6.move.gal.instantiate.DomainAnalyzer computeVariableDomains
INFO: Found a total of 3 fixed domain variables (out of 17753 variables) in GAL type BART_COL_030
May 25, 2018 7:20:29 PM fr.lip6.move.gal.instantiate.Simplifier printConstantVars
INFO: Found a total of 10373 constant array cells/variables (out of 17753 variables) in type BART_COL_030
May 25, 2018 7:20:29 PM fr.lip6.move.gal.instantiate.Simplifier printConstantVars
INFO: StopTable[0-245], DistStation[0-40], NewDistTable[0-10085],
May 25, 2018 7:21:12 PM fr.lip6.move.gal.instantiate.Instantiator instantiateParameters
INFO: On-the-fly reduction of False transitions avoided exploring 2.1871396565E10 instantiations of transitions. Total transitions/syncs built is 9882
May 25, 2018 7:21:12 PM fr.lip6.move.gal.instantiate.DomainAnalyzer computeVariableDomains
INFO: Found a total of 3 fixed domain variables (out of 17753 variables) in GAL type BART_COL_030
May 25, 2018 7:21:12 PM fr.lip6.move.gal.instantiate.Simplifier printConstantVars
INFO: Found a total of 11093 constant array cells/variables (out of 17753 variables) in type BART_COL_030
May 25, 2018 7:21:12 PM fr.lip6.move.gal.instantiate.Simplifier printConstantVars
INFO: StopTable[0-245], TrainState[206-209,226-245,452-455,472-491,698-701,718-737,944-947,964-983,1190-1193,1210-1229,1436-1439,1456-1475,1682-1685,1702-1721,1928-1931,1948-1967,2174-2177,2194-2213,2420-2423,2440-2459,2666-2669,2686-2705,2912-2915,2932-2951,3158-3161,3178-3197,3404-3407,3424-3443,3650-3653,3670-3689,3896-3899,3916-3935,4142-4145,4162-4181,4388-4391,4408-4427,4634-4637,4654-4673,4880-4883,4900-4919,5126-5129,5146-5165,5372-5375,5392-5411,5618-5621,5638-5657,5864-5867,5884-5903,6110-6113,6130-6149,6356-6359,6376-6395,6602-6605,6622-6641,6848-6851,6868-6887,7094-7097,7114-7133,7340-7343,7360-7379], DistStation[0-40], NewDistTable[0-10085],
May 25, 2018 7:21:12 PM fr.lip6.move.gal.instantiate.Simplifier simplifyConstantVariables
INFO: Removed constant array :StopTable[]
May 25, 2018 7:21:12 PM fr.lip6.move.gal.instantiate.Simplifier simplifyConstantVariables
INFO: Removed constant array :DistStation[]
May 25, 2018 7:21:12 PM fr.lip6.move.gal.instantiate.Simplifier simplifyConstantVariables
INFO: Removed constant array :NewDistTable[]
May 25, 2018 7:21:12 PM fr.lip6.move.gal.instantiate.Instantiator fuseIsomorphicEffects
INFO: Removed a total of 5 redundant transitions.
May 25, 2018 7:21:12 PM fr.lip6.move.gal.instantiate.Simplifier removeUncalledTransitions
INFO: Removed 150 uncalled transitions from type BART_COL_030
May 25, 2018 7:21:13 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 44354 ms
May 25, 2018 7:21:13 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.simple.gal : 157 ms
May 25, 2018 7:21:14 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was not deterministic with 8646 transitions. Expanding to a total of 9726 deterministic transitions.
May 25, 2018 7:21:14 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Determinization took 64 ms.

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="BART-COL-030"
export BK_EXAMINATION="ReachabilityDeadlock"
export BK_TOOL="itstoolsl"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

tar xzf /home/mcc/BenchKit/INPUTS/BART-COL-030.tgz
mv BART-COL-030 execution
cd execution
pwd
ls -lh

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3637"
echo " Executing tool itstoolsl"
echo " Input is BART-COL-030, examination is ReachabilityDeadlock"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r033-ebro-152646310800034"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityDeadlock" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityDeadlock" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityDeadlock.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityDeadlock.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityDeadlock.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' ReachabilityDeadlock.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;