fond
Model Checking Contest 2018
8th edition, Bratislava, Slovakia, June 26, 2018
Execution of r032-ebro-152646310500494
Last Updated
June 26, 2018

About the Execution of ITS-Tools for CircadianClock-PT-000100

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
15747.450 9722.00 13398.00 144.20 TTTTTTTFFTFFFTTF normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Waiting for the VM to be ready (probing ssh)
...................
/home/mcc/execution
total 184K
-rw-r--r-- 1 mcc users 4.2K May 15 18:54 CTLCardinality.txt
-rw-r--r-- 1 mcc users 25K May 15 18:54 CTLCardinality.xml
-rw-r--r-- 1 mcc users 2.5K May 15 18:54 CTLFireability.txt
-rw-r--r-- 1 mcc users 15K May 15 18:54 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K May 15 18:49 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.2K May 15 18:49 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 2.4K May 15 18:54 LTLCardinality.txt
-rw-r--r-- 1 mcc users 11K May 15 18:54 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.0K May 15 18:54 LTLFireability.txt
-rw-r--r-- 1 mcc users 9.3K May 15 18:54 LTLFireability.xml
-rw-r--r-- 1 mcc users 3.2K May 15 18:54 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 15K May 15 18:54 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 115 May 15 18:54 ReachabilityDeadlock.txt
-rw-r--r-- 1 mcc users 353 May 15 18:54 ReachabilityDeadlock.xml
-rw-r--r-- 1 mcc users 3.3K May 15 18:54 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 20K May 15 18:54 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.7K May 15 18:54 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.8K May 15 18:54 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 15 18:49 equiv_col
-rw-r--r-- 1 mcc users 7 May 15 18:49 instance
-rw-r--r-- 1 mcc users 6 May 15 18:49 iscolored
-rw-r--r-- 1 mcc users 11K May 15 18:49 model.pnml
=====================================================================
Generated by BenchKit 2-3637
Executing tool itstools
Input is CircadianClock-PT-000100, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r032-ebro-152646310500494
=====================================================================


--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME CircadianClock-PT-000100-CTLFireability-00
FORMULA_NAME CircadianClock-PT-000100-CTLFireability-01
FORMULA_NAME CircadianClock-PT-000100-CTLFireability-02
FORMULA_NAME CircadianClock-PT-000100-CTLFireability-03
FORMULA_NAME CircadianClock-PT-000100-CTLFireability-04
FORMULA_NAME CircadianClock-PT-000100-CTLFireability-05
FORMULA_NAME CircadianClock-PT-000100-CTLFireability-06
FORMULA_NAME CircadianClock-PT-000100-CTLFireability-07
FORMULA_NAME CircadianClock-PT-000100-CTLFireability-08
FORMULA_NAME CircadianClock-PT-000100-CTLFireability-09
FORMULA_NAME CircadianClock-PT-000100-CTLFireability-10
FORMULA_NAME CircadianClock-PT-000100-CTLFireability-11
FORMULA_NAME CircadianClock-PT-000100-CTLFireability-12
FORMULA_NAME CircadianClock-PT-000100-CTLFireability-13
FORMULA_NAME CircadianClock-PT-000100-CTLFireability-14
FORMULA_NAME CircadianClock-PT-000100-CTLFireability-15

=== Now, execution of the tool begins

BK_START 1526973703289

Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805151631/bin/its-ctl-linux64, --gc-threshold, 2000000, --quiet, -i, /home/mcc/execution/CTLFireability.pnml.gal, -t, CGAL, -ctl, /home/mcc/execution/CTLFireability.ctl], workingDir=/home/mcc/execution]

its-ctl command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805151631/bin/its-ctl-linux64 --gc-threshold 2000000 --quiet -i /home/mcc/execution/CTLFireability.pnml.gal -t CGAL -ctl /home/mcc/execution/CTLFireability.ctl
No direction supplied, using forward translation only.
Parsed 16 CTL formulae.
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
reachable,4.20404e+10,2.35358,43560,2,517,5,235094,6,0,75,262885,0


Converting to forward existential form...Done !
original formula: AG(EX(((!((da>=1)&&(ma_cap>=1)))||(!((a>=1)&&(dr>=1))))))
=> equivalent forward existential formula: [(FwdU(Init,TRUE) * !(EX(((!((da>=1)&&(ma_cap>=1)))||(!((a>=1)&&(dr>=1)))))))] = FALSE
Reverse transition relation is exact ! Faster fixpoint algorithm enabled.
(forward)formula 0,1,2.39828,43560,1,0,6,235094,10,0,1314,262885,4
FORMULA CircadianClock-PT-000100-CTLFireability-00 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is TRUE !

***************************************

original formula: ((E(((r>=1)||((dr_a>=1)&&(a_cap>=1))) U !(((da_a>=1)&&(ma_cap>=1)))) * EX((((a>=1)&&((da>=1)&&(ma_cap>=1)))||(((ma>=1)&&(a_cap>=1))&&((a>=1)&&(dr>=1)))))) + AG(EF(((ma>=1)||((c>=1)&&(r_cap>=1))))))
=> equivalent forward existential formula: [(FwdU((Init * !((E(((r>=1)||((dr_a>=1)&&(a_cap>=1))) U !(((da_a>=1)&&(ma_cap>=1)))) * EX((((a>=1)&&((da>=1)&&(ma_cap>=1)))||(((ma>=1)&&(a_cap>=1))&&((a>=1)&&(dr>=1)))))))),TRUE) * !(E(TRUE U ((ma>=1)||((c>=1)&&(r_cap>=1))))))] = FALSE
(forward)formula 1,1,2.40263,43560,1,0,7,235094,15,0,1330,262885,7
FORMULA CircadianClock-PT-000100-CTLFireability-01 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is TRUE !

***************************************

original formula: EF(AG(EX((mr>=1))))
=> equivalent forward existential formula: [(FwdU(Init,TRUE) * !(E(TRUE U !(EX((mr>=1))))))] != FALSE
(forward)formula 2,1,2.40481,43560,1,0,8,235094,16,0,1330,262885,9
FORMULA CircadianClock-PT-000100-CTLFireability-02 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is TRUE !

***************************************

original formula: !(E(EF((mr>=1)) U AG((r>=1))))
=> equivalent forward existential formula: [(FwdU(Init,E(TRUE U (mr>=1))) * !(E(TRUE U !((r>=1)))))] = FALSE
(forward)formula 3,1,2.45251,43560,1,0,9,235094,18,0,1331,262885,12
FORMULA CircadianClock-PT-000100-CTLFireability-03 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is TRUE !

***************************************

original formula: AG(EF((((mr>=1)||(((a>=1)&&(r>=1))&&(c_cap>=1)))||(!(a>=1)))))
=> equivalent forward existential formula: [(FwdU(Init,TRUE) * !(E(TRUE U (((mr>=1)||(((a>=1)&&(r>=1))&&(c_cap>=1)))||(!(a>=1))))))] = FALSE
(forward)formula 4,1,2.47194,43560,1,0,10,235094,19,0,1335,262885,15
FORMULA CircadianClock-PT-000100-CTLFireability-04 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is TRUE !

***************************************

original formula: !(EF((EG((r>=1)) * AG(((da>=1)&&(ma_cap>=1))))))
=> equivalent forward existential formula: [((FwdU(Init,TRUE) * EG((r>=1))) * !(E(TRUE U !(((da>=1)&&(ma_cap>=1))))))] = FALSE
(forward)formula 5,1,2.47552,43560,1,0,11,235094,21,0,1337,262885,18
FORMULA CircadianClock-PT-000100-CTLFireability-05 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is TRUE !

***************************************

original formula: (((mr>=1)&&(r_cap>=1)) + AG(EF(!(((dr>=1)&&(mr_cap>=1))))))
=> equivalent forward existential formula: [(FwdU((Init * !(((mr>=1)&&(r_cap>=1)))),TRUE) * !(E(TRUE U !(((dr>=1)&&(mr_cap>=1))))))] = FALSE
(forward)formula 6,1,2.47849,43560,1,0,12,235094,23,0,1340,262885,21
FORMULA CircadianClock-PT-000100-CTLFireability-06 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is TRUE !

***************************************

original formula: EF((((((a>=1)&&(r>=1))&&(c_cap>=1)) * AG(((ma>=1)&&(a_cap>=1)))) * ((!(((da>=1)&&(a>=1))&&((dr_a>=1)&&(a_cap>=1))))||((da_a>=1)&&(a_cap>=1)))))
=> equivalent forward existential formula: [(((FwdU(Init,TRUE) * ((!(((da>=1)&&(a>=1))&&((dr_a>=1)&&(a_cap>=1))))||((da_a>=1)&&(a_cap>=1)))) * (((a>=1)&&(r>=1))&&(c_cap>=1))) * !(E(TRUE U !(((ma>=1)&&(a_cap>=1))))))] != FALSE
(forward)formula 7,0,2.59768,43560,1,0,13,235094,25,0,1344,262885,24
FORMULA CircadianClock-PT-000100-CTLFireability-07 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is FALSE !

***************************************

original formula: !(EX(AX(((a>=1)||((da>=1)&&(ma_cap>=1))))))
=> equivalent forward existential formula: [(EY(Init) * !(EX(!(((a>=1)||((da>=1)&&(ma_cap>=1)))))))] = FALSE
(forward)formula 8,0,2.62033,43560,1,0,17,235094,27,2,1365,262885,27
FORMULA CircadianClock-PT-000100-CTLFireability-08 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is FALSE !

***************************************

original formula: EX(!((AF(((da>=1)&&(a>=1))) * ((!((dr_a>=1)&&(mr_cap>=1)))||(r>=1)))))
=> equivalent forward existential formula: ([FwdG(EY(Init),!(((da>=1)&&(a>=1))))] != FALSE + [(EY(Init) * !(((!((dr_a>=1)&&(mr_cap>=1)))||(r>=1))))] != FALSE)
Hit Full ! (commute/partial/dont) 8/0/8
(forward)formula 9,1,2.99272,43560,1,0,19,235094,38,3,1389,262885,33
FORMULA CircadianClock-PT-000100-CTLFireability-09 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is TRUE !

***************************************

original formula: ((dr_a>=1)&&(a_cap>=1))
=> equivalent forward existential formula: [(Init * ((dr_a>=1)&&(a_cap>=1)))] != FALSE
(forward)formula 10,0,2.99344,43560,1,0,20,235094,39,3,1390,262885,34
FORMULA CircadianClock-PT-000100-CTLFireability-10 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is FALSE !

***************************************

original formula: (!(EF(((da>=1)&&(ma_cap>=1)))) * AF(E(((da_a>=1)&&(a_cap>=1)) U (r>=1))))
=> equivalent forward existential formula: ([(FwdU(Init,TRUE) * ((da>=1)&&(ma_cap>=1)))] = FALSE * [FwdG(Init,!(E(((da_a>=1)&&(a_cap>=1)) U (r>=1))))] = FALSE)
Hit Full ! (commute/partial/dont) 8/6/8
(forward)formula 11,0,5.28872,70732,1,0,628,407825,49,610,1423,472504,645
FORMULA CircadianClock-PT-000100-CTLFireability-11 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is FALSE !

***************************************

original formula: ((da>=1)&&(a>=1))
=> equivalent forward existential formula: [(Init * ((da>=1)&&(a>=1)))] != FALSE
(forward)formula 12,0,5.29004,70996,1,0,629,407834,49,610,1423,472504,646
FORMULA CircadianClock-PT-000100-CTLFireability-12 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is FALSE !

***************************************

original formula: EX((AX(((a>=1)&&((a>=1)&&(dr>=1)))) + ((ma>=1)&&(a_cap>=1))))
=> equivalent forward existential formula: ([(EY(Init) * !(EX(!(((a>=1)&&((a>=1)&&(dr>=1)))))))] != FALSE + [(EY(Init) * ((ma>=1)&&(a_cap>=1)))] != FALSE)
(forward)formula 13,1,5.31975,71788,1,0,633,410820,51,611,1425,476098,649
FORMULA CircadianClock-PT-000100-CTLFireability-13 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is TRUE !

***************************************

original formula: (E(((!((c>=1)&&(r_cap>=1)))||(!((mr>=1)&&(r_cap>=1)))) U EX(((da_a>=1)&&(ma_cap>=1)))) * E(EG(((da_a>=1)&&(a_cap>=1))) U ((!((ma>=1)&&(a_cap>=1)))&&(!(ma>=1)))))
=> equivalent forward existential formula: [(FwdU((Init * E(((!((c>=1)&&(r_cap>=1)))||(!((mr>=1)&&(r_cap>=1)))) U EX(((da_a>=1)&&(ma_cap>=1))))),EG(((da_a>=1)&&(a_cap>=1)))) * ((!((ma>=1)&&(a_cap>=1)))&&(!(ma>=1))))] != FALSE
Hit Full ! (commute/partial/dont) 9/0/7
(forward)formula 14,1,5.39898,73108,1,0,639,418813,65,614,1445,485643,659
FORMULA CircadianClock-PT-000100-CTLFireability-14 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is TRUE !

***************************************

original formula: (!((A((mr>=1) U ((dr>=1)&&(mr_cap>=1))) * !((((da>=1)&&(ma_cap>=1))&&(a>=1))))) + (mr>=1))
=> equivalent forward existential formula: ((([(FwdU(Init,!(((dr>=1)&&(mr_cap>=1)))) * (!((mr>=1)) * !(((dr>=1)&&(mr_cap>=1)))))] != FALSE + [FwdG(Init,!(((dr>=1)&&(mr_cap>=1))))] != FALSE) + [(Init * (((da>=1)&&(ma_cap>=1))&&(a>=1)))] != FALSE) + [(Init * (mr>=1))] != FALSE)
Hit Full ! (commute/partial/dont) 11/0/5
(forward)formula 15,0,5.40484,73108,1,0,645,418827,80,618,1461,486778,665
FORMULA CircadianClock-PT-000100-CTLFireability-15 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Formula is FALSE !

***************************************


BK_STOP 1526973713011

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution CTLFireability -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -consoleLog -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination CTLFireability -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
May 22, 2018 7:21:46 AM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -smt]
May 22, 2018 7:21:46 AM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
May 22, 2018 7:21:46 AM fr.lip6.move.gal.nupn.PTNetReader loadFromXML
INFO: Load time of PNML (sax parser for PT used): 52 ms
May 22, 2018 7:21:46 AM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 14 places.
May 22, 2018 7:21:46 AM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 16 transitions.
May 22, 2018 7:21:46 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.img.gal : 12 ms
May 22, 2018 7:21:47 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 35 ms
May 22, 2018 7:21:47 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/CTLFireability.pnml.gal : 3 ms
May 22, 2018 7:21:47 AM fr.lip6.move.serialization.SerializationUtil serializePropertiesForITSCTLTools
INFO: Time to serialize properties into /home/mcc/execution/CTLFireability.ctl : 4 ms

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="CircadianClock-PT-000100"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="itstools"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

tar xzf /home/mcc/BenchKit/INPUTS/CircadianClock-PT-000100.tgz
mv CircadianClock-PT-000100 execution
cd execution
pwd
ls -lh

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3637"
echo " Executing tool itstools"
echo " Input is CircadianClock-PT-000100, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r032-ebro-152646310500494"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;