Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Waiting for the VM to be ready (probing ssh)
...................
/home/mcc/execution
total 212K
-rw-r--r-- 1 mcc users 4.3K May 15 18:54 CTLCardinality.txt
-rw-r--r-- 1 mcc users 22K May 15 18:54 CTLCardinality.xml
-rw-r--r-- 1 mcc users 2.8K May 15 18:54 CTLFireability.txt
-rw-r--r-- 1 mcc users 14K May 15 18:54 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K May 15 18:49 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.1K May 15 18:49 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 2.7K May 15 18:54 LTLCardinality.txt
-rw-r--r-- 1 mcc users 11K May 15 18:54 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.1K May 15 18:54 LTLFireability.txt
-rw-r--r-- 1 mcc users 7.1K May 15 18:54 LTLFireability.xml
-rw-r--r-- 1 mcc users 4.1K May 15 18:54 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 18K May 15 18:54 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 122 May 15 18:54 ReachabilityDeadlock.txt
-rw-r--r-- 1 mcc users 360 May 15 18:54 ReachabilityDeadlock.xml
-rw-r--r-- 1 mcc users 3.4K May 15 18:54 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 17K May 15 18:54 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.9K May 15 18:54 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.9K May 15 18:54 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 May 15 18:49 equiv_pt
-rw-r--r-- 1 mcc users 10 May 15 18:49 instance
-rw-r--r-- 1 mcc users 5 May 15 18:49 iscolored
-rw-r--r-- 1 mcc users 39K May 15 18:49 model.pnml
=====================================================================
Generated by BenchKit 2-3637
Executing tool itstools
Input is BridgeAndVehicles-COL-V20P20N10, examination is ReachabilityDeadlock
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r032-ebro-152646310100153
=====================================================================

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME BridgeAndVehicles-COL-V20P20N10-ReachabilityDeadlock-0

=== Now, execution of the tool begins

BK_START 1526872014271

03:06:58.350 [main] ERROR PNML validation - The rng grammar file can't be accessed : www.pnml.org
03:06:58.353 [main] ERROR import - Grammar file errors have been raised, the validation can't be done, process will continue without Grammar validation
Flatten gal took : 232 ms
Constant places removed 2 places and 0 transitions.
Iterating post reduction 0 with 2 rules applied. Total rules applied 2 place count 66 transition count 548
Symmetric choice reduction at 1 with 1 rule applications. Total rules 3 place count 66 transition count 548
Constant places removed 1 places and 1 transitions.
Iterating post reduction 1 with 1 rules applied. Total rules applied 4 place count 65 transition count 547
Performed 1 Post agglomeration using F-continuation condition.
Constant places removed 2 places and 0 transitions.
Iterating post reduction 2 with 2 rules applied. Total rules applied 6 place count 63 transition count 546
Performed 2 Post agglomeration using F-continuation condition.
Constant places removed 2 places and 0 transitions.
Iterating post reduction 3 with 2 rules applied. Total rules applied 8 place count 61 transition count 544
Applied a total of 8 rules in 92 ms. Remains 61 /68 variables (removed 7) and now considering 544/548 (removed 4) transitions.
Normalized transition count is 126
// Phase 1: matrix 126 rows 61 cols
Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805151631/bin/its-ctl-linux64, --gc-threshold, 2000000, --quiet, -i, /home/mcc/execution/ReachabilityDeadlock.pnml.gal, -t, CGAL, -ctl, DEADLOCK], workingDir=/home/mcc/execution]

its-ctl command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805151631/bin/its-ctl-linux64 --gc-threshold 2000000 --quiet -i /home/mcc/execution/ReachabilityDeadlock.pnml.gal -t CGAL -ctl DEADLOCK
No direction supplied, using forward translation only.
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
Normalized transition count is 126
// Phase 1: matrix 126 rows 61 cols
invariant :CONTROLEUR_0 + CONTROLEUR_1 + CHOIX_0 + CHOIX_1 = 1
invariant :COMPTEUR_0 + COMPTEUR_1 + COMPTEUR_2 + COMPTEUR_3 + COMPTEUR_4 + COMPTEUR_5 + COMPTEUR_6 + COMPTEUR_7 + COMPTEUR_8 + COMPTEUR_9 + COMPTEUR_10 = 1
invariant :NB_ATTENTE_A_0 + NB_ATTENTE_A_1 + NB_ATTENTE_A_2 + NB_ATTENTE_A_3 + NB_ATTENTE_A_4 + NB_ATTENTE_A_5 + NB_ATTENTE_A_6 + NB_ATTENTE_A_7 + NB_ATTENTE_A_8 + NB_ATTENTE_A_9 + NB_ATTENTE_A_10 + NB_ATTENTE_A_11 + NB_ATTENTE_A_12 + NB_ATTENTE_A_13 + NB_ATTENTE_A_14 + NB_ATTENTE_A_15 + NB_ATTENTE_A_16 + NB_ATTENTE_A_17 + NB_ATTENTE_A_18 + NB_ATTENTE_A_19 + NB_ATTENTE_A_20 = 1
invariant :NB_ATTENTE_B_0 + NB_ATTENTE_B_1 + NB_ATTENTE_B_2 + NB_ATTENTE_B_3 + NB_ATTENTE_B_4 + NB_ATTENTE_B_5 + NB_ATTENTE_B_6 + NB_ATTENTE_B_7 + NB_ATTENTE_B_8 + NB_ATTENTE_B_9 + NB_ATTENTE_B_10 + NB_ATTENTE_B_11 + NB_ATTENTE_B_12 + NB_ATTENTE_B_13 + NB_ATTENTE_B_14 + NB_ATTENTE_B_15 + NB_ATTENTE_B_16 + NB_ATTENTE_B_17 + NB_ATTENTE_B_18 + NB_ATTENTE_B_19 + NB_ATTENTE_B_20 = 1
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O3, model.c], workingDir=/home/mcc/execution]
Compilation finished in 11499 ms.
Running link step : CommandLine [args=[gcc, -shared, -o, gal.so, model.o], workingDir=/home/mcc/execution]
Link finished in 162 ms.
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -d], workingDir=/home/mcc/execution]
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
reachable,1.28251e+06,86.9585,1110004,2,365588,5,1.04532e+06,6,0,789,977225,0


Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
dead,20,222.797,2419044,2,97,7,5.06651e+06,9,1,4269,2.58082e+06,2

System contains 20 deadlocks (shown below if less than --print-limit option) !
FORMULA BridgeAndVehicles-COL-V20P20N10-ReachabilityDeadlock-0 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
[ 20 states ] showing 10 first states
[ CONTROLEUR_0=1 NB_ATTENTE_B_0=1 NB_ATTENTE_A_0=1 COMPTEUR_1=1 ]
[ CONTROLEUR_0=1 NB_ATTENTE_B_0=1 NB_ATTENTE_A_0=1 COMPTEUR_2=1 ]
[ CONTROLEUR_0=1 NB_ATTENTE_B_0=1 NB_ATTENTE_A_0=1 COMPTEUR_3=1 ]
[ CONTROLEUR_0=1 NB_ATTENTE_B_0=1 NB_ATTENTE_A_0=1 COMPTEUR_4=1 ]
[ CONTROLEUR_0=1 COMPTEUR_5=1 NB_ATTENTE_B_0=1 NB_ATTENTE_A_0=1 ]
[ CONTROLEUR_1=1 NB_ATTENTE_B_0=1 NB_ATTENTE_A_0=1 COMPTEUR_1=1 ]
[ CONTROLEUR_1=1 NB_ATTENTE_B_0=1 NB_ATTENTE_A_0=1 COMPTEUR_2=1 ]
[ CONTROLEUR_1=1 NB_ATTENTE_B_0=1 NB_ATTENTE_A_0=1 COMPTEUR_3=1 ]
[ CONTROLEUR_1=1 NB_ATTENTE_B_0=1 NB_ATTENTE_A_0=1 COMPTEUR_4=1 ]
[ CONTROLEUR_1=1 COMPTEUR_5=1 NB_ATTENTE_B_0=1 NB_ATTENTE_A_0=1 ]
WARNING : LTS min runner thread was asked to interrupt. Dying gracefully.

BK_STOP 1526872246070

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution ReachabilityDeadlock -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -consoleLog -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination ReachabilityDeadlock -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
May 21, 2018 3:06:57 AM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, ReachabilityDeadlock, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -smt]
May 21, 2018 3:06:57 AM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
May 21, 2018 3:06:57 AM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Detected file is not PT type :http://www.pnml.org/version-2009/grammar/symmetricnet
May 21, 2018 3:06:59 AM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Load time of PNML (colored model parsed with PNMLFW) : 1622 ms
May 21, 2018 3:06:59 AM fr.lip6.move.gal.pnml.togal.HLGALTransformer handlePage
INFO: Transformed 15 places.
May 21, 2018 3:06:59 AM fr.lip6.move.gal.pnml.togal.HLGALTransformer handlePage
INFO: Computed order using colors.
May 21, 2018 3:06:59 AM fr.lip6.move.gal.pnml.togal.HLGALTransformer handlePage
INFO: sort/places :sens->CONTROLEUR,CHOIX,VIDANGE,
compteur->COMPTEUR,
Dot->CAPACITE,SORTI_A,ROUTE_A,ATTENTE_A,SUR_PONT_A,SUR_PONT_B,ATTENTE_B,ROUTE_B,SORTI_B,
voitureA->NB_ATTENTE_A,
voitureB->NB_ATTENTE_B,

May 21, 2018 3:06:59 AM fr.lip6.move.gal.pnml.togal.HLGALTransformer handlePage
INFO: Transformed 11 transitions.
May 21, 2018 3:06:59 AM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Computed order based on color domains.
May 21, 2018 3:06:59 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.img.gal : 12 ms
May 21, 2018 3:06:59 AM fr.lip6.move.gal.instantiate.Instantiator instantiateParameters
INFO: On-the-fly reduction of False transitions avoided exploring 59.0 instantiations of transitions. Total transitions/syncs built is 178
May 21, 2018 3:06:59 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 145 ms
May 21, 2018 3:06:59 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.simple.gal : 8 ms
May 21, 2018 3:06:59 AM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was not deterministic with 11 transitions. Expanding to a total of 631 deterministic transitions.
May 21, 2018 3:06:59 AM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Determinization took 8 ms.
May 21, 2018 3:07:00 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/ReachabilityDeadlock.pnml.gal : 32 ms
May 21, 2018 3:07:00 AM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 544 transitions.
May 21, 2018 3:07:01 AM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 4 place invariants in 26 ms
May 21, 2018 3:07:02 AM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 61 variables to be positive in 813 ms
May 21, 2018 3:07:02 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may disable matrix : 544 transitions.
May 21, 2018 3:07:02 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of disable matrix completed :0/544 took 1 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 21, 2018 3:07:02 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete disable matrix. took 135 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 21, 2018 3:07:02 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may enable matrix : 544 transitions.
May 21, 2018 3:07:02 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete enable matrix. took 64 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 21, 2018 3:07:02 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeCoEnablingMatrix
INFO: Computing symmetric co enabling matrix : 544 transitions.
May 21, 2018 3:07:06 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(3/544) took 3793 ms. Total solver calls (SAT/UNSAT): 1914(256/1658)
May 21, 2018 3:07:10 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(11/544) took 7982 ms. Total solver calls (SAT/UNSAT): 5694(352/5342)
May 21, 2018 3:07:14 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(16/544) took 11350 ms. Total solver calls (SAT/UNSAT): 8024(412/7612)
May 21, 2018 3:07:17 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(21/544) took 14493 ms. Total solver calls (SAT/UNSAT): 10350(680/9670)
May 21, 2018 3:07:20 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(27/544) took 17589 ms. Total solver calls (SAT/UNSAT): 13209(752/12457)
May 21, 2018 3:07:23 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(31/544) took 20678 ms. Total solver calls (SAT/UNSAT): 15095(800/14295)
May 21, 2018 3:07:26 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(37/544) took 24109 ms. Total solver calls (SAT/UNSAT): 17894(872/17022)
May 21, 2018 3:07:29 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(40/544) took 27251 ms. Total solver calls (SAT/UNSAT): 19280(908/18372)
May 21, 2018 3:07:32 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(44/544) took 30288 ms. Total solver calls (SAT/UNSAT): 21240(920/20320)
May 21, 2018 3:07:36 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(50/544) took 33389 ms. Total solver calls (SAT/UNSAT): 24213(920/23293)
May 21, 2018 3:07:39 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(60/544) took 36571 ms. Total solver calls (SAT/UNSAT): 29088(920/28168)
May 21, 2018 3:07:42 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(64/544) took 39818 ms. Total solver calls (SAT/UNSAT): 31010(920/30090)
May 21, 2018 3:07:45 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(69/544) took 42846 ms. Total solver calls (SAT/UNSAT): 33390(920/32470)
May 21, 2018 3:07:48 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(75/544) took 45890 ms. Total solver calls (SAT/UNSAT): 36213(920/35293)
May 21, 2018 3:07:51 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(83/544) took 49042 ms. Total solver calls (SAT/UNSAT): 39921(920/39001)
May 21, 2018 3:07:55 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(88/544) took 52486 ms. Total solver calls (SAT/UNSAT): 42206(920/41286)
May 21, 2018 3:07:58 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(93/544) took 55930 ms. Total solver calls (SAT/UNSAT): 44466(920/43546)
May 21, 2018 3:08:02 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(99/544) took 59885 ms. Total solver calls (SAT/UNSAT): 47145(920/46225)
May 21, 2018 3:08:05 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(103/544) took 63140 ms. Total solver calls (SAT/UNSAT): 48911(920/47991)
May 21, 2018 3:08:08 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(110/544) took 66184 ms. Total solver calls (SAT/UNSAT): 51963(920/51043)
May 21, 2018 3:08:12 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(116/544) took 69416 ms. Total solver calls (SAT/UNSAT): 54540(920/53620)
May 21, 2018 3:08:15 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(125/544) took 72423 ms. Total solver calls (SAT/UNSAT): 58338(920/57418)
May 21, 2018 3:08:19 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(133/544) took 76985 ms. Total solver calls (SAT/UNSAT): 61646(920/60726)
May 21, 2018 3:08:22 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(135/544) took 80075 ms. Total solver calls (SAT/UNSAT): 62463(920/61543)
May 21, 2018 3:08:26 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(141/544) took 83816 ms. Total solver calls (SAT/UNSAT): 64890(920/63970)
May 21, 2018 3:08:29 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(146/544) took 86992 ms. Total solver calls (SAT/UNSAT): 66885(920/65965)
May 21, 2018 3:08:32 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(153/544) took 90222 ms. Total solver calls (SAT/UNSAT): 69636(920/68716)
May 21, 2018 3:08:36 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(159/544) took 93313 ms. Total solver calls (SAT/UNSAT): 71955(920/71035)
May 21, 2018 3:08:40 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(169/544) took 97418 ms. Total solver calls (SAT/UNSAT): 75740(920/74820)
May 21, 2018 3:08:43 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(176/544) took 100552 ms. Total solver calls (SAT/UNSAT): 78330(920/77410)
May 21, 2018 3:08:46 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(182/544) took 103880 ms. Total solver calls (SAT/UNSAT): 80511(920/79591)
May 21, 2018 3:08:49 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(189/544) took 107202 ms. Total solver calls (SAT/UNSAT): 83010(920/82090)
May 21, 2018 3:08:52 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(197/544) took 110212 ms. Total solver calls (SAT/UNSAT): 85806(920/84886)
May 21, 2018 3:08:56 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(204/544) took 113484 ms. Total solver calls (SAT/UNSAT): 88200(920/87280)
May 21, 2018 3:08:59 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(212/544) took 116592 ms. Total solver calls (SAT/UNSAT): 90876(920/89956)
May 21, 2018 3:09:02 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(221/544) took 119920 ms. Total solver calls (SAT/UNSAT): 93810(920/92890)
May 21, 2018 3:09:05 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(227/544) took 122962 ms. Total solver calls (SAT/UNSAT): 95721(920/94801)
May 21, 2018 3:09:08 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(234/544) took 126217 ms. Total solver calls (SAT/UNSAT): 97905(920/96985)
May 21, 2018 3:09:12 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(241/544) took 130063 ms. Total solver calls (SAT/UNSAT): 100040(920/99120)
May 21, 2018 3:09:15 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(251/544) took 133191 ms. Total solver calls (SAT/UNSAT): 103005(920/102085)
May 21, 2018 3:09:19 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(261/544) took 136331 ms. Total solver calls (SAT/UNSAT): 105870(920/104950)
May 21, 2018 3:09:22 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(273/544) took 139335 ms. Total solver calls (SAT/UNSAT): 109176(920/108256)
May 21, 2018 3:09:25 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(286/544) took 142860 ms. Total solver calls (SAT/UNSAT): 112595(920/111675)
May 21, 2018 3:09:28 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(294/544) took 145887 ms. Total solver calls (SAT/UNSAT): 114615(920/113695)
May 21, 2018 3:09:31 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(305/544) took 148936 ms. Total solver calls (SAT/UNSAT): 117288(920/116368)
May 21, 2018 3:09:35 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(314/544) took 152374 ms. Total solver calls (SAT/UNSAT): 119385(920/118465)
May 21, 2018 3:09:38 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(321/544) took 155654 ms. Total solver calls (SAT/UNSAT): 120960(920/120040)
May 21, 2018 3:09:41 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(328/544) took 158861 ms. Total solver calls (SAT/UNSAT): 122486(920/121566)
May 21, 2018 3:09:44 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(342/544) took 162114 ms. Total solver calls (SAT/UNSAT): 125391(920/124471)
May 21, 2018 3:09:47 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(355/544) took 165189 ms. Total solver calls (SAT/UNSAT): 127913(920/126993)
May 21, 2018 3:09:50 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(383/544) took 168258 ms. Total solver calls (SAT/UNSAT): 132771(920/131851)
May 21, 2018 3:09:54 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(416/544) took 171302 ms. Total solver calls (SAT/UNSAT): 137490(920/136570)
May 21, 2018 3:09:57 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(454/544) took 174319 ms. Total solver calls (SAT/UNSAT): 141575(920/140655)
May 21, 2018 3:10:00 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(487/544) took 177495 ms. Total solver calls (SAT/UNSAT): 143951(920/143031)
May 21, 2018 3:10:03 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(504/544) took 180499 ms. Total solver calls (SAT/UNSAT): 144750(920/143830)
May 21, 2018 3:10:06 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(524/544) took 183535 ms. Total solver calls (SAT/UNSAT): 145320(920/144400)
May 21, 2018 3:10:07 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Finished co-enabling matrix. took 184657 ms. Total solver calls (SAT/UNSAT): 145491(920/144571)
May 21, 2018 3:10:07 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeDoNotAccord
INFO: Computing Do-Not-Accords matrix : 544 transitions.
May 21, 2018 3:10:07 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed DNA matrix. took 65 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 21, 2018 3:10:07 AM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 186939ms conformant to PINS in folder :/home/mcc/execution

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="BridgeAndVehicles-COL-V20P20N10"
export BK_EXAMINATION="ReachabilityDeadlock"
export BK_TOOL="itstools"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

tar xzf /home/mcc/BenchKit/INPUTS/BridgeAndVehicles-COL-V20P20N10.tgz
mv BridgeAndVehicles-COL-V20P20N10 execution
cd execution
pwd
ls -lh

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3637"
echo " Executing tool itstools"
echo " Input is BridgeAndVehicles-COL-V20P20N10, examination is ReachabilityDeadlock"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r032-ebro-152646310100153"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityDeadlock" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityDeadlock" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityDeadlock.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityDeadlock.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityDeadlock.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' ReachabilityDeadlock.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;