fond
Model Checking Contest 2018
8th edition, Bratislava, Slovakia, June 26, 2018
Execution of r032-ebro-152646309900055
Last Updated
June 26, 2018

About the Execution of ITS-Tools for BART-COL-060

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
15752.910 54478.00 86674.00 190.70 F normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Waiting for the VM to be ready (probing ssh)
....................
/home/mcc/execution
total 380K
-rw-r--r-- 1 mcc users 2.8K May 15 18:54 CTLCardinality.txt
-rw-r--r-- 1 mcc users 13K May 15 18:54 CTLCardinality.xml
-rw-r--r-- 1 mcc users 3.1K May 15 18:54 CTLFireability.txt
-rw-r--r-- 1 mcc users 20K May 15 18:54 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K May 15 18:49 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.1K May 15 18:49 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 2.7K May 15 18:54 LTLCardinality.txt
-rw-r--r-- 1 mcc users 13K May 15 18:54 LTLCardinality.xml
-rw-r--r-- 1 mcc users 1.9K May 15 18:54 LTLFireability.txt
-rw-r--r-- 1 mcc users 9.0K May 15 18:54 LTLFireability.xml
-rw-r--r-- 1 mcc users 3.3K May 15 18:54 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 15K May 15 18:54 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 103 May 15 18:54 ReachabilityDeadlock.txt
-rw-r--r-- 1 mcc users 341 May 15 18:54 ReachabilityDeadlock.xml
-rw-r--r-- 1 mcc users 2.7K May 15 18:54 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 14K May 15 18:54 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.7K May 15 18:54 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.7K May 15 18:54 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 May 15 18:49 equiv_pt
-rw-r--r-- 1 mcc users 4 May 15 18:49 instance
-rw-r--r-- 1 mcc users 5 May 15 18:49 iscolored
-rw-r--r-- 1 mcc users 219K May 15 18:49 model.pnml
=====================================================================
Generated by BenchKit 2-3637
Executing tool itstools
Input is BART-COL-060, examination is ReachabilityDeadlock
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r032-ebro-152646309900055
=====================================================================


--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME BART-COL-060-ReachabilityDeadlock-0

=== Now, execution of the tool begins

BK_START 1526856136527

22:42:20.452 [main] ERROR PNML validation - The rng grammar file can't be accessed : www.pnml.org
22:42:20.455 [main] ERROR import - Grammar file errors have been raised, the validation can't be done, process will continue without Grammar validation
Flatten gal took : 7393 ms
Constant places removed 5940 places and 6360 transitions.
Performed 3960 Post agglomeration using F-continuation condition.
Iterating post reduction 0 with 9900 rules applied. Total rules applied 9900 place count 8820 transition count 9060
Constant places removed 4560 places and 600 transitions.
Performed 240 Post agglomeration using F-continuation condition.
Iterating post reduction 1 with 4800 rules applied. Total rules applied 14700 place count 4260 transition count 8220
Constant places removed 240 places and 0 transitions.
Iterating post reduction 2 with 240 rules applied. Total rules applied 14940 place count 4020 transition count 8220
Symmetric choice reduction at 3 with 360 rule applications. Total rules 15300 place count 4020 transition count 8220
Constant places removed 360 places and 360 transitions.
Reduce isomorphic transitions removed 60 transitions.
Performed 60 Post agglomeration using F-continuation condition.
Iterating post reduction 3 with 480 rules applied. Total rules applied 15780 place count 3660 transition count 7740
Constant places removed 60 places and 0 transitions.
Iterating post reduction 4 with 60 rules applied. Total rules applied 15840 place count 3600 transition count 7740
Symmetric choice reduction at 5 with 240 rule applications. Total rules 16080 place count 3600 transition count 7740
Constant places removed 240 places and 240 transitions.
Performed 60 Post agglomeration using F-continuation condition.
Iterating post reduction 5 with 300 rules applied. Total rules applied 16380 place count 3360 transition count 7440
Constant places removed 60 places and 0 transitions.
Iterating post reduction 6 with 60 rules applied. Total rules applied 16440 place count 3300 transition count 7440
Symmetric choice reduction at 7 with 180 rule applications. Total rules 16620 place count 3300 transition count 7440
Constant places removed 180 places and 180 transitions.
Iterating post reduction 7 with 180 rules applied. Total rules applied 16800 place count 3120 transition count 7260
Symmetric choice reduction at 8 with 180 rule applications. Total rules 16980 place count 3120 transition count 7260
Constant places removed 180 places and 180 transitions.
Iterating post reduction 8 with 180 rules applied. Total rules applied 17160 place count 2940 transition count 7080
Symmetric choice reduction at 9 with 120 rule applications. Total rules 17280 place count 2940 transition count 7080
Constant places removed 120 places and 120 transitions.
Iterating post reduction 9 with 120 rules applied. Total rules applied 17400 place count 2820 transition count 6960
Symmetric choice reduction at 10 with 120 rule applications. Total rules 17520 place count 2820 transition count 6960
Constant places removed 120 places and 120 transitions.
Iterating post reduction 10 with 120 rules applied. Total rules applied 17640 place count 2700 transition count 6840
Symmetric choice reduction at 11 with 120 rule applications. Total rules 17760 place count 2700 transition count 6840
Constant places removed 120 places and 120 transitions.
Iterating post reduction 11 with 120 rules applied. Total rules applied 17880 place count 2580 transition count 6720
Symmetric choice reduction at 12 with 60 rule applications. Total rules 17940 place count 2580 transition count 6720
Constant places removed 60 places and 60 transitions.
Iterating post reduction 12 with 60 rules applied. Total rules applied 18000 place count 2520 transition count 6660
Performed 480 Post agglomeration using F-continuation condition.
Constant places removed 480 places and 0 transitions.
Reduce isomorphic transitions removed 240 transitions.
Iterating post reduction 13 with 720 rules applied. Total rules applied 18720 place count 2040 transition count 5940
Performed 120 Post agglomeration using F-continuation condition.
Constant places removed 120 places and 0 transitions.
Reduce isomorphic transitions removed 240 transitions.
Iterating post reduction 14 with 360 rules applied. Total rules applied 19080 place count 1920 transition count 5580
Performed 120 Post agglomeration using F-continuation condition.
Constant places removed 120 places and 0 transitions.
Reduce isomorphic transitions removed 240 transitions.
Iterating post reduction 15 with 360 rules applied. Total rules applied 19440 place count 1800 transition count 5220
Performed 120 Post agglomeration using F-continuation condition.
Constant places removed 120 places and 0 transitions.
Reduce isomorphic transitions removed 240 transitions.
Iterating post reduction 16 with 360 rules applied. Total rules applied 19800 place count 1680 transition count 4860
Performed 120 Post agglomeration using F-continuation condition.
Constant places removed 120 places and 0 transitions.
Reduce isomorphic transitions removed 240 transitions.
Iterating post reduction 17 with 360 rules applied. Total rules applied 20160 place count 1560 transition count 4500
Performed 120 Post agglomeration using F-continuation condition.
Constant places removed 120 places and 0 transitions.
Reduce isomorphic transitions removed 240 transitions.
Iterating post reduction 18 with 360 rules applied. Total rules applied 20520 place count 1440 transition count 4140
Performed 120 Post agglomeration using F-continuation condition.
Constant places removed 120 places and 0 transitions.
Reduce isomorphic transitions removed 240 transitions.
Iterating post reduction 19 with 360 rules applied. Total rules applied 20880 place count 1320 transition count 3780
Performed 120 Post agglomeration using F-continuation condition.
Constant places removed 120 places and 0 transitions.
Reduce isomorphic transitions removed 240 transitions.
Iterating post reduction 20 with 360 rules applied. Total rules applied 21240 place count 1200 transition count 3420
Performed 120 Post agglomeration using F-continuation condition.
Constant places removed 120 places and 0 transitions.
Reduce isomorphic transitions removed 240 transitions.
Iterating post reduction 21 with 360 rules applied. Total rules applied 21600 place count 1080 transition count 3060
Performed 120 Post agglomeration using F-continuation condition.
Constant places removed 120 places and 0 transitions.
Reduce isomorphic transitions removed 240 transitions.
Iterating post reduction 22 with 360 rules applied. Total rules applied 21960 place count 960 transition count 2700
Performed 120 Post agglomeration using F-continuation condition.
Constant places removed 120 places and 0 transitions.
Reduce isomorphic transitions removed 240 transitions.
Iterating post reduction 23 with 360 rules applied. Total rules applied 22320 place count 840 transition count 2340
Performed 120 Post agglomeration using F-continuation condition.
Constant places removed 120 places and 0 transitions.
Reduce isomorphic transitions removed 240 transitions.
Iterating post reduction 24 with 360 rules applied. Total rules applied 22680 place count 720 transition count 1980
Performed 120 Post agglomeration using F-continuation condition.
Constant places removed 120 places and 0 transitions.
Reduce isomorphic transitions removed 240 transitions.
Iterating post reduction 25 with 360 rules applied. Total rules applied 23040 place count 600 transition count 1620
Performed 120 Post agglomeration using F-continuation condition.
Constant places removed 120 places and 0 transitions.
Reduce isomorphic transitions removed 240 transitions.
Iterating post reduction 26 with 360 rules applied. Total rules applied 23400 place count 480 transition count 1260
Performed 120 Post agglomeration using F-continuation condition.
Constant places removed 120 places and 0 transitions.
Reduce isomorphic transitions removed 240 transitions.
Iterating post reduction 27 with 360 rules applied. Total rules applied 23760 place count 360 transition count 900
Performed 120 Post agglomeration using F-continuation condition.
Constant places removed 120 places and 0 transitions.
Reduce isomorphic transitions removed 240 transitions.
Iterating post reduction 28 with 360 rules applied. Total rules applied 24120 place count 240 transition count 540
Performed 120 Post agglomeration using F-continuation condition.
Constant places removed 120 places and 0 transitions.
Reduce isomorphic transitions removed 240 transitions.
Performed 60 Post agglomeration using F-continuation condition.
Iterating post reduction 29 with 420 rules applied. Total rules applied 24540 place count 120 transition count 120
Constant places removed 120 places and 0 transitions.
Reduce isomorphic transitions removed 119 transitions.
FORMULA BART-COL-060-ReachabilityDeadlock-0 FALSE TECHNIQUES TOPOLOGICAL STRUCTURAL_REDUCTION

BK_STOP 1526856191005

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution ReachabilityDeadlock -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -consoleLog -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination ReachabilityDeadlock -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
May 20, 2018 10:42:19 PM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, ReachabilityDeadlock, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -smt]
May 20, 2018 10:42:19 PM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
May 20, 2018 10:42:19 PM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Detected file is not PT type :http://www.pnml.org/version-2009/grammar/symmetricnet
May 20, 2018 10:42:21 PM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Load time of PNML (colored model parsed with PNMLFW) : 1411 ms
May 20, 2018 10:42:21 PM fr.lip6.move.gal.pnml.togal.HLGALTransformer handlePage
INFO: Transformed 4 places.
May 20, 2018 10:42:21 PM fr.lip6.move.gal.pnml.togal.HLGALTransformer handlePage
INFO: Computed order using colors.
May 20, 2018 10:42:21 PM fr.lip6.move.gal.pnml.togal.HLGALTransformer handlePage
INFO: sort/places :speedXdist->StopTable,
distXspeedXdist->NewDistTable,
traincontext->TrainState,
distance->DistStation,

May 20, 2018 10:42:21 PM fr.lip6.move.gal.pnml.togal.HLGALTransformer handlePage
INFO: Transformed 7 transitions.
May 20, 2018 10:42:21 PM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Computed order based on color domains.
May 20, 2018 10:42:21 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.img.gal : 110 ms
May 20, 2018 10:42:22 PM fr.lip6.move.gal.instantiate.DomainAnalyzer computeVariableDomains
INFO: Found a total of 3 fixed domain variables (out of 25133 variables) in GAL type BART_COL_060
May 20, 2018 10:42:22 PM fr.lip6.move.gal.instantiate.Simplifier printConstantVars
INFO: Found a total of 10373 constant array cells/variables (out of 25133 variables) in type BART_COL_060
May 20, 2018 10:42:22 PM fr.lip6.move.gal.instantiate.Simplifier printConstantVars
INFO: DistStation[0-40], StopTable[0-245], NewDistTable[0-10085],
May 20, 2018 10:42:26 PM fr.lip6.move.gal.instantiate.Instantiator instantiateParameters
INFO: On-the-fly reduction of False transitions avoided exploring 4.3742792885E10 instantiations of transitions. Total transitions/syncs built is 19722
May 20, 2018 10:42:27 PM fr.lip6.move.gal.instantiate.DomainAnalyzer computeVariableDomains
INFO: Found a total of 3 fixed domain variables (out of 25133 variables) in GAL type BART_COL_060
May 20, 2018 10:42:27 PM fr.lip6.move.gal.instantiate.Simplifier printConstantVars
INFO: Found a total of 11813 constant array cells/variables (out of 25133 variables) in type BART_COL_060
May 20, 2018 10:42:27 PM fr.lip6.move.gal.instantiate.Simplifier printConstantVars
INFO: DistStation[0-40], StopTable[0-245], NewDistTable[0-10085], TrainState[206-209,226-245,452-455,472-491,698-701,718-737,944-947,964-983,1190-1193,1210-1229,1436-1439,1456-1475,1682-1685,1702-1721,1928-1931,1948-1967,2174-2177,2194-2213,2420-2423,2440-2459,2666-2669,2686-2705,2912-2915,2932-2951,3158-3161,3178-3197,3404-3407,3424-3443,3650-3653,3670-3689,3896-3899,3916-3935,4142-4145,4162-4181,4388-4391,4408-4427,4634-4637,4654-4673,4880-4883,4900-4919,5126-5129,5146-5165,5372-5375,5392-5411,5618-5621,5638-5657,5864-5867,5884-5903,6110-6113,6130-6149,6356-6359,6376-6395,6602-6605,6622-6641,6848-6851,6868-6887,7094-7097,7114-7133,7340-7343,7360-7379,7586-7589,7606-7625,7832-7835,7852-7871,8078-8081,8098-8117,8324-8327,8344-8363,8570-8573,8590-8609,8816-8819,8836-8855,9062-9065,9082-9101,9308-9311,9328-9347,9554-9557,9574-9593,9800-9803,9820-9839,10046-10049,10066-10085,10292-10295,10312-10331,10538-10541,10558-10577,10784-10787,10804-10823,11030-11033,11050-11069,11276-11279,11296-11315,11522-11525,11542-11561,11768-11771,11788-11807,12014-12017,12034-12053,12260-12263,12280-12299,12506-12509,12526-12545,12752-12755,12772-12791,12998-13001,13018-13037,13244-13247,13264-13283,13490-13493,13510-13529,13736-13739,13756-13775,13982-13985,14002-14021,14228-14231,14248-14267,14474-14477,14494-14513,14720-14723,14740-14759],
May 20, 2018 10:42:27 PM fr.lip6.move.gal.instantiate.Simplifier simplifyConstantVariables
INFO: Removed constant array :DistStation[]
May 20, 2018 10:42:27 PM fr.lip6.move.gal.instantiate.Simplifier simplifyConstantVariables
INFO: Removed constant array :StopTable[]
May 20, 2018 10:42:27 PM fr.lip6.move.gal.instantiate.Simplifier simplifyConstantVariables
INFO: Removed constant array :NewDistTable[]
May 20, 2018 10:42:27 PM fr.lip6.move.gal.instantiate.Instantiator fuseIsomorphicEffects
INFO: Removed a total of 5 redundant transitions.
May 20, 2018 10:42:28 PM fr.lip6.move.gal.instantiate.Simplifier removeUncalledTransitions
INFO: Removed 300 uncalled transitions from type BART_COL_060
May 20, 2018 10:42:28 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 6626 ms
May 20, 2018 10:42:29 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.simple.gal : 161 ms
May 20, 2018 10:42:31 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was not deterministic with 17256 transitions. Expanding to a total of 19416 deterministic transitions.
May 20, 2018 10:42:31 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Determinization took 127 ms.

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="BART-COL-060"
export BK_EXAMINATION="ReachabilityDeadlock"
export BK_TOOL="itstools"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

tar xzf /home/mcc/BenchKit/INPUTS/BART-COL-060.tgz
mv BART-COL-060 execution
cd execution
pwd
ls -lh

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3637"
echo " Executing tool itstools"
echo " Input is BART-COL-060, examination is ReachabilityDeadlock"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r032-ebro-152646309900055"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityDeadlock" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityDeadlock" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityDeadlock.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityDeadlock.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityDeadlock.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' ReachabilityDeadlock.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;