fond
Model Checking Contest 2018
8th edition, Bratislava, Slovakia, June 26, 2018
Execution of r021-qhx1-152646246400146
Last Updated
June 26, 2018

About the Execution of ITS-Tools.L for AutoFlight-PT-12b

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
15755.730 12153.00 28093.00 517.50 T normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Waiting for the VM to be ready (probing ssh)
................................................................................................................
/home/mcc/execution
total 428K
-rw-r--r-- 1 mcc users 3.5K May 15 18:54 CTLCardinality.txt
-rw-r--r-- 1 mcc users 20K May 15 18:54 CTLCardinality.xml
-rw-r--r-- 1 mcc users 2.7K May 15 18:54 CTLFireability.txt
-rw-r--r-- 1 mcc users 19K May 15 18:54 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K May 15 18:49 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.2K May 15 18:49 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 2.1K May 15 18:54 LTLCardinality.txt
-rw-r--r-- 1 mcc users 8.4K May 15 18:54 LTLCardinality.xml
-rw-r--r-- 1 mcc users 1.9K May 15 18:54 LTLFireability.txt
-rw-r--r-- 1 mcc users 9.0K May 15 18:54 LTLFireability.xml
-rw-r--r-- 1 mcc users 3.0K May 15 18:54 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 14K May 15 18:54 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 108 May 15 18:54 ReachabilityDeadlock.txt
-rw-r--r-- 1 mcc users 346 May 15 18:54 ReachabilityDeadlock.xml
-rw-r--r-- 1 mcc users 2.6K May 15 18:54 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 16K May 15 18:54 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K May 15 18:54 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.7K May 15 18:54 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 15 18:49 equiv_col
-rw-r--r-- 1 mcc users 4 May 15 18:49 instance
-rw-r--r-- 1 mcc users 6 May 15 18:49 iscolored
-rw-r--r-- 1 mcc users 266K May 15 18:49 model.pnml
=====================================================================
Generated by BenchKit 2-3637
Executing tool itstoolsl
Input is AutoFlight-PT-12b, examination is ReachabilityDeadlock
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r021-qhx1-152646246400146
=====================================================================


--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME AutoFlight-PT-12b-ReachabilityDeadlock-0

=== Now, execution of the tool begins

BK_START 1527233439755

Flatten gal took : 462 ms
Constant places removed 1 places and 1 transitions.
Performed 720 Post agglomeration using F-continuation condition.
Iterating post reduction 0 with 721 rules applied. Total rules applied 721 place count 1125 transition count 403
Constant places removed 721 places and 1 transitions.
Reduce isomorphic transitions removed 60 transitions.
Performed 48 Post agglomeration using F-continuation condition.
Iterating post reduction 1 with 829 rules applied. Total rules applied 1550 place count 404 transition count 294
Constant places removed 48 places and 0 transitions.
Iterating post reduction 2 with 48 rules applied. Total rules applied 1598 place count 356 transition count 294
Performed 61 Pre agglomeration using Quasi-Persistent + HF-interchangeable + Divergent Free condition.
Pre-agglomeration after 3 with 61 Pre rules applied. Total rules applied 1598 place count 356 transition count 233
Constant places removed 85 places and 0 transitions.
Performed 24 Post agglomeration using F-continuation condition.
Iterating post reduction 3 with 109 rules applied. Total rules applied 1707 place count 271 transition count 209
Constant places removed 24 places and 0 transitions.
Iterating post reduction 4 with 24 rules applied. Total rules applied 1731 place count 247 transition count 209
Performed 37 Post agglomeration using F-continuation condition.
Constant places removed 37 places and 0 transitions.
Iterating post reduction 5 with 37 rules applied. Total rules applied 1768 place count 210 transition count 172
Applied a total of 1768 rules in 719 ms. Remains 210 /1126 variables (removed 916) and now considering 172/1124 (removed 952) transitions.
// Phase 1: matrix 172 rows 210 cols
Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
// Phase 1: matrix 172 rows 210 cols
invariant :p954 + p956 + p957 + p961 = 1
invariant :p66 + p71 = 1
invariant :p1056 + p1058 + p1059 + p1063 = 1
invariant :p750 + p752 + p753 + p754 + p755 + p756 + p757 + p758 + p759 + p760 + p761 + p762 + p763 + p789 + p790 + p791 + p792 + p793 + p794 + p795 + p796 + p797 + p798 + p799 + p800 + p801 + p802 + p803 + p804 + p805 + p806 + p807 + p808 + p809 + p810 + p811 + p812 + -1'p905 + -1'p927 + -1'p944 + -1'p961 + -1'p978 + -1'p995 + -1'p1012 + -1'p1029 + -1'p1046 + -1'p1063 + -1'p1080 + -1'p1097 + -1'p1114 + -1'p1125 = -13
invariant :p144 + p149 = 1
invariant :p389 + p394 = 1
invariant :p165 + p171 + p175 = 1
invariant :p261 + p266 = 1
invariant :p1022 + p1024 + p1025 + p1029 = 1
invariant :p183 + p188 = 1
invariant :p1107 + p1109 + p1110 + p1114 = 1
invariant :p937 + p939 + p940 + p944 = 1
invariant :p378 + p383 = 1
invariant :p467 + p472 = 1
invariant :p854 + p856 + p857 + p858 + p859 + p860 + p861 + p862 + p863 + p864 + p865 + p866 + p867 + p881 + p882 + p883 + p884 + p885 + p886 + p887 + p888 + p889 + p890 + p891 + p892 + p893 + p894 + p895 + p896 + p897 + p898 + p899 + p900 + p901 + p902 + p903 + p904 + p905 = 1
invariant :p456 + p461 = 1
invariant :p282 + p288 + p292 = 1
invariant :p1090 + p1092 + p1093 + p1097 = 1
invariant :p116 + p121 = 1
invariant :p77 + p82 = 1
invariant :p399 + p405 + p409 = 1
invariant :p300 + p305 = 1
invariant :p243 + p249 + p253 = 1
invariant :p1122 + p1125 = 1
invariant :p233 + p238 = 1
invariant :p194 + p199 = 1
invariant :p126 + p132 + p136 = 1
invariant :p360 + p366 + p370 = 1
invariant :p1039 + p1041 + p1042 + p1046 = 1
invariant :p155 + p160 = 1
invariant :p477 + p483 + p487 = 1
invariant :p321 + p327 + p331 = 1
invariant :p813 + p905 + p927 + p944 + p961 + p978 + p995 + p1012 + p1029 + p1046 + p1063 + p1080 + p1097 + p1114 + p1125 = 14
invariant :p1073 + p1075 + p1076 + p1080 = 1
invariant :p311 + p316 = 1
invariant :p920 + p922 + p923 + p927 = 1
invariant :p417 + p422 = 1
invariant :p428 + p433 = 1
invariant :p516 + p522 + p526 = 1
invariant :p506 + p511 = 1
invariant :p204 + p210 + p214 = 1
invariant :p339 + p344 = 1
invariant :p272 + p277 = 1
invariant :p87 + p93 + p97 = 1
invariant :p495 + p500 = 1
invariant :p988 + p990 + p991 + p995 = 1
invariant :p971 + p973 + p974 + p978 = 1
invariant :p438 + p444 + p448 = 1
invariant :p222 + p227 = 1
invariant :p350 + p355 = 1
invariant :p1005 + p1007 + p1008 + p1012 = 1
invariant :p105 + p110 = 1
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805241334/bin/its-ctl-linux64, --gc-threshold, 2000000, --quiet, -i, /home/mcc/execution/ReachabilityDeadlock.pnml.gal, -t, CGAL, -ctl, DEADLOCK], workingDir=/home/mcc/execution]

its-ctl command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805241334/bin/its-ctl-linux64 --gc-threshold 2000000 --quiet -i /home/mcc/execution/ReachabilityDeadlock.pnml.gal -t CGAL -ctl DEADLOCK
No direction supplied, using forward translation only.
built 2 ordering constraints for composite.
built 96 ordering constraints for composite.
built 124 ordering constraints for composite.
built 124 ordering constraints for composite.
built 120 ordering constraints for composite.
built 116 ordering constraints for composite.
built 112 ordering constraints for composite.
built 108 ordering constraints for composite.
built 104 ordering constraints for composite.
built 100 ordering constraints for composite.
built 96 ordering constraints for composite.
built 92 ordering constraints for composite.
built 88 ordering constraints for composite.
built 84 ordering constraints for composite.
built 80 ordering constraints for composite.
built 76 ordering constraints for composite.
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
reachable,9.89687e+14,2.16657,35708,102,81,39226,7873,1594,174976,197,32351,0


Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
dead,245760,2.26044,35708,1217,317,39226,7873,3738,174976,700,32351,6920

System contains 245760 deadlocks (shown below if less than --print-limit option) !
FORMULA AutoFlight-PT-12b-ReachabilityDeadlock-0 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
[ 245760 states ] showing 10 first states
[ i1={[ u148={[ p1125=1 ]
} i0={[ u147={[ p1114=1 ]
} i0={[ u146={[ p1097=1 ]
} i0={[ u145={[ p1080=1 ]
} i0={[ u144={[ p1063=1 ]
} i0={[ u143={[ p1046=1 ]
} i0={[ u142={[ p1029=1 ]
} i0={[ u141={[ p1012=1 ]
} i0={[ u140={[ p995=1 ]
} i0={[ u139={[ p978=1 ]
} i0={[ u138={[ p961=1 ]
} i0={[ u137={[ p944=1 ]
} i0={[ u136={[ p927=1 ]
} i0={[ u135={[ p905=1 ]
} u134={[ p797=1 ]
} ]
} ]
} ]
} ]
} ]
} ]
} ]
} ]
} ]
} ]
} ]
} ]
} ]
} ]
} i0={[ u95={[ p516=1 ]
[ p522=1 ]
} u94={[ p506=1 ]
} u93={[ p495=1 ]
} u92={[ p477=1 ]
[ p483=1 ]
} u91={[ p467=1 ]
} u90={[ p456=1 ]
} u89={[ p438=1 ]
[ p444=1 ]
} u88={[ p428=1 ]
} u87={[ p417=1 ]
} u86={[ p399=1 ]
} u85={[ p389=1 ]
} u84={[ p378=1 ]
} u83={[ p360=1 ]
[ p366=1 ]
} u82={[ p350=1 ]
} u81={[ p339=1 ]
} u80={[ p321=1 ]
[ p327=1 ]
} u79={[ p311=1 ]
} u78={[ p300=1 ]
} u77={[ p282=1 ]
[ p288=1 ]
} u76={[ p272=1 ]
} u75={[ p261=1 ]
} u74={[ p243=1 ]
[ p249=1 ]
} u73={[ p233=1 ]
} u72={[ p222=1 ]
} u71={[ p204=1 ]
[ p210=1 ]
} u70={[ p194=1 ]
} u69={[ p183=1 ]
} u68={[ p165=1 ]
[ p171=1 ]
} u67={[ p155=1 ]
} u66={[ p144=1 ]
} u65={[ p126=1 ]
[ p132=1 ]
} u64={[ p116=1 ]
} u63={[ p105=1 ]
} u62={[ p87=1 ]
[ p93=1 ]
} u61={[ p77=1 ]
} u60={[ p66=1 ]
} ]
} ]
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O3, model.c], workingDir=/home/mcc/execution]
WARNING : LTS min runner thread was asked to interrupt. Dying gracefully.

BK_STOP 1527233451908

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution ReachabilityDeadlock -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -louvain -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -consoleLog -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination ReachabilityDeadlock -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -louvain -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
May 25, 2018 7:30:43 AM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, ReachabilityDeadlock, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -louvain, -smt]
May 25, 2018 7:30:43 AM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
May 25, 2018 7:30:43 AM fr.lip6.move.gal.nupn.PTNetReader loadFromXML
INFO: Load time of PNML (sax parser for PT used): 224 ms
May 25, 2018 7:30:43 AM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 1126 places.
May 25, 2018 7:30:44 AM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 1124 transitions.
May 25, 2018 7:30:44 AM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Found NUPN structural information;
May 25, 2018 7:30:44 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.img.gal : 83 ms
May 25, 2018 7:30:44 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 450 ms
May 25, 2018 7:30:45 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.simple.gal : 21 ms
May 25, 2018 7:30:45 AM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 1124 transitions.
May 25, 2018 7:30:46 AM fr.lip6.move.gal.application.MccTranslator applyOrder
INFO: Applying decomposition
May 25, 2018 7:30:46 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 113 ms
May 25, 2018 7:30:46 AM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 172 transitions.
May 25, 2018 7:30:46 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 46 ms
May 25, 2018 7:30:46 AM fr.lip6.move.gal.instantiate.CompositeBuilder decomposeWithOrder
INFO: Decomposing Gal with order
May 25, 2018 7:30:47 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 58 ms
May 25, 2018 7:30:47 AM fr.lip6.move.gal.instantiate.CompositeBuilder rewriteArraysToAllowPartition
INFO: Rewriting arrays to variables to allow decomposition.
May 25, 2018 7:30:47 AM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 52 place invariants in 45 ms
May 25, 2018 7:30:47 AM fr.lip6.move.gal.instantiate.Instantiator fuseIsomorphicEffects
INFO: Removed a total of 38 redundant transitions.
May 25, 2018 7:30:47 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/ReachabilityDeadlock.pnml.gal : 25 ms
May 25, 2018 7:30:48 AM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 210 variables to be positive in 1827 ms
May 25, 2018 7:30:49 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may disable matrix : 172 transitions.
May 25, 2018 7:30:49 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of disable matrix completed :0/172 took 1 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 25, 2018 7:30:49 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete disable matrix. took 15 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 25, 2018 7:30:49 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may enable matrix : 172 transitions.
May 25, 2018 7:30:49 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete enable matrix. took 13 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 25, 2018 7:30:49 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeCoEnablingMatrix
INFO: Computing symmetric co enabling matrix : 172 transitions.
Skipping mayMatrices nes/nds SMT solver raised an exception on push().
java.lang.RuntimeException: SMT solver raised an exception on push().
at fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver.computeCoEnablingMatrix(NecessaryEnablingsolver.java:464)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.printLabels(Gal2PinsTransformerNext.java:530)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.printDependencyMatrix(Gal2PinsTransformerNext.java:209)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.buildBodyFile(Gal2PinsTransformerNext.java:85)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.transform(Gal2PinsTransformerNext.java:830)
at fr.lip6.move.gal.application.LTSminRunner$1.run(LTSminRunner.java:71)
at java.lang.Thread.run(Thread.java:748)
May 25, 2018 7:30:50 AM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 3425ms conformant to PINS in folder :/home/mcc/execution

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="AutoFlight-PT-12b"
export BK_EXAMINATION="ReachabilityDeadlock"
export BK_TOOL="itstoolsl"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

tar xzf /home/mcc/BenchKit/INPUTS/AutoFlight-PT-12b.tgz
mv AutoFlight-PT-12b execution
cd execution
pwd
ls -lh

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3637"
echo " Executing tool itstoolsl"
echo " Input is AutoFlight-PT-12b, examination is ReachabilityDeadlock"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r021-qhx1-152646246400146"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityDeadlock" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityDeadlock" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityDeadlock.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityDeadlock.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityDeadlock.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' ReachabilityDeadlock.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;