fond
Model Checking Contest 2018
8th edition, Bratislava, Slovakia, June 26, 2018
Execution of r010-qhx2-152646140200005
Last Updated
June 26, 2018

About the Execution of M4M.full for ARMCacheCoherence-PT-none

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
730.530 242664.00 472738.00 4034.50 ???????????????? normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Waiting for the VM to be ready (probing ssh)
..............................................................................................................................
/home/mcc/execution
total 14M
-rw-r--r-- 1 mcc users 3.0K May 15 18:54 CTLCardinality.txt
-rw-r--r-- 1 mcc users 16K May 15 18:54 CTLCardinality.xml
-rw-r--r-- 1 mcc users 2.8K May 15 18:54 CTLFireability.txt
-rw-r--r-- 1 mcc users 18K May 15 18:54 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K May 15 18:49 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 5.9K May 15 18:49 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 2.6K May 15 18:54 LTLCardinality.txt
-rw-r--r-- 1 mcc users 12K May 15 18:54 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.0K May 15 18:54 LTLFireability.txt
-rw-r--r-- 1 mcc users 9.4K May 15 18:54 LTLFireability.xml
-rw-r--r-- 1 mcc users 3.2K May 15 18:54 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 15K May 15 18:54 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 116 May 15 18:54 ReachabilityDeadlock.txt
-rw-r--r-- 1 mcc users 354 May 15 18:54 ReachabilityDeadlock.xml
-rw-r--r-- 1 mcc users 2.6K May 15 18:54 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 13K May 15 18:54 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.7K May 15 18:54 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.8K May 15 18:54 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 15 18:49 equiv_col
-rw-r--r-- 1 mcc users 5 May 15 18:49 instance
-rw-r--r-- 1 mcc users 6 May 15 18:49 iscolored
-rw-r--r-- 1 mcc users 14M May 15 18:49 model.pnml
=====================================================================
Generated by BenchKit 2-3637
Executing tool mcc4mcc-full
Input is ARMCacheCoherence-PT-none, examination is ReachabilityCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r010-qhx2-152646140200005
=====================================================================


--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME ARMCacheCoherence-PT-none-ReachabilityCardinality-00
FORMULA_NAME ARMCacheCoherence-PT-none-ReachabilityCardinality-01
FORMULA_NAME ARMCacheCoherence-PT-none-ReachabilityCardinality-02
FORMULA_NAME ARMCacheCoherence-PT-none-ReachabilityCardinality-03
FORMULA_NAME ARMCacheCoherence-PT-none-ReachabilityCardinality-04
FORMULA_NAME ARMCacheCoherence-PT-none-ReachabilityCardinality-05
FORMULA_NAME ARMCacheCoherence-PT-none-ReachabilityCardinality-06
FORMULA_NAME ARMCacheCoherence-PT-none-ReachabilityCardinality-07
FORMULA_NAME ARMCacheCoherence-PT-none-ReachabilityCardinality-08
FORMULA_NAME ARMCacheCoherence-PT-none-ReachabilityCardinality-09
FORMULA_NAME ARMCacheCoherence-PT-none-ReachabilityCardinality-10
FORMULA_NAME ARMCacheCoherence-PT-none-ReachabilityCardinality-11
FORMULA_NAME ARMCacheCoherence-PT-none-ReachabilityCardinality-12
FORMULA_NAME ARMCacheCoherence-PT-none-ReachabilityCardinality-13
FORMULA_NAME ARMCacheCoherence-PT-none-ReachabilityCardinality-14
FORMULA_NAME ARMCacheCoherence-PT-none-ReachabilityCardinality-15

=== Now, execution of the tool begins

BK_START 1526712115414


BK_STOP 1526712358078

--------------------
content from stderr:

Prefix is 65b80f64.
Reading known information in /usr/share/mcc4mcc/65b80f64-known.json.
Reading learned information in /usr/share/mcc4mcc/65b80f64-learned.json.
Reading value translations in /usr/share/mcc4mcc/65b80f64-values.json.
Using directory /home/mcc/execution for input, as it contains a model.pnml file.
Using ARMCacheCoherence-PT-none as instance name.
Using ARMCacheCoherence as model name.
Using algorithm or tool bmdt.
Model characteristics are: {'Examination': 'ReachabilityCardinality', 'Place/Transition': True, 'Colored': False, 'Relative-Time': 1, 'Relative-Memory': 1, 'Ordinary': True, 'Simple Free Choice': False, 'Extended Free Choice': False, 'State Machine': False, 'Marked Graph': False, 'Connected': True, 'Strongly Connected': False, 'Source Place': True, 'Sink Place': False, 'Source Transition': False, 'Sink Transition': False, 'Loop Free': False, 'Conservative': False, 'Sub-Conservative': False, 'Nested Units': True, 'Safe': True, 'Deadlock': False, 'Reversible': None, 'Quasi Live': True, 'Live': None}.
Known tools are: [{'Time': 11966, 'Memory': 2380, 'Tool': 'marcie'}, {'Time': 12519, 'Memory': 2379.75, 'Tool': 'marcie'}, {'Time': 16766, 'Memory': 887.26, 'Tool': 'gspn'}, {'Time': 36315, 'Memory': 4368.16, 'Tool': 'gspn'}, {'Time': 53146, 'Memory': 2049.33, 'Tool': 'itstools'}, {'Time': 53586, 'Memory': 2228.16, 'Tool': 'itstools'}, {'Time': 3017258, 'Memory': 539.55, 'Tool': 'lola'}, {'Time': 3024292, 'Memory': 538.34, 'Tool': 'lola'}].
Learned tools are: [{'Tool': 'lola'}].
Learned tool lola is 252.15259903058666x far from the best tool marcie.
ReachabilityCardinality lola ARMCacheCoherence-PT-none...

Time: 3600 - MCC
----- Start make prepare stdout -----
----- Start make prepare stderr -----
===========================================================================================
ARMCacheCoherence-PT-none: translating PT Petri net model.pnml into LoLA format
===========================================================================================
translating PT Petri net complete


checking for too many tokens
===========================================================================================
ARMCacheCoherence-PT-none: translating PT formula ReachabilityCardinality into LoLA format
===========================================================================================
translating formula complete
touch formulae;
----- Start make result stderr -----
----- Start make result stdout -----
ReachabilityCardinality @ ARMCacheCoherence-PT-none @ 3536 seconds
make: [verify] Error 134 (ignored)
Makefile:222: recipe for target 'verify' failed
----- Start make result stderr -----
----- Start make result stdout -----
lola: LoLA will run for 3536 seconds at most (--timelimit)
lola: NET
lola: reading net from model.pnml.lola
lola: finished parsing
lola: closed net file model.pnml.lola
lola: 33763/65536 symbol table entries, 18925 collisions
lola: preprocessing...
lola: finding significant places
lola: 87 places, 33676 transitions, 75 significant places
lola: computing forward-conflicting sets
lola: computing back-conflicting sets
lola: 1209 transition conflict sets
lola: TASK
lola: reading formula from ARMCacheCoherence-PT-none-ReachabilityCardinality.task
lola: E (F ((3 <= p12))) : A (G (((p17 <= 2) OR (p60 + 1 <= p43)))) : E (F ((3 <= p76))) : E (F (((p44 <= 2) AND (p80 <= 1) AND ((p17 + 1 <= p27) OR (p65 + 1 <= p7))))) : E (F (((3 <= p52) AND ((p27 <= p12) OR (p16 <= p70) OR (p5 <= 0))))) : A (G (((p33 <= p41) OR ((p75 <= 0) AND ((p30 <= p2) OR (1 <= p29)))))) : E (F ((2 <= p31))) : A (G ((p62 <= 2))) : A (G (((p41 <= p49) OR (p16 <= p52) OR (p5 <= 0) OR ((p15 <= 1) AND (p66 + 1 <= p71))))) : E (F ((3 <= p65))) : E (F ((3 <= p57))) : E (F (((2 <= p50) AND (p61 <= p81) AND (p11 + 1 <= p38) AND (p16 <= 0)))) : E (F ((3 <= p82))) : A (G (((p0 <= 1) OR (p22 <= 2) OR (3 <= p7)))) : A (G ((p21 <= 2))) : A (G (((p51 <= p34) OR (p66 <= p32) OR (p45 <= p33) OR (p30 <= p20) OR (p51 <= 2))))
lola: computing a collection of formulas
lola: RUNNING
lola: subprocess 0 will run for 220 seconds at most (--localtimelimit=-1)
lola: ========================================
lola: ...considering subproblem: E (F ((3 <= p12)))
lola: ========================================
lola: SUBTASK
lola: checking reachability
lola: Planning: workflow for reachability check: stateequation||search (--findpath=off)
lola: STORE
lola: using a bit-perfect encoder (--encoder=bit)
lola: using 12 bytes per marking, with 21 unused bits
lola: using a prefix tree store (--store=prefix)
lola: SEARCH (state space)
lola: state space: using reachability graph (--search=depth)
lola: state space: using reachability preserving stubborn set method with insertion algorithm (--stubborn=tarjan)
lola: RUNNING
lola: state equation: Generated DNF with 1 literals and 1 conjunctive subformulas
lola: state equation: write sara problem file to ARMCacheCoherence-PT-none-ReachabilityCardinality.sara
lola: state equation: calling and running sara
sara: try reading problem file ARMCacheCoherence-PT-none-ReachabilityCardinality.sara.
lola: sara is running 0 secs || 22 markings, 21 edges, 4 markings/sec, 0 secs
lola: sara is running 5 secs || 51 markings, 61 edges, 6 markings/sec, 5 secs
lola: sara is running 10 secs || 83 markings, 101 edges, 6 markings/sec, 10 secs
lola: sara is running 15 secs || 117 markings, 148 edges, 7 markings/sec, 15 secs
lola: sara is running 20 secs || 151 markings, 523 edges, 7 markings/sec, 20 secs
lola: sara is running 25 secs || 189 markings, 848 edges, 8 markings/sec, 25 secs
lola: sara is running 30 secs || 227 markings, 1320 edges, 8 markings/sec, 30 secs
lola: sara is running 35 secs || 263 markings, 1657 edges, 7 markings/sec, 35 secs
lola: sara is running 40 secs || 300 markings, 2558 edges, 7 markings/sec, 40 secs
lola: sara is running 45 secs || 335 markings, 2892 edges, 7 markings/sec, 45 secs
lola: sara is running 50 secs || 374 markings, 3329 edges, 8 markings/sec, 50 secs
lola: sara is running 55 secs || 409 markings, 3527 edges, 7 markings/sec, 55 secs
lola: sara is running 60 secs || 450 markings, 3832 edges, 8 markings/sec, 60 secs
lola: sara is running 65 secs || 494 markings, 4595 edges, 9 markings/sec, 65 secs
lola: sara is running 70 secs || 533 markings, 5628 edges, 8 markings/sec, 70 secs
lola: sara is running 75 secs || 571 markings, 5837 edges, 8 markings/sec, 75 secs
lola: sara is running 80 secs || 610 markings, 6216 edges, 8 markings/sec, 80 secs
lola: sara is running 85 secs || 649 markings, 6490 edges, 8 markings/sec, 85 secs
lola: sara is running 90 secs || 689 markings, 7014 edges, 8 markings/sec, 90 secs
lola: sara is running 95 secs || 731 markings, 7711 edges, 8 markings/sec, 95 secs
lola: sara is running 100 secs || 771 markings, 7844 edges, 8 markings/sec, 100 secs
lola: sara is running 105 secs || 812 markings, 8241 edges, 8 markings/sec, 105 secs
lola: sara is running 110 secs || 849 markings, 8298 edges, 7 markings/sec, 110 secs
lola: sara is running 115 secs || 885 markings, 8405 edges, 7 markings/sec, 115 secs
lola: sara is running 120 secs || 925 markings, 9127 edges, 8 markings/sec, 120 secs
lola: sara is running 125 secs || 972 markings, 9454 edges, 9 markings/sec, 125 secs
lola: sara is running 130 secs || 1011 markings, 9949 edges, 8 markings/sec, 130 secs
lola: sara is running 135 secs || 1049 markings, 10601 edges, 8 markings/sec, 135 secs
lola: sara is running 140 secs || 1088 markings, 10819 edges, 8 markings/sec, 140 secs
lola: sara is running 145 secs || 1128 markings, 11179 edges, 8 markings/sec, 145 secs
lola: sara is running 150 secs || 1168 markings, 11595 edges, 8 markings/sec, 150 secs
lola: sara is running 155 secs || 1203 markings, 12026 edges, 7 markings/sec, 155 secs
lola: sara is running 160 secs || 1239 markings, 12583 edges, 7 markings/sec, 160 secs
lola: sara is running 165 secs || 1279 markings, 13303 edges, 8 markings/sec, 165 secs
lola: sara is running 170 secs || 1312 markings, 14122 edges, 7 markings/sec, 170 secs
lola: sara is running 175 secs || 1347 markings, 14960 edges, 7 markings/sec, 175 secs
lola: sara is running 180 secs || 1378 markings, 15864 edges, 6 markings/sec, 180 secs
lola: sara is running 185 secs || 1416 markings, 16739 edges, 8 markings/sec, 185 secs
lola: sara is running 190 secs || 1453 markings, 17128 edges, 7 markings/sec, 190 secs
lola: sara is running 195 secs || 1491 markings, 17675 edges, 8 markings/sec, 195 secs
lola: sara is running 200 secs || 1528 markings, 18137 edges, 7 markings/sec, 200 secs
lola: sara is running 205 secs || 1553 markings, 18556 edges, 5 markings/sec, 205 secs
lola: sara is running 210 secs || 1581 markings, 18769 edges, 6 markings/sec, 210 secs
lola: local time limit reached - aborting
lola: Child process aborted or communication problem between parent and child process
terminate called after throwing an instance of 'std::runtime_error'
what(): parse error at position 0: unexpected character, last read: '
Aborted (core dumped)
FORMULA ARMCacheCoherence-PT-none-ReachabilityCardinality-0 CANNOT_COMPUTE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION STUBBORN_SETS TOPOLOGICAL USE_NUPN
FORMULA ARMCacheCoherence-PT-none-ReachabilityCardinality-1 CANNOT_COMPUTE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION STUBBORN_SETS TOPOLOGICAL USE_NUPN
FORMULA ARMCacheCoherence-PT-none-ReachabilityCardinality-2 CANNOT_COMPUTE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION STUBBORN_SETS TOPOLOGICAL USE_NUPN
FORMULA ARMCacheCoherence-PT-none-ReachabilityCardinality-3 CANNOT_COMPUTE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION STUBBORN_SETS TOPOLOGICAL USE_NUPN
FORMULA ARMCacheCoherence-PT-none-ReachabilityCardinality-4 CANNOT_COMPUTE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION STUBBORN_SETS TOPOLOGICAL USE_NUPN
FORMULA ARMCacheCoherence-PT-none-ReachabilityCardinality-5 CANNOT_COMPUTE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION STUBBORN_SETS TOPOLOGICAL USE_NUPN
FORMULA ARMCacheCoherence-PT-none-ReachabilityCardinality-6 CANNOT_COMPUTE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION STUBBORN_SETS TOPOLOGICAL USE_NUPN
FORMULA ARMCacheCoherence-PT-none-ReachabilityCardinality-7 CANNOT_COMPUTE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION STUBBORN_SETS TOPOLOGICAL USE_NUPN
FORMULA ARMCacheCoherence-PT-none-ReachabilityCardinality-8 CANNOT_COMPUTE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION STUBBORN_SETS TOPOLOGICAL USE_NUPN
FORMULA ARMCacheCoherence-PT-none-ReachabilityCardinality-9 CANNOT_COMPUTE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION STUBBORN_SETS TOPOLOGICAL USE_NUPN
FORMULA ARMCacheCoherence-PT-none-ReachabilityCardinality-10 CANNOT_COMPUTE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION STUBBORN_SETS TOPOLOGICAL USE_NUPN
FORMULA ARMCacheCoherence-PT-none-ReachabilityCardinality-11 CANNOT_COMPUTE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION STUBBORN_SETS TOPOLOGICAL USE_NUPN
FORMULA ARMCacheCoherence-PT-none-ReachabilityCardinality-12 CANNOT_COMPUTE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION STUBBORN_SETS TOPOLOGICAL USE_NUPN
FORMULA ARMCacheCoherence-PT-none-ReachabilityCardinality-13 CANNOT_COMPUTE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION STUBBORN_SETS TOPOLOGICAL USE_NUPN
FORMULA ARMCacheCoherence-PT-none-ReachabilityCardinality-14 CANNOT_COMPUTE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION STUBBORN_SETS TOPOLOGICAL USE_NUPN
FORMULA ARMCacheCoherence-PT-none-ReachabilityCardinality-15 CANNOT_COMPUTE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION STUBBORN_SETS TOPOLOGICAL USE_NUPN
----- Kill lola and sara stdout -----
----- Kill lola and sara stderr -----
----- Finished stderr -----
----- Finished stdout -----

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="ARMCacheCoherence-PT-none"
export BK_EXAMINATION="ReachabilityCardinality"
export BK_TOOL="mcc4mcc-full"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

tar xzf /home/mcc/BenchKit/INPUTS/ARMCacheCoherence-PT-none.tgz
mv ARMCacheCoherence-PT-none execution
cd execution
pwd
ls -lh

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3637"
echo " Executing tool mcc4mcc-full"
echo " Input is ARMCacheCoherence-PT-none, examination is ReachabilityCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r010-qhx2-152646140200005"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' ReachabilityCardinality.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;