fond
Model Checking Contest 2018
8th edition, Bratislava, Slovakia, June 26, 2018
Execution of r007-qhx2-152646136400011
Last Updated
June 26, 2018

About the Execution of Irma.struct for AirplaneLD-COL-0010

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
489.320 16234.00 23457.00 1216.40 FTTFFFFTTFFFFFFF normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Waiting for the VM to be ready (probing ssh)
...................................................................................................................................................
/home/mcc/execution
total 200K
-rw-r--r-- 1 mcc users 4.0K May 15 18:54 CTLCardinality.txt
-rw-r--r-- 1 mcc users 20K May 15 18:54 CTLCardinality.xml
-rw-r--r-- 1 mcc users 2.1K May 15 18:54 CTLFireability.txt
-rw-r--r-- 1 mcc users 12K May 15 18:54 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K May 15 18:49 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.2K May 15 18:49 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 2.5K May 15 18:54 LTLCardinality.txt
-rw-r--r-- 1 mcc users 9.7K May 15 18:54 LTLCardinality.xml
-rw-r--r-- 1 mcc users 1.9K May 15 18:54 LTLFireability.txt
-rw-r--r-- 1 mcc users 9.3K May 15 18:54 LTLFireability.xml
-rw-r--r-- 1 mcc users 4.1K May 15 18:54 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 20K May 15 18:54 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 110 May 15 18:54 ReachabilityDeadlock.txt
-rw-r--r-- 1 mcc users 348 May 15 18:54 ReachabilityDeadlock.xml
-rw-r--r-- 1 mcc users 2.7K May 15 18:54 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 16K May 15 18:54 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.8K May 15 18:54 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.8K May 15 18:54 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 May 15 18:49 equiv_pt
-rw-r--r-- 1 mcc users 5 May 15 18:49 instance
-rw-r--r-- 1 mcc users 5 May 15 18:49 iscolored
-rw-r--r-- 1 mcc users 40K May 15 18:49 model.pnml
=====================================================================
Generated by BenchKit 2-3637
Executing tool irma4mcc-structural
Input is AirplaneLD-COL-0010, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r007-qhx2-152646136400011
=====================================================================


--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME AirplaneLD-COL-0010-CTLFireability-00
FORMULA_NAME AirplaneLD-COL-0010-CTLFireability-01
FORMULA_NAME AirplaneLD-COL-0010-CTLFireability-02
FORMULA_NAME AirplaneLD-COL-0010-CTLFireability-03
FORMULA_NAME AirplaneLD-COL-0010-CTLFireability-04
FORMULA_NAME AirplaneLD-COL-0010-CTLFireability-05
FORMULA_NAME AirplaneLD-COL-0010-CTLFireability-06
FORMULA_NAME AirplaneLD-COL-0010-CTLFireability-07
FORMULA_NAME AirplaneLD-COL-0010-CTLFireability-08
FORMULA_NAME AirplaneLD-COL-0010-CTLFireability-09
FORMULA_NAME AirplaneLD-COL-0010-CTLFireability-10
FORMULA_NAME AirplaneLD-COL-0010-CTLFireability-11
FORMULA_NAME AirplaneLD-COL-0010-CTLFireability-12
FORMULA_NAME AirplaneLD-COL-0010-CTLFireability-13
FORMULA_NAME AirplaneLD-COL-0010-CTLFireability-14
FORMULA_NAME AirplaneLD-COL-0010-CTLFireability-15

=== Now, execution of the tool begins

BK_START 1526673663582


BK_STOP 1526673679816

--------------------
content from stderr:

Prefix is 75f5f979.
Reading known information in /usr/share/mcc4mcc/75f5f979-known.json.
Reading learned information in /usr/share/mcc4mcc/75f5f979-learned.json.
Reading value translations in /usr/share/mcc4mcc/75f5f979-values.json.
Using directory /home/mcc/execution for input, as it contains a model.pnml file.
Using AirplaneLD-COL-0010 as instance name.
Using AirplaneLD as model name.
Using algorithm or tool bmdt.
Model characteristics are: {'Examination': 'CTLFireability', 'Place/Transition': True, 'Colored': True, 'Relative-Time': 1, 'Relative-Memory': 1, 'Ordinary': True, 'Simple Free Choice': False, 'Extended Free Choice': False, 'State Machine': False, 'Marked Graph': False, 'Connected': True, 'Strongly Connected': False, 'Source Place': True, 'Sink Place': True, 'Source Transition': False, 'Sink Transition': False, 'Loop Free': False, 'Conservative': False, 'Sub-Conservative': True, 'Nested Units': False, 'Safe': None, 'Deadlock': None, 'Reversible': None, 'Quasi Live': None, 'Live': False}.
Known tools are: [{'Time': 259, 'Memory': 101.02, 'Tool': 'gspn'}, {'Time': 884, 'Memory': 118.01, 'Tool': 'lola'}, {'Time': 932, 'Memory': 119.81, 'Tool': 'lola'}, {'Time': 2060, 'Memory': 169.27, 'Tool': 'gspn'}, {'Time': 2857, 'Memory': 1940.15, 'Tool': 'marcie'}, {'Time': 2983, 'Memory': 1623.52, 'Tool': 'marcie'}, {'Time': 4691, 'Memory': 314.18, 'Tool': 'itstools'}, {'Time': 4741, 'Memory': 314.11, 'Tool': 'itstools'}].
Learned tools are: [{'Tool': 'lola'}].
Learned tool lola is 3.413127413127413x far from the best tool gspn.
CTLFireability gspn AirplaneLD-COL-0010...
LOADING model.pnml ...
MODEL CLASS: SYMMETRIC NET
PLACES: 20
TRANSITIONS: 15
CONSTANTS: 0
TEMPLATE VARS: 0
COLOR CLASSES: 4
COLOR VARS: 3
ARCS: 56
LOADING TIME: 0.661

UNFOLDING COLORS...
MODEL CLASS: P/T NET
PLACES: 89
TRANSITIONS: 88
CONSTANTS: 0
TEMPLATE VARS: 0
ARCS: 333
UNFOLDING TIME: 0.479

SAVING AS model.(net/def) ...
SAVING TIME: 0.072
SAVING NAME MAP FILE model.id2name ...
SAVING UNFOLDING MAP FILE model.unfmap ...
TOTAL TIME: 2.28
OK.
Can't open file model.pin for r
GreatSPN/Meddly.
Copyright (C) 1987-2017, University of Torino, Italy.

Based on MEDDLY version 0.14.765
Copyright (C) 2009, Iowa State University Research Foundation, Inc.
website: http://meddly.sourceforge.net

Process ID: 45
MODEL NAME: model
89 places, 88 transitions.

Setting MEDDLY cache to 67108864 entries.
FORMULA AirplaneLD-COL-0010-CTLFireability-00 FALSE TECHNIQUES DECISION_DIAGRAMS SEQUENTIAL_PROCESSING UNFOLDING_TO_PT USE_NUPN TOPOLOGICAL
FORMULA AirplaneLD-COL-0010-CTLFireability-01 TRUE TECHNIQUES DECISION_DIAGRAMS SEQUENTIAL_PROCESSING UNFOLDING_TO_PT USE_NUPN TOPOLOGICAL
FORMULA AirplaneLD-COL-0010-CTLFireability-02 TRUE TECHNIQUES DECISION_DIAGRAMS SEQUENTIAL_PROCESSING UNFOLDING_TO_PT USE_NUPN TOPOLOGICAL
FORMULA AirplaneLD-COL-0010-CTLFireability-03 FALSE TECHNIQUES DECISION_DIAGRAMS SEQUENTIAL_PROCESSING UNFOLDING_TO_PT USE_NUPN TOPOLOGICAL
FORMULA AirplaneLD-COL-0010-CTLFireability-04 FALSE TECHNIQUES DECISION_DIAGRAMS SEQUENTIAL_PROCESSING UNFOLDING_TO_PT USE_NUPN TOPOLOGICAL
FORMULA AirplaneLD-COL-0010-CTLFireability-05 FALSE TECHNIQUES DECISION_DIAGRAMS SEQUENTIAL_PROCESSING UNFOLDING_TO_PT USE_NUPN TOPOLOGICAL
FORMULA AirplaneLD-COL-0010-CTLFireability-06 FALSE TECHNIQUES DECISION_DIAGRAMS SEQUENTIAL_PROCESSING UNFOLDING_TO_PT USE_NUPN TOPOLOGICAL
FORMULA AirplaneLD-COL-0010-CTLFireability-07 TRUE TECHNIQUES DECISION_DIAGRAMS SEQUENTIAL_PROCESSING UNFOLDING_TO_PT USE_NUPN TOPOLOGICAL
FORMULA AirplaneLD-COL-0010-CTLFireability-08 TRUE TECHNIQUES DECISION_DIAGRAMS SEQUENTIAL_PROCESSING UNFOLDING_TO_PT USE_NUPN TOPOLOGICAL
FORMULA AirplaneLD-COL-0010-CTLFireability-09 FALSE TECHNIQUES DECISION_DIAGRAMS SEQUENTIAL_PROCESSING UNFOLDING_TO_PT USE_NUPN TOPOLOGICAL
FORMULA AirplaneLD-COL-0010-CTLFireability-10 FALSE TECHNIQUES DECISION_DIAGRAMS SEQUENTIAL_PROCESSING UNFOLDING_TO_PT USE_NUPN TOPOLOGICAL
FORMULA AirplaneLD-COL-0010-CTLFireability-11 FALSE TECHNIQUES DECISION_DIAGRAMS SEQUENTIAL_PROCESSING UNFOLDING_TO_PT USE_NUPN TOPOLOGICAL
FORMULA AirplaneLD-COL-0010-CTLFireability-12 FALSE TECHNIQUES DECISION_DIAGRAMS SEQUENTIAL_PROCESSING UNFOLDING_TO_PT USE_NUPN TOPOLOGICAL
FORMULA AirplaneLD-COL-0010-CTLFireability-13 FALSE TECHNIQUES DECISION_DIAGRAMS SEQUENTIAL_PROCESSING UNFOLDING_TO_PT USE_NUPN TOPOLOGICAL
FORMULA AirplaneLD-COL-0010-CTLFireability-14 FALSE TECHNIQUES DECISION_DIAGRAMS SEQUENTIAL_PROCESSING UNFOLDING_TO_PT USE_NUPN TOPOLOGICAL
FORMULA AirplaneLD-COL-0010-CTLFireability-15 FALSE TECHNIQUES DECISION_DIAGRAMS SEQUENTIAL_PROCESSING UNFOLDING_TO_PT USE_NUPN TOPOLOGICAL
Ok.

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="AirplaneLD-COL-0010"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="irma4mcc-structural"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

tar xzf /home/mcc/BenchKit/INPUTS/AirplaneLD-COL-0010.tgz
mv AirplaneLD-COL-0010 execution
cd execution
pwd
ls -lh

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3637"
echo " Executing tool irma4mcc-structural"
echo " Input is AirplaneLD-COL-0010, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r007-qhx2-152646136400011"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;