About the Execution of ITS-Tools.L for RefineWMG-PT-100100
Execution Summary | |||||
Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
15755.200 | 137674.00 | 286193.00 | 139.50 | FFFFFFTFTTFFFFFF | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Waiting for the VM to be ready (probing ssh)
....................
/home/mcc/execution
total 384K
-rw-r--r-- 1 mcc users 3.3K May 30 22:44 CTLCardinality.txt
-rw-r--r-- 1 mcc users 18K May 30 22:44 CTLCardinality.xml
-rw-r--r-- 1 mcc users 2.5K May 29 16:52 CTLFireability.txt
-rw-r--r-- 1 mcc users 17K May 29 16:52 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K May 24 11:17 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 5.2K May 24 11:17 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 2.5K May 28 11:11 LTLCardinality.txt
-rw-r--r-- 1 mcc users 11K May 28 11:11 LTLCardinality.xml
-rw-r--r-- 1 mcc users 1.8K May 28 09:19 LTLFireability.txt
-rw-r--r-- 1 mcc users 6.8K May 28 09:19 LTLFireability.xml
-rw-r--r-- 1 mcc users 1 May 24 11:17 NewModel
-rw-r--r-- 1 mcc users 3.6K May 28 07:31 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 19K May 28 07:31 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 111 May 26 06:33 ReachabilityDeadlock.txt
-rw-r--r-- 1 mcc users 349 May 26 06:33 ReachabilityDeadlock.xml
-rw-r--r-- 1 mcc users 2.5K May 27 05:06 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 14K May 27 05:06 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.7K May 28 07:35 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.7K May 28 07:35 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 24 11:17 equiv_col
-rw-r--r-- 1 mcc users 7 May 24 11:17 instance
-rw-r--r-- 1 mcc users 6 May 24 11:17 iscolored
-rw-r--r-- 1 mcc users 217K May 24 11:17 model.pnml
=====================================================================
Generated by BenchKit 2-3637
Executing tool itstoolsl
Input is RefineWMG-PT-100100, examination is LTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r285-csrt-152749176700753
=====================================================================
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME RefineWMG-PT-100-100-LTLFireability-00
FORMULA_NAME RefineWMG-PT-100-100-LTLFireability-01
FORMULA_NAME RefineWMG-PT-100-100-LTLFireability-02
FORMULA_NAME RefineWMG-PT-100-100-LTLFireability-03
FORMULA_NAME RefineWMG-PT-100-100-LTLFireability-04
FORMULA_NAME RefineWMG-PT-100-100-LTLFireability-05
FORMULA_NAME RefineWMG-PT-100-100-LTLFireability-06
FORMULA_NAME RefineWMG-PT-100-100-LTLFireability-07
FORMULA_NAME RefineWMG-PT-100-100-LTLFireability-08
FORMULA_NAME RefineWMG-PT-100-100-LTLFireability-09
FORMULA_NAME RefineWMG-PT-100-100-LTLFireability-10
FORMULA_NAME RefineWMG-PT-100-100-LTLFireability-11
FORMULA_NAME RefineWMG-PT-100-100-LTLFireability-12
FORMULA_NAME RefineWMG-PT-100-100-LTLFireability-13
FORMULA_NAME RefineWMG-PT-100-100-LTLFireability-14
FORMULA_NAME RefineWMG-PT-100-100-LTLFireability-15
=== Now, execution of the tool begins
BK_START 1528048526303
Converted graph to binary with : CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.louvain.binaries_1.0.0.201805241334/bin/convert-linux64, -i, /tmp/graph3570477189696362240.txt, -o, /tmp/graph3570477189696362240.bin, -w, /tmp/graph3570477189696362240.weights], workingDir=null]
Built communities with : CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.louvain.binaries_1.0.0.201805241334/bin/louvain-linux64, /tmp/graph3570477189696362240.bin, -l, -1, -v, -w, /tmp/graph3570477189696362240.weights, -q, 0, -e, 0.001], workingDir=null]
Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805241334/bin/its-ltl-linux64, --gc-threshold, 2000000, -i, /home/mcc/execution/LTLFireability.pnml.gal, -t, CGAL, -LTL, /home/mcc/execution/LTLFireability.ltl, -c, -stutter-deadlock], workingDir=/home/mcc/execution]
its-ltl command run as :
/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805241334/bin/its-ltl-linux64 --gc-threshold 2000000 -i /home/mcc/execution/LTLFireability.pnml.gal -t CGAL -LTL /home/mcc/execution/LTLFireability.ltl -c -stutter-deadlock
Read 16 LTL properties
Checking formula 0 : !(((("(i6.u48.p97>=1)")U("(i2.u25.p50>=1)"))U(("(i10.u80.p165>=1)")U(F("(((i2.u17.p33>=1)&&(i2.u18.p34>=1))&&(i2.u16.p36>=1))")))))
Formula 0 simplified : !(("(i6.u48.p97>=1)" U "(i2.u25.p50>=1)") U ("(i10.u80.p165>=1)" U F"(((i2.u17.p33>=1)&&(i2.u18.p34>=1))&&(i2.u16.p36>=1))"))
built 72 ordering constraints for composite.
built 4 ordering constraints for composite.
built 3 ordering constraints for composite.
built 6 ordering constraints for composite.
built 3 ordering constraints for composite.
built 4 ordering constraints for composite.
built 4 ordering constraints for composite.
built 3 ordering constraints for composite.
built 4 ordering constraints for composite.
built 3 ordering constraints for composite.
built 5 ordering constraints for composite.
built 4 ordering constraints for composite.
built 4 ordering constraints for composite.
built 3 ordering constraints for composite.
built 5 ordering constraints for composite.
built 3 ordering constraints for composite.
built 3 ordering constraints for composite.
built 3 ordering constraints for composite.
built 5 ordering constraints for composite.
built 3 ordering constraints for composite.
built 3 ordering constraints for composite.
built 4 ordering constraints for composite.
built 5 ordering constraints for composite.
built 4 ordering constraints for composite.
built 4 ordering constraints for composite.
built 3 ordering constraints for composite.
built 3 ordering constraints for composite.
built 5 ordering constraints for composite.
built 3 ordering constraints for composite.
built 4 ordering constraints for composite.
built 4 ordering constraints for composite.
built 5 ordering constraints for composite.
built 3 ordering constraints for composite.
built 3 ordering constraints for composite.
built 5 ordering constraints for composite.
built 4 ordering constraints for composite.
built 3 ordering constraints for composite.
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
// Phase 1: matrix 403 rows 504 cols
invariant :i8:u57:p117 + i8:u57:p118 = 100
invariant :i29:u207:p424 + i29:u207:p425 = 100
invariant :i19:u136:p277 + i19:u136:p278 = 100
invariant :i25:u175:p357 + i25:u175:p358 = 100
invariant :i3:u27:p54 + i3:u27:p55 = 100
invariant :i27:u193:p394 + i27:u193:p395 = 100
invariant :i5:u43:p87 + i5:u43:p88 = 100
invariant :i15:u109:p222 + i15:u109:p223 = 100
invariant :i10:u72:p147 + i10:u72:p148 = 100
invariant :i1:u15:p29 + i1:u15:p30 = 100
invariant :i5:u41:p82 + i5:u41:p83 = 100
invariant :i27:u187:p382 + i27:u187:p383 = 100
invariant :i6:u49:p99 + i6:u49:p100 = 100
invariant :i28:u197:p402 + i28:u197:p403 = 100
invariant :i7:u55:p112 + i7:u55:p113 = 100
invariant :i22:u159:p324 + i22:u159:p325 = 100
invariant :i11:u84:p172 + i11:u84:p173 = 100
invariant :i27:u190:p387 + i27:u190:p388 = 100
invariant :i13:u97:p199 + i13:u97:p200 = 100
invariant :i30:u214:p439 + i30:u214:p440 = 100
invariant :i4:u36:p72 + i4:u36:p73 = 100
invariant :i1:u10:p19 + i1:u10:p20 = 100
invariant :i13:u94:p194 + i13:u94:p195 = 100
invariant :i24:u167:p342 + i24:u167:p343 = 100
invariant :i30:u213:p437 + i30:u213:p438 = 100
invariant :i8:u58:p119 + i8:u58:p120 = 100
invariant :i10:u77:p157 + i10:u77:p158 = 100
invariant :i0:u4:p6 + i0:u4:p11 + i0:u4:p16 + i1:u11:p21 + i1:u11:p26 + i2:u16:p31 + i2:u16:p36 + i2:u16:p41 + i2:u23:p46 + i2:u23:p51 + i3:u30:p56 + i3:u30:p61 + i4:u33:p66 + i4:u33:p71 + i4:u33:p76 + i5:u40:p81 + i5:u40:p86 + i5:u40:p91 + i6:u47:p96 + i6:u47:p101 + i7:u52:p106 + i7:u52:p111 + i7:u52:p116 + i8:u59:p121 + i8:u59:p126 + i9:u64:p131 + i9:u64:p136 + i9:u69:p141 + i9:u69:p146 + i10:u76:p151 + i10:u76:p156 + i10:u76:p161 + i11:u81:p166 + i11:u81:p171 + i11:u81:p176 + i12:u88:p181 + i12:u88:p186 + i13:u95:p191 + i13:u95:p196 + i13:u98:p201 + i13:u98:p206 + i14:u103:p211 + i14:u103:p216 + i15:u108:p221 + i15:u108:p226 + i16:u113:p231 + i16:u113:p236 + i17:u118:p241 + i17:u118:p246 + i17:u123:p251 + i17:u123:p256 + i18:u128:p261 + i18:u128:p266 + i19:u133:p271 + i19:u133:p276 + i20:u140:p281 + i20:u140:p286 + i20:u140:p291 + i21:u145:p296 + i21:u145:p301 + i21:u150:p306 + i21:u150:p311 + i22:u155:p316 + i22:u155:p321 + i22:u155:p326 + i23:u162:p331 + i23:u162:p336 + i23:u162:p341 + i24:u169:p346 + i24:u169:p351 + i25:u174:p356 + i25:u174:p361 + i26:u181:p366 + i26:u181:p371 + i26:u184:p376 + i26:u184:p381 + i27:u189:p386 + i27:u189:p391 + i28:u194:p396 + i28:u194:p401 + i28:u194:p406 + i29:u201:p411 + i29:u201:p416 + i29:u201:p421 + i30:u208:p426 + i30:u208:p431 + i30:u215:p436 + i30:u215:p441 + i31:u220:p446 + i31:u220:p451 + i32:u223:p456 + i32:u223:p461 + i33:u228:p466 + i33:u228:p471 + i33:u233:p476 + i33:u233:p481 + i34:u240:p486 + i34:u240:p491 + i34:u240:p496 + i35:u0:p + i35:u0:pprime + i35:u0:p1 = 7
invariant :i18:u131:p267 + i18:u131:p268 = 100
invariant :i30:u211:p432 + i30:u211:p433 = 100
invariant :i8:u61:p124 + i8:u61:p125 = 100
invariant :i21:u146:p297 + i21:u146:p298 = 100
invariant :i24:u168:p344 + i24:u168:p345 = 100
invariant :i26:u186:p379 + i26:u186:p380 = 100
invariant :i17:u125:p254 + i17:u125:p255 = 100
invariant :i23:u166:p339 + i23:u166:p340 = 100
invariant :i9:u70:p142 + i9:u70:p143 = 100
invariant :i17:u120:p244 + i17:u120:p245 = 100
invariant :i0:u5:p7 + i0:u5:p8 = 100
invariant :i9:u68:p139 + i9:u68:p140 = 100
invariant :i25:u177:p362 + i25:u177:p363 = 100
invariant :i20:u142:p289 + i20:u142:p290 = 100
invariant :i28:u196:p399 + i28:u196:p400 = 100
invariant :i15:u111:p227 + i15:u111:p228 = 100
invariant :i17:u119:p242 + i17:u119:p243 = 100
invariant :i15:u112:p229 + i15:u112:p230 = 100
invariant :i6:u51:p104 + i6:u51:p105 = 100
invariant :i13:u99:p202 + i13:u99:p203 = 100
invariant :i20:u138:p282 + i20:u138:p283 = 100
invariant :i16:u114:p232 + i16:u114:p233 = 100
invariant :i16:u116:p237 + i16:u116:p238 = 100
invariant :i35:u3:p4 + i35:u3:p5 = 100
invariant :i9:u71:p144 + i9:u71:p145 = 100
invariant :i27:u192:p392 + i27:u192:p393 = 100
invariant :i30:u212:p434 + i30:u212:p435 = 100
invariant :i34:u237:p484 + i34:u237:p485 = 100
invariant :i3:u31:p62 + i3:u31:p63 = 100
invariant :i10:u79:p162 + i10:u79:p163 = 100
invariant :i0:u6:p9 + i0:u6:p10 = 100
invariant :i17:u122:p249 + i17:u122:p250 = 100
invariant :i7:u54:p109 + i7:u54:p110 = 100
invariant :i32:u227:p464 + i32:u227:p465 = 100
invariant :i4:u37:p74 + i4:u37:p75 = 100
invariant :i33:u230:p469 + i33:u230:p470 = 100
invariant :i27:u188:p384 + i27:u188:p385 = 100
invariant :i34:u236:p482 + i34:u236:p483 = 100
invariant :i15:u110:p224 + i15:u110:p225 = 100
invariant :i26:u183:p374 + i26:u183:p375 = 100
invariant :i12:u92:p189 + i12:u92:p190 = 100
invariant :i0:u7:p12 + i0:u7:p13 = 100
invariant :i15:u106:p217 + i15:u106:p218 = 100
invariant :i31:u217:p444 + i31:u217:p445 = 100
invariant :i11:u82:p167 + i11:u82:p168 = 100
invariant :i22:u156:p317 + i22:u156:p318 = 100
invariant :i31:u218:p447 + i31:u218:p448 = 100
invariant :i17:u124:p252 + i17:u124:p253 = 100
invariant :i14:u101:p207 + i14:u101:p208 = 100
invariant :i25:u176:p359 + i25:u176:p360 = 100
invariant :i33:u235:p479 + i33:u235:p480 = 100
invariant :i9:u65:p132 + i9:u65:p133 = 100
invariant :i35:u243:p497 + i35:u243:p498 = 100
invariant :i35:u244:p499 + i35:u244:p500 = 100
invariant :i33:u229:p467 + i33:u229:p468 = 100
invariant :i20:u141:p287 + i20:u141:p288 = 100
invariant :i6:u50:p102 + i6:u50:p103 = 100
invariant :i18:u126:p257 + i18:u126:p258 = 100
invariant :i26:u185:p377 + i26:u185:p378 = 100
invariant :i9:u66:p134 + i9:u66:p135 = 100
invariant :i19:u137:p279 + i19:u137:p280 = 100
invariant :i2:u20:p39 + i2:u20:p40 = 100
invariant :i1:u12:p22 + i1:u12:p23 = 100
invariant :i31:u216:p442 + i31:u216:p443 = 100
invariant :i34:u238:p487 + i34:u238:p488 = 100
invariant :i5:u44:p89 + i5:u44:p90 = 100
invariant :i23:u161:p329 + i23:u161:p330 = 100
invariant :i18:u127:p259 + i18:u127:p260 = 100
invariant :i5:u42:p84 + i5:u42:p85 = 100
invariant :i4:u38:p77 + i4:u38:p78 = 100
invariant :i20:u144:p294 + i20:u144:p295 = 100
invariant :i12:u90:p184 + i12:u90:p185 = 100
invariant :i14:u104:p212 + i14:u104:p213 = 100
invariant :i31:u222:p454 + i31:u222:p455 = 100
invariant :i22:u154:p314 + i22:u154:p315 = 100
invariant :i23:u165:p337 + i23:u165:p338 = 100
invariant :i35:u1:psecond + i35:u1:pterce = 5
invariant :i6:u45:p92 + i6:u45:p93 = 100
invariant :i14:u102:p209 + i14:u102:p210 = 100
invariant :i2:u18:p34 + i2:u18:p35 = 100
invariant :i23:u160:p327 + i23:u160:p328 = 100
invariant :i2:u21:p42 + i2:u21:p43 = 100
invariant :i7:u53:p107 + i7:u53:p108 = 100
invariant :i10:u75:p154 + i10:u75:p155 = 100
invariant :i7:u56:p114 + i7:u56:p115 = 100
invariant :i17:u121:p247 + i17:u121:p248 = 100
invariant :i23:u163:p332 + i23:u163:p333 = 100
invariant :i1:u9:p17 + i1:u9:p18 = 100
invariant :i2:u17:p32 + i2:u17:p33 = 100
invariant :i2:u24:p47 + i2:u24:p48 = 100
invariant :i26:u182:p372 + i26:u182:p373 = 100
invariant :i24:u171:p349 + i24:u171:p350 = 100
invariant :i29:u203:p414 + i29:u203:p415 = 100
invariant :i21:u148:p302 + i21:u148:p303 = 100
invariant :i34:u241:p492 + i34:u241:p493 = 100
invariant :i28:u198:p404 + i28:u198:p405 = 100
invariant :i31:u221:p452 + i31:u221:p453 = 100
invariant :i24:u173:p354 + i24:u173:p355 = 100
invariant :i0:u8:p14 + i0:u8:p15 = 100
invariant :i26:u179:p367 + i26:u179:p368 = 100
invariant :i3:u28:p57 + i3:u28:p58 = 100
invariant :i24:u170:p347 + i24:u170:p348 = 100
invariant :i21:u152:p309 + i21:u152:p310 = 100
invariant :i14:u105:p214 + i14:u105:p215 = 100
invariant :i4:u35:p69 + i4:u35:p70 = 100
invariant :i20:u143:p292 + i20:u143:p293 = 100
invariant :i13:u100:p204 + i13:u100:p205 = 100
invariant :i24:u172:p352 + i24:u172:p353 = 100
invariant :i2:u25:p49 + i2:u25:p50 = 100
invariant :i29:u206:p422 + i29:u206:p423 = 100
invariant :i18:u130:p264 + i18:u130:p265 = 100
invariant :i29:u202:p412 + i29:u202:p413 = 100
invariant :i8:u63:p129 + i8:u63:p130 = 100
invariant :i11:u85:p174 + i11:u85:p175 = 100
invariant :i21:u149:p304 + i21:u149:p305 = 100
invariant :i11:u83:p169 + i11:u83:p170 = 100
invariant :i4:u34:p67 + i4:u34:p68 = 100
invariant :i10:u80:p164 + i10:u80:p165 = 100
invariant :i31:u219:p449 + i31:u219:p450 = 100
invariant :i16:u115:p234 + i16:u115:p235 = 100
invariant :i8:u62:p127 + i8:u62:p128 = 100
invariant :i2:u22:p44 + i2:u22:p45 = 100
invariant :i35:u2:p2 + i35:u2:p3 = 100
invariant :i21:u147:p299 + i21:u147:p300 = 100
invariant :i20:u139:p284 + i20:u139:p285 = 100
invariant :i12:u89:p182 + i12:u89:p183 = 100
invariant :i22:u153:p312 + i22:u153:p313 = 100
invariant :i3:u26:p52 + i3:u26:p53 = 100
invariant :i33:u234:p477 + i33:u234:p478 = 100
invariant :i33:u232:p474 + i33:u232:p475 = 100
invariant :i22:u157:p319 + i22:u157:p320 = 100
invariant :i25:u178:p364 + i25:u178:p365 = 100
invariant :i30:u210:p429 + i30:u210:p430 = 100
invariant :i34:u239:p489 + i34:u239:p490 = 100
invariant :i11:u87:p179 + i11:u87:p180 = 100
invariant :i10:u78:p159 + i10:u78:p160 = 100
invariant :i18:u132:p269 + i18:u132:p270 = 100
invariant :i11:u86:p177 + i11:u86:p178 = 100
invariant :i10:u73:p149 + i10:u73:p150 = 100
invariant :i12:u91:p187 + i12:u91:p188 = 100
invariant :i23:u164:p334 + i23:u164:p335 = 100
invariant :i34:u242:p494 + i34:u242:p495 = 100
invariant :i29:u205:p419 + i29:u205:p420 = 100
invariant :i33:u231:p472 + i33:u231:p473 = 100
invariant :i2:u19:p37 + i2:u19:p38 = 100
invariant :i15:u107:p219 + i15:u107:p220 = 100
invariant :i1:u13:p24 + i1:u13:p25 = 100
invariant :i18:u129:p262 + i18:u129:p263 = 100
invariant :i28:u199:p407 + i28:u199:p408 = 100
invariant :i3:u29:p59 + i3:u29:p60 = 100
invariant :i9:u67:p137 + i9:u67:p138 = 100
invariant :i10:u74:p152 + i10:u74:p153 = 100
invariant :i1:u14:p27 + i1:u14:p28 = 100
invariant :i3:u32:p64 + i3:u32:p65 = 100
invariant :i13:u96:p197 + i13:u96:p198 = 100
invariant :i29:u204:p417 + i29:u204:p418 = 100
invariant :i13:u93:p192 + i13:u93:p193 = 100
invariant :i28:u195:p397 + i28:u195:p398 = 100
invariant :i4:u39:p79 + i4:u39:p80 = 100
invariant :i28:u200:p409 + i28:u200:p410 = 100
invariant :i21:u151:p307 + i21:u151:p308 = 100
invariant :i19:u134:p272 + i19:u134:p273 = 100
invariant :i32:u224:p457 + i32:u224:p458 = 100
invariant :i8:u60:p122 + i8:u60:p123 = 100
invariant :i30:u209:p427 + i30:u209:p428 = 100
invariant :i6:u46:p94 + i6:u46:p95 = 100
invariant :i32:u225:p459 + i32:u225:p460 = 100
invariant :i19:u135:p274 + i19:u135:p275 = 100
invariant :i27:u191:p389 + i27:u191:p390 = 100
invariant :i16:u117:p239 + i16:u117:p240 = 100
invariant :i6:u48:p97 + i6:u48:p98 = 100
invariant :i26:u180:p369 + i26:u180:p370 = 100
invariant :i22:u158:p322 + i22:u158:p323 = 100
invariant :i32:u226:p462 + i32:u226:p463 = 100
Reverse transition relation is exact ! Faster fixpoint algorithm enabled.
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O3, model.c], workingDir=/home/mcc/execution]
Compilation finished in 6318 ms.
Running link step : CommandLine [args=[gcc, -shared, -o, gal.so, model.o], workingDir=/home/mcc/execution]
Link finished in 76 ms.
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, (((LTLAP0==true))U((LTLAP1==true)))U(((LTLAP2==true))U(<>((LTLAP3==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 444 ms.
FORMULA RefineWMG-PT-100-100-LTLFireability-00 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X(X((LTLAP4==true))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 122 ms.
FORMULA RefineWMG-PT-100-100-LTLFireability-01 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, <>((<>((LTLAP5==true)))U(<>(<>((LTLAP6==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 426 ms.
FORMULA RefineWMG-PT-100-100-LTLFireability-02 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, <>((LTLAP7==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 469 ms.
FORMULA RefineWMG-PT-100-100-LTLFireability-03 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, []([](<>(X((LTLAP8==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
2 unique states visited
2 strongly connected components in search stack
2 transitions explored
2 items max in DFS search stack
7929 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,79.3508,684584,1,0,1.43704e+06,21290,1390,2.3961e+06,347,163686,647965
an accepting run exists (use option '-e' to print it)
Formula 0 is FALSE accepting run found.
FORMULA RefineWMG-PT-100-100-LTLFireability-00 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 1 : !((X(X("(i15.u112.p230>=1)"))))
Formula 1 simplified : !XX"(i15.u112.p230>=1)"
5 unique states visited
5 strongly connected components in search stack
5 transitions explored
5 items max in DFS search stack
1606 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,95.4086,1102672,1,0,2.23216e+06,23988,1485,3.07779e+06,348,225395,1743484
an accepting run exists (use option '-e' to print it)
Formula 1 is FALSE accepting run found.
FORMULA RefineWMG-PT-100-100-LTLFireability-01 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 2 : !((F((F("(((i23.u163.p333>=1)&&(i23.u164.p334>=1))&&(i23.u162.p336>=1))"))U(F(F("(i30.u214.p440>=1)"))))))
Formula 2 simplified : !F(F"(((i23.u163.p333>=1)&&(i23.u164.p334>=1))&&(i23.u162.p336>=1))" U F"(i30.u214.p440>=1)")
2 unique states visited
2 strongly connected components in search stack
2 transitions explored
2 items max in DFS search stack
69 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,96.0983,1120888,1,0,2.28639e+06,23988,1514,3.1169e+06,348,225413,1805500
an accepting run exists (use option '-e' to print it)
Formula 2 is FALSE accepting run found.
FORMULA RefineWMG-PT-100-100-LTLFireability-02 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 3 : !((F("(i30.u210.p430>=1)")))
Formula 3 simplified : !F"(i30.u210.p430>=1)"
2 unique states visited
2 strongly connected components in search stack
2 transitions explored
2 items max in DFS search stack
1232 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,108.416,1271632,1,0,2.58115e+06,24217,1530,3.30373e+06,348,226926,1950548
an accepting run exists (use option '-e' to print it)
Formula 3 is FALSE accepting run found.
FORMULA RefineWMG-PT-100-100-LTLFireability-03 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 4 : !((G(G(F(X("(i21.u147.p299>=1)"))))))
Formula 4 simplified : !GFX"(i21.u147.p299>=1)"
3 unique states visited
3 strongly connected components in search stack
4 transitions explored
3 items max in DFS search stack
249 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,110.916,1287816,1,0,2.60129e+06,24306,1578,3.34851e+06,349,228872,1999663
an accepting run exists (use option '-e' to print it)
Formula 4 is FALSE accepting run found.
FORMULA RefineWMG-PT-100-100-LTLFireability-04 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 5 : !(("(i31.u217.p445>=1)"))
Formula 5 simplified : !"(i31.u217.p445>=1)"
3 unique states visited
3 strongly connected components in search stack
3 transitions explored
3 items max in DFS search stack
0 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,110.919,1287816,1,0,2.60129e+06,24306,1581,3.34851e+06,349,228872,1999680
an accepting run exists (use option '-e' to print it)
Formula 5 is FALSE accepting run found.
FORMULA RefineWMG-PT-100-100-LTLFireability-05 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 6 : !((X("(i25.u178.p364>=1)")))
Formula 6 simplified : !X"(i25.u178.p364>=1)"
2 unique states visited
0 strongly connected components in search stack
1 transitions explored
2 items max in DFS search stack
0 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,110.919,1288080,1,0,2.60129e+06,24306,1586,3.34851e+06,349,228872,1999706
no accepting run found
Formula 6 is TRUE no accepting run found.
FORMULA RefineWMG-PT-100-100-LTLFireability-06 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 7 : !((G(F(G(X(F("(((i18.u129.p263>=1)&&(i18.u130.p264>=1))&&(i18.u128.p266>=1))")))))))
Formula 7 simplified : !GFGXF"(((i18.u129.p263>=1)&&(i18.u130.p264>=1))&&(i18.u128.p266>=1))"
3 unique states visited
3 strongly connected components in search stack
4 transitions explored
3 items max in DFS search stack
4 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,110.958,1288812,1,0,2.60357e+06,24306,1650,3.35312e+06,349,228881,2002147
an accepting run exists (use option '-e' to print it)
Formula 7 is FALSE accepting run found.
FORMULA RefineWMG-PT-100-100-LTLFireability-07 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 8 : !(("(i14.u105.p214>=1)"))
Formula 8 simplified : !"(i14.u105.p214>=1)"
1 unique states visited
0 strongly connected components in search stack
0 transitions explored
1 items max in DFS search stack
0 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,110.958,1288812,1,0,2.60357e+06,24306,1653,3.35312e+06,349,228881,2002171
no accepting run found
Formula 8 is TRUE no accepting run found.
FORMULA RefineWMG-PT-100-100-LTLFireability-08 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 9 : !(("(i2.u18.p34>=1)"))
Formula 9 simplified : !"(i2.u18.p34>=1)"
1 unique states visited
0 strongly connected components in search stack
0 transitions explored
1 items max in DFS search stack
0 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,110.959,1289076,1,0,2.60357e+06,24306,1656,3.35312e+06,349,228881,2002215
no accepting run found
Formula 9 is TRUE no accepting run found.
FORMULA RefineWMG-PT-100-100-LTLFireability-09 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 10 : !(("(((i14.u104.p213>=1)&&(i14.u105.p214>=1))&&(i14.u103.p216>=1))"))
Formula 10 simplified : !"(((i14.u104.p213>=1)&&(i14.u105.p214>=1))&&(i14.u103.p216>=1))"
3 unique states visited
3 strongly connected components in search stack
3 transitions explored
3 items max in DFS search stack
0 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,110.96,1289076,1,0,2.60357e+06,24306,1664,3.35312e+06,349,228881,2002246
an accepting run exists (use option '-e' to print it)
Formula 10 is FALSE accepting run found.
FORMULA RefineWMG-PT-100-100-LTLFireability-10 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 11 : !(("(i34.u237.p485>=1)"))
Formula 11 simplified : !"(i34.u237.p485>=1)"
3 unique states visited
3 strongly connected components in search stack
3 transitions explored
3 items max in DFS search stack
0 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,110.96,1289076,1,0,2.60357e+06,24306,1667,3.35312e+06,349,228881,2002252
an accepting run exists (use option '-e' to print it)
Formula 11 is FALSE accepting run found.
FORMULA RefineWMG-PT-100-100-LTLFireability-11 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 12 : !((F(X("(i18.u130.p265>=1)"))))
Formula 12 simplified : !FX"(i18.u130.p265>=1)"
3 unique states visited
3 strongly connected components in search stack
3 transitions explored
3 items max in DFS search stack
736 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,118.307,1368080,1,0,2.8212e+06,24319,1683,3.41963e+06,349,229925,2096922
an accepting run exists (use option '-e' to print it)
Formula 12 is FALSE accepting run found.
FORMULA RefineWMG-PT-100-100-LTLFireability-12 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 13 : !((F(X(G(G(X("(i2.u19.p37>=1)")))))))
Formula 13 simplified : !FXGX"(i2.u19.p37>=1)"
3 unique states visited
2 strongly connected components in search stack
4 transitions explored
3 items max in DFS search stack
494 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,123.241,1517996,1,0,3.25992e+06,25539,1695,3.75389e+06,349,238382,2507857
an accepting run exists (use option '-e' to print it)
Formula 13 is FALSE accepting run found.
FORMULA RefineWMG-PT-100-100-LTLFireability-13 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 14 : !(("(i34.u236.p482>=1)"))
Formula 14 simplified : !"(i34.u236.p482>=1)"
3 unique states visited
3 strongly connected components in search stack
3 transitions explored
3 items max in DFS search stack
0 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,123.241,1517996,1,0,3.25992e+06,25539,1700,3.75389e+06,349,238382,2507867
an accepting run exists (use option '-e' to print it)
Formula 14 is FALSE accepting run found.
FORMULA RefineWMG-PT-100-100-LTLFireability-14 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 15 : !((X(X("(((i31.u221.p453>=1)&&(i31.u222.p454>=1))&&(i32.u223.p456>=1))"))))
Formula 15 simplified : !XX"(((i31.u221.p453>=1)&&(i31.u222.p454>=1))&&(i32.u223.p456>=1))"
5 unique states visited
5 strongly connected components in search stack
5 transitions explored
5 items max in DFS search stack
0 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,123.248,1518260,1,0,3.26004e+06,25539,1713,3.75398e+06,349,238382,2508112
an accepting run exists (use option '-e' to print it)
Formula 15 is FALSE accepting run found.
FORMULA RefineWMG-PT-100-100-LTLFireability-15 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
WARNING : LTS min runner thread was asked to interrupt. Dying gracefully.
BK_STOP 1528048663977
--------------------
content from stderr:
+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution LTLFireability -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -louvain -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -consoleLog -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination LTLFireability -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -louvain -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
Jun 03, 2018 5:55:27 PM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, LTLFireability, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -louvain, -smt]
Jun 03, 2018 5:55:27 PM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
Jun 03, 2018 5:55:28 PM fr.lip6.move.gal.nupn.PTNetReader loadFromXML
INFO: Load time of PNML (sax parser for PT used): 97 ms
Jun 03, 2018 5:55:28 PM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 504 places.
Jun 03, 2018 5:55:28 PM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 403 transitions.
Jun 03, 2018 5:55:28 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.img.gal : 21 ms
Jun 03, 2018 5:55:28 PM fr.lip6.move.gal.application.MccTranslator applyOrder
INFO: Applying decomposition
Jun 03, 2018 5:55:28 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 97 ms
Jun 03, 2018 5:55:28 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 52 ms
Begin: Sun Jun 3 17:55:28 2018
Computation of communities with the Newman-Girvan Modularity quality function
level 0:
start computation: Sun Jun 3 17:55:28 2018
network size: 504 nodes, 1810 links, 806 weight
quality increased from -0.00230539 to 0.816558
end computation: Sun Jun 3 17:55:28 2018
level 1:
start computation: Sun Jun 3 17:55:28 2018
network size: 245 nodes, 1111 links, 806 weight
quality increased from 0.816558 to 0.917685
end computation: Sun Jun 3 17:55:28 2018
level 2:
start computation: Sun Jun 3 17:55:28 2018
network size: 98 nodes, 382 links, 806 weight
quality increased from 0.917685 to 0.94153
end computation: Sun Jun 3 17:55:28 2018
level 3:
start computation: Sun Jun 3 17:55:28 2018
network size: 36 nodes, 108 links, 806 weight
quality increased from 0.94153 to 0.94153
end computation: Sun Jun 3 17:55:28 2018
End: Sun Jun 3 17:55:28 2018
Total duration: 0 sec
0.94153
Jun 03, 2018 5:55:28 PM fr.lip6.move.gal.instantiate.CompositeBuilder decomposeWithOrder
INFO: Decomposing Gal with order
Jun 03, 2018 5:55:28 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 51 ms
Jun 03, 2018 5:55:28 PM fr.lip6.move.gal.instantiate.CompositeBuilder rewriteArraysToAllowPartition
INFO: Rewriting arrays to variables to allow decomposition.
Jun 03, 2018 5:55:28 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/LTLFireability.pnml.gal : 11 ms
Jun 03, 2018 5:55:28 PM fr.lip6.move.serialization.SerializationUtil serializePropertiesForITSLTLTools
INFO: Time to serialize properties into /home/mcc/execution/LTLFireability.ltl : 1 ms
Jun 03, 2018 5:55:29 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 403 transitions.
Jun 03, 2018 5:55:29 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 202 place invariants in 169 ms
Jun 03, 2018 5:55:30 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 504 variables to be positive in 1209 ms
Jun 03, 2018 5:55:30 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may disable matrix : 403 transitions.
Jun 03, 2018 5:55:30 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of disable matrix completed :0/403 took 0 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Jun 03, 2018 5:55:30 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete disable matrix. took 32 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Jun 03, 2018 5:55:30 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may enable matrix : 403 transitions.
Jun 03, 2018 5:55:30 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete enable matrix. took 12 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Jun 03, 2018 5:55:31 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeCoEnablingMatrix
INFO: Computing symmetric co enabling matrix : 403 transitions.
Jun 03, 2018 5:55:34 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(5/403) took 2899 ms. Total solver calls (SAT/UNSAT): 607(607/0)
Jun 03, 2018 5:55:37 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(13/403) took 6213 ms. Total solver calls (SAT/UNSAT): 1363(1363/0)
Jun 03, 2018 5:55:40 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(21/403) took 9311 ms. Total solver calls (SAT/UNSAT): 2055(2055/0)
Jun 03, 2018 5:55:43 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(30/403) took 12382 ms. Total solver calls (SAT/UNSAT): 2757(2757/0)
Jun 03, 2018 5:55:46 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(40/403) took 15475 ms. Total solver calls (SAT/UNSAT): 3442(3442/0)
Jun 03, 2018 5:55:49 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(48/403) took 18509 ms. Total solver calls (SAT/UNSAT): 3918(3918/0)
Jun 03, 2018 5:55:52 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(58/403) took 21547 ms. Total solver calls (SAT/UNSAT): 4423(4423/0)
Jun 03, 2018 5:55:55 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(75/403) took 24665 ms. Total solver calls (SAT/UNSAT): 5052(5052/0)
Jun 03, 2018 5:55:58 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(164/403) took 27665 ms. Total solver calls (SAT/UNSAT): 5473(5473/0)
Jun 03, 2018 5:56:00 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Finished co-enabling matrix. took 29459 ms. Total solver calls (SAT/UNSAT): 5552(5552/0)
Jun 03, 2018 5:56:00 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeDoNotAccord
INFO: Computing Do-Not-Accords matrix : 403 transitions.
Jun 03, 2018 5:56:33 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed DNA matrix. took 32412 ms. Total solver calls (SAT/UNSAT): 403(0/403)
Jun 03, 2018 5:56:33 PM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 64245ms conformant to PINS in folder :/home/mcc/execution
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="RefineWMG-PT-100100"
export BK_EXAMINATION="LTLFireability"
export BK_TOOL="itstoolsl"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
tar xzf /home/mcc/BenchKit/INPUTS/RefineWMG-PT-100100.tgz
mv RefineWMG-PT-100100 execution
cd execution
pwd
ls -lh
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3637"
echo " Executing tool itstoolsl"
echo " Input is RefineWMG-PT-100100, examination is LTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r285-csrt-152749176700753"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;