Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Waiting for the VM to be ready (probing ssh)
...................
/home/mcc/execution
total 268K
-rw-r--r-- 1 mcc users 3.5K May 30 21:02 CTLCardinality.txt
-rw-r--r-- 1 mcc users 19K May 30 21:02 CTLCardinality.xml
-rw-r--r-- 1 mcc users 2.5K May 29 14:53 CTLFireability.txt
-rw-r--r-- 1 mcc users 17K May 29 14:53 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K May 24 11:17 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.3K May 24 11:17 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 2.4K May 28 09:46 LTLCardinality.txt
-rw-r--r-- 1 mcc users 12K May 28 09:46 LTLCardinality.xml
-rw-r--r-- 1 mcc users 1.9K May 28 07:58 LTLFireability.txt
-rw-r--r-- 1 mcc users 8.6K May 28 07:58 LTLFireability.xml
-rw-r--r-- 1 mcc users 1 May 24 11:17 NewModel
-rw-r--r-- 1 mcc users 3.4K May 28 06:16 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 17K May 28 06:16 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 110 May 26 06:29 ReachabilityDeadlock.txt
-rw-r--r-- 1 mcc users 348 May 26 06:29 ReachabilityDeadlock.xml
-rw-r--r-- 1 mcc users 2.5K May 27 03:41 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 14K May 27 03:41 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.7K May 28 07:31 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.7K May 28 07:31 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 24 11:17 equiv_col
-rw-r--r-- 1 mcc users 4 May 24 11:17 instance
-rw-r--r-- 1 mcc users 6 May 24 11:17 iscolored
-rw-r--r-- 1 mcc users 97K May 24 11:17 model.pnml
=====================================================================
Generated by BenchKit 2-3637
Executing tool itstoolsl
Input is DiscoveryGPU-PT-13b, examination is LTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r285-csrt-152749175800141
=====================================================================

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME DiscoveryGPU-PT-13b-LTLFireability-00
FORMULA_NAME DiscoveryGPU-PT-13b-LTLFireability-01
FORMULA_NAME DiscoveryGPU-PT-13b-LTLFireability-02
FORMULA_NAME DiscoveryGPU-PT-13b-LTLFireability-03
FORMULA_NAME DiscoveryGPU-PT-13b-LTLFireability-04
FORMULA_NAME DiscoveryGPU-PT-13b-LTLFireability-05
FORMULA_NAME DiscoveryGPU-PT-13b-LTLFireability-06
FORMULA_NAME DiscoveryGPU-PT-13b-LTLFireability-07
FORMULA_NAME DiscoveryGPU-PT-13b-LTLFireability-08
FORMULA_NAME DiscoveryGPU-PT-13b-LTLFireability-09
FORMULA_NAME DiscoveryGPU-PT-13b-LTLFireability-10
FORMULA_NAME DiscoveryGPU-PT-13b-LTLFireability-11
FORMULA_NAME DiscoveryGPU-PT-13b-LTLFireability-12
FORMULA_NAME DiscoveryGPU-PT-13b-LTLFireability-13
FORMULA_NAME DiscoveryGPU-PT-13b-LTLFireability-14
FORMULA_NAME DiscoveryGPU-PT-13b-LTLFireability-15

=== Now, execution of the tool begins

BK_START 1527986315913

Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805241334/bin/its-ltl-linux64, --gc-threshold, 2000000, -i, /home/mcc/execution/LTLFireability.pnml.gal, -t, CGAL, -LTL, /home/mcc/execution/LTLFireability.ltl, -c, -stutter-deadlock], workingDir=/home/mcc/execution]

its-ltl command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805241334/bin/its-ltl-linux64 --gc-threshold 2000000 -i /home/mcc/execution/LTLFireability.pnml.gal -t CGAL -LTL /home/mcc/execution/LTLFireability.ltl -c -stutter-deadlock
Read 16 LTL properties
Checking formula 0 : !((G("((i0.i0.i0.i0.i0.u21.p255>=1)&&(i1.u27.p371>=1))")))
Formula 0 simplified : !G"((i0.i0.i0.i0.i0.u21.p255>=1)&&(i1.u27.p371>=1))"
built 4 ordering constraints for composite.
built 130 ordering constraints for composite.
built 120 ordering constraints for composite.
built 110 ordering constraints for composite.
built 100 ordering constraints for composite.
built 90 ordering constraints for composite.
built 80 ordering constraints for composite.
built 70 ordering constraints for composite.
built 60 ordering constraints for composite.
built 50 ordering constraints for composite.
built 40 ordering constraints for composite.
built 30 ordering constraints for composite.
built 20 ordering constraints for composite.
built 119 ordering constraints for composite.
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
// Phase 1: matrix 404 rows 380 cols
invariant :u32:p0 + i0:u33:p1 + i0:i0:u34:p2 + i0:i0:i0:u35:p3 + i0:i0:i0:i0:u22:p256 + i0:i0:i0:i0:u22:p257 + i0:i0:i0:i0:u22:p258 + i0:i0:i0:i0:u22:p259 + i0:i0:i0:i0:u22:p260 + i0:i0:i0:i0:u22:p261 + i0:i0:i0:i0:u22:p262 + i0:i0:i0:i0:u22:p263 + i0:i0:i0:i0:u22:p264 + i0:i0:i0:i0:u22:p265 + i0:i0:i0:i0:u22:p266 + i0:i0:i0:i0:u22:p267 + i0:i0:i0:i0:u22:p268 + i0:i0:i0:i0:u22:p269 + i0:i0:i0:i0:u22:p270 + i0:i0:i0:i0:u22:p271 + i0:i0:i0:i0:u22:p272 + i0:i0:i0:i0:u22:p273 + i0:i0:i0:i0:u22:p274 + i0:i0:i0:i0:u22:p275 + i0:i0:i0:i0:u22:p276 + i0:i0:i0:i0:u22:p277 + i0:i0:i0:i0:u22:p278 + i0:i0:i0:i0:u22:p279 + i0:i0:i0:i0:u22:p280 + i0:i0:i0:i0:u22:p281 + i0:i0:i0:i0:u22:p282 + i0:i0:i0:i0:u36:p4 = 1
invariant :u32:p0 + i1:u27:p365 + i1:u27:p366 + i1:u27:p367 + i1:u27:p368 + i1:u27:p369 + i1:u27:p370 + i1:u27:p371 + i1:u27:p372 + i1:u27:p373 + i1:u42:p364 = 1
invariant :u32:p0 + i0:u33:p1 + i0:i0:u34:p2 + i0:i0:i0:u35:p3 + i0:i0:i0:i0:u36:p4 + i0:i0:i0:i0:i0:u37:p5 + i0:i0:i0:i0:i0:i0:u38:p6 + i0:i0:i0:i0:i0:i0:i0:u39:p7 + i0:i0:i0:i0:i0:i0:i0:i0:u40:p8 + i0:i0:i0:i0:i0:i0:i0:i0:i0:u41:p9 + i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:u16:p94 + i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:u16:p95 + i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:u16:p96 + i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:u16:p97 + i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:u16:p98 + i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:u16:p99 + i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:u16:p100 + i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:u16:p101 + i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:u16:p102 + i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:u16:p103 + i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:u16:p104 + i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:u16:p105 + i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:u16:p106 + i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:u16:p107 + i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:u16:p108 + i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:u16:p109 + i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:u16:p110 + i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:u16:p111 + i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:u16:p112 + i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:u16:p113 + i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:u16:p114 + i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:u16:p115 + i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:u16:p116 + i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:u16:p117 + i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:u16:p118 + i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:u16:p119 + i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:u16:p120 + i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:u30:p10 = 1
invariant :u32:p0 + i0:u33:p1 + i0:i0:u34:p2 + i0:i0:i0:u35:p3 + i0:i0:i0:i0:u36:p4 + i0:i0:i0:i0:i0:u37:p5 + i0:i0:i0:i0:i0:i0:u38:p6 + i0:i0:i0:i0:i0:i0:i0:u39:p7 + i0:i0:i0:i0:i0:i0:i0:i0:u40:p8 + i0:i0:i0:i0:i0:i0:i0:i0:i0:u41:p9 + i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:u30:p10 + i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:u29:p11 + i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:u14:p40 + i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:u14:p41 + i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:u14:p42 + i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:u14:p43 + i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:u14:p44 + i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:u14:p45 + i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:u14:p46 + i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:u14:p47 + i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:u14:p48 + i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:u14:p49 + i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:u14:p50 + i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:u14:p51 + i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:u14:p52 + i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:u14:p53 + i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:u14:p54 + i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:u14:p55 + i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:u14:p56 + i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:u14:p57 + i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:u14:p58 + i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:u14:p59 + i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:u14:p60 + i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:u14:p61 + i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:u14:p62 + i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:u14:p63 + i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:u14:p64 + i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:u14:p65 + i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:u14:p66 + i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:u31:p12 = 1
invariant :u32:p0 + i0:u33:p1 + i0:i0:u34:p2 + i0:i0:i0:u35:p3 + i0:i0:i0:i0:u36:p4 + i0:i0:i0:i0:i0:u37:p5 + i0:i0:i0:i0:i0:i0:u38:p6 + i0:i0:i0:i0:i0:i0:i0:u19:p175 + i0:i0:i0:i0:i0:i0:i0:u19:p176 + i0:i0:i0:i0:i0:i0:i0:u19:p177 + i0:i0:i0:i0:i0:i0:i0:u19:p178 + i0:i0:i0:i0:i0:i0:i0:u19:p179 + i0:i0:i0:i0:i0:i0:i0:u19:p180 + i0:i0:i0:i0:i0:i0:i0:u19:p181 + i0:i0:i0:i0:i0:i0:i0:u19:p182 + i0:i0:i0:i0:i0:i0:i0:u19:p183 + i0:i0:i0:i0:i0:i0:i0:u19:p184 + i0:i0:i0:i0:i0:i0:i0:u19:p185 + i0:i0:i0:i0:i0:i0:i0:u19:p186 + i0:i0:i0:i0:i0:i0:i0:u19:p187 + i0:i0:i0:i0:i0:i0:i0:u19:p188 + i0:i0:i0:i0:i0:i0:i0:u19:p189 + i0:i0:i0:i0:i0:i0:i0:u19:p190 + i0:i0:i0:i0:i0:i0:i0:u19:p191 + i0:i0:i0:i0:i0:i0:i0:u19:p192 + i0:i0:i0:i0:i0:i0:i0:u19:p193 + i0:i0:i0:i0:i0:i0:i0:u19:p194 + i0:i0:i0:i0:i0:i0:i0:u19:p195 + i0:i0:i0:i0:i0:i0:i0:u19:p196 + i0:i0:i0:i0:i0:i0:i0:u19:p197 + i0:i0:i0:i0:i0:i0:i0:u19:p198 + i0:i0:i0:i0:i0:i0:i0:u19:p199 + i0:i0:i0:i0:i0:i0:i0:u19:p200 + i0:i0:i0:i0:i0:i0:i0:u19:p201 + i0:i0:i0:i0:i0:i0:i0:u39:p7 = 1
invariant :u32:p0 + i0:u33:p1 + i0:i0:u34:p2 + i0:i0:i0:u35:p3 + i0:i0:i0:i0:u36:p4 + i0:i0:i0:i0:i0:u37:p5 + i0:i0:i0:i0:i0:i0:u38:p6 + i0:i0:i0:i0:i0:i0:i0:u39:p7 + i0:i0:i0:i0:i0:i0:i0:i0:u40:p8 + i0:i0:i0:i0:i0:i0:i0:i0:i0:u17:p121 + i0:i0:i0:i0:i0:i0:i0:i0:i0:u17:p122 + i0:i0:i0:i0:i0:i0:i0:i0:i0:u17:p123 + i0:i0:i0:i0:i0:i0:i0:i0:i0:u17:p124 + i0:i0:i0:i0:i0:i0:i0:i0:i0:u17:p125 + i0:i0:i0:i0:i0:i0:i0:i0:i0:u17:p126 + i0:i0:i0:i0:i0:i0:i0:i0:i0:u17:p127 + i0:i0:i0:i0:i0:i0:i0:i0:i0:u17:p128 + i0:i0:i0:i0:i0:i0:i0:i0:i0:u17:p129 + i0:i0:i0:i0:i0:i0:i0:i0:i0:u17:p130 + i0:i0:i0:i0:i0:i0:i0:i0:i0:u17:p131 + i0:i0:i0:i0:i0:i0:i0:i0:i0:u17:p132 + i0:i0:i0:i0:i0:i0:i0:i0:i0:u17:p133 + i0:i0:i0:i0:i0:i0:i0:i0:i0:u17:p134 + i0:i0:i0:i0:i0:i0:i0:i0:i0:u17:p135 + i0:i0:i0:i0:i0:i0:i0:i0:i0:u17:p136 + i0:i0:i0:i0:i0:i0:i0:i0:i0:u17:p137 + i0:i0:i0:i0:i0:i0:i0:i0:i0:u17:p138 + i0:i0:i0:i0:i0:i0:i0:i0:i0:u17:p139 + i0:i0:i0:i0:i0:i0:i0:i0:i0:u17:p140 + i0:i0:i0:i0:i0:i0:i0:i0:i0:u17:p141 + i0:i0:i0:i0:i0:i0:i0:i0:i0:u17:p142 + i0:i0:i0:i0:i0:i0:i0:i0:i0:u17:p143 + i0:i0:i0:i0:i0:i0:i0:i0:i0:u17:p144 + i0:i0:i0:i0:i0:i0:i0:i0:i0:u17:p145 + i0:i0:i0:i0:i0:i0:i0:i0:i0:u17:p146 + i0:i0:i0:i0:i0:i0:i0:i0:i0:u17:p147 + i0:i0:i0:i0:i0:i0:i0:i0:i0:u41:p9 = 1
invariant :u32:p0 + i0:u25:p337 + i0:u25:p338 + i0:u25:p339 + i0:u25:p340 + i0:u25:p341 + i0:u25:p342 + i0:u25:p343 + i0:u25:p344 + i0:u25:p345 + i0:u25:p346 + i0:u25:p347 + i0:u25:p348 + i0:u25:p349 + i0:u25:p350 + i0:u25:p351 + i0:u25:p352 + i0:u25:p353 + i0:u25:p354 + i0:u25:p355 + i0:u25:p356 + i0:u25:p357 + i0:u25:p358 + i0:u25:p359 + i0:u25:p360 + i0:u25:p361 + i0:u25:p362 + i0:u25:p363 + i0:u33:p1 = 1
invariant :u32:p0 + i0:u33:p1 + i0:i0:u34:p2 + i0:i0:i0:u35:p3 + i0:i0:i0:i0:u36:p4 + i0:i0:i0:i0:i0:u37:p5 + i0:i0:i0:i0:i0:i0:u38:p6 + i0:i0:i0:i0:i0:i0:i0:u39:p7 + i0:i0:i0:i0:i0:i0:i0:i0:u40:p8 + i0:i0:i0:i0:i0:i0:i0:i0:i0:u41:p9 + i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:u30:p10 + i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:u29:p11 + i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:u13:p13 + i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:u13:p14 + i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:u13:p15 + i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:u13:p16 + i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:u13:p17 + i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:u13:p18 + i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:u13:p19 + i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:u13:p20 + i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:u13:p21 + i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:u13:p22 + i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:u13:p23 + i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:u13:p24 + i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:u13:p25 + i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:u13:p26 + i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:u13:p27 + i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:u13:p28 + i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:u13:p29 + i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:u13:p30 + i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:u13:p31 + i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:u13:p32 + i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:u13:p33 + i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:u13:p34 + i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:u13:p35 + i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:u13:p36 + i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:u13:p37 + i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:u13:p38 + i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:u13:p39 + i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:u31:p12 = 1
invariant :u32:p0 + i0:u33:p1 + i0:i0:u34:p2 + i0:i0:i0:u35:p3 + i0:i0:i0:i0:u36:p4 + i0:i0:i0:i0:i0:u37:p5 + i0:i0:i0:i0:i0:i0:u38:p6 + i0:i0:i0:i0:i0:i0:i0:u39:p7 + i0:i0:i0:i0:i0:i0:i0:i0:u18:p148 + i0:i0:i0:i0:i0:i0:i0:i0:u18:p149 + i0:i0:i0:i0:i0:i0:i0:i0:u18:p150 + i0:i0:i0:i0:i0:i0:i0:i0:u18:p151 + i0:i0:i0:i0:i0:i0:i0:i0:u18:p152 + i0:i0:i0:i0:i0:i0:i0:i0:u18:p153 + i0:i0:i0:i0:i0:i0:i0:i0:u18:p154 + i0:i0:i0:i0:i0:i0:i0:i0:u18:p155 + i0:i0:i0:i0:i0:i0:i0:i0:u18:p156 + i0:i0:i0:i0:i0:i0:i0:i0:u18:p157 + i0:i0:i0:i0:i0:i0:i0:i0:u18:p158 + i0:i0:i0:i0:i0:i0:i0:i0:u18:p159 + i0:i0:i0:i0:i0:i0:i0:i0:u18:p160 + i0:i0:i0:i0:i0:i0:i0:i0:u18:p161 + i0:i0:i0:i0:i0:i0:i0:i0:u18:p162 + i0:i0:i0:i0:i0:i0:i0:i0:u18:p163 + i0:i0:i0:i0:i0:i0:i0:i0:u18:p164 + i0:i0:i0:i0:i0:i0:i0:i0:u18:p165 + i0:i0:i0:i0:i0:i0:i0:i0:u18:p166 + i0:i0:i0:i0:i0:i0:i0:i0:u18:p167 + i0:i0:i0:i0:i0:i0:i0:i0:u18:p168 + i0:i0:i0:i0:i0:i0:i0:i0:u18:p169 + i0:i0:i0:i0:i0:i0:i0:i0:u18:p170 + i0:i0:i0:i0:i0:i0:i0:i0:u18:p171 + i0:i0:i0:i0:i0:i0:i0:i0:u18:p172 + i0:i0:i0:i0:i0:i0:i0:i0:u18:p173 + i0:i0:i0:i0:i0:i0:i0:i0:u18:p174 + i0:i0:i0:i0:i0:i0:i0:i0:u40:p8 = 1
invariant :u32:p0 + i0:u33:p1 + i0:i0:u34:p2 + i0:i0:i0:u23:p283 + i0:i0:i0:u23:p284 + i0:i0:i0:u23:p285 + i0:i0:i0:u23:p286 + i0:i0:i0:u23:p287 + i0:i0:i0:u23:p288 + i0:i0:i0:u23:p289 + i0:i0:i0:u23:p290 + i0:i0:i0:u23:p291 + i0:i0:i0:u23:p292 + i0:i0:i0:u23:p293 + i0:i0:i0:u23:p294 + i0:i0:i0:u23:p295 + i0:i0:i0:u23:p296 + i0:i0:i0:u23:p297 + i0:i0:i0:u23:p298 + i0:i0:i0:u23:p299 + i0:i0:i0:u23:p300 + i0:i0:i0:u23:p301 + i0:i0:i0:u23:p302 + i0:i0:i0:u23:p303 + i0:i0:i0:u23:p304 + i0:i0:i0:u23:p305 + i0:i0:i0:u23:p306 + i0:i0:i0:u23:p307 + i0:i0:i0:u23:p308 + i0:i0:i0:u23:p309 + i0:i0:i0:u35:p3 = 1
invariant :u32:p0 + i0:u33:p1 + i0:i0:u34:p2 + i0:i0:i0:u35:p3 + i0:i0:i0:i0:u36:p4 + i0:i0:i0:i0:i0:u37:p5 + i0:i0:i0:i0:i0:i0:u38:p6 + i0:i0:i0:i0:i0:i0:i0:u39:p7 + i0:i0:i0:i0:i0:i0:i0:i0:u40:p8 + i0:i0:i0:i0:i0:i0:i0:i0:i0:u41:p9 + i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:u30:p10 + i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:u15:p67 + i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:u15:p68 + i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:u15:p69 + i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:u15:p70 + i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:u15:p71 + i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:u15:p72 + i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:u15:p73 + i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:u15:p74 + i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:u15:p75 + i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:u15:p76 + i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:u15:p77 + i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:u15:p78 + i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:u15:p79 + i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:u15:p80 + i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:u15:p81 + i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:u15:p82 + i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:u15:p83 + i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:u15:p84 + i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:u15:p85 + i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:u15:p86 + i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:u15:p87 + i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:u15:p88 + i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:u15:p89 + i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:u15:p90 + i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:u15:p91 + i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:u15:p92 + i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:u15:p93 + i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:i0:u29:p11 = 1
invariant :u32:p0 + i0:u33:p1 + i0:i0:u34:p2 + i0:i0:i0:u35:p3 + i0:i0:i0:i0:u36:p4 + i0:i0:i0:i0:i0:u37:p5 + i0:i0:i0:i0:i0:i0:u20:p202 + i0:i0:i0:i0:i0:i0:u20:p203 + i0:i0:i0:i0:i0:i0:u20:p204 + i0:i0:i0:i0:i0:i0:u20:p205 + i0:i0:i0:i0:i0:i0:u20:p206 + i0:i0:i0:i0:i0:i0:u20:p207 + i0:i0:i0:i0:i0:i0:u20:p208 + i0:i0:i0:i0:i0:i0:u20:p209 + i0:i0:i0:i0:i0:i0:u20:p210 + i0:i0:i0:i0:i0:i0:u20:p211 + i0:i0:i0:i0:i0:i0:u20:p212 + i0:i0:i0:i0:i0:i0:u20:p213 + i0:i0:i0:i0:i0:i0:u20:p214 + i0:i0:i0:i0:i0:i0:u20:p215 + i0:i0:i0:i0:i0:i0:u20:p216 + i0:i0:i0:i0:i0:i0:u20:p217 + i0:i0:i0:i0:i0:i0:u20:p218 + i0:i0:i0:i0:i0:i0:u20:p219 + i0:i0:i0:i0:i0:i0:u20:p220 + i0:i0:i0:i0:i0:i0:u20:p221 + i0:i0:i0:i0:i0:i0:u20:p222 + i0:i0:i0:i0:i0:i0:u20:p223 + i0:i0:i0:i0:i0:i0:u20:p224 + i0:i0:i0:i0:i0:i0:u20:p225 + i0:i0:i0:i0:i0:i0:u20:p226 + i0:i0:i0:i0:i0:i0:u20:p227 + i0:i0:i0:i0:i0:i0:u20:p228 + i0:i0:i0:i0:i0:i0:u38:p6 = 1
invariant :u32:p0 + i1:u28:p374 + i1:u28:p375 + i1:u28:p376 + i1:u28:p377 + i1:u28:p378 + i1:u28:p379 + i1:u42:p364 = 1
invariant :u32:p0 + i0:u33:p1 + i0:i0:u24:p310 + i0:i0:u24:p311 + i0:i0:u24:p312 + i0:i0:u24:p313 + i0:i0:u24:p314 + i0:i0:u24:p315 + i0:i0:u24:p316 + i0:i0:u24:p317 + i0:i0:u24:p318 + i0:i0:u24:p319 + i0:i0:u24:p320 + i0:i0:u24:p321 + i0:i0:u24:p322 + i0:i0:u24:p323 + i0:i0:u24:p324 + i0:i0:u24:p325 + i0:i0:u24:p326 + i0:i0:u24:p327 + i0:i0:u24:p328 + i0:i0:u24:p329 + i0:i0:u24:p330 + i0:i0:u24:p331 + i0:i0:u24:p332 + i0:i0:u24:p333 + i0:i0:u24:p334 + i0:i0:u24:p335 + i0:i0:u24:p336 + i0:i0:u34:p2 = 1
invariant :u32:p0 + i0:u33:p1 + i0:i0:u34:p2 + i0:i0:i0:u35:p3 + i0:i0:i0:i0:u36:p4 + i0:i0:i0:i0:i0:u21:p229 + i0:i0:i0:i0:i0:u21:p230 + i0:i0:i0:i0:i0:u21:p231 + i0:i0:i0:i0:i0:u21:p232 + i0:i0:i0:i0:i0:u21:p233 + i0:i0:i0:i0:i0:u21:p234 + i0:i0:i0:i0:i0:u21:p235 + i0:i0:i0:i0:i0:u21:p236 + i0:i0:i0:i0:i0:u21:p237 + i0:i0:i0:i0:i0:u21:p238 + i0:i0:i0:i0:i0:u21:p239 + i0:i0:i0:i0:i0:u21:p240 + i0:i0:i0:i0:i0:u21:p241 + i0:i0:i0:i0:i0:u21:p242 + i0:i0:i0:i0:i0:u21:p243 + i0:i0:i0:i0:i0:u21:p244 + i0:i0:i0:i0:i0:u21:p245 + i0:i0:i0:i0:i0:u21:p246 + i0:i0:i0:i0:i0:u21:p247 + i0:i0:i0:i0:i0:u21:p248 + i0:i0:i0:i0:i0:u21:p249 + i0:i0:i0:i0:i0:u21:p250 + i0:i0:i0:i0:i0:u21:p251 + i0:i0:i0:i0:i0:u21:p252 + i0:i0:i0:i0:i0:u21:p253 + i0:i0:i0:i0:i0:u21:p254 + i0:i0:i0:i0:i0:u21:p255 + i0:i0:i0:i0:i0:u37:p5 = 1
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O3, model.c], workingDir=/home/mcc/execution]
Compilation finished in 5883 ms.
Running link step : CommandLine [args=[gcc, -shared, -o, gal.so, model.o], workingDir=/home/mcc/execution]
Link finished in 273 ms.
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, []((LTLAP0==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 435 ms.
FORMULA DiscoveryGPU-PT-13b-LTLFireability-00 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, [](<>([](X(X((LTLAP1==true)))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 47 ms.
FORMULA DiscoveryGPU-PT-13b-LTLFireability-01 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, (<>([]((LTLAP2==true))))U(X(((LTLAP3==true))U((LTLAP4==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 33 ms.
FORMULA DiscoveryGPU-PT-13b-LTLFireability-02 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X(<>([]((LTLAP5==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 57 ms.
FORMULA DiscoveryGPU-PT-13b-LTLFireability-03 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, <>(([](<>((LTLAP6==true))))U((LTLAP7==true))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 426 ms.
FORMULA DiscoveryGPU-PT-13b-LTLFireability-04 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X((LTLAP8==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 42 ms.
FORMULA DiscoveryGPU-PT-13b-LTLFireability-05 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, (LTLAP9==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 376 ms.
FORMULA DiscoveryGPU-PT-13b-LTLFireability-06 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, (((LTLAP10==true))U((LTLAP11==true)))U((LTLAP12==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 378 ms.
FORMULA DiscoveryGPU-PT-13b-LTLFireability-07 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, ((LTLAP13==true))U((LTLAP14==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 372 ms.
FORMULA DiscoveryGPU-PT-13b-LTLFireability-08 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, [](<>((X((LTLAP15==true)))U([]((LTLAP16==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 40 ms.
FORMULA DiscoveryGPU-PT-13b-LTLFireability-09 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, []([]([](<>(<>((LTLAP17==true)))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 370 ms.
FORMULA DiscoveryGPU-PT-13b-LTLFireability-10 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, (LTLAP18==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 377 ms.
FORMULA DiscoveryGPU-PT-13b-LTLFireability-11 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, (LTLAP19==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 407 ms.
FORMULA DiscoveryGPU-PT-13b-LTLFireability-12 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, (<>((LTLAP20==true)))U((LTLAP21==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 429 ms.
FORMULA DiscoveryGPU-PT-13b-LTLFireability-13 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, []((X(X((LTLAP22==true))))U(X((LTLAP23==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 43 ms.
FORMULA DiscoveryGPU-PT-13b-LTLFireability-14 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, ([]([](<>((LTLAP24==true)))))U([](X((LTLAP17==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 47 ms.
FORMULA DiscoveryGPU-PT-13b-LTLFireability-15 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
ITS tools runner thread asked to quit. Dying gracefully.

BK_STOP 1527986406025

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution LTLFireability -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -louvain -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -consoleLog -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination LTLFireability -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -louvain -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
Jun 03, 2018 12:38:37 AM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, LTLFireability, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -louvain, -smt]
Jun 03, 2018 12:38:37 AM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
Jun 03, 2018 12:38:37 AM fr.lip6.move.gal.nupn.PTNetReader loadFromXML
INFO: Load time of PNML (sax parser for PT used): 111 ms
Jun 03, 2018 12:38:37 AM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 380 places.
Jun 03, 2018 12:38:38 AM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 404 transitions.
Jun 03, 2018 12:38:38 AM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Found NUPN structural information;
Jun 03, 2018 12:38:38 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.img.gal : 26 ms
Jun 03, 2018 12:38:38 AM fr.lip6.move.gal.application.MccTranslator applyOrder
INFO: Applying decomposition
Jun 03, 2018 12:38:38 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 102 ms
Jun 03, 2018 12:38:38 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 43 ms
Jun 03, 2018 12:38:38 AM fr.lip6.move.gal.instantiate.CompositeBuilder decomposeWithOrder
INFO: Decomposing Gal with order
Jun 03, 2018 12:38:38 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 46 ms
Jun 03, 2018 12:38:38 AM fr.lip6.move.gal.instantiate.CompositeBuilder rewriteArraysToAllowPartition
INFO: Rewriting arrays to variables to allow decomposition.
Jun 03, 2018 12:38:38 AM fr.lip6.move.gal.instantiate.Instantiator fuseIsomorphicEffects
INFO: Removed a total of 112 redundant transitions.
Jun 03, 2018 12:38:38 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/LTLFireability.pnml.gal : 11 ms
Jun 03, 2018 12:38:38 AM fr.lip6.move.serialization.SerializationUtil serializePropertiesForITSLTLTools
INFO: Time to serialize properties into /home/mcc/execution/LTLFireability.ltl : 1 ms
Jun 03, 2018 12:38:39 AM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 404 transitions.
Jun 03, 2018 12:38:39 AM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 15 place invariants in 136 ms
Jun 03, 2018 12:38:39 AM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 380 variables to be positive in 695 ms
Jun 03, 2018 12:38:39 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may disable matrix : 404 transitions.
Jun 03, 2018 12:38:39 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of disable matrix completed :0/404 took 0 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Jun 03, 2018 12:38:39 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete disable matrix. took 41 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Jun 03, 2018 12:38:39 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may enable matrix : 404 transitions.
Jun 03, 2018 12:38:39 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete enable matrix. took 17 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Jun 03, 2018 12:38:41 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeCoEnablingMatrix
INFO: Computing symmetric co enabling matrix : 404 transitions.
Jun 03, 2018 12:38:43 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(11/404) took 1069 ms. Total solver calls (SAT/UNSAT): 3063(0/3063)
Jun 03, 2018 12:38:46 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(32/404) took 4204 ms. Total solver calls (SAT/UNSAT): 4349(522/3827)
Jun 03, 2018 12:38:49 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(55/404) took 7936 ms. Total solver calls (SAT/UNSAT): 5471(916/4555)
Jun 03, 2018 12:38:52 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(57/404) took 10982 ms. Total solver calls (SAT/UNSAT): 5674(1054/4620)
Jun 03, 2018 12:38:56 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(66/404) took 14056 ms. Total solver calls (SAT/UNSAT): 6538(1626/4912)
Jun 03, 2018 12:39:01 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(75/404) took 19551 ms. Total solver calls (SAT/UNSAT): 7321(2116/5205)
Jun 03, 2018 12:39:05 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(80/404) took 23048 ms. Total solver calls (SAT/UNSAT): 7721(2358/5363)
Jun 03, 2018 12:39:09 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(89/404) took 27977 ms. Total solver calls (SAT/UNSAT): 8378(2740/5638)
Jun 03, 2018 12:39:13 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(92/404) took 31560 ms. Total solver calls (SAT/UNSAT): 8579(2850/5729)
Jun 03, 2018 12:39:16 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(110/404) took 34827 ms. Total solver calls (SAT/UNSAT): 9596(3330/6266)
Jun 03, 2018 12:39:20 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(132/404) took 38063 ms. Total solver calls (SAT/UNSAT): 10383(3510/6873)
Jun 03, 2018 12:39:23 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(159/404) took 41116 ms. Total solver calls (SAT/UNSAT): 10671(3517/7154)
Jun 03, 2018 12:39:26 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(198/404) took 44133 ms. Total solver calls (SAT/UNSAT): 11040(3524/7516)
Jun 03, 2018 12:39:29 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(219/404) took 47134 ms. Total solver calls (SAT/UNSAT): 11241(3529/7712)
Jun 03, 2018 12:39:32 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(239/404) took 50405 ms. Total solver calls (SAT/UNSAT): 11431(3533/7898)
Jun 03, 2018 12:39:35 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(273/404) took 53545 ms. Total solver calls (SAT/UNSAT): 11730(3539/8191)
Jun 03, 2018 12:39:38 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(293/404) took 56789 ms. Total solver calls (SAT/UNSAT): 11920(3543/8377)
Jun 03, 2018 12:39:42 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(312/404) took 60332 ms. Total solver calls (SAT/UNSAT): 12093(3546/8547)
Jun 03, 2018 12:39:45 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(342/404) took 63649 ms. Total solver calls (SAT/UNSAT): 12408(3554/8854)
Jun 03, 2018 12:39:48 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(355/404) took 66912 ms. Total solver calls (SAT/UNSAT): 12521(3556/8965)
Jun 03, 2018 12:39:51 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(371/404) took 69990 ms. Total solver calls (SAT/UNSAT): 12645(3558/9087)
Jun 03, 2018 12:39:54 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(400/404) took 73019 ms. Total solver calls (SAT/UNSAT): 12851(3562/9289)
Jun 03, 2018 12:39:55 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Finished co-enabling matrix. took 73172 ms. Total solver calls (SAT/UNSAT): 12854(3562/9292)
Jun 03, 2018 12:39:55 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeDoNotAccord
INFO: Computing Do-Not-Accords matrix : 404 transitions.
Jun 03, 2018 12:39:55 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed DNA matrix. took 36 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Jun 03, 2018 12:39:55 AM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 76423ms conformant to PINS in folder :/home/mcc/execution

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="DiscoveryGPU-PT-13b"
export BK_EXAMINATION="LTLFireability"
export BK_TOOL="itstoolsl"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

tar xzf /home/mcc/BenchKit/INPUTS/DiscoveryGPU-PT-13b.tgz
mv DiscoveryGPU-PT-13b execution
cd execution
pwd
ls -lh

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3637"
echo " Executing tool itstoolsl"
echo " Input is DiscoveryGPU-PT-13b, examination is LTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r285-csrt-152749175800141"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' LTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;