About the Execution of ITS-Tools for RefineWMG-PT-002003
Execution Summary | |||||
Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
15755.810 | 4166.00 | 9304.00 | 159.90 | FFFTFFFFFFFTFFFF | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Waiting for the VM to be ready (probing ssh)
............................
/home/mcc/execution
total 184K
-rw-r--r-- 1 mcc users 3.8K May 30 22:39 CTLCardinality.txt
-rw-r--r-- 1 mcc users 22K May 30 22:39 CTLCardinality.xml
-rw-r--r-- 1 mcc users 2.7K May 29 16:47 CTLFireability.txt
-rw-r--r-- 1 mcc users 19K May 29 16:47 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K May 24 11:17 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 5.2K May 24 11:17 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 2.3K May 28 10:48 LTLCardinality.txt
-rw-r--r-- 1 mcc users 9.3K May 28 10:48 LTLCardinality.xml
-rw-r--r-- 1 mcc users 1.9K May 28 08:57 LTLFireability.txt
-rw-r--r-- 1 mcc users 8.8K May 28 08:57 LTLFireability.xml
-rw-r--r-- 1 mcc users 1 May 24 11:17 NewModel
-rw-r--r-- 1 mcc users 3.6K May 28 07:29 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 19K May 28 07:29 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 111 May 26 06:33 ReachabilityDeadlock.txt
-rw-r--r-- 1 mcc users 349 May 26 06:33 ReachabilityDeadlock.xml
-rw-r--r-- 1 mcc users 2.8K May 27 05:04 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 18K May 27 05:04 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.7K May 28 07:35 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.7K May 28 07:35 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 24 11:17 equiv_col
-rw-r--r-- 1 mcc users 7 May 24 11:17 instance
-rw-r--r-- 1 mcc users 6 May 24 11:17 iscolored
-rw-r--r-- 1 mcc users 6.9K May 24 11:17 model.pnml
=====================================================================
Generated by BenchKit 2-3637
Executing tool itstools
Input is RefineWMG-PT-002003, examination is LTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r284-csrt-152749175300636
=====================================================================
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME RefineWMG-PT-002-003-LTLFireability-00
FORMULA_NAME RefineWMG-PT-002-003-LTLFireability-01
FORMULA_NAME RefineWMG-PT-002-003-LTLFireability-02
FORMULA_NAME RefineWMG-PT-002-003-LTLFireability-03
FORMULA_NAME RefineWMG-PT-002-003-LTLFireability-04
FORMULA_NAME RefineWMG-PT-002-003-LTLFireability-05
FORMULA_NAME RefineWMG-PT-002-003-LTLFireability-06
FORMULA_NAME RefineWMG-PT-002-003-LTLFireability-07
FORMULA_NAME RefineWMG-PT-002-003-LTLFireability-08
FORMULA_NAME RefineWMG-PT-002-003-LTLFireability-09
FORMULA_NAME RefineWMG-PT-002-003-LTLFireability-10
FORMULA_NAME RefineWMG-PT-002-003-LTLFireability-11
FORMULA_NAME RefineWMG-PT-002-003-LTLFireability-12
FORMULA_NAME RefineWMG-PT-002-003-LTLFireability-13
FORMULA_NAME RefineWMG-PT-002-003-LTLFireability-14
FORMULA_NAME RefineWMG-PT-002-003-LTLFireability-15
=== Now, execution of the tool begins
BK_START 1527971151960
Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805151631/bin/its-ltl-linux64, --gc-threshold, 2000000, -i, /home/mcc/execution/LTLFireability.pnml.gal, -t, CGAL, -LTL, /home/mcc/execution/LTLFireability.ltl, -c, -stutter-deadlock], workingDir=/home/mcc/execution]
its-ltl command run as :
/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805151631/bin/its-ltl-linux64 --gc-threshold 2000000 -i /home/mcc/execution/LTLFireability.pnml.gal -t CGAL -LTL /home/mcc/execution/LTLFireability.ltl -c -stutter-deadlock
Read 16 LTL properties
Checking formula 0 : !((G(F(F(G(G("(p2>=1)")))))))
Formula 0 simplified : !GFG"(p2>=1)"
Reverse transition relation is exact ! Faster fixpoint algorithm enabled.
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
// Phase 1: matrix 11 rows 14 cols
invariant :psecond + pterce = 5
invariant :p2 + p3 = 3
invariant :p + pprime + p1 + p6 = 7
invariant :p4 + p5 = 3
invariant :p7 + p8 = 3
invariant :p9 + p10 = 3
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O3, model.c], workingDir=/home/mcc/execution]
2 unique states visited
2 strongly connected components in search stack
2 transitions explored
2 items max in DFS search stack
85 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,0.864736,35056,1,0,1273,107152,24,470,372,142970,2244
an accepting run exists (use option '-e' to print it)
Formula 0 is FALSE accepting run found.
FORMULA RefineWMG-PT-002-003-LTLFireability-00 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Checking formula 1 : !((F(F("(p7>=1)"))))
Formula 1 simplified : !F"(p7>=1)"
2 unique states visited
2 strongly connected components in search stack
2 transitions explored
2 items max in DFS search stack
0 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,0.867279,35380,1,0,1292,107438,33,479,373,143406,2303
an accepting run exists (use option '-e' to print it)
Formula 1 is FALSE accepting run found.
FORMULA RefineWMG-PT-002-003-LTLFireability-01 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Checking formula 2 : !(((F(("(pterce>=3)")U("(p10>=1)")))U("(p5>=1)")))
Formula 2 simplified : !(F("(pterce>=3)" U "(p10>=1)") U "(p5>=1)")
2 unique states visited
2 strongly connected components in search stack
2 transitions explored
2 items max in DFS search stack
4 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,0.912926,36952,1,0,1407,115564,46,534,377,155536,2597
an accepting run exists (use option '-e' to print it)
Formula 2 is FALSE accepting run found.
FORMULA RefineWMG-PT-002-003-LTLFireability-02 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Checking formula 3 : !((X(F(X("(p4>=1)")))))
Formula 3 simplified : !XFX"(p4>=1)"
3 unique states visited
0 strongly connected components in search stack
2 transitions explored
3 items max in DFS search stack
0 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,0.914166,36952,1,0,1408,115577,55,534,378,155554,2604
no accepting run found
Formula 3 is TRUE no accepting run found.
FORMULA RefineWMG-PT-002-003-LTLFireability-03 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Checking formula 4 : !(((G(G(G("(((p3>=1)&&(p4>=1))&&(p6>=1))"))))U(X(F("(p7>=1)")))))
Formula 4 simplified : !(G"(((p3>=1)&&(p4>=1))&&(p6>=1))" U XF"(p7>=1)")
3 unique states visited
3 strongly connected components in search stack
3 transitions explored
3 items max in DFS search stack
0 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,0.914771,37156,1,0,1408,115577,55,535,378,155565,2607
an accepting run exists (use option '-e' to print it)
Formula 4 is FALSE accepting run found.
FORMULA RefineWMG-PT-002-003-LTLFireability-04 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Checking formula 5 : !((F(X(G(("(((p3>=1)&&(p4>=1))&&(p6>=1))")U("(p2>=1)"))))))
Formula 5 simplified : !FXG("(((p3>=1)&&(p4>=1))&&(p6>=1))" U "(p2>=1)")
3 unique states visited
3 strongly connected components in search stack
3 transitions explored
3 items max in DFS search stack
2 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,0.932632,37656,1,0,1411,118196,73,535,408,158633,2632
an accepting run exists (use option '-e' to print it)
Formula 5 is FALSE accepting run found.
FORMULA RefineWMG-PT-002-003-LTLFireability-05 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Checking formula 6 : !((G(F(G(("(p9>=1)")U("(((p3>=1)&&(p4>=1))&&(p6>=1))"))))))
Formula 6 simplified : !GFG("(p9>=1)" U "(((p3>=1)&&(p4>=1))&&(p6>=1))")
Compilation finished in 541 ms.
Running link step : CommandLine [args=[gcc, -shared, -o, gal.so, model.o], workingDir=/home/mcc/execution]
Link finished in 66 ms.
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, [](<>([](((LTLAP7==true))U((LTLAP6==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 37 ms.
FORMULA RefineWMG-PT-002-003-LTLFireability-06 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, []([](X((LTLAP3==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
1 unique states visited
1 strongly connected components in search stack
1 transitions explored
1 items max in DFS search stack
44 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,1.37643,47476,1,0,1880,167374,84,768,414,228307,3822
an accepting run exists (use option '-e' to print it)
Formula 6 is FALSE accepting run found.
FORMULA RefineWMG-PT-002-003-LTLFireability-06 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Checking formula 7 : !((G(G(X("(p10>=1)")))))
Formula 7 simplified : !GX"(p10>=1)"
LTSmin run took 18 ms.
FORMULA RefineWMG-PT-002-003-LTLFireability-07 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, (LTLAP2==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 17 ms.
FORMULA RefineWMG-PT-002-003-LTLFireability-08 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, (LTLAP8==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 15 ms.
FORMULA RefineWMG-PT-002-003-LTLFireability-09 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, (LTLAP6==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 16 ms.
FORMULA RefineWMG-PT-002-003-LTLFireability-10 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, ((LTLAP8==true))U((<>((LTLAP4==true)))U(<>((LTLAP9==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 13 ms.
FORMULA RefineWMG-PT-002-003-LTLFireability-11 TRUE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, (X(<>(X((LTLAP4==true)))))U(<>(X(<>((LTLAP0==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 14 ms.
FORMULA RefineWMG-PT-002-003-LTLFireability-12 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X(X(<>((LTLAP3==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 19 ms.
FORMULA RefineWMG-PT-002-003-LTLFireability-13 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X(<>(X(((LTLAP7==true))U((LTLAP8==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 13 ms.
FORMULA RefineWMG-PT-002-003-LTLFireability-14 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, <>([]([](X(<>((LTLAP9==true)))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 18 ms.
FORMULA RefineWMG-PT-002-003-LTLFireability-15 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
ITS tools runner thread asked to quit. Dying gracefully.
BK_STOP 1527971156126
--------------------
content from stderr:
+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution LTLFireability -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -consoleLog -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination LTLFireability -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
Jun 02, 2018 8:25:53 PM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, LTLFireability, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -smt]
Jun 02, 2018 8:25:53 PM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
Jun 02, 2018 8:25:53 PM fr.lip6.move.gal.nupn.PTNetReader loadFromXML
INFO: Load time of PNML (sax parser for PT used): 27 ms
Jun 02, 2018 8:25:53 PM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 14 places.
Jun 02, 2018 8:25:54 PM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 11 transitions.
Jun 02, 2018 8:25:54 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.img.gal : 8 ms
Jun 02, 2018 8:25:54 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 24 ms
Jun 02, 2018 8:25:54 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/LTLFireability.pnml.gal : 1 ms
Jun 02, 2018 8:25:54 PM fr.lip6.move.serialization.SerializationUtil serializePropertiesForITSLTLTools
INFO: Time to serialize properties into /home/mcc/execution/LTLFireability.ltl : 2 ms
Jun 02, 2018 8:25:54 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 11 transitions.
Jun 02, 2018 8:25:54 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 6 place invariants in 11 ms
Jun 02, 2018 8:25:54 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 14 variables to be positive in 81 ms
Jun 02, 2018 8:25:54 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may disable matrix : 11 transitions.
Jun 02, 2018 8:25:54 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of disable matrix completed :0/11 took 0 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Jun 02, 2018 8:25:54 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete disable matrix. took 0 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Jun 02, 2018 8:25:54 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may enable matrix : 11 transitions.
Jun 02, 2018 8:25:54 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete enable matrix. took 0 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Jun 02, 2018 8:25:54 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeCoEnablingMatrix
INFO: Computing symmetric co enabling matrix : 11 transitions.
Jun 02, 2018 8:25:54 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Finished co-enabling matrix. took 180 ms. Total solver calls (SAT/UNSAT): 15(15/0)
Jun 02, 2018 8:25:54 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeDoNotAccord
INFO: Computing Do-Not-Accords matrix : 11 transitions.
Jun 02, 2018 8:25:55 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed DNA matrix. took 50 ms. Total solver calls (SAT/UNSAT): 11(0/11)
Jun 02, 2018 8:25:55 PM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 775ms conformant to PINS in folder :/home/mcc/execution
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="RefineWMG-PT-002003"
export BK_EXAMINATION="LTLFireability"
export BK_TOOL="itstools"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
tar xzf /home/mcc/BenchKit/INPUTS/RefineWMG-PT-002003.tgz
mv RefineWMG-PT-002003 execution
cd execution
pwd
ls -lh
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3637"
echo " Executing tool itstools"
echo " Input is RefineWMG-PT-002003, examination is LTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r284-csrt-152749175300636"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;