Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Waiting for the VM to be ready (probing ssh)
................
/home/mcc/execution
total 268K
-rw-r--r-- 1 mcc users 3.8K May 30 20:54 CTLCardinality.txt
-rw-r--r-- 1 mcc users 22K May 30 20:54 CTLCardinality.xml
-rw-r--r-- 1 mcc users 2.8K May 29 14:42 CTLFireability.txt
-rw-r--r-- 1 mcc users 20K May 29 14:42 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K May 24 11:17 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.3K May 24 11:17 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 2.4K May 28 09:45 LTLCardinality.txt
-rw-r--r-- 1 mcc users 11K May 28 09:45 LTLCardinality.xml
-rw-r--r-- 1 mcc users 1.8K May 28 07:57 LTLFireability.txt
-rw-r--r-- 1 mcc users 8.1K May 28 07:57 LTLFireability.xml
-rw-r--r-- 1 mcc users 1 May 24 11:17 NewModel
-rw-r--r-- 1 mcc users 3.9K May 28 06:14 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 21K May 28 06:14 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 110 May 26 06:29 ReachabilityDeadlock.txt
-rw-r--r-- 1 mcc users 348 May 26 06:29 ReachabilityDeadlock.xml
-rw-r--r-- 1 mcc users 2.6K May 27 03:39 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 15K May 27 03:39 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.7K May 28 07:31 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.7K May 28 07:31 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 24 11:17 equiv_col
-rw-r--r-- 1 mcc users 4 May 24 11:17 instance
-rw-r--r-- 1 mcc users 6 May 24 11:17 iscolored
-rw-r--r-- 1 mcc users 89K May 24 11:17 model.pnml
=====================================================================
Generated by BenchKit 2-3637
Executing tool itstools
Input is DiscoveryGPU-PT-12b, examination is LTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r284-csrt-152749174600123
=====================================================================

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME DiscoveryGPU-PT-12b-LTLFireability-00
FORMULA_NAME DiscoveryGPU-PT-12b-LTLFireability-01
FORMULA_NAME DiscoveryGPU-PT-12b-LTLFireability-02
FORMULA_NAME DiscoveryGPU-PT-12b-LTLFireability-03
FORMULA_NAME DiscoveryGPU-PT-12b-LTLFireability-04
FORMULA_NAME DiscoveryGPU-PT-12b-LTLFireability-05
FORMULA_NAME DiscoveryGPU-PT-12b-LTLFireability-06
FORMULA_NAME DiscoveryGPU-PT-12b-LTLFireability-07
FORMULA_NAME DiscoveryGPU-PT-12b-LTLFireability-08
FORMULA_NAME DiscoveryGPU-PT-12b-LTLFireability-09
FORMULA_NAME DiscoveryGPU-PT-12b-LTLFireability-10
FORMULA_NAME DiscoveryGPU-PT-12b-LTLFireability-11
FORMULA_NAME DiscoveryGPU-PT-12b-LTLFireability-12
FORMULA_NAME DiscoveryGPU-PT-12b-LTLFireability-13
FORMULA_NAME DiscoveryGPU-PT-12b-LTLFireability-14
FORMULA_NAME DiscoveryGPU-PT-12b-LTLFireability-15

=== Now, execution of the tool begins

BK_START 1527921361020

Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805151631/bin/its-ltl-linux64, --gc-threshold, 2000000, -i, /home/mcc/execution/LTLFireability.pnml.gal, -t, CGAL, -LTL, /home/mcc/execution/LTLFireability.ltl, -c, -stutter-deadlock], workingDir=/home/mcc/execution]

its-ltl command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805151631/bin/its-ltl-linux64 --gc-threshold 2000000 -i /home/mcc/execution/LTLFireability.pnml.gal -t CGAL -LTL /home/mcc/execution/LTLFireability.ltl -c -stutter-deadlock
Read 16 LTL properties
Checking formula 0 : !((F(F(G("(u19.p206>=1)")))))
Formula 0 simplified : !FG"(u19.p206>=1)"
built 37 ordering constraints for composite.
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
// Phase 1: matrix 374 rows 352 cols
invariant :u13:p39 + u13:p40 + u13:p41 + u13:p42 + u13:p43 + u13:p44 + u13:p45 + u13:p46 + u13:p47 + u13:p48 + u13:p49 + u13:p50 + u13:p51 + u13:p52 + u13:p53 + u13:p54 + u13:p55 + u13:p56 + u13:p57 + u13:p58 + u13:p59 + u13:p60 + u13:p61 + u13:p62 + u13:p63 + u13:p64 + u13:p65 + u27:p11 + u28:p10 + u38:p9 + u37:p8 + u36:p7 + u35:p6 + u34:p5 + u33:p4 + u32:p3 + u31:p2 + u30:p1 + u29:p0 = 1
invariant :u23:p309 + u23:p310 + u23:p311 + u23:p312 + u23:p313 + u23:p314 + u23:p315 + u23:p316 + u23:p317 + u23:p318 + u23:p319 + u23:p320 + u23:p321 + u23:p322 + u23:p323 + u23:p324 + u23:p325 + u23:p326 + u23:p327 + u23:p328 + u23:p329 + u23:p330 + u23:p331 + u23:p332 + u23:p333 + u23:p334 + u23:p335 + u30:p1 + u29:p0 = 1
invariant :u19:p201 + u19:p202 + u19:p203 + u19:p204 + u19:p205 + u19:p206 + u19:p207 + u19:p208 + u19:p209 + u19:p210 + u19:p211 + u19:p212 + u19:p213 + u19:p214 + u19:p215 + u19:p216 + u19:p217 + u19:p218 + u19:p219 + u19:p220 + u19:p221 + u19:p222 + u19:p223 + u19:p224 + u19:p225 + u19:p226 + u19:p227 + u34:p5 + u33:p4 + u32:p3 + u31:p2 + u30:p1 + u29:p0 = 1
invariant :u12:p12 + u12:p13 + u12:p14 + u12:p15 + u12:p16 + u12:p17 + u12:p18 + u12:p19 + u12:p20 + u12:p21 + u12:p22 + u12:p23 + u12:p24 + u12:p25 + u12:p26 + u12:p27 + u12:p28 + u12:p29 + u12:p30 + u12:p31 + u12:p32 + u12:p33 + u12:p34 + u12:p35 + u12:p36 + u12:p37 + u12:p38 + u27:p11 + u28:p10 + u38:p9 + u37:p8 + u36:p7 + u35:p6 + u34:p5 + u33:p4 + u32:p3 + u31:p2 + u30:p1 + u29:p0 = 1
invariant :u20:p228 + u20:p229 + u20:p230 + u20:p231 + u20:p232 + u20:p233 + u20:p234 + u20:p235 + u20:p236 + u20:p237 + u20:p238 + u20:p239 + u20:p240 + u20:p241 + u20:p242 + u20:p243 + u20:p244 + u20:p245 + u20:p246 + u20:p247 + u20:p248 + u20:p249 + u20:p250 + u20:p251 + u20:p252 + u20:p253 + u20:p254 + u33:p4 + u32:p3 + u31:p2 + u30:p1 + u29:p0 = 1
invariant :u21:p255 + u21:p256 + u21:p257 + u21:p258 + u21:p259 + u21:p260 + u21:p261 + u21:p262 + u21:p263 + u21:p264 + u21:p265 + u21:p266 + u21:p267 + u21:p268 + u21:p269 + u21:p270 + u21:p271 + u21:p272 + u21:p273 + u21:p274 + u21:p275 + u21:p276 + u21:p277 + u21:p278 + u21:p279 + u21:p280 + u21:p281 + u32:p3 + u31:p2 + u30:p1 + u29:p0 = 1
invariant :u22:p282 + u22:p283 + u22:p284 + u22:p285 + u22:p286 + u22:p287 + u22:p288 + u22:p289 + u22:p290 + u22:p291 + u22:p292 + u22:p293 + u22:p294 + u22:p295 + u22:p296 + u22:p297 + u22:p298 + u22:p299 + u22:p300 + u22:p301 + u22:p302 + u22:p303 + u22:p304 + u22:p305 + u22:p306 + u22:p307 + u22:p308 + u31:p2 + u30:p1 + u29:p0 = 1
invariant :u18:p174 + u18:p175 + u18:p176 + u18:p177 + u18:p178 + u18:p179 + u18:p180 + u18:p181 + u18:p182 + u18:p183 + u18:p184 + u18:p185 + u18:p186 + u18:p187 + u18:p188 + u18:p189 + u18:p190 + u18:p191 + u18:p192 + u18:p193 + u18:p194 + u18:p195 + u18:p196 + u18:p197 + u18:p198 + u18:p199 + u18:p200 + u35:p6 + u34:p5 + u33:p4 + u32:p3 + u31:p2 + u30:p1 + u29:p0 = 1
invariant :u17:p147 + u17:p148 + u17:p149 + u17:p150 + u17:p151 + u17:p152 + u17:p153 + u17:p154 + u17:p155 + u17:p156 + u17:p157 + u17:p158 + u17:p159 + u17:p160 + u17:p161 + u17:p162 + u17:p163 + u17:p164 + u17:p165 + u17:p166 + u17:p167 + u17:p168 + u17:p169 + u17:p170 + u17:p171 + u17:p172 + u17:p173 + u36:p7 + u35:p6 + u34:p5 + u33:p4 + u32:p3 + u31:p2 + u30:p1 + u29:p0 = 1
invariant :u25:p337 + u25:p338 + u25:p339 + u25:p340 + u25:p341 + u25:p342 + u25:p343 + u25:p344 + u25:p345 + u39:p336 + u29:p0 = 1
invariant :u16:p120 + u16:p121 + u16:p122 + u16:p123 + u16:p124 + u16:p125 + u16:p126 + u16:p127 + u16:p128 + u16:p129 + u16:p130 + u16:p131 + u16:p132 + u16:p133 + u16:p134 + u16:p135 + u16:p136 + u16:p137 + u16:p138 + u16:p139 + u16:p140 + u16:p141 + u16:p142 + u16:p143 + u16:p144 + u16:p145 + u16:p146 + u37:p8 + u36:p7 + u35:p6 + u34:p5 + u33:p4 + u32:p3 + u31:p2 + u30:p1 + u29:p0 = 1
invariant :u15:p93 + u15:p94 + u15:p95 + u15:p96 + u15:p97 + u15:p98 + u15:p99 + u15:p100 + u15:p101 + u15:p102 + u15:p103 + u15:p104 + u15:p105 + u15:p106 + u15:p107 + u15:p108 + u15:p109 + u15:p110 + u15:p111 + u15:p112 + u15:p113 + u15:p114 + u15:p115 + u15:p116 + u15:p117 + u15:p118 + u15:p119 + u38:p9 + u37:p8 + u36:p7 + u35:p6 + u34:p5 + u33:p4 + u32:p3 + u31:p2 + u30:p1 + u29:p0 = 1
invariant :u14:p66 + u14:p67 + u14:p68 + u14:p69 + u14:p70 + u14:p71 + u14:p72 + u14:p73 + u14:p74 + u14:p75 + u14:p76 + u14:p77 + u14:p78 + u14:p79 + u14:p80 + u14:p81 + u14:p82 + u14:p83 + u14:p84 + u14:p85 + u14:p86 + u14:p87 + u14:p88 + u14:p89 + u14:p90 + u14:p91 + u14:p92 + u28:p10 + u38:p9 + u37:p8 + u36:p7 + u35:p6 + u34:p5 + u33:p4 + u32:p3 + u31:p2 + u30:p1 + u29:p0 = 1
invariant :u26:p346 + u26:p347 + u26:p348 + u26:p349 + u26:p350 + u26:p351 + u39:p336 + u29:p0 = 1
Reverse transition relation is NOT exact ! Due to transitions u12.t225, u12.t231, u12.t235, u12.t237, u12.t239, u12.t241, u13.t207, u13.t213, u13.t217, u13.t219, u13.t221, u13.t223, u14.t188, u14.t194, u14.t198, u14.t200, u14.t202, u14.t204, u15.t169, u15.t175, u15.t179, u15.t181, u15.t183, u15.t185, u16.t150, u16.t156, u16.t160, u16.t162, u16.t164, u16.t166, u17.t131, u17.t137, u17.t141, u17.t143, u17.t145, u17.t147, u18.t112, u18.t118, u18.t122, u18.t124, u18.t126, u18.t128, u19.t93, u19.t99, u19.t103, u19.t105, u19.t107, u19.t109, u20.t74, u20.t80, u20.t84, u20.t86, u20.t88, u20.t90, u21.t55, u21.t61, u21.t65, u21.t67, u21.t69, u21.t71, u22.t36, u22.t42, u22.t46, u22.t48, u22.t50, u22.t52, u23.t17, u23.t23, u23.t27, u23.t29, u23.t31, u23.t33, u25.t9, u25.t11, u25.t12, u25.t14, u26.t3, u26.t4, u26.t6, Intersection with reachable at each step enabled. (destroyed/reverse/intersect/total) :0/295/79/374
Computing Next relation with stutter on 4096 deadlock states
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O3, model.c], workingDir=/home/mcc/execution]
Compilation finished in 6389 ms.
Running link step : CommandLine [args=[gcc, -shared, -o, gal.so, model.o], workingDir=/home/mcc/execution]
Link finished in 72 ms.
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, <>(<>([]((LTLAP0==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 307 ms.
FORMULA DiscoveryGPU-PT-12b-LTLFireability-00 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, [](X(([]((LTLAP1==true)))U(X((LTLAP2==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 63 ms.
FORMULA DiscoveryGPU-PT-12b-LTLFireability-01 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, ((LTLAP3==true))U(<>((LTLAP4==true))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 374 ms.
FORMULA DiscoveryGPU-PT-12b-LTLFireability-02 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, <>([]((LTLAP5==true))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 345 ms.
FORMULA DiscoveryGPU-PT-12b-LTLFireability-03 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, <>((X(<>((LTLAP6==true))))U(X(X((LTLAP7==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 37 ms.
FORMULA DiscoveryGPU-PT-12b-LTLFireability-04 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, (LTLAP8==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 364 ms.
FORMULA DiscoveryGPU-PT-12b-LTLFireability-05 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, (LTLAP9==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 353 ms.
FORMULA DiscoveryGPU-PT-12b-LTLFireability-06 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, <>(((LTLAP10==true))U(<>([]((LTLAP11==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 382 ms.
FORMULA DiscoveryGPU-PT-12b-LTLFireability-07 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X([]((LTLAP12==true))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 30 ms.
FORMULA DiscoveryGPU-PT-12b-LTLFireability-08 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, (LTLAP13==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 345 ms.
FORMULA DiscoveryGPU-PT-12b-LTLFireability-09 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X((LTLAP14==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 55 ms.
FORMULA DiscoveryGPU-PT-12b-LTLFireability-10 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, <>((LTLAP15==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 324 ms.
FORMULA DiscoveryGPU-PT-12b-LTLFireability-11 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, <>(<>((LTLAP16==true))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 370 ms.
FORMULA DiscoveryGPU-PT-12b-LTLFireability-12 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, <>(X(((LTLAP17==true))U(<>((LTLAP18==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 57 ms.
FORMULA DiscoveryGPU-PT-12b-LTLFireability-13 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, (<>(X(X((LTLAP19==true)))))U((X((LTLAP20==true)))U(X((LTLAP21==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 60 ms.
FORMULA DiscoveryGPU-PT-12b-LTLFireability-14 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, []([](X(((LTLAP22==true))U((LTLAP6==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 78 ms.
FORMULA DiscoveryGPU-PT-12b-LTLFireability-15 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
ITS tools runner thread asked to quit. Dying gracefully.

BK_STOP 1527921525165

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution LTLFireability -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -consoleLog -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination LTLFireability -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
Jun 02, 2018 6:36:03 AM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, LTLFireability, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -smt]
Jun 02, 2018 6:36:03 AM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
Jun 02, 2018 6:36:03 AM fr.lip6.move.gal.nupn.PTNetReader loadFromXML
INFO: Load time of PNML (sax parser for PT used): 92 ms
Jun 02, 2018 6:36:03 AM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 352 places.
Jun 02, 2018 6:36:03 AM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 374 transitions.
Jun 02, 2018 6:36:03 AM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Found NUPN structural information;
Jun 02, 2018 6:36:03 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.img.gal : 19 ms
Jun 02, 2018 6:36:03 AM fr.lip6.move.gal.application.MccTranslator applyOrder
INFO: Applying decomposition
Jun 02, 2018 6:36:03 AM fr.lip6.move.gal.instantiate.CompositeBuilder decomposeWithOrder
INFO: Decomposing Gal with order
Jun 02, 2018 6:36:03 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 82 ms
Jun 02, 2018 6:36:03 AM fr.lip6.move.gal.instantiate.CompositeBuilder rewriteArraysToAllowPartition
INFO: Rewriting arrays to variables to allow decomposition.
Jun 02, 2018 6:36:03 AM fr.lip6.move.gal.instantiate.Instantiator fuseIsomorphicEffects
INFO: Removed a total of 103 redundant transitions.
Jun 02, 2018 6:36:03 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/LTLFireability.pnml.gal : 8 ms
Jun 02, 2018 6:36:03 AM fr.lip6.move.serialization.SerializationUtil serializePropertiesForITSLTLTools
INFO: Time to serialize properties into /home/mcc/execution/LTLFireability.ltl : 1 ms
Jun 02, 2018 6:36:03 AM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 374 transitions.
Jun 02, 2018 6:36:04 AM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 14 place invariants in 116 ms
Jun 02, 2018 6:36:04 AM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 352 variables to be positive in 725 ms
Jun 02, 2018 6:36:04 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may disable matrix : 374 transitions.
Jun 02, 2018 6:36:04 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of disable matrix completed :0/374 took 0 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Jun 02, 2018 6:36:04 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete disable matrix. took 26 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Jun 02, 2018 6:36:04 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may enable matrix : 374 transitions.
Jun 02, 2018 6:36:04 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete enable matrix. took 8 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Jun 02, 2018 6:36:07 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeCoEnablingMatrix
INFO: Computing symmetric co enabling matrix : 374 transitions.
Jun 02, 2018 6:36:08 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(0/374) took 1714 ms. Total solver calls (SAT/UNSAT): 373(0/373)
Jun 02, 2018 6:36:11 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(18/374) took 4728 ms. Total solver calls (SAT/UNSAT): 3163(186/2977)
Jun 02, 2018 6:36:14 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(25/374) took 7728 ms. Total solver calls (SAT/UNSAT): 3562(357/3205)
Jun 02, 2018 6:36:18 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(30/374) took 11724 ms. Total solver calls (SAT/UNSAT): 3817(450/3367)
Jun 02, 2018 6:36:22 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(34/374) took 15192 ms. Total solver calls (SAT/UNSAT): 4003(506/3497)
Jun 02, 2018 6:36:26 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(42/374) took 19155 ms. Total solver calls (SAT/UNSAT): 4327(579/3748)
Jun 02, 2018 6:36:29 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(49/374) took 22314 ms. Total solver calls (SAT/UNSAT): 4627(660/3967)
Jun 02, 2018 6:36:33 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(52/374) took 26748 ms. Total solver calls (SAT/UNSAT): 4918(854/4064)
Jun 02, 2018 6:36:39 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(54/374) took 32211 ms. Total solver calls (SAT/UNSAT): 5107(978/4129)
Jun 02, 2018 6:36:45 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(56/374) took 38280 ms. Total solver calls (SAT/UNSAT): 5292(1098/4194)
Jun 02, 2018 6:36:51 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(58/374) took 44045 ms. Total solver calls (SAT/UNSAT): 5473(1214/4259)
Jun 02, 2018 6:36:56 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(60/374) took 49530 ms. Total solver calls (SAT/UNSAT): 5650(1326/4324)
Jun 02, 2018 6:37:01 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(64/374) took 54029 ms. Total solver calls (SAT/UNSAT): 5992(1538/4454)
Jun 02, 2018 6:37:04 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(65/374) took 57408 ms. Total solver calls (SAT/UNSAT): 6075(1588/4487)
Jun 02, 2018 6:37:08 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(67/374) took 60956 ms. Total solver calls (SAT/UNSAT): 6238(1686/4552)
Jun 02, 2018 6:37:12 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(71/374) took 65041 ms. Total solver calls (SAT/UNSAT): 6552(1870/4682)
Jun 02, 2018 6:37:16 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(75/374) took 69197 ms. Total solver calls (SAT/UNSAT): 6850(2044/4806)
Jun 02, 2018 6:37:19 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(77/374) took 72225 ms. Total solver calls (SAT/UNSAT): 6993(2126/4867)
Jun 02, 2018 6:37:23 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(79/374) took 76331 ms. Total solver calls (SAT/UNSAT): 7132(2204/4928)
Jun 02, 2018 6:37:26 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(84/374) took 79736 ms. Total solver calls (SAT/UNSAT): 7462(2382/5080)
Jun 02, 2018 6:37:29 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(90/374) took 82891 ms. Total solver calls (SAT/UNSAT): 7825(2562/5263)
Jun 02, 2018 6:37:33 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(93/374) took 86627 ms. Total solver calls (SAT/UNSAT): 7993(2638/5355)
Jun 02, 2018 6:37:37 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(97/374) took 90664 ms. Total solver calls (SAT/UNSAT): 8203(2728/5475)
Jun 02, 2018 6:37:41 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(101/374) took 94355 ms. Total solver calls (SAT/UNSAT): 8397(2808/5589)
Jun 02, 2018 6:37:45 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(107/374) took 98439 ms. Total solver calls (SAT/UNSAT): 8658(2898/5760)
Jun 02, 2018 6:37:49 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(114/374) took 101962 ms. Total solver calls (SAT/UNSAT): 8917(2958/5959)
Jun 02, 2018 6:37:53 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(120/374) took 105949 ms. Total solver calls (SAT/UNSAT): 9100(2970/6130)
Jun 02, 2018 6:37:56 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(150/374) took 109037 ms. Total solver calls (SAT/UNSAT): 9435(2977/6458)
Jun 02, 2018 6:37:59 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(172/374) took 112055 ms. Total solver calls (SAT/UNSAT): 9642(2982/6660)
Jun 02, 2018 6:38:02 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(203/374) took 115252 ms. Total solver calls (SAT/UNSAT): 9914(2987/6927)
Jun 02, 2018 6:38:05 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(221/374) took 118772 ms. Total solver calls (SAT/UNSAT): 10069(2990/7079)
Jun 02, 2018 6:38:09 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(232/374) took 121919 ms. Total solver calls (SAT/UNSAT): 10212(2994/7218)
Jun 02, 2018 6:38:12 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(249/374) took 124960 ms. Total solver calls (SAT/UNSAT): 10375(2997/7378)
Jun 02, 2018 6:38:15 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(272/374) took 128023 ms. Total solver calls (SAT/UNSAT): 10592(3002/7590)
Jun 02, 2018 6:38:18 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(289/374) took 131067 ms. Total solver calls (SAT/UNSAT): 10755(3005/7750)
Jun 02, 2018 6:38:21 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(309/374) took 134298 ms. Total solver calls (SAT/UNSAT): 10945(3009/7936)
Jun 02, 2018 6:38:24 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(323/374) took 137404 ms. Total solver calls (SAT/UNSAT): 11054(3011/8043)
Jun 02, 2018 6:38:27 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(331/374) took 140458 ms. Total solver calls (SAT/UNSAT): 11154(3014/8140)
Jun 02, 2018 6:38:30 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(344/374) took 143473 ms. Total solver calls (SAT/UNSAT): 11260(3015/8245)
Jun 02, 2018 6:38:33 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(353/374) took 146475 ms. Total solver calls (SAT/UNSAT): 11359(3018/8341)
Jun 02, 2018 6:38:34 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Finished co-enabling matrix. took 147177 ms. Total solver calls (SAT/UNSAT): 11418(3018/8400)
Jun 02, 2018 6:38:34 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeDoNotAccord
INFO: Computing Do-Not-Accords matrix : 374 transitions.
Jun 02, 2018 6:38:34 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed DNA matrix. took 46 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Jun 02, 2018 6:38:34 AM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 150618ms conformant to PINS in folder :/home/mcc/execution

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="DiscoveryGPU-PT-12b"
export BK_EXAMINATION="LTLFireability"
export BK_TOOL="itstools"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

tar xzf /home/mcc/BenchKit/INPUTS/DiscoveryGPU-PT-12b.tgz
mv DiscoveryGPU-PT-12b execution
cd execution
pwd
ls -lh

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3637"
echo " Executing tool itstools"
echo " Input is DiscoveryGPU-PT-12b, examination is LTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r284-csrt-152749174600123"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' LTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;