About the Execution of ITS-Tools.L for DLCflexbar-PT-7b
Execution Summary | |||||
Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
15750.010 | 3600000.00 | 4990619.00 | 8719.70 | [undef] | Time out reached |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Waiting for the VM to be ready (probing ssh)
....................
/home/mcc/execution
total 14M
-rw-r--r-- 1 mcc users 3.8K May 30 05:45 CTLCardinality.txt
-rw-r--r-- 1 mcc users 22K May 30 05:45 CTLCardinality.xml
-rw-r--r-- 1 mcc users 2.6K May 29 04:53 CTLFireability.txt
-rw-r--r-- 1 mcc users 17K May 29 04:53 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K May 24 11:17 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.0K May 24 11:17 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 2.3K May 28 09:37 LTLCardinality.txt
-rw-r--r-- 1 mcc users 9.4K May 28 09:37 LTLCardinality.xml
-rw-r--r-- 1 mcc users 1.9K May 28 07:48 LTLFireability.txt
-rw-r--r-- 1 mcc users 9.0K May 28 07:48 LTLFireability.xml
-rw-r--r-- 1 mcc users 1 May 24 11:17 NewModel
-rw-r--r-- 1 mcc users 4.1K May 27 20:00 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 21K May 27 20:00 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 107 May 26 06:29 ReachabilityDeadlock.txt
-rw-r--r-- 1 mcc users 345 May 26 06:29 ReachabilityDeadlock.xml
-rw-r--r-- 1 mcc users 3.0K May 26 20:42 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 19K May 26 20:42 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K May 28 07:31 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.7K May 28 07:31 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 24 11:17 equiv_col
-rw-r--r-- 1 mcc users 3 May 24 11:17 instance
-rw-r--r-- 1 mcc users 6 May 24 11:17 iscolored
-rw-r--r-- 1 mcc users 14M May 24 11:17 model.pnml
=====================================================================
Generated by BenchKit 2-3637
Executing tool itstoolsl
Input is DLCflexbar-PT-7b, examination is ReachabilityDeadlock
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r273-smll-152749150100467
=====================================================================
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME DLCflexbar-PT-7b-ReachabilityDeadlock-0
=== Now, execution of the tool begins
BK_START 1528101135210
Flatten gal took : 5451 ms
Constant places removed 1 places and 1 transitions.
Performed 21428 Post agglomeration using F-continuation condition.
Iterating post reduction 0 with 21429 rules applied. Total rules applied 21429 place count 35100 transition count 34078
Constant places removed 21429 places and 1 transitions.
Reduce isomorphic transitions removed 357 transitions.
Performed 348 Post agglomeration using F-continuation condition.
Iterating post reduction 1 with 22134 rules applied. Total rules applied 43563 place count 13671 transition count 33372
Constant places removed 348 places and 0 transitions.
Reduce isomorphic transitions removed 110 transitions.
Performed 110 Post agglomeration using F-continuation condition.
Iterating post reduction 2 with 568 rules applied. Total rules applied 44131 place count 13323 transition count 33152
Constant places removed 110 places and 0 transitions.
Iterating post reduction 3 with 110 rules applied. Total rules applied 44241 place count 13213 transition count 33152
Performed 110 Pre agglomeration using Quasi-Persistent + HF-interchangeable + Divergent Free condition.
Pre-agglomeration after 4 with 110 Pre rules applied. Total rules applied 44241 place count 13213 transition count 33042
Constant places removed 110 places and 0 transitions.
Iterating post reduction 4 with 110 rules applied. Total rules applied 44351 place count 13103 transition count 33042
Symmetric choice reduction at 5 with 2555 rule applications. Total rules 46906 place count 13103 transition count 33042
Constant places removed 2555 places and 2555 transitions.
Iterating post reduction 5 with 2555 rules applied. Total rules applied 49461 place count 10548 transition count 30487
Performed 27 Pre agglomeration using Quasi-Persistent + HF-interchangeable + Divergent Free condition.
Pre-agglomeration after 6 with 27 Pre rules applied. Total rules applied 49461 place count 10548 transition count 30460
Constant places removed 27 places and 0 transitions.
Iterating post reduction 6 with 27 rules applied. Total rules applied 49488 place count 10521 transition count 30460
Symmetric choice reduction at 7 with 119 rule applications. Total rules 49607 place count 10521 transition count 30460
Constant places removed 119 places and 2052 transitions.
Reduce isomorphic transitions removed 110 transitions.
Iterating post reduction 7 with 229 rules applied. Total rules applied 49836 place count 10402 transition count 28298
Performed 2865 Post agglomeration using F-continuation condition.
Constant places removed 2865 places and 0 transitions.
Iterating post reduction 8 with 2865 rules applied. Total rules applied 52701 place count 7537 transition count 25424
Symmetric choice reduction at 9 with 36 rule applications. Total rules 52737 place count 7537 transition count 25424
Constant places removed 36 places and 4248 transitions.
Iterating post reduction 9 with 36 rules applied. Total rules applied 52773 place count 7501 transition count 21176
Performed 101 Post agglomeration using F-continuation condition.
Constant places removed 101 places and 0 transitions.
Reduce isomorphic transitions removed 25 transitions.
Iterating post reduction 10 with 126 rules applied. Total rules applied 52899 place count 7400 transition count 22109
Performed 101 Post agglomeration using F-continuation condition.
Constant places removed 101 places and 0 transitions.
Reduce isomorphic transitions removed 26 transitions.
Iterating post reduction 11 with 127 rules applied. Total rules applied 53026 place count 7299 transition count 23041
Performed 101 Post agglomeration using F-continuation condition.
Constant places removed 101 places and 0 transitions.
Reduce isomorphic transitions removed 25 transitions.
Iterating post reduction 12 with 126 rules applied. Total rules applied 53152 place count 7198 transition count 23981
Performed 101 Post agglomeration using F-continuation condition.
Constant places removed 101 places and 0 transitions.
Reduce isomorphic transitions removed 26 transitions.
Iterating post reduction 13 with 127 rules applied. Total rules applied 53279 place count 7097 transition count 24913
Performed 54 Post agglomeration using F-continuation condition.
Constant places removed 54 places and 0 transitions.
Reduce isomorphic transitions removed 18 transitions.
Iterating post reduction 14 with 72 rules applied. Total rules applied 53351 place count 7043 transition count 26299
Applied a total of 53351 rules in 376997 ms. Remains 7043 /35101 variables (removed 28058) and now considering 26299/55507 (removed 29208) transitions.
Normalized transition count is 24165
// Phase 1: matrix 24165 rows 7043 cols
Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O3, model.c], workingDir=/home/mcc/execution]
WARNING : LTS min runner thread failed on error :java.lang.RuntimeException: Compilation or link of executable timed out.java.util.concurrent.TimeoutException: Subprocess running CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O3, model.c], workingDir=/home/mcc/execution] killed by timeout after 400 SECONDS
BK_TIME_CONFINEMENT_REACHED
--------------------
content from stderr:
+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution ReachabilityDeadlock -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -louvain -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -consoleLog -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination ReachabilityDeadlock -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -louvain -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
Jun 04, 2018 8:32:17 AM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, ReachabilityDeadlock, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -louvain, -smt]
Jun 04, 2018 8:32:17 AM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
Jun 04, 2018 8:32:19 AM fr.lip6.move.gal.nupn.PTNetReader loadFromXML
INFO: Load time of PNML (sax parser for PT used): 1377 ms
Jun 04, 2018 8:32:20 AM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 35101 places.
Jun 04, 2018 8:32:21 AM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 55507 transitions.
Jun 04, 2018 8:32:21 AM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Found NUPN structural information;
Jun 04, 2018 8:32:29 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 5438 ms
Jun 04, 2018 8:32:29 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.simple.gal : 306 ms
Jun 04, 2018 8:32:33 AM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 55507 transitions.
Jun 04, 2018 8:40:17 AM fr.lip6.move.gal.application.MccTranslator applyOrder
INFO: Applying decomposition
Jun 04, 2018 8:40:19 AM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 26299 transitions.
Jun 04, 2018 8:40:19 AM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Too many transitions (26299) to apply POR reductions. Disabling POR matrices.
Jun 04, 2018 8:40:20 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 2763 ms
Jun 04, 2018 8:40:20 AM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 3394ms conformant to PINS in folder :/home/mcc/execution
Jun 04, 2018 8:40:22 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 2454 ms
Jun 04, 2018 8:40:25 AM fr.lip6.move.gal.instantiate.CompositeBuilder decomposeWithOrder
INFO: Decomposing Gal with order
Jun 04, 2018 8:40:28 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 2282 ms
java.lang.RuntimeException: Compilation or link of executable timed out.java.util.concurrent.TimeoutException: Subprocess running CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O3, model.c], workingDir=/home/mcc/execution] killed by timeout after 400 SECONDS
at fr.lip6.move.gal.application.LTSminRunner$1.run(LTSminRunner.java:78)
at java.lang.Thread.run(Thread.java:748)
Jun 04, 2018 8:47:04 AM fr.lip6.move.gal.instantiate.CompositeBuilder rewriteArraysToAllowPartition
INFO: Rewriting arrays to variables to allow decomposition.
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="DLCflexbar-PT-7b"
export BK_EXAMINATION="ReachabilityDeadlock"
export BK_TOOL="itstoolsl"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
tar xzf /home/mcc/BenchKit/INPUTS/DLCflexbar-PT-7b.tgz
mv DLCflexbar-PT-7b execution
cd execution
pwd
ls -lh
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3637"
echo " Executing tool itstoolsl"
echo " Input is DLCflexbar-PT-7b, examination is ReachabilityDeadlock"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r273-smll-152749150100467"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityDeadlock" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityDeadlock" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityDeadlock.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityDeadlock.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityDeadlock.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;