About the Execution of ITS-Tools for BusinessProcesses-PT-16
Execution Summary | |||||
Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
15754.100 | 6775.00 | 13796.00 | 265.70 | T | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Waiting for the VM to be ready (probing ssh)
......................
/home/mcc/execution
total 336K
-rw-r--r-- 1 mcc users 4.1K May 29 16:58 CTLCardinality.txt
-rw-r--r-- 1 mcc users 24K May 29 16:58 CTLCardinality.xml
-rw-r--r-- 1 mcc users 2.5K May 28 11:19 CTLFireability.txt
-rw-r--r-- 1 mcc users 16K May 28 11:19 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K May 24 11:17 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.3K May 24 11:17 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 2.3K May 28 09:30 LTLCardinality.txt
-rw-r--r-- 1 mcc users 9.6K May 28 09:30 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.0K May 28 07:43 LTLFireability.txt
-rw-r--r-- 1 mcc users 9.6K May 28 07:43 LTLFireability.xml
-rw-r--r-- 1 mcc users 1 May 24 11:17 NewModel
-rw-r--r-- 1 mcc users 4.0K May 27 05:10 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 22K May 27 05:10 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 114 May 26 06:29 ReachabilityDeadlock.txt
-rw-r--r-- 1 mcc users 352 May 26 06:29 ReachabilityDeadlock.xml
-rw-r--r-- 1 mcc users 2.5K May 26 06:37 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 14K May 26 06:37 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.7K May 28 07:31 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.7K May 28 07:31 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 24 11:17 equiv_col
-rw-r--r-- 1 mcc users 3 May 24 11:17 instance
-rw-r--r-- 1 mcc users 6 May 24 11:17 iscolored
-rw-r--r-- 1 mcc users 159K May 24 11:17 model.pnml
=====================================================================
Generated by BenchKit 2-3637
Executing tool itstools
Input is BusinessProcesses-PT-16, examination is ReachabilityDeadlock
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r272-smll-152749149100323
=====================================================================
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME BusinessProcesses-PT-16-ReachabilityDeadlock-0
=== Now, execution of the tool begins
BK_START 1527924333956
Flatten gal took : 292 ms
Constant places removed 10 places and 5 transitions.
Performed 407 Post agglomeration using F-continuation condition.
Iterating post reduction 0 with 417 rules applied. Total rules applied 417 place count 628 transition count 166
Constant places removed 433 places and 4 transitions.
Iterating post reduction 1 with 433 rules applied. Total rules applied 850 place count 195 transition count 162
Constant places removed 1 places and 0 transitions.
Iterating post reduction 2 with 1 rules applied. Total rules applied 851 place count 194 transition count 162
Performed 19 Pre agglomeration using Quasi-Persistent + HF-interchangeable + Divergent Free condition.
Pre-agglomeration after 3 with 19 Pre rules applied. Total rules applied 851 place count 194 transition count 143
Constant places removed 19 places and 0 transitions.
Iterating post reduction 3 with 19 rules applied. Total rules applied 870 place count 175 transition count 143
Symmetric choice reduction at 4 with 4 rule applications. Total rules 874 place count 175 transition count 143
Constant places removed 4 places and 4 transitions.
Iterating post reduction 4 with 4 rules applied. Total rules applied 878 place count 171 transition count 139
Performed 5 Post agglomeration using F-continuation condition.
Constant places removed 5 places and 0 transitions.
Reduce isomorphic transitions removed 1 transitions.
Iterating post reduction 5 with 6 rules applied. Total rules applied 884 place count 166 transition count 133
Performed 2 Post agglomeration using F-continuation condition.
Constant places removed 2 places and 0 transitions.
Iterating post reduction 6 with 2 rules applied. Total rules applied 886 place count 164 transition count 135
Applied a total of 886 rules in 199 ms. Remains 164 /638 variables (removed 474) and now considering 135/578 (removed 443) transitions.
// Phase 1: matrix 135 rows 164 cols
Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805151631/bin/its-ctl-linux64, --gc-threshold, 2000000, --quiet, -i, /home/mcc/execution/ReachabilityDeadlock.pnml.gal, -t, CGAL, -ctl, DEADLOCK], workingDir=/home/mcc/execution]
its-ctl command run as :
/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805151631/bin/its-ctl-linux64 --gc-threshold 2000000 --quiet -i /home/mcc/execution/ReachabilityDeadlock.pnml.gal -t CGAL -ctl DEADLOCK
No direction supplied, using forward translation only.
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
// Phase 1: matrix 135 rows 164 cols
invariant :p604 + p605 + -1'p607 + -1'p608 = 0
invariant :p291 + p292 = 1
invariant :p351 + p352 = 1
invariant :p88 + -1'p91 + -1'p392 + p397 + p402 + -1'p407 + -1'p537 + p544 + p605 + -1'p608 = 0
invariant :p611 + p613 + -1'p617 + -1'p619 = 0
invariant :p87 + p91 + p392 + -1'p397 + -1'p402 + p407 + p537 + -1'p544 + -1'p605 + p608 = 1
invariant :p69 + p513 = 1
invariant :p229 + p595 = 1
invariant :p458 + p464 + p465 + p476 + p485 + p491 + p500 + p506 + p513 + p519 + p533 + p537 + p544 + p548 + p552 + p556 + p560 + p564 + p576 + p579 + p582 + p587 + p591 + p595 + p599 + p603 + p607 + p608 + p617 + p619 + p623 + p625 + p629 + p631 + p635 + p637 = 1
invariant :p76 + p519 = 1
invariant :p235 + p599 = 1
invariant :p632 + p634 + -1'p635 + -1'p637 = 0
invariant :p356 + p357 = 1
invariant :p626 + p628 + -1'p629 + -1'p631 = 0
invariant :p331 + p332 = 1
invariant :p620 + p622 + -1'p623 + -1'p625 = 0
invariant :p614 + p616 + -1'p617 + -1'p619 = 0
invariant :p411 + p412 = 1
invariant :p416 + p417 = 1
invariant :p199 + p201 + -1'p202 + -1'p204 = 0
invariant :p401 + p402 = 1
invariant :p451 + p452 = 1
invariant :p151 + p556 = 1
invariant :p53 + p500 = 1
invariant :p180 + -1'p192 + p193 + p195 + -1'p201 + p202 + p204 + -1'p207 + p208 + p210 + p458 + p464 + p465 + p476 + p485 + p491 + p500 + p506 + p513 + p519 + p533 + p537 + p544 + p548 + p552 + p556 + p560 + p564 + p579 + p582 + p587 + p591 + p595 + p599 + p603 + p607 + p608 + p613 + p622 + p628 + p635 + p637 = 1
invariant :p326 + p327 = 1
invariant :p117 + p537 = 1
invariant :p346 + p347 = 1
invariant :p223 + p591 = 1
invariant :p145 + p552 = 1
invariant :p376 + p377 = 1
invariant :p217 + p587 = 1
invariant :p371 + p372 = 1
invariant :p406 + p407 = 1
invariant :p62 + p506 = 1
invariant :p396 + p397 = 1
invariant :p28 + p476 = 1
invariant :p366 + p367 = 1
invariant :p391 + p392 = 1
invariant :-1'p180 + p183 + p192 + -1'p195 + p201 + -1'p204 + p207 + -1'p208 + -1'p210 + p211 + -1'p458 + -1'p464 + -1'p465 + -1'p476 + -1'p485 + -1'p491 + -1'p500 + -1'p506 + -1'p513 + -1'p519 + -1'p533 + -1'p537 + -1'p544 + -1'p548 + -1'p552 + -1'p556 + -1'p560 + -1'p564 + -2'p579 + -1'p582 + -1'p587 + -1'p591 + -1'p595 + -1'p599 + -1'p603 + -1'p607 + -1'p608 + -1'p613 + p616 + -1'p617 + -1'p619 + -1'p622 + -1'p623 + -1'p628 + p634 + -2'p635 + -2'p637 = -1
invariant :p46 + p491 = 1
invariant :p431 + p432 = 1
invariant :p133 + p544 = 1
invariant :p296 + p297 = 1
invariant :p436 + p437 = 1
invariant :p186 + p196 + p208 + p214 + -1'p582 + -1'p617 + -1'p629 + -1'p635 = 0
invariant :p361 + p362 = 1
invariant :p123 + p131 + p607 = 1
invariant :p441 + p442 = 1
invariant :p180 + p190 + -1'p201 + p202 + p204 + -1'p207 + p208 + p210 + p458 + p464 + p465 + p476 + p485 + p491 + p500 + p506 + p513 + p519 + p533 + p537 + p544 + p548 + p552 + p556 + p560 + p564 + p579 + p582 + p587 + p591 + p595 + p599 + p603 + p607 + p608 + p613 + p622 + p628 + p635 + p637 = 1
invariant :p301 + p302 = 1
invariant :p446 + p447 = 1
invariant :p321 + p322 = 1
invariant :p341 + p342 = 1
invariant :p139 + p548 = 1
invariant :p111 + p533 = 1
invariant :p421 + p422 = 1
invariant :p205 + p207 + -1'p208 + -1'p210 = 0
invariant :p426 + p427 = 1
invariant :p386 + p387 = 1
invariant :p37 + p485 = 1
invariant :p336 + p337 = 1
invariant :p180 + -1'p186 + -1'p192 + p198 + -1'p201 + p202 + p204 + -1'p207 + p210 + -1'p214 + p458 + p464 + p465 + p476 + p485 + p491 + p500 + p506 + p513 + p519 + p533 + p537 + p544 + p548 + p552 + p556 + p560 + p564 + p579 + 2'p582 + p587 + p591 + p595 + p599 + p603 + p607 + p608 + p613 + p617 + p622 + p628 + p629 + 2'p635 + p637 = 1
invariant :p157 + p560 = 1
invariant :p90 + p91 = 1
invariant :p316 + p317 = 1
invariant :p128 + -1'p131 + -1'p605 + p608 = 0
invariant :p381 + p382 = 1
invariant :-1'p180 + p183 + p192 + -1'p195 + p201 + -1'p204 + p207 + -1'p208 + -1'p210 + -1'p213 + p214 + p216 + -1'p458 + -1'p464 + -1'p465 + -1'p476 + -1'p485 + -1'p491 + -1'p500 + -1'p506 + -1'p513 + -1'p519 + -1'p533 + -1'p537 + -1'p544 + -1'p548 + -1'p552 + -1'p556 + -1'p560 + -1'p564 + -2'p579 + -1'p582 + -1'p587 + -1'p591 + -1'p595 + -1'p599 + -1'p603 + -1'p607 + -1'p608 + -1'p613 + p616 + -1'p617 + -1'p619 + -1'p622 + -1'p623 + -1'p628 + p634 + -2'p635 + -2'p637 = -1
invariant :p163 + p564 = 1
invariant :p169 + p180 + p186 + p195 + p204 + p208 + p210 + p213 + p579 + -1'p616 + p617 + p619 + p623 + -1'p634 + p635 + p637 = 1
invariant :p96 + p106 + p109 = 1
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
reachable,18244,0.489514,17716,2,3503,5,47963,6,0,790,34747,0
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
dead,1215,1.23666,32348,2,1513,7,104451,9,1,3971,34747,2
System contains 1215 deadlocks (shown below if less than --print-limit option) !
FORMULA BusinessProcesses-PT-16-ReachabilityDeadlock-0 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
[ 1215 states ] showing 10 first states
[ p426=1 p421=1 p169=1 p432=1 p417=1 p452=1 p235=1 p447=1 p123=1 p111=1 p411=1 p229=1 p407=1 p139=1 p151=1 p402=1 p357=1 p145=1 p442=1 p217=1 p62=1 p76=1 p133=1 p367=1 p352=1 p117=1 p317=1 p223=1 p312=1 p69=1 p337=1 p297=1 p157=1 p437=1 p362=1 p347=1 p163=1 p392=1 p332=1 p397=1 p382=1 p327=1 p377=1 p53=1 p28=1 p46=1 p342=1 p302=1 p307=1 p37=1 p322=1 p292=1 p87=1 p90=1 p372=1 p387=1 p96=1 p465=1 ]
[ p426=1 p421=1 p169=1 p432=1 p417=1 p452=1 p235=1 p447=1 p123=1 p111=1 p411=1 p229=1 p407=1 p139=1 p151=1 p402=1 p357=1 p145=1 p442=1 p217=1 p62=1 p76=1 p133=1 p367=1 p352=1 p117=1 p317=1 p223=1 p312=1 p69=1 p337=1 p297=1 p157=1 p437=1 p362=1 p347=1 p163=1 p392=1 p332=1 p397=1 p382=1 p327=1 p377=1 p53=1 p28=1 p46=1 p342=1 p302=1 p307=1 p37=1 p322=1 p292=1 p87=1 p90=1 p372=1 p106=1 p387=1 p464=1 ]
[ p426=1 p421=1 p169=1 p432=1 p417=1 p452=1 p235=1 p447=1 p123=1 p111=1 p411=1 p229=1 p407=1 p139=1 p151=1 p402=1 p357=1 p145=1 p442=1 p217=1 p62=1 p76=1 p133=1 p367=1 p352=1 p117=1 p317=1 p223=1 p312=1 p69=1 p337=1 p297=1 p157=1 p437=1 p362=1 p347=1 p163=1 p392=1 p332=1 p397=1 p382=1 p327=1 p377=1 p53=1 p28=1 p46=1 p342=1 p302=1 p307=1 p37=1 p322=1 p292=1 p87=1 p90=1 p371=1 p387=1 p96=1 p464=1 ]
[ p426=1 p421=1 p169=1 p432=1 p417=1 p452=1 p235=1 p447=1 p123=1 p111=1 p411=1 p229=1 p407=1 p139=1 p151=1 p402=1 p357=1 p145=1 p442=1 p217=1 p62=1 p76=1 p133=1 p367=1 p352=1 p117=1 p317=1 p223=1 p312=1 p69=1 p337=1 p297=1 p157=1 p437=1 p362=1 p347=1 p163=1 p392=1 p332=1 p397=1 p382=1 p327=1 p377=1 p53=1 p28=1 p46=1 p342=1 p302=1 p307=1 p37=1 p322=1 p292=1 p87=1 p90=1 p371=1 p387=1 p96=1 p465=1 ]
[ p426=1 p421=1 p169=1 p432=1 p417=1 p452=1 p235=1 p447=1 p123=1 p111=1 p411=1 p229=1 p407=1 p139=1 p151=1 p402=1 p357=1 p145=1 p442=1 p217=1 p62=1 p76=1 p133=1 p367=1 p352=1 p117=1 p317=1 p223=1 p312=1 p69=1 p337=1 p297=1 p157=1 p437=1 p362=1 p347=1 p163=1 p392=1 p332=1 p397=1 p382=1 p327=1 p377=1 p53=1 p28=1 p46=1 p342=1 p302=1 p307=1 p37=1 p322=1 p292=1 p87=1 p90=1 p371=1 p106=1 p387=1 p464=1 ]
[ p426=1 p421=1 p169=1 p432=1 p417=1 p452=1 p235=1 p447=1 p123=1 p111=1 p411=1 p229=1 p407=1 p139=1 p151=1 p402=1 p357=1 p145=1 p442=1 p217=1 p62=1 p76=1 p133=1 p367=1 p352=1 p117=1 p317=1 p223=1 p312=1 p69=1 p337=1 p297=1 p157=1 p437=1 p362=1 p347=1 p163=1 p392=1 p332=1 p397=1 p382=1 p327=1 p377=1 p53=1 p28=1 p46=1 p342=1 p302=1 p458=1 p307=1 p37=1 p322=1 p292=1 p87=1 p90=1 p372=1 p387=1 p96=1 ]
[ p426=1 p421=1 p169=1 p432=1 p417=1 p452=1 p235=1 p447=1 p123=1 p111=1 p411=1 p229=1 p407=1 p139=1 p151=1 p402=1 p357=1 p145=1 p442=1 p217=1 p62=1 p76=1 p133=1 p367=1 p352=1 p117=1 p317=1 p223=1 p312=1 p69=1 p337=1 p297=1 p157=1 p437=1 p362=1 p347=1 p163=1 p392=1 p332=1 p397=1 p382=1 p327=1 p377=1 p53=1 p28=1 p46=1 p342=1 p302=1 p458=1 p307=1 p37=1 p322=1 p292=1 p87=1 p90=1 p372=1 p106=1 p387=1 ]
[ p426=1 p421=1 p169=1 p432=1 p417=1 p452=1 p235=1 p447=1 p123=1 p111=1 p411=1 p229=1 p407=1 p139=1 p151=1 p402=1 p357=1 p145=1 p442=1 p217=1 p62=1 p76=1 p133=1 p367=1 p352=1 p117=1 p317=1 p223=1 p312=1 p69=1 p337=1 p297=1 p157=1 p437=1 p362=1 p347=1 p163=1 p392=1 p332=1 p397=1 p382=1 p327=1 p377=1 p53=1 p28=1 p46=1 p342=1 p302=1 p458=1 p307=1 p37=1 p322=1 p292=1 p87=1 p90=1 p371=1 p387=1 p96=1 ]
[ p426=1 p421=1 p169=1 p432=1 p417=1 p452=1 p235=1 p447=1 p123=1 p111=1 p411=1 p229=1 p407=1 p139=1 p151=1 p402=1 p357=1 p145=1 p442=1 p217=1 p62=1 p76=1 p133=1 p367=1 p352=1 p117=1 p317=1 p223=1 p312=1 p69=1 p337=1 p297=1 p157=1 p437=1 p362=1 p347=1 p163=1 p392=1 p332=1 p397=1 p382=1 p327=1 p377=1 p53=1 p28=1 p46=1 p342=1 p302=1 p458=1 p307=1 p37=1 p322=1 p292=1 p87=1 p90=1 p371=1 p106=1 p387=1 ]
[ p426=1 p421=1 p169=1 p432=1 p417=1 p452=1 p235=1 p447=1 p123=1 p111=1 p412=1 p229=1 p406=1 p139=1 p151=1 p402=1 p357=1 p145=1 p442=1 p217=1 p62=1 p76=1 p133=1 p367=1 p352=1 p117=1 p317=1 p223=1 p312=1 p69=1 p337=1 p297=1 p157=1 p437=1 p362=1 p347=1 p163=1 p392=1 p332=1 p396=1 p382=1 p327=1 p377=1 p53=1 p28=1 p46=1 p342=1 p302=1 p307=1 p37=1 p322=1 p292=1 p87=1 p90=1 p372=1 p387=1 p96=1 p465=1 ]
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O3, model.c], workingDir=/home/mcc/execution]
WARNING : LTS min runner thread was asked to interrupt. Dying gracefully.
BK_STOP 1527924340731
--------------------
content from stderr:
+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution ReachabilityDeadlock -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -consoleLog -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination ReachabilityDeadlock -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
Jun 02, 2018 7:25:36 AM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, ReachabilityDeadlock, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -smt]
Jun 02, 2018 7:25:36 AM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
Jun 02, 2018 7:25:36 AM fr.lip6.move.gal.nupn.PTNetReader loadFromXML
INFO: Load time of PNML (sax parser for PT used): 139 ms
Jun 02, 2018 7:25:36 AM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 638 places.
Jun 02, 2018 7:25:37 AM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 578 transitions.
Jun 02, 2018 7:25:37 AM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Found NUPN structural information;
Jun 02, 2018 7:25:37 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.img.gal : 51 ms
Jun 02, 2018 7:25:37 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 285 ms
Jun 02, 2018 7:25:37 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.simple.gal : 8 ms
Jun 02, 2018 7:25:37 AM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 578 transitions.
Jun 02, 2018 7:25:38 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/ReachabilityDeadlock.pnml.gal : 2 ms
Jun 02, 2018 7:25:38 AM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 135 transitions.
Jun 02, 2018 7:25:38 AM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 72 place invariants in 47 ms
Jun 02, 2018 7:25:39 AM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 164 variables to be positive in 668 ms
Jun 02, 2018 7:25:39 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may disable matrix : 135 transitions.
Jun 02, 2018 7:25:39 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of disable matrix completed :0/135 took 1 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Jun 02, 2018 7:25:39 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete disable matrix. took 14 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Jun 02, 2018 7:25:39 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may enable matrix : 135 transitions.
Jun 02, 2018 7:25:39 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete enable matrix. took 14 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Jun 02, 2018 7:25:39 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeCoEnablingMatrix
INFO: Computing symmetric co enabling matrix : 135 transitions.
Skipping mayMatrices nes/nds SMT solver raised an exception on push().
java.lang.RuntimeException: SMT solver raised an exception on push().
at fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver.computeCoEnablingMatrix(NecessaryEnablingsolver.java:464)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.printLabels(Gal2PinsTransformerNext.java:530)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.printDependencyMatrix(Gal2PinsTransformerNext.java:209)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.buildBodyFile(Gal2PinsTransformerNext.java:85)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.transform(Gal2PinsTransformerNext.java:830)
at fr.lip6.move.gal.application.LTSminRunner$1.run(LTSminRunner.java:71)
at java.lang.Thread.run(Thread.java:748)
Jun 02, 2018 7:25:39 AM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 1314ms conformant to PINS in folder :/home/mcc/execution
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="BusinessProcesses-PT-16"
export BK_EXAMINATION="ReachabilityDeadlock"
export BK_TOOL="itstools"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
tar xzf /home/mcc/BenchKit/INPUTS/BusinessProcesses-PT-16.tgz
mv BusinessProcesses-PT-16 execution
cd execution
pwd
ls -lh
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3637"
echo " Executing tool itstools"
echo " Input is BusinessProcesses-PT-16, examination is ReachabilityDeadlock"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r272-smll-152749149100323"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityDeadlock" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityDeadlock" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityDeadlock.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityDeadlock.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityDeadlock.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;