Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Waiting for the VM to be ready (probing ssh)
..................
/home/mcc/execution
total 1.5M
-rw-r--r-- 1 mcc users 3.6K May 29 16:54 CTLCardinality.txt
-rw-r--r-- 1 mcc users 21K May 29 16:54 CTLCardinality.xml
-rw-r--r-- 1 mcc users 2.3K May 28 11:15 CTLFireability.txt
-rw-r--r-- 1 mcc users 15K May 28 11:15 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K May 24 11:17 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 5.6K May 24 11:17 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 2.4K May 28 09:25 LTLCardinality.txt
-rw-r--r-- 1 mcc users 11K May 28 09:25 LTLCardinality.xml
-rw-r--r-- 1 mcc users 1.9K May 28 07:39 LTLFireability.txt
-rw-r--r-- 1 mcc users 9.8K May 28 07:39 LTLFireability.xml
-rw-r--r-- 1 mcc users 1 May 24 11:17 NewModel
-rw-r--r-- 1 mcc users 3.2K May 27 05:08 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 16K May 27 05:08 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 104 May 26 06:29 ReachabilityDeadlock.txt
-rw-r--r-- 1 mcc users 342 May 26 06:29 ReachabilityDeadlock.xml
-rw-r--r-- 1 mcc users 2.4K May 26 06:35 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 13K May 26 06:35 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K May 28 07:31 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.6K May 28 07:31 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 24 11:17 equiv_col
-rw-r--r-- 1 mcc users 4 May 24 11:17 instance
-rw-r--r-- 1 mcc users 6 May 24 11:17 iscolored
-rw-r--r-- 1 mcc users 1.3M May 24 11:17 model.pnml
=====================================================================
Generated by BenchKit 2-3637
Executing tool itstools
Input is ASLink-PT-09b, examination is ReachabilityDeadlock
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r272-smll-152749148800161
=====================================================================

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME ASLink-PT-09b-ReachabilityDeadlock-0

=== Now, execution of the tool begins

BK_START 1527861357581

Flatten gal took : 959 ms
Constant places removed 1 places and 1 transitions.
Performed 1888 Post agglomeration using F-continuation condition.
Iterating post reduction 0 with 1889 rules applied. Total rules applied 1889 place count 4013 transition count 3043
Constant places removed 2011 places and 2 transitions.
Reduce isomorphic transitions removed 31 transitions.
Implicit places reduction removed 18 places :[p3743, p3615, p3220, p3194, p2825, p2799, p2430, p2404, p2035, p2009, p1640, p1614, p1245, p1219, p850, p824, p455, p429]
Performed 121 Post agglomeration using F-continuation condition.
Iterating post reduction 1 with 2181 rules applied. Total rules applied 4070 place count 1984 transition count 2889
Constant places removed 139 places and 0 transitions.
Performed 45 Post agglomeration using F-continuation condition.
Iterating post reduction 2 with 184 rules applied. Total rules applied 4254 place count 1845 transition count 2844
Constant places removed 45 places and 0 transitions.
Implicit places reduction removed 17 places :[p3584, p3570, p3189, p3175, p2794, p2780, p2399, p2385, p2004, p1990, p1609, p1595, p1214, p1200, p819, p805, p410]
Performed 17 Post agglomeration using F-continuation condition.
Iterating post reduction 3 with 79 rules applied. Total rules applied 4333 place count 1783 transition count 2827
Constant places removed 17 places and 0 transitions.
Iterating post reduction 4 with 17 rules applied. Total rules applied 4350 place count 1766 transition count 2827
Performed 269 Pre agglomeration using Quasi-Persistent + HF-interchangeable + Divergent Free condition.
Pre-agglomeration after 5 with 269 Pre rules applied. Total rules applied 4350 place count 1766 transition count 2558
Constant places removed 270 places and 0 transitions.
Implicit places reduction removed 1 places :[p424]
Performed 1 Post agglomeration using F-continuation condition.
Iterating post reduction 5 with 272 rules applied. Total rules applied 4622 place count 1495 transition count 2557
Constant places removed 1 places and 0 transitions.
Iterating post reduction 6 with 1 rules applied. Total rules applied 4623 place count 1494 transition count 2557
Performed 1 Pre agglomeration using Quasi-Persistent + HF-interchangeable + Divergent Free condition.
Pre-agglomeration after 7 with 1 Pre rules applied. Total rules applied 4623 place count 1494 transition count 2556
Constant places removed 1 places and 0 transitions.
Iterating post reduction 7 with 1 rules applied. Total rules applied 4624 place count 1493 transition count 2556
Symmetric choice reduction at 8 with 32 rule applications. Total rules 4656 place count 1493 transition count 2556
Constant places removed 32 places and 32 transitions.
Reduce isomorphic transitions removed 1 transitions.
Implicit places reduction removed 1 places :[p4013]
Performed 12 Post agglomeration using F-continuation condition.
Iterating post reduction 8 with 46 rules applied. Total rules applied 4702 place count 1460 transition count 2511
Constant places removed 13 places and 0 transitions.
Iterating post reduction 9 with 13 rules applied. Total rules applied 4715 place count 1447 transition count 2511
Symmetric choice reduction at 10 with 20 rule applications. Total rules 4735 place count 1447 transition count 2511
Constant places removed 20 places and 73 transitions.
Reduce isomorphic transitions removed 1 transitions.
Implicit places reduction removed 10 places :[p3752, p3556, p3161, p2766, p2371, p1976, p1581, p1186, p791, p396]
Performed 21 Post agglomeration using F-continuation condition.
Iterating post reduction 10 with 52 rules applied. Total rules applied 4787 place count 1417 transition count 2416
Constant places removed 21 places and 0 transitions.
Iterating post reduction 11 with 21 rules applied. Total rules applied 4808 place count 1396 transition count 2416
Symmetric choice reduction at 12 with 10 rule applications. Total rules 4818 place count 1396 transition count 2416
Constant places removed 10 places and 17 transitions.
Iterating post reduction 12 with 10 rules applied. Total rules applied 4828 place count 1386 transition count 2399
Symmetric choice reduction at 13 with 1 rule applications. Total rules 4829 place count 1386 transition count 2399
Constant places removed 1 places and 8 transitions.
Iterating post reduction 13 with 1 rules applied. Total rules applied 4830 place count 1385 transition count 2391
Symmetric choice reduction at 14 with 1 rule applications. Total rules 4831 place count 1385 transition count 2391
Constant places removed 1 places and 8 transitions.
Iterating post reduction 14 with 1 rules applied. Total rules applied 4832 place count 1384 transition count 2383
Symmetric choice reduction at 15 with 1 rule applications. Total rules 4833 place count 1384 transition count 2383
Constant places removed 1 places and 8 transitions.
Iterating post reduction 15 with 1 rules applied. Total rules applied 4834 place count 1383 transition count 2375
Symmetric choice reduction at 16 with 1 rule applications. Total rules 4835 place count 1383 transition count 2375
Constant places removed 1 places and 8 transitions.
Iterating post reduction 16 with 1 rules applied. Total rules applied 4836 place count 1382 transition count 2367
Symmetric choice reduction at 17 with 1 rule applications. Total rules 4837 place count 1382 transition count 2367
Constant places removed 1 places and 8 transitions.
Iterating post reduction 17 with 1 rules applied. Total rules applied 4838 place count 1381 transition count 2359
Symmetric choice reduction at 18 with 1 rule applications. Total rules 4839 place count 1381 transition count 2359
Constant places removed 1 places and 8 transitions.
Iterating post reduction 18 with 1 rules applied. Total rules applied 4840 place count 1380 transition count 2351
Symmetric choice reduction at 19 with 1 rule applications. Total rules 4841 place count 1380 transition count 2351
Constant places removed 1 places and 8 transitions.
Iterating post reduction 19 with 1 rules applied. Total rules applied 4842 place count 1379 transition count 2343
Symmetric choice reduction at 20 with 1 rule applications. Total rules 4843 place count 1379 transition count 2343
Constant places removed 1 places and 8 transitions.
Iterating post reduction 20 with 1 rules applied. Total rules applied 4844 place count 1378 transition count 2335
Symmetric choice reduction at 21 with 1 rule applications. Total rules 4845 place count 1378 transition count 2335
Constant places removed 1 places and 8 transitions.
Iterating post reduction 21 with 1 rules applied. Total rules applied 4846 place count 1377 transition count 2327
Symmetric choice reduction at 22 with 1 rule applications. Total rules 4847 place count 1377 transition count 2327
Constant places removed 1 places and 8 transitions.
Iterating post reduction 22 with 1 rules applied. Total rules applied 4848 place count 1376 transition count 2319
Symmetric choice reduction at 23 with 1 rule applications. Total rules 4849 place count 1376 transition count 2319
Constant places removed 1 places and 8 transitions.
Iterating post reduction 23 with 1 rules applied. Total rules applied 4850 place count 1375 transition count 2311
Symmetric choice reduction at 24 with 1 rule applications. Total rules 4851 place count 1375 transition count 2311
Constant places removed 1 places and 8 transitions.
Iterating post reduction 24 with 1 rules applied. Total rules applied 4852 place count 1374 transition count 2303
Symmetric choice reduction at 25 with 1 rule applications. Total rules 4853 place count 1374 transition count 2303
Constant places removed 1 places and 8 transitions.
Iterating post reduction 25 with 1 rules applied. Total rules applied 4854 place count 1373 transition count 2295
Symmetric choice reduction at 26 with 1 rule applications. Total rules 4855 place count 1373 transition count 2295
Constant places removed 1 places and 8 transitions.
Iterating post reduction 26 with 1 rules applied. Total rules applied 4856 place count 1372 transition count 2287
Symmetric choice reduction at 27 with 1 rule applications. Total rules 4857 place count 1372 transition count 2287
Constant places removed 1 places and 8 transitions.
Iterating post reduction 27 with 1 rules applied. Total rules applied 4858 place count 1371 transition count 2279
Performed 99 Post agglomeration using F-continuation condition.
Constant places removed 99 places and 0 transitions.
Iterating post reduction 28 with 99 rules applied. Total rules applied 4957 place count 1272 transition count 2171
Performed 1 Post agglomeration using F-continuation condition.
Constant places removed 1 places and 0 transitions.
Iterating post reduction 29 with 1 rules applied. Total rules applied 4958 place count 1271 transition count 2180
Applied a total of 4958 rules in 4423 ms. Remains 1271 /4014 variables (removed 2743) and now considering 2180/4932 (removed 2752) transitions.
// Phase 1: matrix 2180 rows 1271 cols
Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805151631/bin/its-ctl-linux64, --gc-threshold, 2000000, --quiet, -i, /home/mcc/execution/ReachabilityDeadlock.pnml.gal, -t, CGAL, -ctl, DEADLOCK], workingDir=/home/mcc/execution]

its-ctl command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805151631/bin/its-ctl-linux64 --gc-threshold 2000000 --quiet -i /home/mcc/execution/ReachabilityDeadlock.pnml.gal -t CGAL -ctl DEADLOCK
No direction supplied, using forward translation only.
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O3, model.c], workingDir=/home/mcc/execution]
Compilation finished in 31554 ms.
Running link step : CommandLine [args=[gcc, -shared, -o, gal.so, model.o], workingDir=/home/mcc/execution]
Link finished in 66 ms.
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, -d], workingDir=/home/mcc/execution]
sparsehash FATAL ERROR: failed to allocate 45 groups

BK_TIME_CONFINEMENT_REACHED

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution ReachabilityDeadlock -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -consoleLog -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination ReachabilityDeadlock -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
Jun 01, 2018 1:55:59 PM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, ReachabilityDeadlock, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -smt]
Jun 01, 2018 1:55:59 PM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
Jun 01, 2018 1:56:00 PM fr.lip6.move.gal.nupn.PTNetReader loadFromXML
INFO: Load time of PNML (sax parser for PT used): 332 ms
Jun 01, 2018 1:56:00 PM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 4014 places.
Jun 01, 2018 1:56:00 PM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 4932 transitions.
Jun 01, 2018 1:56:00 PM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Found NUPN structural information;
Jun 01, 2018 1:56:01 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 951 ms
Jun 01, 2018 1:56:01 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.simple.gal : 72 ms
Jun 01, 2018 1:56:02 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 4932 transitions.
Jun 01, 2018 1:56:08 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/ReachabilityDeadlock.pnml.gal : 15 ms
Jun 01, 2018 1:56:08 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 2180 transitions.
Jun 01, 2018 1:56:08 PM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Too many transitions (2180) to apply POR reductions. Disabling POR matrices.
Jun 01, 2018 1:56:09 PM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 385ms conformant to PINS in folder :/home/mcc/execution
ITS-tools command line returned an error code 1

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="ASLink-PT-09b"
export BK_EXAMINATION="ReachabilityDeadlock"
export BK_TOOL="itstools"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

tar xzf /home/mcc/BenchKit/INPUTS/ASLink-PT-09b.tgz
mv ASLink-PT-09b execution
cd execution
pwd
ls -lh

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3637"
echo " Executing tool itstools"
echo " Input is ASLink-PT-09b, examination is ReachabilityDeadlock"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r272-smll-152749148800161"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityDeadlock" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityDeadlock" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityDeadlock.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityDeadlock.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityDeadlock.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' ReachabilityDeadlock.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;