About the Execution of M4M.full for PermAdmissibility-PT-50
Execution Summary | |||||
Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
15919.160 | 434814.00 | 419486.00 | 2062.70 | ???????????????? | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Waiting for the VM to be ready (probing ssh)
...................
/home/mcc/execution
total 848K
-rw-r--r-- 1 mcc users 5.0K May 15 18:54 CTLCardinality.txt
-rw-r--r-- 1 mcc users 25K May 15 18:54 CTLCardinality.xml
-rw-r--r-- 1 mcc users 19K May 15 18:54 CTLFireability.txt
-rw-r--r-- 1 mcc users 71K May 15 18:54 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K May 15 18:50 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.0K May 15 18:50 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.0K May 26 09:26 LTLCardinality.txt
-rw-r--r-- 1 mcc users 12K May 26 09:26 LTLCardinality.xml
-rw-r--r-- 1 mcc users 9.5K May 26 09:26 LTLFireability.txt
-rw-r--r-- 1 mcc users 34K May 26 09:26 LTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K May 15 18:54 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 18K May 15 18:54 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 114 May 15 18:54 ReachabilityDeadlock.txt
-rw-r--r-- 1 mcc users 352 May 15 18:54 ReachabilityDeadlock.xml
-rw-r--r-- 1 mcc users 21K May 15 18:54 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 78K May 15 18:54 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 2.1K May 15 18:54 UpperBounds.txt
-rw-r--r-- 1 mcc users 4.9K May 15 18:54 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 May 15 18:50 equiv_col
-rw-r--r-- 1 mcc users 3 May 15 18:50 instance
-rw-r--r-- 1 mcc users 6 May 15 18:50 iscolored
-rw-r--r-- 1 mcc users 484K May 15 18:50 model.pnml
=====================================================================
Generated by BenchKit 2-3637
Executing tool mcc4mcc-full
Input is PermAdmissibility-PT-50, examination is LTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r262-csrt-152732586900146
=====================================================================
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME PermAdmissibility-PT-50-LTLFireability-00
FORMULA_NAME PermAdmissibility-PT-50-LTLFireability-01
FORMULA_NAME PermAdmissibility-PT-50-LTLFireability-02
FORMULA_NAME PermAdmissibility-PT-50-LTLFireability-03
FORMULA_NAME PermAdmissibility-PT-50-LTLFireability-04
FORMULA_NAME PermAdmissibility-PT-50-LTLFireability-05
FORMULA_NAME PermAdmissibility-PT-50-LTLFireability-06
FORMULA_NAME PermAdmissibility-PT-50-LTLFireability-07
FORMULA_NAME PermAdmissibility-PT-50-LTLFireability-08
FORMULA_NAME PermAdmissibility-PT-50-LTLFireability-09
FORMULA_NAME PermAdmissibility-PT-50-LTLFireability-10
FORMULA_NAME PermAdmissibility-PT-50-LTLFireability-11
FORMULA_NAME PermAdmissibility-PT-50-LTLFireability-12
FORMULA_NAME PermAdmissibility-PT-50-LTLFireability-13
FORMULA_NAME PermAdmissibility-PT-50-LTLFireability-14
FORMULA_NAME PermAdmissibility-PT-50-LTLFireability-15
=== Now, execution of the tool begins
BK_START 1527526187806
BK_STOP 1527526622620
--------------------
content from stderr:
Prefix is 65b80f64.
Reading known information in /usr/share/mcc4mcc/65b80f64-known.json.
Reading learned information in /usr/share/mcc4mcc/65b80f64-learned.json.
Reading value translations in /usr/share/mcc4mcc/65b80f64-values.json.
Using directory /home/mcc/execution for input, as it contains a model.pnml file.
Using PermAdmissibility-PT-50 as instance name.
Using PermAdmissibility as model name.
Using algorithm or tool bmdt.
Model characteristics are: {'Examination': 'LTLFireability', 'Place/Transition': True, 'Colored': True, 'Relative-Time': 1, 'Relative-Memory': 1, 'Ordinary': False, 'Simple Free Choice': False, 'Extended Free Choice': False, 'State Machine': False, 'Marked Graph': False, 'Connected': True, 'Strongly Connected': False, 'Source Place': True, 'Sink Place': True, 'Source Transition': False, 'Sink Transition': False, 'Loop Free': True, 'Conservative': False, 'Sub-Conservative': False, 'Nested Units': False, 'Safe': False, 'Deadlock': True, 'Reversible': False, 'Quasi Live': None, 'Live': None}.
Known tools are: [{'Time': 939145, 'Memory': 15947.4, 'Tool': 'lola'}, {'Time': 965555, 'Memory': 15951.26, 'Tool': 'lola'}].
Learned tools are: [{'Tool': 'lola'}].
Learned tool lola is 1.0x far from the best tool lola.
LTLFireability lola PermAdmissibility-PT-50...
Time: 3600 - MCC
----- Start make prepare stdout -----
----- Start make prepare stderr -----
===========================================================================================
PermAdmissibility-PT-50: translating PT Petri net model.pnml into LoLA format
===========================================================================================
translating PT Petri net complete
checking for too many tokens
===========================================================================================
PermAdmissibility-PT-50: translating PT formula LTLFireability into LoLA format
===========================================================================================
translating formula complete
touch formulae;
----- Start make result stdout -----
----- Start make result stderr -----
LTLFireability @ PermAdmissibility-PT-50 @ 3540 seconds
Makefile:222: recipe for target 'verify' failed
----- Start make result stdout -----
lola: LoLA will run for 3540 seconds at most (--timelimit)
lola: NET
lola: reading net from model.pnml.lola
lola: finished parsing
lola: closed net file model.pnml.lola
lola: 760/65536 symbol table entries, 0 collisions
lola: preprocessing...
lola: finding significant places
lola: 168 places, 592 transitions, 136 significant places
lola: computing forward-conflicting sets
lola: computing back-conflicting sets
lola: 820 transition conflict sets
make: [verify] Error 134 (ignored)
lola: TASK
lola: reading formula from PermAdmissibility-PT-50-LTLFireability.task
lola: A (F (X (X (G ((FIREABLE(display4_0_0) OR FIREABLE(display4_4_0) OR FIREABLE(display4_3_0) OR FIREABLE(display4_2_0) OR FIREABLE(display4_1_0) OR FIREABLE(display4_7_1) OR FIREABLE(display4_0_2) OR FIREABLE(display4_5_1) OR FIREABLE(display4_6_1) OR FIREABLE(display4_3_2) OR FIREABLE(display4_4_2) OR FIREABLE(display4_1_2) OR FIREABLE(display4_2_2) OR FIREABLE(display4_7_0) OR FIREABLE(display4_0_1) OR FIREABLE(display4_5_0) OR FIREABLE(display4_6_0) OR FIREABLE(display4_3_1) OR FIREABLE(display4_4_1) OR FIREABLE(display4_1_1) OR FIREABLE(display4_2_1) OR FIREABLE(display4_2_4) OR FIREABLE(display4_1_4) OR FIREABLE(display4_4_4) OR FIREABLE(display4_3_4) OR FIREABLE(display4_6_3) OR FIREABLE(display4_5_3) OR FIREABLE(display4_0_4) OR FIREABLE(display4_7_3) OR FIREABLE(display4_2_3) OR FIREABLE(display4_1_3) OR FIREABLE(display4_4_3) OR FIREABLE(display4_3_3) OR FIREABLE(display4_6_2) OR FIREABLE(display4_5_2) OR FIREABLE(display4_0_3) OR FIREABLE(display4_7_2) OR FIREABLE(display4_1_6) OR FIREABLE(display4_2_6) OR FIREABLE(display4_3_6) OR FIREABLE(display4_4_6) OR FIREABLE(display4_5_5) OR FIREABLE(display4_6_5) OR FIREABLE(display4_7_5) OR FIREABLE(display4_0_6) OR FIREABLE(display4_1_5) OR FIREABLE(display4_2_5) OR FIREABLE(display4_3_5) OR FIREABLE(display4_4_5) OR FIREABLE(display4_5_4) OR FIREABLE(display4_6_4) OR FIREABLE(display4_7_4) OR FIREABLE(display4_0_5) OR FIREABLE(display4_7_7) OR FIREABLE(display4_6_7) OR FIREABLE(display4_5_7) OR FIREABLE(display4_4_7) OR FIREABLE(display4_3_7) OR FIREABLE(display4_2_7) OR FIREABLE(display4_1_7) OR FIREABLE(display4_0_7) OR FIREABLE(display4_7_6) OR FIREABLE(display4_6_6) OR FIREABLE(display4_5_6))))))) : A ((FIREABLE(switch7_0_2) OR FIREABLE(switch7_1_2) OR FIREABLE(switch7_4_2) OR FIREABLE(switch7_5_2) OR FIREABLE(switch7_0_3) OR FIREABLE(switch7_5_7) OR FIREABLE(switch7_4_7) OR FIREABLE(switch7_1_7) OR FIREABLE(switch7_0_7) OR FIREABLE(switch7_5_6) OR FIREABLE(switch7_4_6) OR FIREABLE(switch7_1_6) OR FIREABLE(switch7_0_6) OR FIREABLE(switch7_5_3) OR FIREABLE(switch7_4_3) OR FIREABLE(switch7_1_3))) : A ((FIREABLE(display1_2_1) OR FIREABLE(display1_1_1) OR FIREABLE(display1_4_1) OR FIREABLE(display1_3_1) OR FIREABLE(display1_6_0) OR FIREABLE(display1_5_0) OR FIREABLE(display1_0_1) OR FIREABLE(display1_7_0) OR FIREABLE(display1_2_2) OR FIREABLE(display1_1_2) OR FIREABLE(display1_4_2) OR FIREABLE(display1_3_2) OR FIREABLE(display1_6_1) OR FIREABLE(display1_5_1) OR FIREABLE(display1_0_2) OR FIREABLE(display1_7_1) OR FIREABLE(display1_1_0) OR FIREABLE(display1_2_0) OR FIREABLE(display1_3_0) OR FIREABLE(display1_4_0) OR FIREABLE(display1_0_0) OR FIREABLE(display1_7_5) OR FIREABLE(display1_0_6) OR FIREABLE(display1_5_5) OR FIREABLE(display1_6_5) OR FIREABLE(display1_3_6) OR FIREABLE(display1_4_6) OR FIREABLE(display1_1_6) OR FIREABLE(display1_2_6) OR FIREABLE(display1_7_4) OR FIREABLE(display1_0_5) OR FIREABLE(display1_5_4) OR FIREABLE(display1_6_4) OR FIREABLE(display1_3_5) OR FIREABLE(display1_4_5) OR FIREABLE(display1_1_5) OR FIREABLE(display1_2_5) OR FIREABLE(display1_0_4) OR FIREABLE(display1_7_3) OR FIREABLE(display1_6_3) OR FIREABLE(display1_5_3) OR FIREABLE(display1_4_4) OR FIREABLE(display1_3_4) OR FIREABLE(display1_2_4) OR FIREABLE(display1_1_4) OR FIREABLE(display1_0_3) OR FIREABLE(display1_7_2) OR FIREABLE(display1_6_2) OR FIREABLE(display1_5_2) OR FIREABLE(display1_4_3) OR FIREABLE(display1_3_3) OR FIREABLE(display1_2_3) OR FIREABLE(display1_1_3) OR FIREABLE(display1_6_7) OR FIREABLE(display1_5_7) OR FIREABLE(display1_7_7) OR FIREABLE(display1_6_6) OR FIREABLE(display1_5_6) OR FIREABLE(display1_0_7) OR FIREABLE(display1_7_6) OR FIREABLE(display1_2_7) OR FIREABLE(display1_1_7) OR FIREABLE(display1_4_7) OR FIREABLE(display1_3_7))) : A (X (G (X ((FIREABLE(switch6_5_7) OR FIREABLE(switch6_1_7) OR FIREABLE(switch6_4_7) OR FIREABLE(switch6_5_6) OR FIREABLE(switch6_0_7) OR FIREABLE(switch6_1_6) OR FIREABLE(switch6_4_6) OR FIREABLE(switch6_5_3) OR FIREABLE(switch6_0_6) OR FIREABLE(switch6_1_3) OR FIREABLE(switch6_4_3) OR FIREABLE(switch6_0_3) OR FIREABLE(switch6_5_2) OR FIREABLE(switch6_4_2) OR FIREABLE(switch6_1_2) OR FIREABLE(switch6_0_2)))))) : A (G ((F (X ((FIREABLE(switch11_0_0) OR FIREABLE(switch11_4_0) OR FIREABLE(switch11_3_0) OR FIREABLE(switch11_2_0) OR FIREABLE(switch11_1_0) OR FIREABLE(switch11_4_6) OR FIREABLE(switch11_3_6) OR FIREABLE(switch11_2_6) OR FIREABLE(switch11_1_6) OR FIREABLE(switch11_0_6) OR FIREABLE(switch11_7_5) OR FIREABLE(switch11_6_5) OR FIREABLE(switch11_5_5) OR FIREABLE(switch11_4_5) OR FIREABLE(switch11_3_5) OR FIREABLE(switch11_2_5) OR FIREABLE(switch11_1_5) OR FIREABLE(switch11_0_5) OR FIREABLE(switch11_7_4) OR FIREABLE(switch11_6_4) OR FIREABLE(switch11_5_4) OR FIREABLE(switch11_7_7) OR FIREABLE(switch11_5_7) OR FIREABLE(switch11_6_7) OR FIREABLE(switch11_3_7) OR FIREABLE(switch11_4_7) OR FIREABLE(switch11_1_7) OR FIREABLE(switch11_2_7) OR FIREABLE(switch11_7_6) OR FIREABLE(switch11_0_7) OR FIREABLE(switch11_5_6) OR FIREABLE(switch11_6_6) OR FIREABLE(switch11_2_2) OR FIREABLE(switch11_1_2) OR FIREABLE(switch11_4_2) OR FIREABLE(switch11_3_2) OR FIREABLE(switch11_6_1) OR FIREABLE(switch11_5_1) OR FIREABLE(switch11_0_2) OR FIREABLE(switch11_7_1) OR FIREABLE(switch11_2_1) OR FIREABLE(switch11_1_1) OR FIREABLE(switch11_4_1) OR FIREABLE(switch11_3_1) OR FIREABLE(switch11_6_0) OR FIREABLE(switch11_5_0) OR FIREABLE(switch11_0_1) OR FIREABLE(switch11_7_0) OR FIREABLE(switch11_1_4) OR FIREABLE(switch11_2_4) OR FIREABLE(switch11_3_4) OR FIREABLE(switch11_4_4) OR FIREABLE(switch11_5_3) OR FIREABLE(switch11_6_3) OR FIREABLE(switch11_7_3) OR FIREABLE(switch11_0_4) OR FIREABLE(switch11_1_3) OR FIREABLE(switch11_2_3) OR FIREABLE(switch11_3_3) OR FIREABLE(switch11_4_3) OR FIREABLE(switch11_5_2) OR FIREABLE(switch11_6_2) OR FIREABLE(switch11_7_2) OR FIREABLE(switch11_0_3)))) U G ((FIREABLE(display3_4_0) OR FIREABLE(display3_3_0) OR FIREABLE(display3_2_0) OR FIREABLE(display3_1_0) OR FIREABLE(display3_0_0) OR FIREABLE(display3_3_2) OR FIREABLE(display3_4_2) OR FIREABLE(display3_1_2) OR FIREABLE(display3_2_2) OR FIREABLE(display3_7_1) OR FIREABLE(display3_0_2) OR FIREABLE(display3_5_1) OR FIREABLE(display3_6_1) OR FIREABLE(display3_3_1) OR FIREABLE(display3_4_1) OR FIREABLE(display3_1_1) OR FIREABLE(display3_2_1) OR FIREABLE(display3_7_0) OR FIREABLE(display3_0_1) OR FIREABLE(display3_5_0) OR FIREABLE(display3_6_0) OR FIREABLE(display3_0_5) OR FIREABLE(display3_7_4) OR FIREABLE(display3_6_4) OR FIREABLE(display3_5_4) OR FIREABLE(display3_4_5) OR FIREABLE(display3_3_5) OR FIREABLE(display3_2_5) OR FIREABLE(display3_1_5) OR FIREABLE(display3_0_6) OR FIREABLE(display3_7_5) OR FIREABLE(display3_6_5) OR FIREABLE(display3_5_5) OR FIREABLE(display3_4_6) OR FIREABLE(display3_3_6) OR FIREABLE(display3_2_6) OR FIREABLE(display3_1_6) OR FIREABLE(display3_7_2) OR FIREABLE(display3_0_3) OR FIREABLE(display3_5_2) OR FIREABLE(display3_6_2) OR FIREABLE(display3_3_3) OR FIREABLE(display3_4_3) OR FIREABLE(display3_1_3) OR FIREABLE(display3_2_3) OR FIREABLE(display3_7_3) OR FIREABLE(display3_0_4) OR FIREABLE(display3_5_3) OR FIREABLE(display3_6_3) OR FIREABLE(display3_3_4) OR FIREABLE(display3_4_4) OR FIREABLE(display3_1_4) OR FIREABLE(display3_2_4) OR FIREABLE(display3_5_6) OR FIREABLE(display3_6_6) OR FIREABLE(display3_7_6) OR FIREABLE(display3_0_7) OR FIREABLE(display3_1_7) OR FIREABLE(display3_2_7) OR FIREABLE(display3_3_7) OR FIREABLE(display3_4_7) OR FIREABLE(display3_5_7) OR FIREABLE(display3_6_7) OR FIREABLE(display3_7_7)))))) : A (G ((FIREABLE(switch10_4_0) OR FIREABLE(switch10_3_0) OR FIREABLE(switch10_2_0) OR FIREABLE(switch10_1_0) OR FIREABLE(switch10_0_0) OR FIREABLE(switch10_7_4) OR FIREABLE(switch10_0_5) OR FIREABLE(switch10_5_4) OR FIREABLE(switch10_6_4) OR FIREABLE(switch10_3_5) OR FIREABLE(switch10_4_5) OR FIREABLE(switch10_1_5) OR FIREABLE(switch10_2_5) OR FIREABLE(switch10_7_5) OR FIREABLE(switch10_0_6) OR FIREABLE(switch10_5_5) OR FIREABLE(switch10_6_5) OR FIREABLE(switch10_3_6) OR FIREABLE(switch10_4_6) OR FIREABLE(switch10_1_6) OR FIREABLE(switch10_2_6) OR FIREABLE(switch10_0_7) OR FIREABLE(switch10_7_6) OR FIREABLE(switch10_6_6) OR FIREABLE(switch10_5_6) OR FIREABLE(switch10_4_7) OR FIREABLE(switch10_3_7) OR FIREABLE(switch10_2_7) OR FIREABLE(switch10_1_7) OR FIREABLE(switch10_7_7) OR FIREABLE(switch10_6_7) OR FIREABLE(switch10_5_7) OR FIREABLE(switch10_5_0) OR FIREABLE(switch10_6_0) OR FIREABLE(switch10_7_0) OR FIREABLE(switch10_0_1) OR FIREABLE(switch10_1_1) OR FIREABLE(switch10_2_1) OR FIREABLE(switch10_3_1) OR FIREABLE(switch10_4_1) OR FIREABLE(switch10_5_1) OR FIREABLE(switch10_6_1) OR FIREABLE(switch10_7_1) OR FIREABLE(switch10_0_2) OR FIREABLE(switch10_1_2) OR FIREABLE(switch10_2_2) OR FIREABLE(switch10_3_2) OR FIREABLE(switch10_4_2) OR FIREABLE(switch10_6_2) OR FIREABLE(switch10_5_2) OR FIREABLE(switch10_0_3) OR FIREABLE(switch10_7_2) OR FIREABLE(switch10_2_3) OR FIREABLE(switch10_1_3) OR FIREABLE(switch10_4_3) OR FIREABLE(switch10_3_3) OR FIREABLE(switch10_6_3) OR FIREABLE(switch10_5_3) OR FIREABLE(switch10_0_4) OR FIREABLE(switch10_7_3) OR FIREABLE(switch10_2_4) OR FIREABLE(switch10_1_4) OR FIREABLE(switch10_4_4) OR FIREABLE(switch10_3_4)))) : A (F (F ((X ((FIREABLE(display1_2_1) OR FIREABLE(display1_1_1) OR FIREABLE(display1_4_1) OR FIREABLE(display1_3_1) OR FIREABLE(display1_6_0) OR FIREABLE(display1_5_0) OR FIREABLE(display1_0_1) OR FIREABLE(display1_7_0) OR FIREABLE(display1_2_2) OR FIREABLE(display1_1_2) OR FIREABLE(display1_4_2) OR FIREABLE(display1_3_2) OR FIREABLE(display1_6_1) OR FIREABLE(display1_5_1) OR FIREABLE(display1_0_2) OR FIREABLE(display1_7_1) OR FIREABLE(display1_1_0) OR FIREABLE(display1_2_0) OR FIREABLE(display1_3_0) OR FIREABLE(display1_4_0) OR FIREABLE(display1_0_0) OR FIREABLE(display1_7_5) OR FIREABLE(display1_0_6) OR FIREABLE(display1_5_5) OR FIREABLE(display1_6_5) OR FIREABLE(display1_3_6) OR FIREABLE(display1_4_6) OR FIREABLE(display1_1_6) OR FIREABLE(display1_2_6) OR FIREABLE(display1_7_4) OR FIREABLE(display1_0_5) OR FIREABLE(display1_5_4) OR FIREABLE(display1_6_4) OR FIREABLE(display1_3_5) OR FIREABLE(display1_4_5) OR FIREABLE(display1_1_5) OR FIREABLE(display1_2_5) OR FIREABLE(display1_0_4) OR FIREABLE(display1_7_3) OR FIREABLE(display1_6_3) OR FIREABLE(display1_5_3) OR FIREABLE(display1_4_4) OR FIREABLE(display1_3_4) OR FIREABLE(display1_2_4) OR FIREABLE(display1_1_4) OR FIREABLE(display1_0_3) OR FIREABLE(display1_7_2) OR FIREABLE(display1_6_2) OR FIREABLE(display1_5_2) OR FIREABLE(display1_4_3) OR FIREABLE(display1_3_3) OR FIREABLE(display1_2_3) OR FIREABLE(display1_1_3) OR FIREABLE(display1_6_7) OR FIREABLE(display1_5_7) OR FIREABLE(display1_7_7) OR FIREABLE(display1_6_6) OR FIREABLE(display1_5_6) OR FIREABLE(display1_0_7) OR FIREABLE(display1_7_6) OR FIREABLE(display1_2_7) OR FIREABLE(display1_1_7) OR FIREABLE(display1_4_7) OR FIREABLE(display1_3_7))) U F ((FIREABLE(switch4_2_7) OR FIREABLE(switch4_3_6) OR FIREABLE(switch4_3_7) OR FIREABLE(switch4_2_6))))))) : A ((FIREABLE(switch11_0_0) OR FIREABLE(switch11_4_0) OR FIREABLE(switch11_3_0) OR FIREABLE(switch11_2_0) OR FIREABLE(switch11_1_0) OR FIREABLE(switch11_4_6) OR FIREABLE(switch11_3_6) OR FIREABLE(switch11_2_6) OR FIREABLE(switch11_1_6) OR FIREABLE(switch11_0_6) OR FIREABLE(switch11_7_5) OR FIREABLE(switch11_6_5) OR FIREABLE(switch11_5_5) OR FIREABLE(switch11_4_5) OR FIREABLE(switch11_3_5) OR FIREABLE(switch11_2_5) OR FIREABLE(switch11_1_5) OR FIREABLE(switch11_0_5) OR FIREABLE(switch11_7_4) OR FIREABLE(switch11_6_4) OR FIREABLE(switch11_5_4) OR FIREABLE(switch11_7_7) OR FIREABLE(switch11_5_7) OR FIREABLE(switch11_6_7) OR FIREABLE(switch11_3_7) OR FIREABLE(switch11_4_7) OR FIREABLE(switch11_1_7) OR FIREABLE(switch11_2_7) OR FIREABLE(switch11_7_6) OR FIREABLE(switch11_0_7) OR FIREABLE(switch11_5_6) OR FIREABLE(switch11_6_6) OR FIREABLE(switch11_2_2) OR FIREABLE(switch11_1_2) OR FIREABLE(switch11_4_2) OR FIREABLE(switch11_3_2) OR FIREABLE(switch11_6_1) OR FIREABLE(switch11_5_1) OR FIREABLE(switch11_0_2) OR FIREABLE(switch11_7_1) OR FIREABLE(switch11_2_1) OR FIREABLE(switch11_1_1) OR FIREABLE(switch11_4_1) OR FIREABLE(switch11_3_1) OR FIREABLE(switch11_6_0) OR FIREABLE(switch11_5_0) OR FIREABLE(switch11_0_1) OR FIREABLE(switch11_7_0) OR FIREABLE(switch11_1_4) OR FIREABLE(switch11_2_4) OR FIREABLE(switch11_3_4) OR FIREABLE(switch11_4_4) OR FIREABLE(switch11_5_3) OR FIREABLE(switch11_6_3) OR FIREABLE(switch11_7_3) OR FIREABLE(switch11_0_4) OR FIREABLE(switch11_1_3) OR FIREABLE(switch11_2_3) OR FIREABLE(switch11_3_3) OR FIREABLE(switch11_4_3) OR FIREABLE(switch11_5_2) OR FIREABLE(switch11_6_2) OR FIREABLE(switch11_7_2) OR FIREABLE(switch11_0_3))) : A (G (X (G ((FIREABLE(display3_4_0) U FIREABLE(display1_4_5)))))) : A (((G (FIREABLE(display2_6_2)) U G (FIREABLE(display3_0_3))) U F (X (G (FIREABLE(switch6_4_2)))))) : A (FIREABLE(display3_3_7)) : A (FIREABLE(switch11_5_4)) : A ((G (X (FIREABLE(switch8_4_7))) U F (X (FIREABLE(display4_6_6))))) : A (X (X (G (G (G (FIREABLE(switch12_0_3))))))) : A (G ((X (X (FIREABLE(display3_7_6))) U X (FIREABLE(switch6_4_2))))) : A (X ((X (X (FIREABLE(switch12_6_3))) U G (F (FIREABLE(display1_2_1))))))
lola: computing a collection of formulas
lola: RUNNING
lola: subprocess 0 will run for 221 seconds at most (--localtimelimit=-1)
lola: ========================================
lola: ...considering subproblem: A (F (X (X (G ((FIREABLE(display4_0_0) OR FIREABLE(display4_4_0) OR FIREABLE(display4_3_0) OR FIREABLE(display4_2_0) OR FIREABLE(display4_1_0) OR FIREABLE(display4_7_1) OR FIREABLE(display4_0_2) OR FIREABLE(display4_5_1) OR FIREABLE(display4_6_1) OR FIREABLE(display4_3_2) OR FIREABLE(display4_4_2) OR FIREABLE(display4_1_2) OR FIREABLE(display4_2_2) OR FIREABLE(display4_7_0) OR FIREAB... (shortened)
lola: ========================================
lola: SUBTASK
lola: checking LTL
lola: transforming LTL-Formula into a B\xfcchi-Automaton
lola: processed formula: A (F (X (X (G ((FIREABLE(display4_0_0) OR FIREABLE(display4_4_0) OR FIREABLE(display4_3_0) OR FIREABLE(display4_2_0) OR FIREABLE(display4_1_0) OR FIREABLE(display4_7_1) OR FIREABLE(display4_0_2) OR FIREABLE(display4_5_1) OR FIREABLE(display4_6_1) OR FIREABLE(display4_3_2) OR FIREABLE(display4_4_2) OR FIREABLE(display4_1_2) OR FIREABLE(display4_2_2) OR FIREABLE(display4_7_0) OR FIREABLE(display4_0_1) OR FIREABLE(display4_5_0) OR FIREABLE(display4_6_0) OR FIREABLE(display4_3_1) OR FIREABLE(display4_4_1) OR FIREABLE(display4_1_1) OR FIREABLE(display4_2_1) OR FIREABLE(display4_2_4) OR FIREABLE(display4_1_4) OR FIREABLE(display4_4_4) OR FIREABLE(display4_3_4) OR FIREABLE(display4_6_3) OR FIREABLE(display4_5_3) OR FIREABLE(display4_0_4) OR FIREABLE(display4_7_3) OR FIREABLE(display4_2_3) OR FIREABLE(display4_1_3) OR FIREABLE(display4_4_3) OR FIREABLE(display4_3_3) OR FIREABLE(display4_6_2) OR FIREABLE(display4_5_2) OR FIREABLE(display4_0_3) OR FIREABLE(display4_7_2) OR FIREABLE(display4_1_6) OR FIREABLE(display4_2_6) OR FIREABLE(display4_3_6) OR FIREABLE(display4_4_6) OR FIREABLE(display4_5_5) OR FIREABLE(display4_6_5) OR FIREABLE(display4_7_5) OR FIREABLE(display4_0_6) OR FIREABLE(display4_1_5) OR FIREABLE(display4_2_5) OR FIREABLE(display4_3_5) OR FIREABLE(display4_4_5) OR FIREABLE(display4_5_4) OR FIREABLE(display4_6_4) OR FIREABLE(display4_7_4) OR FIREABLE(display4_0_5) OR FIREABLE(display4_7_7) OR FIREABLE(display4_6_7) OR FIREABLE(display4_5_7) OR FIREABLE(display4_4_7) OR FIREABLE(display4_3_7) OR FIREABLE(display4_2_7) OR FIREABLE(display4_1_7) OR FIREABLE(display4_0_7) OR FIREABLE(display4_7_6) OR FIREABLE(display4_6_6) OR FIREABLE(display4_5_6)))))))
lola: processed formula: A (F (X (X (G ((FIREABLE(display4_0_0) OR FIREABLE(display4_4_0) OR FIREABLE(display4_3_0) OR FIREABLE(display4_2_0) OR FIREABLE(display4_1_0) OR FIREABLE(display4_7_1) OR FIREABLE(display4_0_2) OR FIREABLE(display4_5_1) OR FIREABLE(display4_6_1) OR FIREABLE(display4_3_2) OR FIREABLE(display4_4_2) OR FIREABLE(display4_1_2) OR FIREABLE(display4_2_2) OR FIREABLE(display4_7_0) OR FIREAB... (shortened)
lola: processed formula length: 1745
lola: 0 rewrites
lola: formula mentions 0 of 168 places; total mentions: 0
lola: closed formula file PermAdmissibility-PT-50-LTLFireability.task
lola: the resulting B\xfcchi automaton has 4 states
lola: STORE
lola: using a bit-perfect encoder (--encoder=bit)
lola: using 548 bytes per marking, with 29 unused bits
lola: using a prefix tree store (--store=prefix)
lola: Formula contains X operator; stubborn sets not applicable
lola: SEARCH
lola: RUNNING
lola: SUBRESULT
lola: result: no
lola: produced by: LTL model checker
lola: The net does not satisfy the given formula (language of the product automaton is nonempty).
lola: 802 markings, 802 edges
lola: ========================================
lola: subprocess 1 will run for 236 seconds at most (--localtimelimit=-1)
lola: ========================================
lola: ...considering subproblem: A ((FIREABLE(switch7_0_2) OR FIREABLE(switch7_1_2) OR FIREABLE(switch7_4_2) OR FIREABLE(switch7_5_2) OR FIREABLE(switch7_0_3) OR FIREABLE(switch7_5_7) OR FIREABLE(switch7_4_7) OR FIREABLE(switch7_1_7) OR FIREABLE(switch7_0_7) OR FIREABLE(switch7_5_6) OR FIREABLE(switch7_4_6) OR FIREABLE(switch7_1_6) OR FIREABLE(switch7_0_6) OR FIREABLE(switch7_5_3) OR FIREABLE(switch7_4_3) OR FIREAB... (shortened)
lola: ========================================
lola: SUBTASK
lola: checking initial satisfaction
lola: processed formula: (FIREABLE(switch7_0_2) OR FIREABLE(switch7_1_2) OR FIREABLE(switch7_4_2) OR FIREABLE(switch7_5_2) OR FIREABLE(switch7_0_3) OR FIREABLE(switch7_5_7) OR FIREABLE(switch7_4_7) OR FIREABLE(switch7_1_7) OR FIREABLE(switch7_0_7) OR FIREABLE(switch7_5_6) OR FIREABLE(switch7_4_6) OR FIREABLE(switch7_1_6) OR FIREABLE(switch7_0_6) OR FIREABLE(switch7_5_3) OR FIREABLE(switch7_4_3) OR FIREABLE(... (shortened)
lola: processed formula length: 413
lola: 1 rewrites
lola: formula mentions 0 of 168 places; total mentions: 0
lola: closed formula file PermAdmissibility-PT-50-LTLFireability.task
lola: processed formula with 0 atomic propositions
lola: RUNNING
lola: SUBRESULT
lola: result: no
lola: produced by: preprocessing
lola: The net violates the given property already in its initial state.
lola: 0 markings, 0 edges
lola: ========================================
lola: subprocess 2 will run for 252 seconds at most (--localtimelimit=-1)
lola: ========================================
lola: ...considering subproblem: A ((FIREABLE(display1_2_1) OR FIREABLE(display1_1_1) OR FIREABLE(display1_4_1) OR FIREABLE(display1_3_1) OR FIREABLE(display1_6_0) OR FIREABLE(display1_5_0) OR FIREABLE(display1_0_1) OR FIREABLE(display1_7_0) OR FIREABLE(display1_2_2) OR FIREABLE(display1_1_2) OR FIREABLE(display1_4_2) OR FIREABLE(display1_3_2) OR FIREABLE(display1_6_1) OR FIREABLE(display1_5_1) OR FIREABLE(display1_... (shortened)
----- Start make result stderr -----
lola: ========================================
lola: SUBTASK
lola: checking initial satisfaction
lola: processed formula: (FIREABLE(display1_2_1) OR FIREABLE(display1_1_1) OR FIREABLE(display1_4_1) OR FIREABLE(display1_3_1) OR FIREABLE(display1_6_0) OR FIREABLE(display1_5_0) OR FIREABLE(display1_0_1) OR FIREABLE(display1_7_0) OR FIREABLE(display1_2_2) OR FIREABLE(display1_1_2) OR FIREABLE(display1_4_2) OR FIREABLE(display1_3_2) OR FIREABLE(display1_6_1) OR FIREABLE(display1_5_1) OR FIREABLE(display1_0_2... (shortened)
lola: processed formula length: 1725
lola: 1 rewrites
lola: formula mentions 0 of 168 places; total mentions: 0
lola: closed formula file PermAdmissibility-PT-50-LTLFireability.task
lola: processed formula with 0 atomic propositions
lola: RUNNING
lola: SUBRESULT
lola: result: no
lola: produced by: preprocessing
lola: The net violates the given property already in its initial state.
lola: 0 markings, 0 edges
lola: ========================================
lola: subprocess 3 will run for 272 seconds at most (--localtimelimit=-1)
lola: ========================================
lola: ...considering subproblem: A (X (G (X ((FIREABLE(switch6_5_7) OR FIREABLE(switch6_1_7) OR FIREABLE(switch6_4_7) OR FIREABLE(switch6_5_6) OR FIREABLE(switch6_0_7) OR FIREABLE(switch6_1_6) OR FIREABLE(switch6_4_6) OR FIREABLE(switch6_5_3) OR FIREABLE(switch6_0_6) OR FIREABLE(switch6_1_3) OR FIREABLE(switch6_4_3) OR FIREABLE(switch6_0_3) OR FIREABLE(switch6_5_2) OR FIREABLE(switch6_4_2) OR FIREABLE(switch6_1_2) O... (shortened)
lola: ========================================
lola: SUBTASK
lola: checking LTL
lola: transforming LTL-Formula into a B\xfcchi-Automaton
lola: processed formula: A (X (G (X ((FIREABLE(switch6_5_7) OR FIREABLE(switch6_1_7) OR FIREABLE(switch6_4_7) OR FIREABLE(switch6_5_6) OR FIREABLE(switch6_0_7) OR FIREABLE(switch6_1_6) OR FIREABLE(switch6_4_6) OR FIREABLE(switch6_5_3) OR FIREABLE(switch6_0_6) OR FIREABLE(switch6_1_3) OR FIREABLE(switch6_4_3) OR FIREABLE(switch6_0_3) OR FIREABLE(switch6_5_2) OR FIREABLE(switch6_4_2) OR FIREABLE(switch6_1_2) OR FIREABLE(switch6_0_2))))))
lola: processed formula: A (X (G (X ((FIREABLE(switch6_5_7) OR FIREABLE(switch6_1_7) OR FIREABLE(switch6_4_7) OR FIREABLE(switch6_5_6) OR FIREABLE(switch6_0_7) OR FIREABLE(switch6_1_6) OR FIREABLE(switch6_4_6) OR FIREABLE(switch6_5_3) OR FIREABLE(switch6_0_6) OR FIREABLE(switch6_1_3) OR FIREABLE(switch6_4_3) OR FIREABLE(switch6_0_3) OR FIREABLE(switch6_5_2) OR FIREABLE(switch6_4_2) OR FIREABLE(switch6_1_2) O... (shortened)
lola: processed formula length: 429
lola: 0 rewrites
lola: formula mentions 0 of 168 places; total mentions: 0
lola: closed formula file PermAdmissibility-PT-50-LTLFireability.task
lola: the resulting B\xfcchi automaton has 4 states
lola: STORE
lola: using a bit-perfect encoder (--encoder=bit)
lola: using 548 bytes per marking, with 29 unused bits
lola: using a prefix tree store (--store=prefix)
lola: Formula contains X operator; stubborn sets not applicable
lola: SEARCH
lola: RUNNING
lola: SUBRESULT
lola: result: no
lola: produced by: LTL model checker
lola: The net does not satisfy the given formula (language of the product automaton is nonempty).
lola: 801 markings, 801 edges
lola: ========================================
----- Kill lola and sara stderr -----
lola: subprocess 4 will run for 295 seconds at most (--localtimelimit=-1)
lola: ========================================
lola: ...considering subproblem: A (G ((F (X ((FIREABLE(switch11_0_0) OR FIREABLE(switch11_4_0) OR FIREABLE(switch11_3_0) OR FIREABLE(switch11_2_0) OR FIREABLE(switch11_1_0) OR FIREABLE(switch11_4_6) OR FIREABLE(switch11_3_6) OR FIREABLE(switch11_2_6) OR FIREABLE(switch11_1_6) OR FIREABLE(switch11_0_6) OR FIREABLE(switch11_7_5) OR FIREABLE(switch11_6_5) OR FIREABLE(switch11_5_5) OR FIREABLE(switch11_4_5) OR FIREABLE... (shortened)
lola: ========================================
lola: SUBTASK
lola: checking LTL
lola: transforming LTL-Formula into a B\xfcchi-Automaton
lola: processed formula: A (G ((F (X ((FIREABLE(switch11_0_0) OR FIREABLE(switch11_4_0) OR FIREABLE(switch11_3_0) OR FIREABLE(switch11_2_0) OR FIREABLE(switch11_1_0) OR FIREABLE(switch11_4_6) OR FIREABLE(switch11_3_6) OR FIREABLE(switch11_2_6) OR FIREABLE(switch11_1_6) OR FIREABLE(switch11_0_6) OR FIREABLE(switch11_7_5) OR FIREABLE(switch11_6_5) OR FIREABLE(switch11_5_5) OR FIREABLE(switch11_4_5) OR FIREABLE(switch11_3_5) OR FIREABLE(switch11_2_5) OR FIREABLE(switch11_1_5) OR FIREABLE(switch11_0_5) OR FIREABLE(switch11_7_4) OR FIREABLE(switch11_6_4) OR FIREABLE(switch11_5_4) OR FIREABLE(switch11_7_7) OR FIREABLE(switch11_5_7) OR FIREABLE(switch11_6_7) OR FIREABLE(switch11_3_7) OR FIREABLE(switch11_4_7) OR FIREABLE(switch11_1_7) OR FIREABLE(switch11_2_7) OR FIREABLE(switch11_7_6) OR FIREABLE(switch11_0_7) OR FIREABLE(switch11_5_6) OR FIREABLE(switch11_6_6) OR FIREABLE(switch11_2_2) OR FIREABLE(switch11_1_2) OR FIREABLE(switch11_4_2) OR FIREABLE(switch11_3_2) OR FIREABLE(switch11_6_1) OR FIREABLE(switch11_5_1) OR FIREABLE(switch11_0_2) OR FIREABLE(switch11_7_1) OR FIREABLE(switch11_2_1) OR FIREABLE(switch11_1_1) OR FIREABLE(switch11_4_1) OR FIREABLE(switch11_3_1) OR FIREABLE(switch11_6_0) OR FIREABLE(switch11_5_0) OR FIREABLE(switch11_0_1) OR FIREABLE(switch11_7_0) OR FIREABLE(switch11_1_4) OR FIREABLE(switch11_2_4) OR FIREABLE(switch11_3_4) OR FIREABLE(switch11_4_4) OR FIREABLE(switch11_5_3) OR FIREABLE(switch11_6_3) OR FIREABLE(switch11_7_3) OR FIREABLE(switch11_0_4) OR FIREABLE(switch11_1_3) OR FIREABLE(switch11_2_3) OR FIREABLE(switch11_3_3) OR FIREABLE(switch11_4_3) OR FIREABLE(switch11_5_2) OR FIREABLE(switch11_6_2) OR FIREABLE(switch11_7_2) OR FIREABLE(switch11_0_3)))) U G ((FIREABLE(display3_4_0) OR FIREABLE(display3_3_0) OR FIREABLE(display3_2_0) OR FIREABLE(display3_1_0) OR FIREABLE(display3_0_0) OR FIREABLE(display3_3_2) OR FIREABLE(display3_4_2) OR FIREABLE(display3_1_2) OR FIREABLE(display3_2_2) OR FIREABLE(display3_7_1) OR FIREABLE(display3_0_2) OR FIREABLE(display3_5_1) OR FIREABLE(display3_6_1) OR FIREABLE(display3_3_1) OR FIREABLE(display3_4_1) OR FIREABLE(display3_1_1) OR FIREABLE(display3_2_1) OR FIREABLE(display3_7_0) OR FIREABLE(display3_0_1) OR FIREABLE(display3_5_0) OR FIREABLE(display3_6_0) OR FIREABLE(display3_0_5) OR FIREABLE(display3_7_4) OR FIREABLE(display3_6_4) OR FIREABLE(display3_5_4) OR FIREABLE(display3_4_5) OR FIREABLE(display3_3_5) OR FIREABLE(display3_2_5) OR FIREABLE(display3_1_5) OR FIREABLE(display3_0_6) OR FIREABLE(display3_7_5) OR FIREABLE(display3_6_5) OR FIREABLE(display3_5_5) OR FIREABLE(display3_4_6) OR FIREABLE(display3_3_6) OR FIREABLE(display3_2_6) OR FIREABLE(display3_1_6) OR FIREABLE(display3_7_2) OR FIREABLE(display3_0_3) OR FIREABLE(display3_5_2) OR FIREABLE(display3_6_2) OR FIREABLE(display3_3_3) OR FIREABLE(display3_4_3) OR FIREABLE(display3_1_3) OR FIREABLE(display3_2_3) OR FIREABLE(display3_7_3) OR FIREABLE(display3_0_4) OR FIREABLE(display3_5_3) OR FIREABLE(display3_6_3) OR FIREABLE(display3_3_4) OR FIREABLE(display3_4_4) OR FIREABLE(display3_1_4) OR FIREABLE(display3_2_4) OR FIREABLE(display3_5_6) OR FIREABLE(display3_6_6) OR FIREABLE(display3_7_6) OR FIREABLE(display3_0_7) OR FIREABLE(display3_1_7) OR FIREABLE(display3_2_7) OR FIREABLE(display3_3_7) OR FIREABLE(display3_4_7) OR FIREABLE(display3_5_7) OR FIREABLE(display3_6_7) OR FIREABLE(display3_7_7))))))
lola: processed formula: A (G ((F (X ((FIREABLE(switch11_0_0) OR FIREABLE(switch11_4_0) OR FIREABLE(switch11_3_0) OR FIREABLE(switch11_2_0) OR FIREABLE(switch11_1_0) OR FIREABLE(switch11_4_6) OR FIREABLE(switch11_3_6) OR FIREABLE(switch11_2_6) OR FIREABLE(switch11_1_6) OR FIREABLE(switch11_0_6) OR FIREABLE(switch11_7_5) OR FIREABLE(switch11_6_5) OR FIREABLE(switch11_5_5) OR FIREABLE(switch11_4_5) OR FIREABLE... (shortened)
lola: processed formula length: 3475
lola: 0 rewrites
lola: formula mentions 0 of 168 places; total mentions: 0
lola: closed formula file PermAdmissibility-PT-50-LTLFireability.task
lola: the resulting B\xfcchi automaton has 6 states
lola: STORE
lola: using a bit-perfect encoder (--encoder=bit)
lola: using 548 bytes per marking, with 29 unused bits
lola: using a prefix tree store (--store=prefix)
lola: Formula contains X operator; stubborn sets not applicable
lola: SEARCH
lola: RUNNING
lola: 958847 markings, 1405519 edges, 191769 markings/sec, 0 secs
lola: 1847325 markings, 2796449 edges, 177696 markings/sec, 5 secs
lola: 2763302 markings, 4260982 edges, 183195 markings/sec, 10 secs
lola: 3618759 markings, 5660693 edges, 171091 markings/sec, 15 secs
lola: 4484848 markings, 7063356 edges, 173218 markings/sec, 20 secs
lola: 5340145 markings, 8572485 edges, 171059 markings/sec, 25 secs
lola: 6226120 markings, 9969037 edges, 177195 markings/sec, 30 secs
lola: 7113088 markings, 11464984 edges, 177394 markings/sec, 35 secs
lola: 7850645 markings, 12747529 edges, 147511 markings/sec, 40 secs
lola: 8584665 markings, 14070970 edges, 146804 markings/sec, 45 secs
lola: 9361328 markings, 15302093 edges, 155333 markings/sec, 50 secs
lola: 10100331 markings, 16576981 edges, 147801 markings/sec, 55 secs
lola: 10878812 markings, 17862217 edges, 155696 markings/sec, 60 secs
lola: 11670200 markings, 19262722 edges, 158278 markings/sec, 65 secs
lola: 12483142 markings, 20733191 edges, 162588 markings/sec, 70 secs
lola: 13236851 markings, 22158357 edges, 150742 markings/sec, 75 secs
lola: 14026912 markings, 23402529 edges, 158012 markings/sec, 80 secs
lola: 14790733 markings, 24672976 edges, 152764 markings/sec, 85 secs
lola: 15564748 markings, 26057632 edges, 154803 markings/sec, 90 secs
lola: 16337521 markings, 27392330 edges, 154555 markings/sec, 95 secs
lola: 17134684 markings, 28752671 edges, 159433 markings/sec, 100 secs
lola: 17869694 markings, 30077588 edges, 147002 markings/sec, 105 secs
lola: 18580701 markings, 31379497 edges, 142201 markings/sec, 110 secs
lola: 19268621 markings, 32688648 edges, 137584 markings/sec, 115 secs
lola: 19913529 markings, 33966182 edges, 128982 markings/sec, 120 secs
lola: 20680732 markings, 35197711 edges, 153441 markings/sec, 125 secs
lola: 21411143 markings, 36404537 edges, 146082 markings/sec, 130 secs
lola: 22180658 markings, 37700358 edges, 153903 markings/sec, 135 secs
lola: 22940790 markings, 39024511 edges, 152026 markings/sec, 140 secs
lola: 23638192 markings, 40308985 edges, 139480 markings/sec, 145 secs
lola: 24353527 markings, 41539079 edges, 143067 markings/sec, 150 secs
lola: 25138544 markings, 42864656 edges, 157003 markings/sec, 155 secs
lola: 25893333 markings, 44216101 edges, 150958 markings/sec, 160 secs
lola: 26616815 markings, 45570331 edges, 144696 markings/sec, 165 secs
lola: 27342732 markings, 46921101 edges, 145183 markings/sec, 170 secs
lola: 28021281 markings, 48222533 edges, 135710 markings/sec, 175 secs
lola: 28708696 markings, 49537188 edges, 137483 markings/sec, 180 secs
lola: 29424421 markings, 50978998 edges, 143145 markings/sec, 185 secs
lola: 29811610 markings, 51758569 edges, 77438 markings/sec, 190 secs
lola: Child process aborted or communication problem between parent and child process
lola: subprocess 5 will run for 303 seconds at most (--localtimelimit=-1)
lola: ========================================
lola: ...considering subproblem: A (G ((FIREABLE(switch10_4_0) OR FIREABLE(switch10_3_0) OR FIREABLE(switch10_2_0) OR FIREABLE(switch10_1_0) OR FIREABLE(switch10_0_0) OR FIREABLE(switch10_7_4) OR FIREABLE(switch10_0_5) OR FIREABLE(switch10_5_4) OR FIREABLE(switch10_6_4) OR FIREABLE(switch10_3_5) OR FIREABLE(switch10_4_5) OR FIREABLE(switch10_1_5) OR FIREABLE(switch10_2_5) OR FIREABLE(switch10_7_5) OR FIREABLE(switch... (shortened)
lola: ========================================
lola: SUBTASK
lola: checking invariance
lola: Planning: workflow for reachability check: search (--findpath=off)
lola: STORE
lola: using a bit-perfect encoder (--encoder=bit)
lola: using 544 bytes per marking, with 0 unused bits
lola: using a prefix tree store (--store=prefix)
lola: SEARCH (state space)
lola: state space: using reachability graph (--search=depth)
lola: state space: using reachability preserving stubborn set method with insertion algorithm (--stubborn=tarjan)
lola: RUNNING
lola: SUBRESULT
lola: result: no
lola: produced by: state space
lola: The predicate is not invariant.
lola: 0 markings, 0 edges
lola: ========================================
lola: subprocess 6 will run for 333 seconds at most (--localtimelimit=-1)
lola: ========================================
lola: ...considering subproblem: A (F (F ((X ((FIREABLE(display1_2_1) OR FIREABLE(display1_1_1) OR FIREABLE(display1_4_1) OR FIREABLE(display1_3_1) OR FIREABLE(display1_6_0) OR FIREABLE(display1_5_0) OR FIREABLE(display1_0_1) OR FIREABLE(display1_7_0) OR FIREABLE(display1_2_2) OR FIREABLE(display1_1_2) OR FIREABLE(display1_4_2) OR FIREABLE(display1_3_2) OR FIREABLE(display1_6_1) OR FIREABLE(display1_5_1) OR FIREABLE... (shortened)
lola: ========================================
lola: SUBTASK
lola: checking LTL
lola: transforming LTL-Formula into a B\xfcchi-Automaton
lola: processed formula: A (F ((X ((FIREABLE(display1_2_1) OR FIREABLE(display1_1_1) OR FIREABLE(display1_4_1) OR FIREABLE(display1_3_1) OR FIREABLE(display1_6_0) OR FIREABLE(display1_5_0) OR FIREABLE(display1_0_1) OR FIREABLE(display1_7_0) OR FIREABLE(display1_2_2) OR FIREABLE(display1_1_2) OR FIREABLE(display1_4_2) OR FIREABLE(display1_3_2) OR FIREABLE(display1_6_1) OR FIREABLE(display1_5_1) OR FIREABLE(display1_0_2) OR FIREABLE(display1_7_1) OR FIREABLE(display1_1_0) OR FIREABLE(display1_2_0) OR FIREABLE(display1_3_0) OR FIREABLE(display1_4_0) OR FIREABLE(display1_0_0) OR FIREABLE(display1_7_5) OR FIREABLE(display1_0_6) OR FIREABLE(display1_5_5) OR FIREABLE(display1_6_5) OR FIREABLE(display1_3_6) OR FIREABLE(display1_4_6) OR FIREABLE(display1_1_6) OR FIREABLE(display1_2_6) OR FIREABLE(display1_7_4) OR FIREABLE(display1_0_5) OR FIREABLE(display1_5_4) OR FIREABLE(display1_6_4) OR FIREABLE(display1_3_5) OR FIREABLE(display1_4_5) OR FIREABLE(display1_1_5) OR FIREABLE(display1_2_5) OR FIREABLE(display1_0_4) OR FIREABLE(display1_7_3) OR FIREABLE(display1_6_3) OR FIREABLE(display1_5_3) OR FIREABLE(display1_4_4) OR FIREABLE(display1_3_4) OR FIREABLE(display1_2_4) OR FIREABLE(display1_1_4) OR FIREABLE(display1_0_3) OR FIREABLE(display1_7_2) OR FIREABLE(display1_6_2) OR FIREABLE(display1_5_2) OR FIREABLE(display1_4_3) OR FIREABLE(display1_3_3) OR FIREABLE(display1_2_3) OR FIREABLE(display1_1_3) OR FIREABLE(display1_6_7) OR FIREABLE(display1_5_7) OR FIREABLE(display1_7_7) OR FIREABLE(display1_6_6) OR FIREABLE(display1_5_6) OR FIREABLE(display1_0_7) OR FIREABLE(display1_7_6) OR FIREABLE(display1_2_7) OR FIREABLE(display1_1_7) OR FIREABLE(display1_4_7) OR FIREABLE(display1_3_7))) U F ((FIREABLE(switch4_2_7) OR FIREABLE(switch4_3_6) OR FIREABLE(switch4_3_7) OR FIREABLE(switch4_2_6))))))
lola: processed formula: A (F ((X ((FIREABLE(display1_2_1) OR FIREABLE(display1_1_1) OR FIREABLE(display1_4_1) OR FIREABLE(display1_3_1) OR FIREABLE(display1_6_0) OR FIREABLE(display1_5_0) OR FIREABLE(display1_0_1) OR FIREABLE(display1_7_0) OR FIREABLE(display1_2_2) OR FIREABLE(display1_1_2) OR FIREABLE(display1_4_2) OR FIREABLE(display1_3_2) OR FIREABLE(display1_6_1) OR FIREABLE(display1_5_1) OR FIREABLE(di... (shortened)
lola: processed formula length: 1847
lola: 1 rewrites
lola: formula mentions 0 of 168 places; total mentions: 0
lola: closed formula file PermAdmissibility-PT-50-LTLFireability.task
lola: the resulting B\xfcchi automaton has 1 states
lola: STORE
lola: using a bit-perfect encoder (--encoder=bit)
lola: using 548 bytes per marking, with 31 unused bits
lola: using a prefix tree store (--store=prefix)
lola: Formula contains X operator; stubborn sets not applicable
lola: SEARCH
lola: RUNNING
lola: 1453454 markings, 2836571 edges, 290691 markings/sec, 0 secs
lola: 2776267 markings, 5572926 edges, 264563 markings/sec, 5 secs
lola: 4096597 markings, 8330776 edges, 264066 markings/sec, 10 secs
lola: 5352055 markings, 10991998 edges, 251092 markings/sec, 15 secs
lola: 6611575 markings, 13637082 edges, 251904 markings/sec, 20 secs
lola: 7845225 markings, 16259715 edges, 246730 markings/sec, 25 secs
lola: 9027233 markings, 18798001 edges, 236402 markings/sec, 30 secs
lola: 10230313 markings, 21380389 edges, 240616 markings/sec, 35 secs
lola: 11532615 markings, 24174667 edges, 260460 markings/sec, 40 secs
lola: 12769291 markings, 26829051 edges, 247335 markings/sec, 45 secs
lola: 13965192 markings, 29443624 edges, 239180 markings/sec, 50 secs
lola: 15143919 markings, 31948916 edges, 235745 markings/sec, 55 secs
lola: 16282502 markings, 34456399 edges, 227717 markings/sec, 60 secs
lola: 17512346 markings, 37076839 edges, 245969 markings/sec, 65 secs
lola: 18668359 markings, 39628507 edges, 231203 markings/sec, 70 secs
lola: 19878353 markings, 42236767 edges, 241999 markings/sec, 75 secs
lola: 21054053 markings, 44815340 edges, 235140 markings/sec, 80 secs
lola: 22315449 markings, 47535212 edges, 252279 markings/sec, 85 secs
lola: 23548059 markings, 50244608 edges, 246522 markings/sec, 90 secs
lola: 24772450 markings, 52888606 edges, 244878 markings/sec, 95 secs
lola: 25943772 markings, 55448413 edges, 234264 markings/sec, 100 secs
lola: 27115205 markings, 58040467 edges, 234287 markings/sec, 105 secs
lola: 28342839 markings, 60698926 edges, 245527 markings/sec, 110 secs
lola: 29514822 markings, 63259999 edges, 234397 markings/sec, 115 secs
lola: 30659798 markings, 65791796 edges, 228995 markings/sec, 120 secs
lola: 31788082 markings, 68310210 edges, 225657 markings/sec, 125 secs
lola: 33001318 markings, 70919784 edges, 242647 markings/sec, 130 secs
lola: 34174983 markings, 73511351 edges, 234733 markings/sec, 135 secs
lola: 35316359 markings, 76064634 edges, 228275 markings/sec, 140 secs
lola: 36553041 markings, 78711407 edges, 247336 markings/sec, 145 secs
lola: 37724004 markings, 81306952 edges, 234193 markings/sec, 150 secs
lola: 38881206 markings, 83888911 edges, 231440 markings/sec, 155 secs
lola: 40036441 markings, 86353478 edges, 231047 markings/sec, 160 secs
lola: 41118813 markings, 88737740 edges, 216474 markings/sec, 165 secs
lola: 42189945 markings, 91125190 edges, 214226 markings/sec, 170 secs
lola: 43273350 markings, 93543558 edges, 216681 markings/sec, 175 secs
lola: 44389327 markings, 95991980 edges, 223195 markings/sec, 180 secs
lola: 45529802 markings, 98465043 edges, 228095 markings/sec, 185 secs
lola: 46640458 markings, 100921963 edges, 222131 markings/sec, 190 secs
lola: 47757714 markings, 103412807 edges, 223451 markings/sec, 195 secs
lola: 47759070 markings, 103415899 edges, 271 markings/sec, 200 secs
lola: lola: Child process aborted or communication problem between parent and child process
terminate called after throwing an instance of 'std::runtime_error'
what(): parse error at position 0: unexpected character, last read: ''
Aborted (core dumped)
FORMULA PermAdmissibility-PT-50-LTLFireability-0 CANNOT_COMPUTE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION STUBBORN_SETS TOPOLOGICAL USE_NUPN
FORMULA PermAdmissibility-PT-50-LTLFireability-1 CANNOT_COMPUTE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION STUBBORN_SETS TOPOLOGICAL USE_NUPN
FORMULA PermAdmissibility-PT-50-LTLFireability-2 CANNOT_COMPUTE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION STUBBORN_SETS TOPOLOGICAL USE_NUPN
FORMULA PermAdmissibility-PT-50-LTLFireability-3 CANNOT_COMPUTE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION STUBBORN_SETS TOPOLOGICAL USE_NUPN
FORMULA PermAdmissibility-PT-50-LTLFireability-4 CANNOT_COMPUTE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION STUBBORN_SETS TOPOLOGICAL USE_NUPN
FORMULA PermAdmissibility-PT-50-LTLFireability-5 CANNOT_COMPUTE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION STUBBORN_SETS TOPOLOGICAL USE_NUPN
FORMULA PermAdmissibility-PT-50-LTLFireability-6 CANNOT_COMPUTE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION STUBBORN_SETS TOPOLOGICAL USE_NUPN
FORMULA PermAdmissibility-PT-50-LTLFireability-7 CANNOT_COMPUTE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION STUBBORN_SETS TOPOLOGICAL USE_NUPN
FORMULA PermAdmissibility-PT-50-LTLFireability-8 CANNOT_COMPUTE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION STUBBORN_SETS TOPOLOGICAL USE_NUPN
FORMULA PermAdmissibility-PT-50-LTLFireability-9 CANNOT_COMPUTE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION STUBBORN_SETS TOPOLOGICAL USE_NUPN
FORMULA PermAdmissibility-PT-50-LTLFireability-10 CANNOT_COMPUTE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION STUBBORN_SETS TOPOLOGICAL USE_NUPN
FORMULA PermAdmissibility-PT-50-LTLFireability-11 CANNOT_COMPUTE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION STUBBORN_SETS TOPOLOGICAL USE_NUPN
FORMULA PermAdmissibility-PT-50-LTLFireability-12 CANNOT_COMPUTE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION STUBBORN_SETS TOPOLOGICAL USE_NUPN
FORMULA PermAdmissibility-PT-50-LTLFireability-13 CANNOT_COMPUTE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION STUBBORN_SETS TOPOLOGICAL USE_NUPN
FORMULA PermAdmissibility-PT-50-LTLFireability-14 CANNOT_COMPUTE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION STUBBORN_SETS TOPOLOGICAL USE_NUPN
FORMULA PermAdmissibility-PT-50-LTLFireability-15 CANNOT_COMPUTE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION STUBBORN_SETS TOPOLOGICAL USE_NUPN
----- Kill lola and sara stdout -----
----- Finished stdout -----
----- Finished stderr -----
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="PermAdmissibility-PT-50"
export BK_EXAMINATION="LTLFireability"
export BK_TOOL="mcc4mcc-full"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
tar xzf /home/mcc/BenchKit/INPUTS/PermAdmissibility-PT-50.tgz
mv PermAdmissibility-PT-50 execution
cd execution
pwd
ls -lh
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3637"
echo " Executing tool mcc4mcc-full"
echo " Input is PermAdmissibility-PT-50, examination is LTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r262-csrt-152732586900146"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;