fond
Model Checking Contest 2018
8th edition, Bratislava, Slovakia, June 26, 2018
Execution of r261-csrt-152732586000176
Last Updated
June 26, 2018

About the Execution of ITS-Tools.L for PhaseVariation-PT-D05CS010

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
15756.350 72765.00 190610.00 137.30 FFFFFFFFFFFFFFFF normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Waiting for the VM to be ready (probing ssh)
..........................................
/home/mcc/execution
total 812K
-rw-r--r-- 1 mcc users 3.7K May 15 18:54 CTLCardinality.txt
-rw-r--r-- 1 mcc users 17K May 15 18:54 CTLCardinality.xml
-rw-r--r-- 1 mcc users 4.0K May 15 18:54 CTLFireability.txt
-rw-r--r-- 1 mcc users 18K May 15 18:54 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K May 15 18:50 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 5.6K May 15 18:50 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 2.4K May 26 09:26 LTLCardinality.txt
-rw-r--r-- 1 mcc users 8.0K May 26 09:26 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.6K May 26 09:26 LTLFireability.txt
-rw-r--r-- 1 mcc users 10K May 26 09:26 LTLFireability.xml
-rw-r--r-- 1 mcc users 4.1K May 15 18:54 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 18K May 15 18:54 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 117 May 15 18:54 ReachabilityDeadlock.txt
-rw-r--r-- 1 mcc users 355 May 15 18:54 ReachabilityDeadlock.xml
-rw-r--r-- 1 mcc users 4.9K May 15 18:54 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 21K May 15 18:54 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.9K May 15 18:54 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.9K May 15 18:54 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 15 18:50 equiv_col
-rw-r--r-- 1 mcc users 9 May 15 18:50 instance
-rw-r--r-- 1 mcc users 6 May 15 18:50 iscolored
-rw-r--r-- 1 mcc users 633K May 15 18:50 model.pnml
=====================================================================
Generated by BenchKit 2-3637
Executing tool itstoolsl
Input is PhaseVariation-PT-D05CS010, examination is LTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r261-csrt-152732586000176
=====================================================================


--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME PhaseVariation-PT-D05CS010-LTLFireability-00
FORMULA_NAME PhaseVariation-PT-D05CS010-LTLFireability-01
FORMULA_NAME PhaseVariation-PT-D05CS010-LTLFireability-02
FORMULA_NAME PhaseVariation-PT-D05CS010-LTLFireability-03
FORMULA_NAME PhaseVariation-PT-D05CS010-LTLFireability-04
FORMULA_NAME PhaseVariation-PT-D05CS010-LTLFireability-05
FORMULA_NAME PhaseVariation-PT-D05CS010-LTLFireability-06
FORMULA_NAME PhaseVariation-PT-D05CS010-LTLFireability-07
FORMULA_NAME PhaseVariation-PT-D05CS010-LTLFireability-08
FORMULA_NAME PhaseVariation-PT-D05CS010-LTLFireability-09
FORMULA_NAME PhaseVariation-PT-D05CS010-LTLFireability-10
FORMULA_NAME PhaseVariation-PT-D05CS010-LTLFireability-11
FORMULA_NAME PhaseVariation-PT-D05CS010-LTLFireability-12
FORMULA_NAME PhaseVariation-PT-D05CS010-LTLFireability-13
FORMULA_NAME PhaseVariation-PT-D05CS010-LTLFireability-14
FORMULA_NAME PhaseVariation-PT-D05CS010-LTLFireability-15

=== Now, execution of the tool begins

BK_START 1527505229039

Converted graph to binary with : CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.louvain.binaries_1.0.0.201805241334/bin/convert-linux64, -i, /tmp/graph2273588321054473282.txt, -o, /tmp/graph2273588321054473282.bin, -w, /tmp/graph2273588321054473282.weights], workingDir=null]
Built communities with : CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.louvain.binaries_1.0.0.201805241334/bin/louvain-linux64, /tmp/graph2273588321054473282.bin, -l, -1, -v, -w, /tmp/graph2273588321054473282.weights, -q, 0, -e, 0.001], workingDir=null]
Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805241334/bin/its-ltl-linux64, --gc-threshold, 2000000, -i, /home/mcc/execution/LTLFireability.pnml.gal, -t, CGAL, -LTL, /home/mcc/execution/LTLFireability.ltl, -c, -stutter-deadlock], workingDir=/home/mcc/execution]

its-ltl command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805241334/bin/its-ltl-linux64 --gc-threshold 2000000 -i /home/mcc/execution/LTLFireability.pnml.gal -t CGAL -LTL /home/mcc/execution/LTLFireability.ltl -c -stutter-deadlock
Read 16 LTL properties
Checking formula 0 : !((F(F("(((i1.u0.pool__1_4_>=1)&&(i0.u8.cell___1_3__B_>=1))&&(i0.u25.run_dot>=1))"))))
Formula 0 simplified : !F"(((i1.u0.pool__1_4_>=1)&&(i0.u8.cell___1_3__B_>=1))&&(i0.u25.run_dot>=1))"
built 21 ordering constraints for composite.
built 136 ordering constraints for composite.
built 104 ordering constraints for composite.
built 104 ordering constraints for composite.
built 676 ordering constraints for composite.
built 136 ordering constraints for composite.
built 136 ordering constraints for composite.
built 104 ordering constraints for composite.
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
Normalized transition count is 51
// Phase 1: matrix 51 rows 77 cols
invariant :u3:cell___3_3__A_ + u3:cell___3_3__B_ + -1'i0:u1:pool__2_3_ + -1'i0:u6:pool__1_1_ + -1'i0:u7:pool__1_2_ + -1'i0:u8:pool__1_3_ + -1'i0:u10:pool__2_1_ + -1'i0:u11:pool__2_2_ + -1'i0:u25:size_dot + -1'i1:u0:pool__1_4_ + -1'i1:u9:pool__1_5_ + -1'i1:u12:pool__2_4_ + -1'i1:u13:pool__2_5_ + -1'i2:u2:pool__3_2_ + -1'i2:u14:pool__3_1_ + -1'i3:u15:pool__3_4_ + -1'i3:u16:pool__3_5_ + -1'i4:u5:pool__4_4_ + -1'i4:u19:pool__4_5_ + -1'i4:u23:pool__5_4_ + -1'i4:u24:pool__5_5_ + -1'i5:u4:pool__4_1_ + -1'i5:u17:pool__4_2_ + -1'i5:u20:pool__5_1_ + -1'i5:u21:pool__5_2_ + -1'i6:u18:pool__4_3_ + -1'i6:u22:pool__5_3_ = -24
invariant :i6:u22:cell___5_3__A_ + i6:u22:cell___5_3__B_ + i6:u22:pool__5_3_ = 1
invariant :i5:u21:cell___5_2__A_ + i5:u21:cell___5_2__B_ + i5:u21:pool__5_2_ = 1
invariant :i1:u13:cell___2_5__A_ + i1:u13:cell___2_5__B_ + i1:u13:pool__2_5_ = 1
invariant :i4:u5:cell___4_4__A_ + i4:u5:cell___4_4__B_ + i4:u5:pool__4_4_ = 1
invariant :i5:u4:cell___4_1__A_ + i5:u4:cell___4_1__B_ + i5:u4:pool__4_1_ = 1
invariant :i0:u1:cell___2_3__A_ + i0:u1:cell___2_3__B_ + i0:u1:pool__2_3_ = 1
invariant :i6:u18:cell___4_3__A_ + i6:u18:cell___4_3__B_ + i6:u18:pool__4_3_ = 1
invariant :i4:u19:cell___4_5__A_ + i4:u19:cell___4_5__B_ + i4:u19:pool__4_5_ = 1
invariant :i0:u6:cell___1_1__A_ + i0:u6:cell___1_1__B_ + i0:u6:pool__1_1_ = 1
invariant :i1:u12:cell___2_4__A_ + i1:u12:cell___2_4__B_ + i1:u12:pool__2_4_ = 1
invariant :i4:u23:cell___5_4__A_ + i4:u23:cell___5_4__B_ + i4:u23:pool__5_4_ = 1
invariant :i4:u24:cell___5_5__A_ + i4:u24:cell___5_5__B_ + i4:u24:pool__5_5_ = 1
invariant :i0:u10:cell___2_1__A_ + i0:u10:cell___2_1__B_ + i0:u10:pool__2_1_ = 1
invariant :i3:u15:cell___3_4__A_ + i3:u15:cell___3_4__B_ + i3:u15:pool__3_4_ = 1
invariant :i1:u0:cell___1_4__A_ + i1:u0:cell___1_4__B_ + i1:u0:pool__1_4_ = 1
invariant :i0:u8:cell___1_3__A_ + i0:u8:cell___1_3__B_ + i0:u8:pool__1_3_ = 1
invariant :i3:u16:cell___3_5__A_ + i3:u16:cell___3_5__B_ + i3:u16:pool__3_5_ = 1
invariant :u3:pool__3_3_ + i0:u1:pool__2_3_ + i0:u6:pool__1_1_ + i0:u7:pool__1_2_ + i0:u8:pool__1_3_ + i0:u10:pool__2_1_ + i0:u11:pool__2_2_ + i0:u25:size_dot + i1:u0:pool__1_4_ + i1:u9:pool__1_5_ + i1:u12:pool__2_4_ + i1:u13:pool__2_5_ + i2:u2:pool__3_2_ + i2:u14:pool__3_1_ + i3:u15:pool__3_4_ + i3:u16:pool__3_5_ + i4:u5:pool__4_4_ + i4:u19:pool__4_5_ + i4:u23:pool__5_4_ + i4:u24:pool__5_5_ + i5:u4:pool__4_1_ + i5:u17:pool__4_2_ + i5:u20:pool__5_1_ + i5:u21:pool__5_2_ + i6:u18:pool__4_3_ + i6:u22:pool__5_3_ = 25
invariant :i0:u11:cell___2_2__A_ + i0:u11:cell___2_2__B_ + i0:u11:pool__2_2_ = 1
invariant :i2:u2:cell___3_2__A_ + i2:u2:cell___3_2__B_ + i2:u2:pool__3_2_ = 1
invariant :i2:u14:cell___3_1__A_ + i2:u14:cell___3_1__B_ + i2:u14:pool__3_1_ = 1
invariant :i5:u17:cell___4_2__A_ + i5:u17:cell___4_2__B_ + i5:u17:pool__4_2_ = 1
invariant :i0:u7:cell___1_2__A_ + i0:u7:cell___1_2__B_ + i0:u7:pool__1_2_ = 1
invariant :i1:u9:cell___1_5__A_ + i1:u9:cell___1_5__B_ + i1:u9:pool__1_5_ = 1
invariant :i5:u20:cell___5_1__A_ + i5:u20:cell___5_1__B_ + i5:u20:pool__5_1_ = 1
Reverse transition relation is NOT exact ! Due to transitions division2_mutate_1_3_A_1_2, division2_mutate_1_3_A_1_4, division2_mutate_1_3_A_2_2, division2_mutate_1_3_A_2_4, division2_mutate_1_3_B_1_2, division2_mutate_1_3_B_1_4, division2_mutate_1_3_B_2_4, division2_mutate_1_4_A_1_3, division2_mutate_1_4_A_1_5, division2_mutate_1_4_A_2_3, division2_mutate_1_4_A_2_5, division2_mutate_1_4_B_1_3, division2_mutate_1_4_B_1_5, division2_mutate_1_4_B_2_3, division2_mutate_1_4_B_2_5, division2_mutate_2_3_A_1_2, division2_mutate_2_3_A_1_3, division2_mutate_2_3_A_1_4, division2_mutate_2_3_A_2_2, division2_mutate_2_3_A_2_4, division2_mutate_2_3_A_3_2, division2_mutate_2_3_A_3_3, division2_mutate_2_3_A_3_4, division2_mutate_2_3_B_1_2, division2_mutate_2_3_B_1_3, division2_mutate_2_3_B_1_4, division2_mutate_2_3_B_2_4, division2_mutate_2_3_B_3_2, division2_mutate_2_3_B_3_3, division2_mutate_2_3_B_3_4, division2_mutate_2_4_A_1_3, division2_mutate_2_4_A_1_4, division2_mutate_2_4_A_1_5, division2_mutate_2_4_A_2_3, division2_mutate_2_4_A_2_5, division2_mutate_2_4_A_3_3, division2_mutate_2_4_A_3_4, division2_mutate_2_4_A_3_5, division2_mutate_2_4_B_1_3, division2_mutate_2_4_B_1_4, division2_mutate_2_4_B_1_5, division2_mutate_2_4_B_2_3, division2_mutate_2_4_B_2_5, division2_mutate_2_4_B_3_3, division2_mutate_2_4_B_3_4, division2_mutate_2_4_B_3_5, division2_mutate_2_5_A_1_4, division2_mutate_2_5_A_1_5, division2_mutate_2_5_A_3_4, division2_mutate_2_5_A_3_5, division2_mutate_2_5_B_1_4, division2_mutate_2_5_B_1_5, division2_mutate_2_5_B_3_4, division2_mutate_2_5_B_3_5, division2_mutate_3_1_A_2_1, division2_mutate_3_1_A_2_2, division2_mutate_3_1_A_4_1, division2_mutate_3_1_A_4_2, division2_mutate_3_1_B_2_1, division2_mutate_3_1_B_4_1, division2_mutate_3_1_B_4_2, division2_mutate_3_2_A_2_1, division2_mutate_3_2_A_2_2, division2_mutate_3_2_A_2_3, division2_mutate_3_2_A_3_1, division2_mutate_3_2_A_3_3, division2_mutate_3_2_A_4_1, division2_mutate_3_2_A_4_2, division2_mutate_3_2_A_4_3, division2_mutate_3_2_B_2_1, division2_mutate_3_2_B_2_3, division2_mutate_3_2_B_3_1, division2_mutate_3_2_B_3_3, division2_mutate_3_2_B_4_1, division2_mutate_3_2_B_4_2, division2_mutate_3_2_B_4_3, division2_mutate_3_3_A_2_2, division2_mutate_3_3_A_2_3, division2_mutate_3_3_A_2_4, division2_mutate_3_3_A_3_2, division2_mutate_3_3_A_3_4, division2_mutate_3_3_A_4_2, division2_mutate_3_3_A_4_3, division2_mutate_3_3_A_4_4, division2_mutate_3_3_B_2_3, division2_mutate_3_3_B_2_4, division2_mutate_3_3_B_3_2, division2_mutate_3_3_B_3_4, division2_mutate_3_3_B_4_2, division2_mutate_3_3_B_4_3, division2_mutate_3_3_B_4_4, division2_mutate_3_4_A_2_3, division2_mutate_3_4_A_2_4, division2_mutate_3_4_A_2_5, division2_mutate_3_4_A_3_3, division2_mutate_3_4_A_3_5, division2_mutate_3_4_A_4_3, division2_mutate_3_4_A_4_4, division2_mutate_3_4_A_4_5, division2_mutate_3_4_B_2_3, division2_mutate_3_4_B_2_4, division2_mutate_3_4_B_2_5, division2_mutate_3_4_B_3_3, division2_mutate_3_4_B_3_5, division2_mutate_3_4_B_4_3, division2_mutate_3_4_B_4_4, division2_mutate_3_4_B_4_5, division2_mutate_3_5_A_2_4, division2_mutate_3_5_A_2_5, division2_mutate_3_5_A_4_4, division2_mutate_3_5_A_4_5, division2_mutate_3_5_B_2_4, division2_mutate_3_5_B_2_5, division2_mutate_3_5_B_4_4, division2_mutate_3_5_B_4_5, division2_mutate_4_1_A_3_1, division2_mutate_4_1_A_3_2, division2_mutate_4_1_A_5_1, division2_mutate_4_1_A_5_2, division2_mutate_4_1_B_3_1, division2_mutate_4_1_B_3_2, division2_mutate_4_1_B_5_1, division2_mutate_4_1_B_5_2, division2_mutate_4_2_A_3_1, division2_mutate_4_2_A_3_2, division2_mutate_4_2_A_3_3, division2_mutate_4_2_A_4_1, division2_mutate_4_2_A_4_3, division2_mutate_4_2_A_5_1, division2_mutate_4_2_A_5_2, division2_mutate_4_2_A_5_3, division2_mutate_4_2_B_3_1, division2_mutate_4_2_B_3_2, division2_mutate_4_2_B_3_3, division2_mutate_4_2_B_4_1, division2_mutate_4_2_B_4_3, division2_mutate_4_2_B_5_1, division2_mutate_4_2_B_5_2, division2_mutate_4_2_B_5_3, division2_mutate_4_3_A_3_2, division2_mutate_4_3_A_3_3, division2_mutate_4_3_A_3_4, division2_mutate_4_3_A_4_2, division2_mutate_4_3_A_4_4, division2_mutate_4_3_A_5_2, division2_mutate_4_3_A_5_3, division2_mutate_4_3_A_5_4, division2_mutate_4_3_B_3_2, division2_mutate_4_3_B_3_3, division2_mutate_4_3_B_3_4, division2_mutate_4_3_B_4_2, division2_mutate_4_3_B_4_4, division2_mutate_4_3_B_5_2, division2_mutate_4_3_B_5_3, division2_mutate_4_3_B_5_4, division2_mutate_4_4_A_3_3, division2_mutate_4_4_A_3_4, division2_mutate_4_4_A_3_5, division2_mutate_4_4_A_4_3, division2_mutate_4_4_A_4_5, division2_mutate_4_4_A_5_3, division2_mutate_4_4_A_5_4, division2_mutate_4_4_A_5_5, division2_mutate_4_4_B_3_3, division2_mutate_4_4_B_3_4, division2_mutate_4_4_B_3_5, division2_mutate_4_4_B_4_3, division2_mutate_4_4_B_4_5, division2_mutate_4_4_B_5_3, division2_mutate_4_4_B_5_4, division2_mutate_4_4_B_5_5, division2_mutate_4_5_A_3_4, division2_mutate_4_5_A_3_5, division2_mutate_4_5_A_5_4, division2_mutate_4_5_A_5_5, division2_mutate_4_5_B_3_4, division2_mutate_4_5_B_3_5, division2_mutate_4_5_B_5_4, division2_mutate_4_5_B_5_5, division2_mutate_5_2_A_4_1, division2_mutate_5_2_A_4_3, division2_mutate_5_2_A_5_1, division2_mutate_5_2_A_5_3, division2_mutate_5_2_B_4_1, division2_mutate_5_2_B_4_3, division2_mutate_5_2_B_5_1, division2_mutate_5_2_B_5_3, division2_mutate_5_3_A_4_2, division2_mutate_5_3_A_4_4, division2_mutate_5_3_A_5_2, division2_mutate_5_3_A_5_4, division2_mutate_5_3_B_4_2, division2_mutate_5_3_B_4_4, division2_mutate_5_3_B_5_2, division2_mutate_5_3_B_5_4, division2_mutate_5_4_A_4_3, division2_mutate_5_4_A_4_5, division2_mutate_5_4_A_5_3, division2_mutate_5_4_A_5_5, division2_mutate_5_4_B_4_3, division2_mutate_5_4_B_4_5, division2_mutate_5_4_B_5_3, division2_mutate_5_4_B_5_5, division2_replicate_1_3_A_1_2, division2_replicate_1_3_A_1_4, division2_replicate_1_3_A_2_2, division2_replicate_1_3_A_2_4, division2_replicate_1_3_B_1_2, division2_replicate_1_3_B_1_4, division2_replicate_1_3_B_2_4, division2_replicate_1_4_A_1_3, division2_replicate_1_4_A_1_5, division2_replicate_1_4_A_2_3, division2_replicate_1_4_A_2_5, division2_replicate_1_4_B_1_3, division2_replicate_1_4_B_1_5, division2_replicate_1_4_B_2_3, division2_replicate_1_4_B_2_5, division2_replicate_2_3_A_1_2, division2_replicate_2_3_A_1_3, division2_replicate_2_3_A_1_4, division2_replicate_2_3_A_2_2, division2_replicate_2_3_A_2_4, division2_replicate_2_3_A_3_2, division2_replicate_2_3_A_3_3, division2_replicate_2_3_A_3_4, division2_replicate_2_3_B_1_2, division2_replicate_2_3_B_1_3, division2_replicate_2_3_B_1_4, division2_replicate_2_3_B_2_4, division2_replicate_2_3_B_3_2, division2_replicate_2_3_B_3_3, division2_replicate_2_3_B_3_4, division2_replicate_2_4_A_1_3, division2_replicate_2_4_A_1_4, division2_replicate_2_4_A_1_5, division2_replicate_2_4_A_2_3, division2_replicate_2_4_A_2_5, division2_replicate_2_4_A_3_3, division2_replicate_2_4_A_3_4, division2_replicate_2_4_A_3_5, division2_replicate_2_4_B_1_3, division2_replicate_2_4_B_1_4, division2_replicate_2_4_B_1_5, division2_replicate_2_4_B_2_3, division2_replicate_2_4_B_2_5, division2_replicate_2_4_B_3_3, division2_replicate_2_4_B_3_4, division2_replicate_2_4_B_3_5, division2_replicate_2_5_A_1_4, division2_replicate_2_5_A_1_5, division2_replicate_2_5_A_3_4, division2_replicate_2_5_A_3_5, division2_replicate_2_5_B_1_4, division2_replicate_2_5_B_1_5, division2_replicate_2_5_B_3_4, division2_replicate_2_5_B_3_5, division2_replicate_3_1_A_2_1, division2_replicate_3_1_A_2_2, division2_replicate_3_1_A_4_1, division2_replicate_3_1_A_4_2, division2_replicate_3_1_B_2_1, division2_replicate_3_1_B_4_1, division2_replicate_3_1_B_4_2, division2_replicate_3_2_A_2_1, division2_replicate_3_2_A_2_2, division2_replicate_3_2_A_2_3, division2_replicate_3_2_A_3_1, division2_replicate_3_2_A_3_3, division2_replicate_3_2_A_4_1, division2_replicate_3_2_A_4_2, division2_replicate_3_2_A_4_3, division2_replicate_3_2_B_2_1, division2_replicate_3_2_B_2_3, division2_replicate_3_2_B_3_1, division2_replicate_3_2_B_3_3, division2_replicate_3_2_B_4_1, division2_replicate_3_2_B_4_2, division2_replicate_3_2_B_4_3, division2_replicate_3_3_A_2_2, division2_replicate_3_3_A_2_3, division2_replicate_3_3_A_2_4, division2_replicate_3_3_A_3_2, division2_replicate_3_3_A_3_4, division2_replicate_3_3_A_4_2, division2_replicate_3_3_A_4_3, division2_replicate_3_3_A_4_4, division2_replicate_3_3_B_2_3, division2_replicate_3_3_B_2_4, division2_replicate_3_3_B_3_2, division2_replicate_3_3_B_3_4, division2_replicate_3_3_B_4_2, division2_replicate_3_3_B_4_3, division2_replicate_3_3_B_4_4, division2_replicate_3_4_A_2_3, division2_replicate_3_4_A_2_4, division2_replicate_3_4_A_2_5, division2_replicate_3_4_A_3_3, division2_replicate_3_4_A_3_5, division2_replicate_3_4_A_4_3, division2_replicate_3_4_A_4_4, division2_replicate_3_4_A_4_5, division2_replicate_3_4_B_2_3, division2_replicate_3_4_B_2_4, division2_replicate_3_4_B_2_5, division2_replicate_3_4_B_3_3, division2_replicate_3_4_B_3_5, division2_replicate_3_4_B_4_3, division2_replicate_3_4_B_4_4, division2_replicate_3_4_B_4_5, division2_replicate_3_5_A_2_4, division2_replicate_3_5_A_2_5, division2_replicate_3_5_A_4_4, division2_replicate_3_5_A_4_5, division2_replicate_3_5_B_2_4, division2_replicate_3_5_B_2_5, division2_replicate_3_5_B_4_4, division2_replicate_3_5_B_4_5, division2_replicate_4_1_A_3_1, division2_replicate_4_1_A_3_2, division2_replicate_4_1_A_5_1, division2_replicate_4_1_A_5_2, division2_replicate_4_1_B_3_1, division2_replicate_4_1_B_3_2, division2_replicate_4_1_B_5_1, division2_replicate_4_1_B_5_2, division2_replicate_4_2_A_3_1, division2_replicate_4_2_A_3_2, division2_replicate_4_2_A_3_3, division2_replicate_4_2_A_4_1, division2_replicate_4_2_A_4_3, division2_replicate_4_2_A_5_1, division2_replicate_4_2_A_5_2, division2_replicate_4_2_A_5_3, division2_replicate_4_2_B_3_1, division2_replicate_4_2_B_3_2, division2_replicate_4_2_B_3_3, division2_replicate_4_2_B_4_1, division2_replicate_4_2_B_4_3, division2_replicate_4_2_B_5_1, division2_replicate_4_2_B_5_2, division2_replicate_4_2_B_5_3, division2_replicate_4_3_A_3_2, division2_replicate_4_3_A_3_3, division2_replicate_4_3_A_3_4, division2_replicate_4_3_A_4_2, division2_replicate_4_3_A_4_4, division2_replicate_4_3_A_5_2, division2_replicate_4_3_A_5_3, division2_replicate_4_3_A_5_4, division2_replicate_4_3_B_3_2, division2_replicate_4_3_B_3_3, division2_replicate_4_3_B_3_4, division2_replicate_4_3_B_4_2, division2_replicate_4_3_B_4_4, division2_replicate_4_3_B_5_2, division2_replicate_4_3_B_5_3, division2_replicate_4_3_B_5_4, division2_replicate_4_4_A_3_3, division2_replicate_4_4_A_3_4, division2_replicate_4_4_A_3_5, division2_replicate_4_4_A_4_3, division2_replicate_4_4_A_4_5, division2_replicate_4_4_A_5_3, division2_replicate_4_4_A_5_4, division2_replicate_4_4_A_5_5, division2_replicate_4_4_B_3_3, division2_replicate_4_4_B_3_4, division2_replicate_4_4_B_3_5, division2_replicate_4_4_B_4_3, division2_replicate_4_4_B_4_5, division2_replicate_4_4_B_5_3, division2_replicate_4_4_B_5_4, division2_replicate_4_4_B_5_5, division2_replicate_4_5_A_3_4, division2_replicate_4_5_A_3_5, division2_replicate_4_5_A_5_4, division2_replicate_4_5_A_5_5, division2_replicate_4_5_B_3_4, division2_replicate_4_5_B_3_5, division2_replicate_4_5_B_5_4, division2_replicate_4_5_B_5_5, division2_replicate_5_2_A_4_1, division2_replicate_5_2_A_4_3, division2_replicate_5_2_A_5_1, division2_replicate_5_2_A_5_3, division2_replicate_5_2_B_4_1, division2_replicate_5_2_B_4_3, division2_replicate_5_2_B_5_1, division2_replicate_5_2_B_5_3, division2_replicate_5_3_A_4_2, division2_replicate_5_3_A_4_4, division2_replicate_5_3_A_5_2, division2_replicate_5_3_A_5_4, division2_replicate_5_3_B_4_2, division2_replicate_5_3_B_4_4, division2_replicate_5_3_B_5_2, division2_replicate_5_3_B_5_4, division2_replicate_5_4_A_4_3, division2_replicate_5_4_A_4_5, division2_replicate_5_4_A_5_3, division2_replicate_5_4_A_5_5, division2_replicate_5_4_B_4_3, division2_replicate_5_4_B_4_5, division2_replicate_5_4_B_5_3, division2_replicate_5_4_B_5_5, Intersection with reachable at each step enabled. (destroyed/reverse/intersect/total) :148/123/406/677
Computing Next relation with stutter on 2.38171e+11 deadlock states
2 unique states visited
2 strongly connected components in search stack
2 transitions explored
2 items max in DFS search stack
1803 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,18.2698,326560,1,0,504027,2143,5620,1.16387e+06,135,11545,665007
an accepting run exists (use option '-e' to print it)
Formula 0 is FALSE accepting run found.
FORMULA PhaseVariation-PT-D05CS010-LTLFireability-00 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 1 : !((G(G((F("(((i4.u23.pool__5_4_>=1)&&(i4.u19.cell___4_5__A_>=1))&&(i0.u25.run_dot>=1))"))U("(((i0.u8.pool__1_3_>=1)&&(i0.u11.cell___2_2__B_>=1))&&(i0.u25.run_dot>=1))")))))
Formula 1 simplified : !G(F"(((i4.u23.pool__5_4_>=1)&&(i4.u19.cell___4_5__A_>=1))&&(i0.u25.run_dot>=1))" U "(((i0.u8.pool__1_3_>=1)&&(i0.u11.cell___2_2__B_>=1))&&(i0.u25.run_dot>=1))")
Computing Next relation with stutter on 2.38171e+11 deadlock states
28 unique states visited
28 strongly connected components in search stack
29 transitions explored
28 items max in DFS search stack
673 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,24.9922,426952,1,0,659771,2352,5700,1.51061e+06,137,12301,890799
an accepting run exists (use option '-e' to print it)
Formula 1 is FALSE accepting run found.
FORMULA PhaseVariation-PT-D05CS010-LTLFireability-01 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 2 : !((X(F(X(X(X("(((i0.u1.pool__2_3_>=1)&&(u3.cell___3_3__B_>=1))&&(i0.u25.run_dot>=1))")))))))
Formula 2 simplified : !XFXXX"(((i0.u1.pool__2_3_>=1)&&(u3.cell___3_3__B_>=1))&&(i0.u25.run_dot>=1))"
Computing Next relation with stutter on 2.38171e+11 deadlock states
6 unique states visited
6 strongly connected components in search stack
6 transitions explored
6 items max in DFS search stack
566 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,30.6646,529860,1,0,824534,2522,5716,1.83744e+06,137,12869,1111900
an accepting run exists (use option '-e' to print it)
Formula 2 is FALSE accepting run found.
FORMULA PhaseVariation-PT-D05CS010-LTLFireability-02 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 3 : !(((F("(((i6.u18.pool__4_3_>=1)&&(u3.cell___3_3__B_>=1))&&(i0.u25.run_dot>=1))"))U((X("(((i1.u12.pool__2_4_>=1)&&(i0.u8.cell___1_3__B_>=1))&&(i0.u25.run_dot>=1))"))U(X("(((i2.u14.pool__3_1_>=1)&&(i0.u11.cell___2_2__B_>=1))&&(i0.u25.run_dot>=1))")))))
Formula 3 simplified : !(F"(((i6.u18.pool__4_3_>=1)&&(u3.cell___3_3__B_>=1))&&(i0.u25.run_dot>=1))" U (X"(((i1.u12.pool__2_4_>=1)&&(i0.u8.cell___1_3__B_>=1))&&(i0.u25.run_dot>=1))" U X"(((i2.u14.pool__3_1_>=1)&&(i0.u11.cell___2_2__B_>=1))&&(i0.u25.run_dot>=1))"))
Computing Next relation with stutter on 2.38171e+11 deadlock states
4 unique states visited
4 strongly connected components in search stack
4 transitions explored
4 items max in DFS search stack
774 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,38.4071,649088,1,0,1.00266e+06,2537,5754,2.22963e+06,137,12945,1373400
an accepting run exists (use option '-e' to print it)
Formula 3 is FALSE accepting run found.
FORMULA PhaseVariation-PT-D05CS010-LTLFireability-03 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 4 : !(((F(X(F("(((i4.u5.pool__4_4_>=1)&&(i4.u5.cell___4_4__A_>=1))&&(i0.u25.run_dot>=1))"))))U((X("(((i0.u11.pool__2_2_>=1)&&(i0.u11.cell___2_2__B_>=1))&&(i0.u25.run_dot>=1))"))U("(((i3.u15.pool__3_4_>=1)&&(u3.cell___3_3__B_>=1))&&(i0.u25.run_dot>=1))"))))
Formula 4 simplified : !(FXF"(((i4.u5.pool__4_4_>=1)&&(i4.u5.cell___4_4__A_>=1))&&(i0.u25.run_dot>=1))" U (X"(((i0.u11.pool__2_2_>=1)&&(i0.u11.cell___2_2__B_>=1))&&(i0.u25.run_dot>=1))" U "(((i3.u15.pool__3_4_>=1)&&(u3.cell___3_3__B_>=1))&&(i0.u25.run_dot>=1))"))
Computing Next relation with stutter on 2.38171e+11 deadlock states
26 unique states visited
26 strongly connected components in search stack
26 transitions explored
26 items max in DFS search stack
314 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,41.555,710296,1,0,1.1139e+06,2826,5764,2.40722e+06,137,13650,1520790
an accepting run exists (use option '-e' to print it)
Formula 4 is FALSE accepting run found.
FORMULA PhaseVariation-PT-D05CS010-LTLFireability-04 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 5 : !((G(X(F(("(((i0.u1.pool__2_3_>=1)&&(u3.cell___3_3__A_>=1))&&(i0.u25.run_dot>=1))")U("(((i1.u13.pool__2_5_>=1)&&(i3.u16.cell___3_5__A_>=1))&&(i0.u25.run_dot>=1))"))))))
Formula 5 simplified : !GXF("(((i0.u1.pool__2_3_>=1)&&(u3.cell___3_3__A_>=1))&&(i0.u25.run_dot>=1))" U "(((i1.u13.pool__2_5_>=1)&&(i3.u16.cell___3_5__A_>=1))&&(i0.u25.run_dot>=1))")
Computing Next relation with stutter on 2.38171e+11 deadlock states
28 unique states visited
28 strongly connected components in search stack
29 transitions explored
28 items max in DFS search stack
0 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,41.5578,710552,1,0,1.1139e+06,2826,5777,2.40722e+06,137,13650,1521243
an accepting run exists (use option '-e' to print it)
Formula 5 is FALSE accepting run found.
FORMULA PhaseVariation-PT-D05CS010-LTLFireability-05 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 6 : !((F(X(G(F(X("(((i4.u23.pool__5_4_>=1)&&(i4.u23.cell___5_4__A_>=1))&&(i0.u25.run_dot>=1))")))))))
Formula 6 simplified : !FXGFX"(((i4.u23.pool__5_4_>=1)&&(i4.u23.cell___5_4__A_>=1))&&(i0.u25.run_dot>=1))"
Computing Next relation with stutter on 2.38171e+11 deadlock states
28 unique states visited
28 strongly connected components in search stack
29 transitions explored
28 items max in DFS search stack
2 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,41.5701,710792,1,0,1.11418e+06,2826,5793,2.40776e+06,139,13650,1522007
an accepting run exists (use option '-e' to print it)
Formula 6 is FALSE accepting run found.
FORMULA PhaseVariation-PT-D05CS010-LTLFireability-06 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 7 : !((F(G(("(((i1.u12.pool__2_4_>=1)&&(i1.u12.cell___2_4__A_>=1))&&(i0.u25.run_dot>=1))")U(X("(((i1.u12.pool__2_4_>=1)&&(i0.u1.cell___2_3__B_>=1))&&(i0.u25.run_dot>=1))"))))))
Formula 7 simplified : !FG("(((i1.u12.pool__2_4_>=1)&&(i1.u12.cell___2_4__A_>=1))&&(i0.u25.run_dot>=1))" U X"(((i1.u12.pool__2_4_>=1)&&(i0.u1.cell___2_3__B_>=1))&&(i0.u25.run_dot>=1))")
Computing Next relation with stutter on 2.38171e+11 deadlock states
27 unique states visited
26 strongly connected components in search stack
28 transitions explored
27 items max in DFS search stack
608 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,47.6532,792236,1,0,1.21272e+06,3105,5816,2.78825e+06,139,14522,1660019
an accepting run exists (use option '-e' to print it)
Formula 7 is FALSE accepting run found.
FORMULA PhaseVariation-PT-D05CS010-LTLFireability-07 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 8 : !(((X(F("(((i0.u11.pool__2_2_>=1)&&(i0.u8.cell___1_3__B_>=1))&&(i0.u25.run_dot>=1))")))U(G(G(X("(((i4.u5.pool__4_4_>=1)&&(i3.u15.cell___3_4__A_>=1))&&(i0.u25.run_dot>=1))"))))))
Formula 8 simplified : !(XF"(((i0.u11.pool__2_2_>=1)&&(i0.u8.cell___1_3__B_>=1))&&(i0.u25.run_dot>=1))" U GX"(((i4.u5.pool__4_4_>=1)&&(i3.u15.cell___3_4__A_>=1))&&(i0.u25.run_dot>=1))")
Computing Next relation with stutter on 2.38171e+11 deadlock states
29 unique states visited
29 strongly connected components in search stack
30 transitions explored
29 items max in DFS search stack
1 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,47.6632,792632,1,0,1.2128e+06,3105,5848,2.78828e+06,139,14522,1660790
an accepting run exists (use option '-e' to print it)
Formula 8 is FALSE accepting run found.
FORMULA PhaseVariation-PT-D05CS010-LTLFireability-08 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 9 : !((G(G("(((u3.pool__3_3_>=1)&&(i4.u5.cell___4_4__B_>=1))&&(i0.u25.run_dot>=1))"))))
Formula 9 simplified : !G"(((u3.pool__3_3_>=1)&&(i4.u5.cell___4_4__B_>=1))&&(i0.u25.run_dot>=1))"
Computing Next relation with stutter on 2.38171e+11 deadlock states
3 unique states visited
3 strongly connected components in search stack
3 transitions explored
3 items max in DFS search stack
1 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,47.6654,792632,1,0,1.2128e+06,3105,5865,2.78828e+06,139,14522,1660805
an accepting run exists (use option '-e' to print it)
Formula 9 is FALSE accepting run found.
FORMULA PhaseVariation-PT-D05CS010-LTLFireability-09 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 10 : !(("(((i0.u1.pool__2_3_>=1)&&(i1.u12.cell___2_4__A_>=1))&&(i0.u25.run_dot>=1))"))
Formula 10 simplified : !"(((i0.u1.pool__2_3_>=1)&&(i1.u12.cell___2_4__A_>=1))&&(i0.u25.run_dot>=1))"
Computing Next relation with stutter on 2.38171e+11 deadlock states
3 unique states visited
3 strongly connected components in search stack
3 transitions explored
3 items max in DFS search stack
0 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,47.666,792632,1,0,1.2128e+06,3105,5871,2.78828e+06,139,14522,1660816
an accepting run exists (use option '-e' to print it)
Formula 10 is FALSE accepting run found.
FORMULA PhaseVariation-PT-D05CS010-LTLFireability-10 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 11 : !((F(F(X("(((i1.u12.pool__2_4_>=1)&&(i1.u0.cell___1_4__A_>=1))&&(i0.u25.run_dot>=1))")))))
Formula 11 simplified : !FX"(((i1.u12.pool__2_4_>=1)&&(i1.u0.cell___1_4__A_>=1))&&(i0.u25.run_dot>=1))"
Computing Next relation with stutter on 2.38171e+11 deadlock states
3 unique states visited
3 strongly connected components in search stack
3 transitions explored
3 items max in DFS search stack
605 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,53.7218,898760,1,0,1.39696e+06,3122,5885,2.99599e+06,139,14587,1891437
an accepting run exists (use option '-e' to print it)
Formula 11 is FALSE accepting run found.
FORMULA PhaseVariation-PT-D05CS010-LTLFireability-11 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 12 : !((G((("(((i0.u11.pool__2_2_>=1)&&(i0.u8.cell___1_3__A_>=1))&&(i0.u25.run_dot>=1))")U("(((i6.u18.pool__4_3_>=1)&&(i4.u5.cell___4_4__A_>=1))&&(i0.u25.run_dot>=1))"))U(G(X("(((i1.u9.pool__1_5_>=1)&&(i1.u0.cell___1_4__B_>=1))&&(i0.u25.run_dot>=1))"))))))
Formula 12 simplified : !G(("(((i0.u11.pool__2_2_>=1)&&(i0.u8.cell___1_3__A_>=1))&&(i0.u25.run_dot>=1))" U "(((i6.u18.pool__4_3_>=1)&&(i4.u5.cell___4_4__A_>=1))&&(i0.u25.run_dot>=1))") U GX"(((i1.u9.pool__1_5_>=1)&&(i1.u0.cell___1_4__B_>=1))&&(i0.u25.run_dot>=1))")
Computing Next relation with stutter on 2.38171e+11 deadlock states
29 unique states visited
29 strongly connected components in search stack
30 transitions explored
29 items max in DFS search stack
716 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,60.8913,992596,1,0,1.52167e+06,3131,5945,3.36974e+06,140,14665,2075440
an accepting run exists (use option '-e' to print it)
Formula 12 is FALSE accepting run found.
FORMULA PhaseVariation-PT-D05CS010-LTLFireability-12 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 13 : !(("(((i0.u8.pool__1_3_>=1)&&(i0.u1.cell___2_3__B_>=1))&&(i0.u25.run_dot>=1))"))
Formula 13 simplified : !"(((i0.u8.pool__1_3_>=1)&&(i0.u1.cell___2_3__B_>=1))&&(i0.u25.run_dot>=1))"
Computing Next relation with stutter on 2.38171e+11 deadlock states
3 unique states visited
3 strongly connected components in search stack
3 transitions explored
3 items max in DFS search stack
0 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,60.892,992596,1,0,1.52167e+06,3131,5956,3.36974e+06,140,14665,2075453
an accepting run exists (use option '-e' to print it)
Formula 13 is FALSE accepting run found.
FORMULA PhaseVariation-PT-D05CS010-LTLFireability-13 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 14 : !(((G("(((i6.u22.pool__5_3_>=1)&&(i6.u22.cell___5_3__B_>=1))&&(i0.u25.run_dot>=1))"))U(X(F("(((u3.pool__3_3_>=1)&&(i0.u11.cell___2_2__B_>=1))&&(i0.u25.run_dot>=1))")))))
Formula 14 simplified : !(G"(((i6.u22.pool__5_3_>=1)&&(i6.u22.cell___5_3__B_>=1))&&(i0.u25.run_dot>=1))" U XF"(((u3.pool__3_3_>=1)&&(i0.u11.cell___2_2__B_>=1))&&(i0.u25.run_dot>=1))")
Computing Next relation with stutter on 2.38171e+11 deadlock states
3 unique states visited
3 strongly connected components in search stack
3 transitions explored
3 items max in DFS search stack
6 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,60.9546,993908,1,0,1.5236e+06,3131,5968,3.36974e+06,140,14665,2089457
an accepting run exists (use option '-e' to print it)
Formula 14 is FALSE accepting run found.
FORMULA PhaseVariation-PT-D05CS010-LTLFireability-14 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 15 : !(("(((i1.u13.pool__2_5_>=1)&&(i3.u15.cell___3_4__B_>=1))&&(i0.u25.run_dot>=1))"))
Formula 15 simplified : !"(((i1.u13.pool__2_5_>=1)&&(i3.u15.cell___3_4__B_>=1))&&(i0.u25.run_dot>=1))"
Computing Next relation with stutter on 2.38171e+11 deadlock states
3 unique states visited
3 strongly connected components in search stack
3 transitions explored
3 items max in DFS search stack
0 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,60.9553,994172,1,0,1.5236e+06,3131,5974,3.36974e+06,140,14665,2089467
an accepting run exists (use option '-e' to print it)
Formula 15 is FALSE accepting run found.
FORMULA PhaseVariation-PT-D05CS010-LTLFireability-15 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O3, model.c], workingDir=/home/mcc/execution]
WARNING : LTS min runner thread was asked to interrupt. Dying gracefully.

BK_STOP 1527505301804

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution LTLFireability -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -louvain -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -consoleLog -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination LTLFireability -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -louvain -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
May 28, 2018 11:00:31 AM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, LTLFireability, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -louvain, -smt]
May 28, 2018 11:00:31 AM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
May 28, 2018 11:00:31 AM fr.lip6.move.gal.nupn.PTNetReader loadFromXML
INFO: Load time of PNML (sax parser for PT used): 136 ms
May 28, 2018 11:00:31 AM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 77 places.
May 28, 2018 11:00:31 AM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 677 transitions.
May 28, 2018 11:00:31 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.img.gal : 39 ms
May 28, 2018 11:00:31 AM fr.lip6.move.gal.application.MccTranslator applyOrder
INFO: Applying decomposition
May 28, 2018 11:00:31 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 183 ms
May 28, 2018 11:00:32 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 167 ms
Begin: Mon May 28 11:00:32 2018

Computation of communities with the Newman-Girvan Modularity quality function

level 0:
start computation: Mon May 28 11:00:32 2018
network size: 77 nodes, 978 links, 1352 weight
quality increased from -0.104478 to 0.142553
end computation: Mon May 28 11:00:32 2018
level 1:
start computation: Mon May 28 11:00:32 2018
network size: 26 nodes, 220 links, 1352 weight
quality increased from 0.142553 to 0.177218
end computation: Mon May 28 11:00:32 2018
level 2:
start computation: Mon May 28 11:00:32 2018
network size: 8 nodes, 48 links, 1352 weight
quality increased from 0.177218 to 0.177218
end computation: Mon May 28 11:00:32 2018
End: Mon May 28 11:00:32 2018
Total duration: 0 sec
0.177218
May 28, 2018 11:00:32 AM fr.lip6.move.gal.instantiate.CompositeBuilder decomposeWithOrder
INFO: Decomposing Gal with order
May 28, 2018 11:00:32 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 84 ms
May 28, 2018 11:00:32 AM fr.lip6.move.gal.instantiate.CompositeBuilder rewriteArraysToAllowPartition
INFO: Rewriting arrays to variables to allow decomposition.
May 28, 2018 11:00:33 AM fr.lip6.move.gal.instantiate.Instantiator fuseIsomorphicEffects
INFO: Removed a total of 1727 redundant transitions.
May 28, 2018 11:00:33 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/LTLFireability.pnml.gal : 14 ms
May 28, 2018 11:00:33 AM fr.lip6.move.serialization.SerializationUtil serializePropertiesForITSLTLTools
INFO: Time to serialize properties into /home/mcc/execution/LTLFireability.ltl : 1 ms
May 28, 2018 11:00:33 AM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 677 transitions.
May 28, 2018 11:00:33 AM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 26 place invariants in 28 ms
May 28, 2018 11:00:34 AM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 77 variables to be positive in 683 ms
May 28, 2018 11:00:34 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may disable matrix : 677 transitions.
May 28, 2018 11:00:34 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of disable matrix completed :0/677 took 1 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 28, 2018 11:00:34 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete disable matrix. took 104 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 28, 2018 11:00:34 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may enable matrix : 677 transitions.
May 28, 2018 11:00:34 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete enable matrix. took 33 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 28, 2018 11:00:37 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeCoEnablingMatrix
INFO: Computing symmetric co enabling matrix : 677 transitions.
May 28, 2018 11:00:38 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(0/677) took 142 ms. Total solver calls (SAT/UNSAT): 676(0/676)
May 28, 2018 11:00:41 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(18/677) took 3217 ms. Total solver calls (SAT/UNSAT): 12673(0/12673)
May 28, 2018 11:00:44 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(27/677) took 6262 ms. Total solver calls (SAT/UNSAT): 18550(0/18550)
May 28, 2018 11:00:47 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(29/677) took 9298 ms. Total solver calls (SAT/UNSAT): 19845(0/19845)
May 28, 2018 11:00:51 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(34/677) took 13477 ms. Total solver calls (SAT/UNSAT): 23065(0/23065)
May 28, 2018 11:00:54 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(37/677) took 16518 ms. Total solver calls (SAT/UNSAT): 24985(0/24985)
May 28, 2018 11:00:58 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(40/677) took 20295 ms. Total solver calls (SAT/UNSAT): 26896(0/26896)
May 28, 2018 11:01:03 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(45/677) took 25569 ms. Total solver calls (SAT/UNSAT): 30061(0/30061)
May 28, 2018 11:01:07 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(46/677) took 29629 ms. Total solver calls (SAT/UNSAT): 30691(0/30691)
May 28, 2018 11:01:11 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(49/677) took 33931 ms. Total solver calls (SAT/UNSAT): 32575(0/32575)
May 28, 2018 11:01:15 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(58/677) took 37036 ms. Total solver calls (SAT/UNSAT): 38173(0/38173)
May 28, 2018 11:01:18 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(81/677) took 40140 ms. Total solver calls (SAT/UNSAT): 52111(0/52111)
May 28, 2018 11:01:21 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(96/677) took 43593 ms. Total solver calls (SAT/UNSAT): 60916(0/60916)
May 28, 2018 11:01:28 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(98/677) took 50577 ms. Total solver calls (SAT/UNSAT): 62073(0/62073)
May 28, 2018 11:01:32 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(100/677) took 54037 ms. Total solver calls (SAT/UNSAT): 63226(538/62688)
May 28, 2018 11:01:35 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(101/677) took 57434 ms. Total solver calls (SAT/UNSAT): 63801(1075/62726)
May 28, 2018 11:01:39 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(102/677) took 61072 ms. Total solver calls (SAT/UNSAT): 64375(1593/62782)
Skipping mayMatrices nes/nds SMT solver raised an exception or timeout.
java.lang.RuntimeException: SMT solver raised an exception or timeout.
at fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver.computeCoEnablingMatrix(NecessaryEnablingsolver.java:480)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.printLabels(Gal2PinsTransformerNext.java:530)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.printDependencyMatrix(Gal2PinsTransformerNext.java:209)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.buildBodyFile(Gal2PinsTransformerNext.java:85)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.transform(Gal2PinsTransformerNext.java:830)
at fr.lip6.move.gal.application.LTSminRunner$1.run(LTSminRunner.java:71)
at java.lang.Thread.run(Thread.java:748)
May 28, 2018 11:01:41 AM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 68239ms conformant to PINS in folder :/home/mcc/execution

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="PhaseVariation-PT-D05CS010"
export BK_EXAMINATION="LTLFireability"
export BK_TOOL="itstoolsl"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

tar xzf /home/mcc/BenchKit/INPUTS/PhaseVariation-PT-D05CS010.tgz
mv PhaseVariation-PT-D05CS010 execution
cd execution
pwd
ls -lh

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3637"
echo " Executing tool itstoolsl"
echo " Input is PhaseVariation-PT-D05CS010, examination is LTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r261-csrt-152732586000176"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' LTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;