Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Waiting for the VM to be ready (probing ssh)
..................
/home/mcc/execution
total 2.2M
-rw-r--r-- 1 mcc users 90K May 15 18:54 CTLCardinality.txt
-rw-r--r-- 1 mcc users 242K May 15 18:54 CTLCardinality.xml
-rw-r--r-- 1 mcc users 63K May 15 18:54 CTLFireability.txt
-rw-r--r-- 1 mcc users 204K May 15 18:54 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K May 15 18:50 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.0K May 15 18:50 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 25K May 26 09:26 LTLCardinality.txt
-rw-r--r-- 1 mcc users 69K May 26 09:26 LTLCardinality.xml
-rw-r--r-- 1 mcc users 23K May 26 09:26 LTLFireability.txt
-rw-r--r-- 1 mcc users 76K May 26 09:26 LTLFireability.xml
-rw-r--r-- 1 mcc users 34K May 15 18:54 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 97K May 15 18:54 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 104 May 15 18:54 ReachabilityDeadlock.txt
-rw-r--r-- 1 mcc users 342 May 15 18:54 ReachabilityDeadlock.xml
-rw-r--r-- 1 mcc users 69K May 15 18:54 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 230K May 15 18:54 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 9.5K May 15 18:54 UpperBounds.txt
-rw-r--r-- 1 mcc users 21K May 15 18:54 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 May 15 18:50 equiv_col
-rw-r--r-- 1 mcc users 2 May 15 18:50 instance
-rw-r--r-- 1 mcc users 6 May 15 18:50 iscolored
-rw-r--r-- 1 mcc users 911K May 15 18:50 model.pnml
=====================================================================
Generated by BenchKit 2-3637
Executing tool itstoolsl
Input is Peterson-PT-5, examination is LTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r261-csrt-152732586000166
=====================================================================

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME Peterson-PT-5-LTLFireability-00
FORMULA_NAME Peterson-PT-5-LTLFireability-01
FORMULA_NAME Peterson-PT-5-LTLFireability-02
FORMULA_NAME Peterson-PT-5-LTLFireability-03
FORMULA_NAME Peterson-PT-5-LTLFireability-04
FORMULA_NAME Peterson-PT-5-LTLFireability-05
FORMULA_NAME Peterson-PT-5-LTLFireability-06
FORMULA_NAME Peterson-PT-5-LTLFireability-07
FORMULA_NAME Peterson-PT-5-LTLFireability-08
FORMULA_NAME Peterson-PT-5-LTLFireability-09
FORMULA_NAME Peterson-PT-5-LTLFireability-10
FORMULA_NAME Peterson-PT-5-LTLFireability-11
FORMULA_NAME Peterson-PT-5-LTLFireability-12
FORMULA_NAME Peterson-PT-5-LTLFireability-13
FORMULA_NAME Peterson-PT-5-LTLFireability-14
FORMULA_NAME Peterson-PT-5-LTLFireability-15

=== Now, execution of the tool begins

BK_START 1527504791909

Converted graph to binary with : CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.louvain.binaries_1.0.0.201805241334/bin/convert-linux64, -i, /tmp/graph6980884943862980568.txt, -o, /tmp/graph6980884943862980568.bin, -w, /tmp/graph6980884943862980568.weights], workingDir=null]
Built communities with : CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.louvain.binaries_1.0.0.201805241334/bin/louvain-linux64, /tmp/graph6980884943862980568.bin, -l, -1, -v, -w, /tmp/graph6980884943862980568.weights, -q, 0, -e, 0.001], workingDir=null]
Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805241334/bin/its-ltl-linux64, --gc-threshold, 2000000, -i, /home/mcc/execution/LTLFireability.pnml.gal, -t, CGAL, -LTL, /home/mcc/execution/LTLFireability.ltl, -c, -stutter-deadlock], workingDir=/home/mcc/execution]

its-ltl command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805241334/bin/its-ltl-linux64 --gc-threshold 2000000 -i /home/mcc/execution/LTLFireability.pnml.gal -t CGAL -LTL /home/mcc/execution/LTLFireability.ltl -c -stutter-deadlock
Read 16 LTL properties
Checking formula 0 : !(((F(("((((((i8.u154.EndTurn_0_4>=1)||(i8.u36.EndTurn_2_4>=1))||(i8.u155.EndTurn_1_4>=1))||(i8.u156.EndTurn_4_4>=1))||(i8.u37.EndTurn_3_4>=1))||(i8.u33.EndTurn_5_4>=1))")U("((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((i5.u8.IsEndLoop_2_0_2>=1)||(i31.u56.IsEndLoop_1_0_2>=1))||(i30.u113.IsEndLoop_4_0_2>=1))||(i20.u12.IsEndLoop_3_0_2>=1))||(i31.u77.IsEndLoop_0_0_3>=1))||(i28.u57.IsEndLoop_5_0_2>=1))||(i5.u76.IsEndLoop_2_0_3>=1))||(i31.u75.IsEndLoop_1_0_3>=1))||(i30.u212.IsEndLoop_4_0_3>=1))||(i20.u12.IsEndLoop_3_0_3>=1))||(i31.u88.IsEndLoop_0_0_4>=1))||(i28.u109.IsEndLoop_5_0_3>=1))||(i5.u131.IsEndLoop_2_0_4>=1))||(i31.u132.IsEndLoop_1_0_4>=1))||(i30.u212.IsEndLoop_4_0_4>=1))||(i20.u85.IsEndLoop_3_0_4>=1))||(i0.u0.IsEndLoop_0_0_0>=1))||(i25.u3.IsEndLoop_1_0_0>=1))||(i5.u47.IsEndLoop_2_0_0>=1))||(i25.u46.IsEndLoop_3_0_0>=1))||(i30.u139.IsEndLoop_4_0_0>=1))||(i28.u99.IsEndLoop_5_0_0>=1))||(i0.u185.IsEndLoop_0_0_1>=1))||(i25.u187.IsEndLoop_1_0_1>=1))||(i5.u8.IsEndLoop_2_0_1>=1))||(i25.u49.IsEndLoop_3_0_1>=1))||(i30.u106.IsEndLoop_4_0_1>=1))||(i28.u184.IsEndLoop_5_0_1>=1))||(i31.u173.IsEndLoop_0_0_2>=1))||(i20.u204.IsEndLoop_5_2_4>=1))||(i13.u53.IsEndLoop_0_3_0>=1))||(i3.u5.IsEndLoop_1_3_0>=1))||(i25.u52.IsEndLoop_2_3_0>=1))||(i2.u199.IsEndLoop_1_2_4>=1))||(i27.u198.IsEndLoop_2_2_4>=1))||(i20.u81.IsEndLoop_3_2_4>=1))||(i15.u15.IsEndLoop_4_2_4>=1))||(i31.u13.IsEndLoop_3_2_3>=1))||(i15.u15.IsEndLoop_4_2_3>=1))||(i20.u69.IsEndLoop_5_2_3>=1))||(i20.u196.IsEndLoop_0_2_4>=1))||(i20.u179.IsEndLoop_5_2_2>=1))||(i11.u208.IsEndLoop_0_2_3>=1))||(i2.u70.IsEndLoop_1_2_3>=1))||(i27.u210.IsEndLoop_2_2_3>=1))||(i27.u9.IsEndLoop_2_2_2>=1))||(i2.u112.IsEndLoop_1_2_2>=1))||(i15.u181.IsEndLoop_4_2_2>=1))||(i31.u13.IsEndLoop_3_2_2>=1))||(i15.u103.IsEndLoop_4_2_1>=1))||(i25.u192.IsEndLoop_3_2_1>=1))||(i11.u168.IsEndLoop_0_2_2>=1))||(i25.u104.IsEndLoop_5_2_1>=1))||(i11.u195.IsEndLoop_0_2_1>=1))||(i25.u97.IsEndLoop_5_2_0>=1))||(i27.u9.IsEndLoop_2_2_1>=1))||(i2.u4.IsEndLoop_1_2_1>=1))||(i27.u96.IsEndLoop_2_2_0>=1))||(i2.u4.IsEndLoop_1_2_0>=1))||(i15.u147.IsEndLoop_4_2_0>=1))||(i25.u148.IsEndLoop_3_2_0>=1))||(i24.u197.IsEndLoop_5_1_4>=1))||(i11.u45.IsEndLoop_0_2_0>=1))||(i10.u135.IsEndLoop_3_1_4>=1))||(i29.u207.IsEndLoop_4_1_4>=1))||(i9.u134.IsEndLoop_1_1_4>=1))||(i22.u133.IsEndLoop_2_1_4>=1))||(i24.u209.IsEndLoop_5_1_3>=1))||(i1.u79.IsEndLoop_0_1_4>=1))||(i10.u11.IsEndLoop_3_1_3>=1))||(i29.u207.IsEndLoop_4_1_3>=1))||(i9.u206.IsEndLoop_1_1_3>=1))||(i22.u67.IsEndLoop_2_1_3>=1))||(i24.u169.IsEndLoop_5_1_2>=1))||(i1.u110.IsEndLoop_0_1_3>=1))||(i10.u11.IsEndLoop_3_1_2>=1))||(i29.u60.IsEndLoop_4_1_2>=1))||(i22.u58.IsEndLoop_2_1_2>=1))||(i9.u59.IsEndLoop_1_1_2>=1))||(i1.u171.IsEndLoop_0_1_2>=1))||(i24.u194.IsEndLoop_5_1_1>=1))||(i29.u105.IsEndLoop_4_1_1>=1))||(i10.u182.IsEndLoop_3_1_1>=1))||(i22.u58.IsEndLoop_2_1_1>=1))||(i9.u140.IsEndLoop_1_1_1>=1))||(i1.u183.IsEndLoop_0_1_1>=1))||(i24.u144.IsEndLoop_5_1_0>=1))||(i29.u145.IsEndLoop_4_1_0>=1))||(i10.u146.IsEndLoop_3_1_0>=1))||(i22.u141.IsEndLoop_2_1_0>=1))||(i9.u140.IsEndLoop_1_1_0>=1))||(i18.u1.IsEndLoop_0_1_0>=1))||(i28.u200.IsEndLoop_5_0_4>=1))||(i4.u202.IsEndLoop_5_4_4>=1))||(i32.u87.IsEndLoop_3_4_3>=1))||(i31.u216.IsEndLoop_4_4_3>=1))||(i4.u217.IsEndLoop_5_4_3>=1))||(i21.u92.IsEndLoop_0_4_4>=1))||(i26.u95.IsEndLoop_1_4_4>=1))||(i19.u201.IsEndLoop_2_4_4>=1))||(i32.u121.IsEndLoop_3_4_4>=1))||(i31.u216.IsEndLoop_4_4_4>=1))||(i19.u10.IsEndLoop_2_4_2>=1))||(i26.u176.IsEndLoop_1_4_2>=1))||(i31.u175.IsEndLoop_4_4_2>=1))||(i32.u87.IsEndLoop_3_4_2>=1))||(i21.u130.IsEndLoop_0_4_3>=1))||(i4.u211.IsEndLoop_5_4_2>=1))||(i19.u214.IsEndLoop_2_4_3>=1))||(i26.u82.IsEndLoop_1_4_3>=1))||(i21.u188.IsEndLoop_0_4_1>=1))||(i25.u186.IsEndLoop_5_4_0>=1))||(i19.u63.IsEndLoop_2_4_1>=1))||(i26.u6.IsEndLoop_1_4_1>=1))||(i25.u65.IsEndLoop_4_4_1>=1))||(i32.u64.IsEndLoop_3_4_1>=1))||(i21.u177.IsEndLoop_0_4_2>=1))||(i25.u7.IsEndLoop_5_4_1>=1))||(i12.u20.IsEndLoop_5_3_4>=1))||(i21.u2.IsEndLoop_0_4_0>=1))||(i23.u114.IsEndLoop_3_3_4>=1))||(i16.u93.IsEndLoop_4_3_4>=1))||(i32.u107.IsEndLoop_3_4_0>=1))||(i25.u54.IsEndLoop_4_4_0>=1))||(i26.u6.IsEndLoop_1_4_0>=1))||(i19.u55.IsEndLoop_2_4_0>=1))||(i23.u14.IsEndLoop_3_3_3>=1))||(i16.u93.IsEndLoop_4_3_3>=1))||(i3.u83.IsEndLoop_1_3_3>=1))||(i14.u219.IsEndLoop_2_3_3>=1))||(i3.u203.IsEndLoop_1_3_4>=1))||(i14.u116.IsEndLoop_2_3_4>=1))||(i12.u129.IsEndLoop_5_3_3>=1))||(i17.u205.IsEndLoop_0_3_4>=1))||(i14.u74.IsEndLoop_2_3_2>=1))||(i3.u73.IsEndLoop_1_3_2>=1))||(i17.u180.IsEndLoop_0_3_2>=1))||(i12.u102.IsEndLoop_5_3_1>=1))||(i17.u68.IsEndLoop_0_3_3>=1))||(i12.u71.IsEndLoop_5_3_2>=1))||(i16.u72.IsEndLoop_4_3_2>=1))||(i23.u14.IsEndLoop_3_3_2>=1))||(i17.u193.IsEndLoop_0_3_1>=1))||(i12.u108.IsEndLoop_5_3_0>=1))||(i16.u150.IsEndLoop_4_3_0>=1))||(i23.u151.IsEndLoop_3_3_0>=1))||(i16.u191.IsEndLoop_4_3_1>=1))||(i23.u62.IsEndLoop_3_3_1>=1))||(i14.u74.IsEndLoop_2_3_1>=1))||(i3.u5.IsEndLoop_1_3_1>=1))")))U(F(G(X("(((((((i8.u154.CS_0>=1)&&(i6.u90.WantSection_0_T>=1))||((i8.u222.WantSection_2_T>=1)&&(i8.u36.CS_2>=1)))||((i8.u155.CS_1>=1)&&(i6.u89.WantSection_1_T>=1)))||((i8.u156.CS_4>=1)&&(i7.u91.WantSection_4_T>=1)))||((i8.u37.CS_3>=1)&&(i6.u221.WantSection_3_T>=1)))||((i8.u33.CS_5>=1)&&(i8.u220.WantSection_5_T>=1)))"))))))
Formula 0 simplified : !(F("((((((i8.u154.EndTurn_0_4>=1)||(i8.u36.EndTurn_2_4>=1))||(i8.u155.EndTurn_1_4>=1))||(i8.u156.EndTurn_4_4>=1))||(i8.u37.EndTurn_3_4>=1))||(i8.u33.EndTurn_5_4>=1))" U "((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((i5.u8.IsEndLoop_2_0_2>=1)||(i31.u56.IsEndLoop_1_0_2>=1))||(i30.u113.IsEndLoop_4_0_2>=1))||(i20.u12.IsEndLoop_3_0_2>=1))||(i31.u77.IsEndLoop_0_0_3>=1))||(i28.u57.IsEndLoop_5_0_2>=1))||(i5.u76.IsEndLoop_2_0_3>=1))||(i31.u75.IsEndLoop_1_0_3>=1))||(i30.u212.IsEndLoop_4_0_3>=1))||(i20.u12.IsEndLoop_3_0_3>=1))||(i31.u88.IsEndLoop_0_0_4>=1))||(i28.u109.IsEndLoop_5_0_3>=1))||(i5.u131.IsEndLoop_2_0_4>=1))||(i31.u132.IsEndLoop_1_0_4>=1))||(i30.u212.IsEndLoop_4_0_4>=1))||(i20.u85.IsEndLoop_3_0_4>=1))||(i0.u0.IsEndLoop_0_0_0>=1))||(i25.u3.IsEndLoop_1_0_0>=1))||(i5.u47.IsEndLoop_2_0_0>=1))||(i25.u46.IsEndLoop_3_0_0>=1))||(i30.u139.IsEndLoop_4_0_0>=1))||(i28.u99.IsEndLoop_5_0_0>=1))||(i0.u185.IsEndLoop_0_0_1>=1))||(i25.u187.IsEndLoop_1_0_1>=1))||(i5.u8.IsEndLoop_2_0_1>=1))||(i25.u49.IsEndLoop_3_0_1>=1))||(i30.u106.IsEndLoop_4_0_1>=1))||(i28.u184.IsEndLoop_5_0_1>=1))||(i31.u173.IsEndLoop_0_0_2>=1))||(i20.u204.IsEndLoop_5_2_4>=1))||(i13.u53.IsEndLoop_0_3_0>=1))||(i3.u5.IsEndLoop_1_3_0>=1))||(i25.u52.IsEndLoop_2_3_0>=1))||(i2.u199.IsEndLoop_1_2_4>=1))||(i27.u198.IsEndLoop_2_2_4>=1))||(i20.u81.IsEndLoop_3_2_4>=1))||(i15.u15.IsEndLoop_4_2_4>=1))||(i31.u13.IsEndLoop_3_2_3>=1))||(i15.u15.IsEndLoop_4_2_3>=1))||(i20.u69.IsEndLoop_5_2_3>=1))||(i20.u196.IsEndLoop_0_2_4>=1))||(i20.u179.IsEndLoop_5_2_2>=1))||(i11.u208.IsEndLoop_0_2_3>=1))||(i2.u70.IsEndLoop_1_2_3>=1))||(i27.u210.IsEndLoop_2_2_3>=1))||(i27.u9.IsEndLoop_2_2_2>=1))||(i2.u112.IsEndLoop_1_2_2>=1))||(i15.u181.IsEndLoop_4_2_2>=1))||(i31.u13.IsEndLoop_3_2_2>=1))||(i15.u103.IsEndLoop_4_2_1>=1))||(i25.u192.IsEndLoop_3_2_1>=1))||(i11.u168.IsEndLoop_0_2_2>=1))||(i25.u104.IsEndLoop_5_2_1>=1))||(i11.u195.IsEndLoop_0_2_1>=1))||(i25.u97.IsEndLoop_5_2_0>=1))||(i27.u9.IsEndLoop_2_2_1>=1))||(i2.u4.IsEndLoop_1_2_1>=1))||(i27.u96.IsEndLoop_2_2_0>=1))||(i2.u4.IsEndLoop_1_2_0>=1))||(i15.u147.IsEndLoop_4_2_0>=1))||(i25.u148.IsEndLoop_3_2_0>=1))||(i24.u197.IsEndLoop_5_1_4>=1))||(i11.u45.IsEndLoop_0_2_0>=1))||(i10.u135.IsEndLoop_3_1_4>=1))||(i29.u207.IsEndLoop_4_1_4>=1))||(i9.u134.IsEndLoop_1_1_4>=1))||(i22.u133.IsEndLoop_2_1_4>=1))||(i24.u209.IsEndLoop_5_1_3>=1))||(i1.u79.IsEndLoop_0_1_4>=1))||(i10.u11.IsEndLoop_3_1_3>=1))||(i29.u207.IsEndLoop_4_1_3>=1))||(i9.u206.IsEndLoop_1_1_3>=1))||(i22.u67.IsEndLoop_2_1_3>=1))||(i24.u169.IsEndLoop_5_1_2>=1))||(i1.u110.IsEndLoop_0_1_3>=1))||(i10.u11.IsEndLoop_3_1_2>=1))||(i29.u60.IsEndLoop_4_1_2>=1))||(i22.u58.IsEndLoop_2_1_2>=1))||(i9.u59.IsEndLoop_1_1_2>=1))||(i1.u171.IsEndLoop_0_1_2>=1))||(i24.u194.IsEndLoop_5_1_1>=1))||(i29.u105.IsEndLoop_4_1_1>=1))||(i10.u182.IsEndLoop_3_1_1>=1))||(i22.u58.IsEndLoop_2_1_1>=1))||(i9.u140.IsEndLoop_1_1_1>=1))||(i1.u183.IsEndLoop_0_1_1>=1))||(i24.u144.IsEndLoop_5_1_0>=1))||(i29.u145.IsEndLoop_4_1_0>=1))||(i10.u146.IsEndLoop_3_1_0>=1))||(i22.u141.IsEndLoop_2_1_0>=1))||(i9.u140.IsEndLoop_1_1_0>=1))||(i18.u1.IsEndLoop_0_1_0>=1))||(i28.u200.IsEndLoop_5_0_4>=1))||(i4.u202.IsEndLoop_5_4_4>=1))||(i32.u87.IsEndLoop_3_4_3>=1))||(i31.u216.IsEndLoop_4_4_3>=1))||(i4.u217.IsEndLoop_5_4_3>=1))||(i21.u92.IsEndLoop_0_4_4>=1))||(i26.u95.IsEndLoop_1_4_4>=1))||(i19.u201.IsEndLoop_2_4_4>=1))||(i32.u121.IsEndLoop_3_4_4>=1))||(i31.u216.IsEndLoop_4_4_4>=1))||(i19.u10.IsEndLoop_2_4_2>=1))||(i26.u176.IsEndLoop_1_4_2>=1))||(i31.u175.IsEndLoop_4_4_2>=1))||(i32.u87.IsEndLoop_3_4_2>=1))||(i21.u130.IsEndLoop_0_4_3>=1))||(i4.u211.IsEndLoop_5_4_2>=1))||(i19.u214.IsEndLoop_2_4_3>=1))||(i26.u82.IsEndLoop_1_4_3>=1))||(i21.u188.IsEndLoop_0_4_1>=1))||(i25.u186.IsEndLoop_5_4_0>=1))||(i19.u63.IsEndLoop_2_4_1>=1))||(i26.u6.IsEndLoop_1_4_1>=1))||(i25.u65.IsEndLoop_4_4_1>=1))||(i32.u64.IsEndLoop_3_4_1>=1))||(i21.u177.IsEndLoop_0_4_2>=1))||(i25.u7.IsEndLoop_5_4_1>=1))||(i12.u20.IsEndLoop_5_3_4>=1))||(i21.u2.IsEndLoop_0_4_0>=1))||(i23.u114.IsEndLoop_3_3_4>=1))||(i16.u93.IsEndLoop_4_3_4>=1))||(i32.u107.IsEndLoop_3_4_0>=1))||(i25.u54.IsEndLoop_4_4_0>=1))||(i26.u6.IsEndLoop_1_4_0>=1))||(i19.u55.IsEndLoop_2_4_0>=1))||(i23.u14.IsEndLoop_3_3_3>=1))||(i16.u93.IsEndLoop_4_3_3>=1))||(i3.u83.IsEndLoop_1_3_3>=1))||(i14.u219.IsEndLoop_2_3_3>=1))||(i3.u203.IsEndLoop_1_3_4>=1))||(i14.u116.IsEndLoop_2_3_4>=1))||(i12.u129.IsEndLoop_5_3_3>=1))||(i17.u205.IsEndLoop_0_3_4>=1))||(i14.u74.IsEndLoop_2_3_2>=1))||(i3.u73.IsEndLoop_1_3_2>=1))||(i17.u180.IsEndLoop_0_3_2>=1))||(i12.u102.IsEndLoop_5_3_1>=1))||(i17.u68.IsEndLoop_0_3_3>=1))||(i12.u71.IsEndLoop_5_3_2>=1))||(i16.u72.IsEndLoop_4_3_2>=1))||(i23.u14.IsEndLoop_3_3_2>=1))||(i17.u193.IsEndLoop_0_3_1>=1))||(i12.u108.IsEndLoop_5_3_0>=1))||(i16.u150.IsEndLoop_4_3_0>=1))||(i23.u151.IsEndLoop_3_3_0>=1))||(i16.u191.IsEndLoop_4_3_1>=1))||(i23.u62.IsEndLoop_3_3_1>=1))||(i14.u74.IsEndLoop_2_3_1>=1))||(i3.u5.IsEndLoop_1_3_1>=1))") U FGX"(((((((i8.u154.CS_0>=1)&&(i6.u90.WantSection_0_T>=1))||((i8.u222.WantSection_2_T>=1)&&(i8.u36.CS_2>=1)))||((i8.u155.CS_1>=1)&&(i6.u89.WantSection_1_T>=1)))||((i8.u156.CS_4>=1)&&(i7.u91.WantSection_4_T>=1)))||((i8.u37.CS_3>=1)&&(i6.u221.WantSection_3_T>=1)))||((i8.u33.CS_5>=1)&&(i8.u220.WantSection_5_T>=1)))")
built 210 ordering constraints for composite.
built 7 ordering constraints for composite.
built 10 ordering constraints for composite.
built 10 ordering constraints for composite.
built 10 ordering constraints for composite.
built 9 ordering constraints for composite.
built 6 ordering constraints for composite.
built 141 ordering constraints for composite.
built 182 ordering constraints for composite.
built 181 ordering constraints for composite.
built 122 ordering constraints for composite.
built 11 ordering constraints for composite.
built 10 ordering constraints for composite.
built 10 ordering constraints for composite.
built 10 ordering constraints for composite.
built 121 ordering constraints for composite.
built 8 ordering constraints for composite.
built 10 ordering constraints for composite.
built 9 ordering constraints for composite.
built 10 ordering constraints for composite.
built 11 ordering constraints for composite.
built 41 ordering constraints for composite.
built 12 ordering constraints for composite.
built 75 ordering constraints for composite.
built 10 ordering constraints for composite.
built 10 ordering constraints for composite.
built 10 ordering constraints for composite.
built 10 ordering constraints for composite.
built 10 ordering constraints for composite.
built 10 ordering constraints for composite.
built 71 ordering constraints for composite.
built 10 ordering constraints for composite.
built 11 ordering constraints for composite.
built 10 ordering constraints for composite.
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
Normalized transition count is 1122
// Phase 1: matrix 1122 rows 834 cols
invariant :i6:u90:Idle_0 + -1'i25:u3:WantSection_0_F = 0
invariant :i8:u33:Turn_4_5 + i8:u36:Turn_4_2 + i8:u37:Turn_4_3 + i8:u154:Turn_4_0 + i8:u155:Turn_4_1 + i8:u156:Turn_4_4 = 1
invariant :i8:u220:WantSection_5_T + i8:u220:Idle_5 = 1
invariant :i7:u22:Turn_2_5 + i7:u24:Turn_2_2 + i7:u25:Turn_2_4 + i7:u122:Turn_2_0 + i7:u127:Turn_2_3 + i7:u128:Turn_2_1 = 1
invariant :i13:u21:Turn_3_3 + i13:u23:Turn_3_1 + i13:u125:Turn_3_2 + i13:u126:Turn_3_0 + i13:u152:Turn_3_4 + i13:u153:Turn_3_5 = 1
invariant :i0:u0:IsEndLoop_0_0_0 + i0:u0:BeginLoop_0_0_1 + i0:u34:BeginLoop_0_0_0 + i0:u34:TestIdentity_0_0_0 + i0:u137:TestAlone_0_0_1 + i0:u137:TestIdentity_0_0_1 + i0:u185:IsEndLoop_0_0_1 + i0:u185:BeginLoop_0_0_2 + i0:u185:TestAlone_0_0_2 + i0:u185:TestIdentity_0_0_2 + i1:u79:IsEndLoop_0_1_4 + i1:u79:BeginLoop_0_1_5 + i1:u79:TestAlone_0_1_5 + i1:u79:TestIdentity_0_1_5 + i1:u110:IsEndLoop_0_1_3 + i1:u110:BeginLoop_0_1_4 + i1:u110:TestAlone_0_1_4 + i1:u110:TestIdentity_0_1_4 + i1:u171:IsEndLoop_0_1_2 + i1:u171:BeginLoop_0_1_3 + i1:u171:TestAlone_0_1_3 + i1:u171:TestIdentity_0_1_3 + i1:u183:IsEndLoop_0_1_1 + i1:u183:BeginLoop_0_1_2 + i1:u183:TestAlone_0_1_2 + i1:u183:TestIdentity_0_1_2 + i6:u120:IsEndLoop_0_0_5 + i6:u120:EndTurn_0_0 + i6:u120:TestTurn_0_0 + i6:u120:AskForSection_0_0 + i7:u122:IsEndLoop_0_2_5 + i7:u122:EndTurn_0_2 + i7:u122:TestTurn_0_2 + i7:u122:AskForSection_0_2 + i8:u154:IsEndLoop_0_4_5 + i8:u154:EndTurn_0_4 + i8:u154:TestTurn_0_4 + i8:u154:CS_0 + i8:u154:AskForSection_0_4 + i11:u43:BeginLoop_0_2_0 + i11:u43:TestIdentity_0_2_0 + i11:u45:IsEndLoop_0_2_0 + i11:u45:BeginLoop_0_2_1 + i11:u143:TestAlone_0_2_1 + i11:u143:TestIdentity_0_2_1 + i11:u168:IsEndLoop_0_2_2 + i11:u168:BeginLoop_0_2_3 + i11:u168:TestAlone_0_2_3 + i11:u168:TestIdentity_0_2_3 + i11:u195:IsEndLoop_0_2_1 + i11:u195:BeginLoop_0_2_2 + i11:u195:TestAlone_0_2_2 + i11:u195:TestIdentity_0_2_2 + i11:u208:IsEndLoop_0_2_3 + i11:u208:BeginLoop_0_2_4 + i11:u208:TestAlone_0_2_4 + i11:u208:TestIdentity_0_2_4 + i13:u126:IsEndLoop_0_3_5 + i13:u126:EndTurn_0_3 + i13:u126:TestTurn_0_3 + i13:u126:AskForSection_0_3 + i13:u53:IsEndLoop_0_3_0 + i13:u53:BeginLoop_0_3_1 + i13:u98:TestAlone_0_3_1 + i13:u98:TestIdentity_0_3_1 + i13:u163:BeginLoop_0_3_0 + i13:u163:TestIdentity_0_3_0 + i17:u68:IsEndLoop_0_3_3 + i17:u68:BeginLoop_0_3_4 + i17:u68:TestAlone_0_3_4 + i17:u68:TestIdentity_0_3_4 + i17:u205:IsEndLoop_0_3_4 + i17:u205:BeginLoop_0_3_5 + i17:u205:TestAlone_0_3_5 + i17:u205:TestIdentity_0_3_5 + i17:u180:IsEndLoop_0_3_2 + i17:u180:BeginLoop_0_3_3 + i17:u180:TestAlone_0_3_3 + i17:u180:TestIdentity_0_3_3 + i17:u193:IsEndLoop_0_3_1 + i17:u193:BeginLoop_0_3_2 + i17:u193:TestAlone_0_3_2 + i17:u193:TestIdentity_0_3_2 + i18:u1:IsEndLoop_0_1_0 + i18:u1:BeginLoop_0_1_0 + i18:u1:TestIdentity_0_1_0 + i18:u142:BeginLoop_0_1_1 + i18:u142:TestAlone_0_1_1 + i18:u142:TestIdentity_0_1_1 + i18:u19:IsEndLoop_0_1_5 + i18:u19:EndTurn_0_1 + i18:u19:TestTurn_0_1 + i18:u19:AskForSection_0_1 + i20:u196:IsEndLoop_0_2_4 + i20:u196:BeginLoop_0_2_5 + i20:u196:TestAlone_0_2_5 + i20:u196:TestIdentity_0_2_5 + i21:u92:IsEndLoop_0_4_4 + i21:u92:BeginLoop_0_4_5 + i21:u92:TestAlone_0_4_5 + i21:u92:TestIdentity_0_4_5 + i21:u130:IsEndLoop_0_4_3 + i21:u130:BeginLoop_0_4_4 + i21:u130:TestAlone_0_4_4 + i21:u130:TestIdentity_0_4_4 + i21:u177:IsEndLoop_0_4_2 + i21:u177:BeginLoop_0_4_3 + i21:u177:TestAlone_0_4_3 + i21:u177:TestIdentity_0_4_3 + i21:u2:IsEndLoop_0_4_0 + i21:u2:BeginLoop_0_4_0 + i21:u2:TestIdentity_0_4_0 + i21:u149:BeginLoop_0_4_1 + i21:u149:TestAlone_0_4_1 + i21:u149:TestIdentity_0_4_1 + i21:u188:IsEndLoop_0_4_1 + i21:u188:BeginLoop_0_4_2 + i21:u188:TestAlone_0_4_2 + i21:u188:TestIdentity_0_4_2 + i25:u3:WantSection_0_F + i31:u173:IsEndLoop_0_0_2 + i31:u173:BeginLoop_0_0_3 + i31:u173:TestAlone_0_0_3 + i31:u173:TestIdentity_0_0_3 + i31:u77:IsEndLoop_0_0_3 + i31:u77:BeginLoop_0_0_4 + i31:u77:TestAlone_0_0_4 + i31:u77:TestIdentity_0_0_4 + i31:u88:IsEndLoop_0_0_4 + i31:u88:BeginLoop_0_0_5 + i31:u88:TestAlone_0_0_5 + i31:u88:TestIdentity_0_0_5 = 1
invariant :i18:u17:Turn_1_1 + i18:u19:Turn_1_0 + i18:u26:Turn_1_4 + i18:u27:Turn_1_3 + i18:u123:Turn_1_5 + i18:u124:Turn_1_2 = 1
invariant :i6:u221:WantSection_3_T + i31:u77:WantSection_3_F = 1
invariant :i6:u90:WantSection_0_T + i25:u3:WantSection_0_F = 1
invariant :i4:u202:IsEndLoop_5_4_4 + i4:u202:IsEndLoop_5_4_5 + i4:u202:BeginLoop_5_4_5 + i4:u202:TestIdentity_5_4_5 + i4:u211:IsEndLoop_5_4_2 + i4:u211:BeginLoop_5_4_3 + i4:u211:TestAlone_5_4_3 + i4:u211:TestIdentity_5_4_3 + i4:u217:IsEndLoop_5_4_3 + i4:u217:BeginLoop_5_4_4 + i4:u217:TestAlone_5_4_4 + i4:u217:TestIdentity_5_4_4 + i6:u18:EndTurn_5_0 + i6:u18:TestTurn_5_0 + i6:u18:AskForSection_5_0 + i6:u158:BeginLoop_5_0_0 + i6:u158:TestAlone_5_0_0 + i6:u158:TestIdentity_5_0_0 + i7:u22:EndTurn_5_2 + i7:u22:TestTurn_5_2 + i7:u22:AskForSection_5_2 + i7:u164:BeginLoop_5_2_0 + i7:u164:TestAlone_5_2_0 + i7:u164:TestIdentity_5_2_0 + i8:u33:EndTurn_5_4 + i8:u33:TestTurn_5_4 + i8:u33:AskForSection_5_4 + i8:u33:CS_5 + i8:u136:BeginLoop_5_4_0 + i8:u136:TestAlone_5_4_0 + i8:u136:TestIdentity_5_4_0 + i8:u220:Idle_5 + i12:u20:IsEndLoop_5_3_4 + i12:u20:IsEndLoop_5_3_5 + i12:u20:BeginLoop_5_3_5 + i12:u20:TestIdentity_5_3_5 + i12:u129:IsEndLoop_5_3_3 + i12:u129:BeginLoop_5_3_4 + i12:u129:TestAlone_5_3_4 + i12:u129:TestIdentity_5_3_4 + i12:u71:IsEndLoop_5_3_2 + i12:u71:BeginLoop_5_3_3 + i12:u71:TestAlone_5_3_3 + i12:u71:TestIdentity_5_3_3 + i12:u102:IsEndLoop_5_3_1 + i12:u102:BeginLoop_5_3_2 + i12:u102:TestAlone_5_3_2 + i12:u102:TestIdentity_5_3_2 + i12:u108:IsEndLoop_5_3_0 + i12:u108:BeginLoop_5_3_1 + i12:u108:TestAlone_5_3_1 + i12:u108:TestIdentity_5_3_1 + i13:u40:BeginLoop_5_3_0 + i13:u40:TestAlone_5_3_0 + i13:u40:TestIdentity_5_3_0 + i13:u153:EndTurn_5_3 + i13:u153:TestTurn_5_3 + i13:u153:AskForSection_5_3 + i18:u44:BeginLoop_5_1_0 + i18:u44:TestAlone_5_1_0 + i18:u44:TestIdentity_5_1_0 + i18:u123:EndTurn_5_1 + i18:u123:TestTurn_5_1 + i18:u123:AskForSection_5_1 + i20:u69:IsEndLoop_5_2_3 + i20:u69:BeginLoop_5_2_4 + i20:u69:TestAlone_5_2_4 + i20:u69:TestIdentity_5_2_4 + i20:u179:IsEndLoop_5_2_2 + i20:u179:BeginLoop_5_2_3 + i20:u179:TestAlone_5_2_3 + i20:u179:TestIdentity_5_2_3 + i20:u204:IsEndLoop_5_2_4 + i20:u204:IsEndLoop_5_2_5 + i20:u204:BeginLoop_5_2_5 + i20:u204:TestIdentity_5_2_5 + i24:u144:IsEndLoop_5_1_0 + i24:u144:BeginLoop_5_1_1 + i24:u144:TestAlone_5_1_1 + i24:u144:TestIdentity_5_1_1 + i24:u194:IsEndLoop_5_1_1 + i24:u194:BeginLoop_5_1_2 + i24:u194:TestAlone_5_1_2 + i24:u194:TestIdentity_5_1_2 + i24:u169:IsEndLoop_5_1_2 + i24:u169:BeginLoop_5_1_3 + i24:u169:TestAlone_5_1_3 + i24:u169:TestIdentity_5_1_3 + i24:u197:IsEndLoop_5_1_4 + i24:u197:IsEndLoop_5_1_5 + i24:u197:BeginLoop_5_1_5 + i24:u197:TestIdentity_5_1_5 + i24:u209:IsEndLoop_5_1_3 + i24:u209:BeginLoop_5_1_4 + i24:u209:TestAlone_5_1_4 + i24:u209:TestIdentity_5_1_4 + i25:u7:IsEndLoop_5_4_1 + i25:u7:BeginLoop_5_4_2 + i25:u101:TestAlone_5_4_2 + i25:u101:TestIdentity_5_4_2 + i25:u186:IsEndLoop_5_4_0 + i25:u186:BeginLoop_5_4_1 + i25:u186:TestAlone_5_4_1 + i25:u186:TestIdentity_5_4_1 + i25:u97:IsEndLoop_5_2_0 + i25:u97:BeginLoop_5_2_1 + i25:u97:TestAlone_5_2_1 + i25:u97:TestIdentity_5_2_1 + i25:u104:IsEndLoop_5_2_1 + i25:u104:BeginLoop_5_2_2 + i25:u104:TestAlone_5_2_2 + i25:u104:TestIdentity_5_2_2 + i28:u99:IsEndLoop_5_0_0 + i28:u99:BeginLoop_5_0_1 + i28:u99:TestAlone_5_0_1 + i28:u99:TestIdentity_5_0_1 + i28:u184:IsEndLoop_5_0_1 + i28:u184:BeginLoop_5_0_2 + i28:u184:TestAlone_5_0_2 + i28:u184:TestIdentity_5_0_2 + i28:u57:IsEndLoop_5_0_2 + i28:u57:BeginLoop_5_0_3 + i28:u57:TestAlone_5_0_3 + i28:u57:TestIdentity_5_0_3 + i28:u109:IsEndLoop_5_0_3 + i28:u109:BeginLoop_5_0_4 + i28:u109:TestAlone_5_0_4 + i28:u109:TestIdentity_5_0_4 + i28:u200:IsEndLoop_5_0_4 + i28:u200:IsEndLoop_5_0_5 + i28:u200:BeginLoop_5_0_5 + i28:u200:TestIdentity_5_0_5 = 1
invariant :i7:u91:Idle_4 + -1'i20:u85:WantSection_4_F = 0
invariant :i2:u4:IsEndLoop_1_2_0 + i2:u4:IsEndLoop_1_2_1 + i2:u4:BeginLoop_1_2_1 + i2:u4:TestIdentity_1_2_1 + i2:u51:BeginLoop_1_2_2 + i2:u51:TestAlone_1_2_2 + i2:u51:TestIdentity_1_2_2 + i2:u112:IsEndLoop_1_2_2 + i2:u112:BeginLoop_1_2_3 + i2:u112:TestAlone_1_2_3 + i2:u112:TestIdentity_1_2_3 + i2:u70:IsEndLoop_1_2_3 + i2:u70:BeginLoop_1_2_4 + i2:u70:TestAlone_1_2_4 + i2:u70:TestIdentity_1_2_4 + i2:u199:IsEndLoop_1_2_4 + i2:u199:BeginLoop_1_2_5 + i2:u199:TestAlone_1_2_5 + i2:u199:TestIdentity_1_2_5 + i3:u5:IsEndLoop_1_3_0 + i3:u5:IsEndLoop_1_3_1 + i3:u5:BeginLoop_1_3_1 + i3:u5:TestIdentity_1_3_1 + i3:u73:IsEndLoop_1_3_2 + i3:u73:BeginLoop_1_3_3 + i3:u73:TestAlone_1_3_3 + i3:u73:TestIdentity_1_3_3 + i3:u190:BeginLoop_1_3_2 + i3:u190:TestAlone_1_3_2 + i3:u190:TestIdentity_1_3_2 + i3:u83:IsEndLoop_1_3_3 + i3:u83:BeginLoop_1_3_4 + i3:u83:TestAlone_1_3_4 + i3:u83:TestIdentity_1_3_4 + i3:u203:IsEndLoop_1_3_4 + i3:u203:BeginLoop_1_3_5 + i3:u203:TestAlone_1_3_5 + i3:u203:TestIdentity_1_3_5 + i6:u35:BeginLoop_1_0_0 + i6:u35:TestAlone_1_0_0 + i6:u35:TestIdentity_1_0_0 + i6:u118:IsEndLoop_1_0_5 + i6:u118:EndTurn_1_0 + i6:u118:TestTurn_1_0 + i6:u118:AskForSection_1_0 + i7:u128:IsEndLoop_1_2_5 + i7:u128:EndTurn_1_2 + i7:u128:TestTurn_1_2 + i7:u128:AskForSection_1_2 + i7:u161:BeginLoop_1_2_0 + i7:u161:TestAlone_1_2_0 + i7:u161:TestIdentity_1_2_0 + i8:u39:BeginLoop_1_4_0 + i8:u39:TestAlone_1_4_0 + i8:u39:TestIdentity_1_4_0 + i8:u155:IsEndLoop_1_4_5 + i8:u155:EndTurn_1_4 + i8:u155:TestTurn_1_4 + i8:u155:AskForSection_1_4 + i8:u155:CS_1 + i9:u134:IsEndLoop_1_1_4 + i9:u134:BeginLoop_1_1_5 + i9:u134:TestAlone_1_1_5 + i9:u134:TestIdentity_1_1_5 + i9:u206:IsEndLoop_1_1_3 + i9:u206:BeginLoop_1_1_4 + i9:u206:TestAlone_1_1_4 + i9:u206:TestIdentity_1_1_4 + i9:u50:BeginLoop_1_1_2 + i9:u50:TestAlone_1_1_2 + i9:u50:TestIdentity_1_1_2 + i9:u59:IsEndLoop_1_1_2 + i9:u59:BeginLoop_1_1_3 + i9:u59:TestAlone_1_1_3 + i9:u59:TestIdentity_1_1_3 + i9:u140:IsEndLoop_1_1_0 + i9:u140:IsEndLoop_1_1_1 + i9:u140:BeginLoop_1_1_1 + i9:u140:TestIdentity_1_1_1 + i13:u23:IsEndLoop_1_3_5 + i13:u23:EndTurn_1_3 + i13:u23:TestTurn_1_3 + i13:u23:AskForSection_1_3 + i13:u166:BeginLoop_1_3_0 + i13:u166:TestAlone_1_3_0 + i13:u166:TestIdentity_1_3_0 + i18:u17:IsEndLoop_1_1_5 + i18:u17:EndTurn_1_1 + i18:u17:TestTurn_1_1 + i18:u17:AskForSection_1_1 + i18:u159:BeginLoop_1_1_0 + i18:u159:TestAlone_1_1_0 + i18:u159:TestIdentity_1_1_0 + i25:u7:WantSection_1_F + i25:u3:IsEndLoop_1_0_0 + i25:u187:IsEndLoop_1_0_1 + i25:u187:BeginLoop_1_0_1 + i25:u187:BeginLoop_1_0_2 + i25:u187:TestAlone_1_0_2 + i25:u187:TestIdentity_1_0_1 + i25:u187:TestIdentity_1_0_2 + i26:u82:IsEndLoop_1_4_3 + i26:u82:BeginLoop_1_4_4 + i26:u82:TestAlone_1_4_4 + i26:u82:TestIdentity_1_4_4 + i26:u95:IsEndLoop_1_4_4 + i26:u95:BeginLoop_1_4_5 + i26:u95:TestAlone_1_4_5 + i26:u95:TestIdentity_1_4_5 + i26:u6:IsEndLoop_1_4_0 + i26:u6:IsEndLoop_1_4_1 + i26:u6:BeginLoop_1_4_1 + i26:u6:TestIdentity_1_4_1 + i26:u176:IsEndLoop_1_4_2 + i26:u176:BeginLoop_1_4_3 + i26:u176:TestAlone_1_4_3 + i26:u176:TestIdentity_1_4_3 + i26:u189:BeginLoop_1_4_2 + i26:u189:TestAlone_1_4_2 + i26:u189:TestIdentity_1_4_2 + i31:u56:IsEndLoop_1_0_2 + i31:u56:BeginLoop_1_0_3 + i31:u56:TestAlone_1_0_3 + i31:u56:TestIdentity_1_0_3 + i31:u75:IsEndLoop_1_0_3 + i31:u75:BeginLoop_1_0_4 + i31:u75:TestAlone_1_0_4 + i31:u75:TestIdentity_1_0_4 + i31:u132:IsEndLoop_1_0_4 + i31:u132:BeginLoop_1_0_5 + i31:u132:TestAlone_1_0_5 + i31:u132:TestIdentity_1_0_5 = 1
invariant :i5:u8:IsEndLoop_2_0_1 + i5:u8:IsEndLoop_2_0_2 + i5:u8:BeginLoop_2_0_2 + i5:u8:TestIdentity_2_0_2 + i5:u47:IsEndLoop_2_0_0 + i5:u47:BeginLoop_2_0_1 + i5:u47:TestAlone_2_0_1 + i5:u47:TestIdentity_2_0_1 + i5:u76:IsEndLoop_2_0_3 + i5:u76:BeginLoop_2_0_4 + i5:u76:TestAlone_2_0_4 + i5:u76:TestIdentity_2_0_4 + i5:u131:IsEndLoop_2_0_4 + i5:u131:BeginLoop_2_0_5 + i5:u131:TestAlone_2_0_5 + i5:u131:TestIdentity_2_0_5 + i5:u172:BeginLoop_2_0_3 + i5:u172:TestAlone_2_0_3 + i5:u172:TestIdentity_2_0_3 + i6:u119:IsEndLoop_2_0_5 + i6:u119:EndTurn_2_0 + i6:u119:TestTurn_2_0 + i6:u119:AskForSection_2_0 + i6:u157:BeginLoop_2_0_0 + i6:u157:TestAlone_2_0_0 + i6:u157:TestIdentity_2_0_0 + i7:u24:IsEndLoop_2_2_5 + i7:u24:EndTurn_2_2 + i7:u24:TestTurn_2_2 + i7:u24:AskForSection_2_2 + i7:u160:BeginLoop_2_2_0 + i7:u160:TestAlone_2_2_0 + i7:u160:TestIdentity_2_2_0 + i8:u36:IsEndLoop_2_4_5 + i8:u36:EndTurn_2_4 + i8:u36:TestTurn_2_4 + i8:u36:AskForSection_2_4 + i8:u36:CS_2 + i8:u38:BeginLoop_2_4_0 + i8:u38:TestAlone_2_4_0 + i8:u38:TestIdentity_2_4_0 + i13:u125:IsEndLoop_2_3_5 + i13:u125:EndTurn_2_3 + i13:u125:TestTurn_2_3 + i13:u125:AskForSection_2_3 + i13:u165:BeginLoop_2_3_0 + i13:u165:TestAlone_2_3_0 + i13:u165:TestIdentity_2_3_0 + i14:u74:IsEndLoop_2_3_1 + i14:u74:IsEndLoop_2_3_2 + i14:u74:BeginLoop_2_3_2 + i14:u74:TestIdentity_2_3_2 + i14:u116:IsEndLoop_2_3_4 + i14:u116:BeginLoop_2_3_5 + i14:u116:TestAlone_2_3_5 + i14:u116:TestIdentity_2_3_5 + i14:u178:BeginLoop_2_3_3 + i14:u178:TestAlone_2_3_3 + i14:u178:TestIdentity_2_3_3 + i14:u219:IsEndLoop_2_3_3 + i14:u219:BeginLoop_2_3_4 + i14:u219:TestAlone_2_3_4 + i14:u219:TestIdentity_2_3_4 + i18:u28:BeginLoop_2_1_0 + i18:u28:TestAlone_2_1_0 + i18:u28:TestIdentity_2_1_0 + i18:u124:IsEndLoop_2_1_5 + i18:u124:EndTurn_2_1 + i18:u124:TestTurn_2_1 + i18:u124:AskForSection_2_1 + i19:u10:IsEndLoop_2_4_2 + i19:u10:BeginLoop_2_4_3 + i19:u55:IsEndLoop_2_4_0 + i19:u55:BeginLoop_2_4_1 + i19:u55:TestAlone_2_4_1 + i19:u55:TestIdentity_2_4_1 + i19:u63:IsEndLoop_2_4_1 + i19:u63:BeginLoop_2_4_2 + i19:u63:TestIdentity_2_4_2 + i19:u111:TestAlone_2_4_3 + i19:u111:TestIdentity_2_4_3 + i19:u201:IsEndLoop_2_4_4 + i19:u201:BeginLoop_2_4_5 + i19:u201:TestAlone_2_4_5 + i19:u201:TestIdentity_2_4_5 + i19:u214:IsEndLoop_2_4_3 + i19:u214:BeginLoop_2_4_4 + i19:u214:TestAlone_2_4_4 + i19:u214:TestIdentity_2_4_4 + i22:u67:IsEndLoop_2_1_3 + i22:u67:BeginLoop_2_1_4 + i22:u67:TestAlone_2_1_4 + i22:u67:TestIdentity_2_1_4 + i22:u133:IsEndLoop_2_1_4 + i22:u133:BeginLoop_2_1_5 + i22:u133:TestAlone_2_1_5 + i22:u133:TestIdentity_2_1_5 + i22:u58:IsEndLoop_2_1_1 + i22:u58:IsEndLoop_2_1_2 + i22:u58:BeginLoop_2_1_2 + i22:u58:TestIdentity_2_1_2 + i22:u141:IsEndLoop_2_1_0 + i22:u141:BeginLoop_2_1_1 + i22:u141:TestAlone_2_1_1 + i22:u141:TestIdentity_2_1_1 + i22:u170:BeginLoop_2_1_3 + i22:u170:TestAlone_2_1_3 + i22:u170:TestIdentity_2_1_3 + i25:u52:IsEndLoop_2_3_0 + i25:u52:BeginLoop_2_3_1 + i25:u52:TestAlone_2_3_1 + i25:u52:TestIdentity_2_3_1 + i27:u9:IsEndLoop_2_2_1 + i27:u9:IsEndLoop_2_2_2 + i27:u9:BeginLoop_2_2_2 + i27:u9:TestIdentity_2_2_2 + i27:u61:BeginLoop_2_2_3 + i27:u61:TestAlone_2_2_3 + i27:u61:TestIdentity_2_2_3 + i27:u96:IsEndLoop_2_2_0 + i27:u96:BeginLoop_2_2_1 + i27:u96:TestAlone_2_2_1 + i27:u96:TestIdentity_2_2_1 + i27:u198:IsEndLoop_2_2_4 + i27:u198:BeginLoop_2_2_5 + i27:u198:TestAlone_2_2_5 + i27:u198:TestIdentity_2_2_5 + i27:u210:IsEndLoop_2_2_3 + i27:u210:BeginLoop_2_2_4 + i27:u210:TestAlone_2_2_4 + i27:u210:TestIdentity_2_2_4 + i31:u173:WantSection_2_F = 1
invariant :i6:u89:Idle_1 + -1'i25:u7:WantSection_1_F = 0
invariant :i7:u91:WantSection_4_T + i20:u85:WantSection_4_F = 1
invariant :i8:u222:WantSection_2_T + i31:u173:WantSection_2_F = 1
invariant :i6:u16:IsEndLoop_3_0_5 + i6:u16:EndTurn_3_0 + i6:u16:TestTurn_3_0 + i6:u16:AskForSection_3_0 + i6:u31:BeginLoop_3_0_0 + i6:u31:TestAlone_3_0_0 + i6:u31:TestIdentity_3_0_0 + i7:u127:IsEndLoop_3_2_5 + i7:u127:EndTurn_3_2 + i7:u127:TestTurn_3_2 + i7:u127:AskForSection_3_2 + i7:u162:BeginLoop_3_2_0 + i7:u162:TestAlone_3_2_0 + i7:u162:TestIdentity_3_2_0 + i8:u37:IsEndLoop_3_4_5 + i8:u37:EndTurn_3_4 + i8:u37:TestTurn_3_4 + i8:u37:AskForSection_3_4 + i8:u37:CS_3 + i8:u138:BeginLoop_3_4_0 + i8:u138:TestAlone_3_4_0 + i8:u138:TestIdentity_3_4_0 + i10:u11:IsEndLoop_3_1_2 + i10:u11:IsEndLoop_3_1_3 + i10:u11:BeginLoop_3_1_3 + i10:u11:TestIdentity_3_1_3 + i10:u66:BeginLoop_3_1_4 + i10:u66:TestAlone_3_1_4 + i10:u66:TestIdentity_3_1_4 + i10:u135:IsEndLoop_3_1_4 + i10:u135:BeginLoop_3_1_5 + i10:u135:TestAlone_3_1_5 + i10:u135:TestIdentity_3_1_5 + i10:u146:IsEndLoop_3_1_0 + i10:u146:BeginLoop_3_1_1 + i10:u146:TestAlone_3_1_1 + i10:u146:TestIdentity_3_1_1 + i10:u182:IsEndLoop_3_1_1 + i10:u182:BeginLoop_3_1_2 + i10:u182:TestAlone_3_1_2 + i10:u182:TestIdentity_3_1_2 + i13:u21:IsEndLoop_3_3_5 + i13:u21:EndTurn_3_3 + i13:u21:TestTurn_3_3 + i13:u21:AskForSection_3_3 + i13:u167:BeginLoop_3_3_0 + i13:u167:TestAlone_3_3_0 + i13:u167:TestIdentity_3_3_0 + i18:u27:IsEndLoop_3_1_5 + i18:u27:EndTurn_3_1 + i18:u27:TestTurn_3_1 + i18:u27:AskForSection_3_1 + i18:u29:BeginLoop_3_1_0 + i18:u29:TestAlone_3_1_0 + i18:u29:TestIdentity_3_1_0 + i20:u81:IsEndLoop_3_2_4 + i20:u81:BeginLoop_3_2_5 + i20:u81:TestAlone_3_2_5 + i20:u81:TestIdentity_3_2_5 + i20:u85:IsEndLoop_3_0_4 + i20:u85:BeginLoop_3_0_5 + i20:u85:TestAlone_3_0_5 + i20:u85:TestIdentity_3_0_5 + i20:u12:IsEndLoop_3_0_2 + i20:u12:IsEndLoop_3_0_3 + i20:u12:BeginLoop_3_0_3 + i20:u12:TestIdentity_3_0_3 + i20:u213:BeginLoop_3_0_4 + i20:u213:TestAlone_3_0_4 + i20:u213:TestIdentity_3_0_4 + i23:u14:IsEndLoop_3_3_2 + i23:u14:IsEndLoop_3_3_3 + i23:u14:BeginLoop_3_3_3 + i23:u14:TestIdentity_3_3_3 + i23:u84:BeginLoop_3_3_4 + i23:u84:TestAlone_3_3_4 + i23:u84:TestIdentity_3_3_4 + i23:u114:IsEndLoop_3_3_4 + i23:u114:BeginLoop_3_3_5 + i23:u114:TestAlone_3_3_5 + i23:u114:TestIdentity_3_3_5 + i23:u62:IsEndLoop_3_3_1 + i23:u62:BeginLoop_3_3_2 + i23:u62:TestAlone_3_3_2 + i23:u62:TestIdentity_3_3_2 + i23:u151:IsEndLoop_3_3_0 + i23:u151:BeginLoop_3_3_1 + i23:u151:TestAlone_3_3_1 + i23:u151:TestIdentity_3_3_1 + i25:u46:IsEndLoop_3_0_0 + i25:u46:BeginLoop_3_0_1 + i25:u46:TestAlone_3_0_1 + i25:u46:TestIdentity_3_0_1 + i25:u49:IsEndLoop_3_0_1 + i25:u49:BeginLoop_3_0_2 + i25:u49:TestAlone_3_0_2 + i25:u49:TestIdentity_3_0_2 + i25:u148:IsEndLoop_3_2_0 + i25:u148:BeginLoop_3_2_1 + i25:u148:TestAlone_3_2_1 + i25:u148:TestIdentity_3_2_1 + i25:u192:IsEndLoop_3_2_1 + i25:u192:BeginLoop_3_2_2 + i25:u192:TestAlone_3_2_2 + i25:u192:TestIdentity_3_2_2 + i31:u13:IsEndLoop_3_2_2 + i31:u13:IsEndLoop_3_2_3 + i31:u13:BeginLoop_3_2_3 + i31:u13:TestIdentity_3_2_3 + i31:u218:BeginLoop_3_2_4 + i31:u218:TestAlone_3_2_4 + i31:u218:TestIdentity_3_2_4 + i31:u77:WantSection_3_F + i32:u64:IsEndLoop_3_4_1 + i32:u64:BeginLoop_3_4_2 + i32:u107:IsEndLoop_3_4_0 + i32:u107:BeginLoop_3_4_1 + i32:u107:TestAlone_3_4_1 + i32:u107:TestIdentity_3_4_1 + i32:u174:TestAlone_3_4_2 + i32:u174:TestIdentity_3_4_2 + i32:u87:IsEndLoop_3_4_2 + i32:u87:IsEndLoop_3_4_3 + i32:u87:BeginLoop_3_4_3 + i32:u87:TestIdentity_3_4_3 + i32:u121:IsEndLoop_3_4_4 + i32:u121:BeginLoop_3_4_5 + i32:u121:TestAlone_3_4_5 + i32:u121:TestIdentity_3_4_5 + i32:u215:BeginLoop_3_4_4 + i32:u215:TestAlone_3_4_4 + i32:u215:TestIdentity_3_4_4 = 1
invariant :i8:u222:Idle_2 + -1'i31:u173:WantSection_2_F = 0
invariant :i6:u32:BeginLoop_4_0_0 + i6:u32:TestAlone_4_0_0 + i6:u32:TestIdentity_4_0_0 + i6:u117:IsEndLoop_4_0_5 + i6:u117:EndTurn_4_0 + i6:u117:TestTurn_4_0 + i6:u117:AskForSection_4_0 + i7:u25:IsEndLoop_4_2_5 + i7:u25:EndTurn_4_2 + i7:u25:TestTurn_4_2 + i7:u25:AskForSection_4_2 + i7:u42:BeginLoop_4_2_0 + i7:u42:TestAlone_4_2_0 + i7:u42:TestIdentity_4_2_0 + i8:u48:BeginLoop_4_4_0 + i8:u48:TestAlone_4_4_0 + i8:u48:TestIdentity_4_4_0 + i8:u156:IsEndLoop_4_4_5 + i8:u156:EndTurn_4_4 + i8:u156:TestTurn_4_4 + i8:u156:AskForSection_4_4 + i8:u156:CS_4 + i13:u41:BeginLoop_4_3_0 + i13:u41:TestAlone_4_3_0 + i13:u41:TestIdentity_4_3_0 + i13:u152:IsEndLoop_4_3_5 + i13:u152:EndTurn_4_3 + i13:u152:TestTurn_4_3 + i13:u152:AskForSection_4_3 + i15:u15:IsEndLoop_4_2_3 + i15:u15:IsEndLoop_4_2_4 + i15:u15:BeginLoop_4_2_4 + i15:u15:TestIdentity_4_2_4 + i15:u80:BeginLoop_4_2_5 + i15:u80:TestAlone_4_2_5 + i15:u80:TestIdentity_4_2_5 + i15:u181:IsEndLoop_4_2_2 + i15:u181:BeginLoop_4_2_3 + i15:u181:TestAlone_4_2_3 + i15:u181:TestIdentity_4_2_3 + i15:u103:IsEndLoop_4_2_1 + i15:u103:BeginLoop_4_2_2 + i15:u103:TestAlone_4_2_2 + i15:u103:TestIdentity_4_2_2 + i15:u147:IsEndLoop_4_2_0 + i15:u147:BeginLoop_4_2_1 + i15:u147:TestAlone_4_2_1 + i15:u147:TestIdentity_4_2_1 + i16:u72:IsEndLoop_4_3_2 + i16:u72:BeginLoop_4_3_3 + i16:u72:TestAlone_4_3_3 + i16:u72:TestIdentity_4_3_3 + i16:u93:IsEndLoop_4_3_3 + i16:u93:IsEndLoop_4_3_4 + i16:u93:BeginLoop_4_3_4 + i16:u93:TestIdentity_4_3_4 + i16:u115:BeginLoop_4_3_5 + i16:u115:TestAlone_4_3_5 + i16:u115:TestIdentity_4_3_5 + i16:u150:IsEndLoop_4_3_0 + i16:u150:BeginLoop_4_3_1 + i16:u150:TestAlone_4_3_1 + i16:u150:TestIdentity_4_3_1 + i16:u191:IsEndLoop_4_3_1 + i16:u191:BeginLoop_4_3_2 + i16:u191:TestAlone_4_3_2 + i16:u191:TestIdentity_4_3_2 + i18:u26:IsEndLoop_4_1_5 + i18:u26:EndTurn_4_1 + i18:u26:TestTurn_4_1 + i18:u26:AskForSection_4_1 + i18:u30:BeginLoop_4_1_0 + i18:u30:TestAlone_4_1_0 + i18:u30:TestIdentity_4_1_0 + i20:u85:WantSection_4_F + i25:u54:IsEndLoop_4_4_0 + i25:u54:BeginLoop_4_4_1 + i25:u54:TestAlone_4_4_1 + i25:u54:TestIdentity_4_4_1 + i25:u65:IsEndLoop_4_4_1 + i25:u65:BeginLoop_4_4_2 + i25:u100:TestAlone_4_4_2 + i25:u100:TestIdentity_4_4_2 + i29:u105:IsEndLoop_4_1_1 + i29:u105:BeginLoop_4_1_2 + i29:u105:TestAlone_4_1_2 + i29:u105:TestIdentity_4_1_2 + i29:u145:IsEndLoop_4_1_0 + i29:u145:BeginLoop_4_1_1 + i29:u145:TestAlone_4_1_1 + i29:u145:TestIdentity_4_1_1 + i29:u60:IsEndLoop_4_1_2 + i29:u60:BeginLoop_4_1_3 + i29:u60:TestAlone_4_1_3 + i29:u60:TestIdentity_4_1_3 + i29:u78:BeginLoop_4_1_5 + i29:u78:TestAlone_4_1_5 + i29:u78:TestIdentity_4_1_5 + i29:u207:IsEndLoop_4_1_3 + i29:u207:IsEndLoop_4_1_4 + i29:u207:BeginLoop_4_1_4 + i29:u207:TestIdentity_4_1_4 + i30:u106:IsEndLoop_4_0_1 + i30:u106:BeginLoop_4_0_2 + i30:u106:TestAlone_4_0_2 + i30:u106:TestIdentity_4_0_2 + i30:u139:IsEndLoop_4_0_0 + i30:u139:BeginLoop_4_0_1 + i30:u139:TestAlone_4_0_1 + i30:u139:TestIdentity_4_0_1 + i30:u86:BeginLoop_4_0_5 + i30:u86:TestAlone_4_0_5 + i30:u86:TestIdentity_4_0_5 + i30:u113:IsEndLoop_4_0_2 + i30:u113:BeginLoop_4_0_3 + i30:u113:TestAlone_4_0_3 + i30:u113:TestIdentity_4_0_3 + i30:u212:IsEndLoop_4_0_3 + i30:u212:IsEndLoop_4_0_4 + i30:u212:BeginLoop_4_0_4 + i30:u212:TestIdentity_4_0_4 + i31:u94:BeginLoop_4_4_5 + i31:u94:TestAlone_4_4_5 + i31:u94:TestIdentity_4_4_5 + i31:u175:IsEndLoop_4_4_2 + i31:u175:BeginLoop_4_4_3 + i31:u175:TestAlone_4_4_3 + i31:u175:TestIdentity_4_4_3 + i31:u216:IsEndLoop_4_4_3 + i31:u216:IsEndLoop_4_4_4 + i31:u216:BeginLoop_4_4_4 + i31:u216:TestIdentity_4_4_4 = 1
invariant :i6:u221:Idle_3 + -1'i31:u77:WantSection_3_F = 0
invariant :i8:u220:WantSection_5_F + -1'i8:u220:Idle_5 = 0
invariant :i6:u89:WantSection_1_T + i25:u7:WantSection_1_F = 1
invariant :i6:u16:Turn_0_3 + i6:u18:Turn_0_5 + i6:u117:Turn_0_4 + i6:u118:Turn_0_1 + i6:u119:Turn_0_2 + i6:u120:Turn_0_0 = 1
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O3, model.c], workingDir=/home/mcc/execution]
Compilation finished in 16230 ms.
Running link step : CommandLine [args=[gcc, -shared, -o, gal.so, model.o], workingDir=/home/mcc/execution]
Link finished in 121 ms.
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, (<>(((LTLAP0==true))U((LTLAP1==true))))U(<>([](X((LTLAP2==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 159 ms.
FORMULA Peterson-PT-5-LTLFireability-00 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, <>(X((<>((LTLAP3==true)))U([]((LTLAP2==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 172 ms.
FORMULA Peterson-PT-5-LTLFireability-01 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X(<>((LTLAP4==true))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 131 ms.
FORMULA Peterson-PT-5-LTLFireability-02 TRUE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X((LTLAP3==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 193 ms.
FORMULA Peterson-PT-5-LTLFireability-03 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, <>((X(<>((LTLAP4==true))))U([]((LTLAP5==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 132 ms.
FORMULA Peterson-PT-5-LTLFireability-04 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, (X(<>((LTLAP6==true))))U((LTLAP7==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 136 ms.
FORMULA Peterson-PT-5-LTLFireability-05 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, <>((LTLAP8==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 6185 ms.
FORMULA Peterson-PT-5-LTLFireability-06 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, []((LTLAP5==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 6023 ms.
FORMULA Peterson-PT-5-LTLFireability-07 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, <>((((LTLAP9==true))U((LTLAP10==true)))U(<>(<>((LTLAP11==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 6011 ms.
FORMULA Peterson-PT-5-LTLFireability-08 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, (X(<>([]((LTLAP12==true)))))U([]((LTLAP13==true))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 215 ms.
FORMULA Peterson-PT-5-LTLFireability-09 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, (LTLAP14==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 6261 ms.
FORMULA Peterson-PT-5-LTLFireability-10 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, <>(([]((LTLAP14==true)))U(X(<>((LTLAP15==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 150 ms.
FORMULA Peterson-PT-5-LTLFireability-11 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, (X((LTLAP16==true)))U((LTLAP17==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 165 ms.
FORMULA Peterson-PT-5-LTLFireability-12 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, <>([]((<>((LTLAP18==true)))U([]((LTLAP19==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 6111 ms.
FORMULA Peterson-PT-5-LTLFireability-13 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, <>(X(((LTLAP20==true))U([]((LTLAP21==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 96 ms.
FORMULA Peterson-PT-5-LTLFireability-14 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, <>(((LTLAP22==true))U([](<>((LTLAP23==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 6124 ms.
FORMULA Peterson-PT-5-LTLFireability-15 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
ITS tools runner thread asked to quit. Dying gracefully.

BK_STOP 1527504965508

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution LTLFireability -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -louvain -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -consoleLog -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination LTLFireability -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -louvain -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
May 28, 2018 10:53:13 AM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, LTLFireability, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -louvain, -smt]
May 28, 2018 10:53:13 AM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
May 28, 2018 10:53:14 AM fr.lip6.move.gal.nupn.PTNetReader loadFromXML
INFO: Load time of PNML (sax parser for PT used): 160 ms
May 28, 2018 10:53:14 AM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 834 places.
May 28, 2018 10:53:14 AM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 1242 transitions.
May 28, 2018 10:53:14 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.img.gal : 36 ms
May 28, 2018 10:53:14 AM fr.lip6.move.gal.application.MccTranslator applyOrder
INFO: Applying decomposition
May 28, 2018 10:53:14 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 243 ms
May 28, 2018 10:53:14 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 175 ms
Begin: Mon May 28 10:53:15 2018

Computation of communities with the Newman-Girvan Modularity quality function

level 0:
start computation: Mon May 28 10:53:15 2018
network size: 834 nodes, 3522 links, 2484 weight
quality increased from -0.00211158 to 0.552155
end computation: Mon May 28 10:53:15 2018
level 1:
start computation: Mon May 28 10:53:15 2018
network size: 223 nodes, 1649 links, 2484 weight
quality increased from 0.552155 to 0.725575
end computation: Mon May 28 10:53:15 2018
level 2:
start computation: Mon May 28 10:53:15 2018
network size: 64 nodes, 514 links, 2484 weight
quality increased from 0.725575 to 0.733908
end computation: Mon May 28 10:53:15 2018
level 3:
start computation: Mon May 28 10:53:15 2018
network size: 33 nodes, 267 links, 2484 weight
quality increased from 0.733908 to 0.733908
end computation: Mon May 28 10:53:15 2018
End: Mon May 28 10:53:15 2018
Total duration: 0 sec
0.733908
May 28, 2018 10:53:15 AM fr.lip6.move.gal.instantiate.CompositeBuilder decomposeWithOrder
INFO: Decomposing Gal with order
May 28, 2018 10:53:15 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 133 ms
May 28, 2018 10:53:15 AM fr.lip6.move.gal.instantiate.CompositeBuilder rewriteArraysToAllowPartition
INFO: Rewriting arrays to variables to allow decomposition.
May 28, 2018 10:53:15 AM fr.lip6.move.gal.instantiate.Instantiator fuseIsomorphicEffects
INFO: Removed a total of 1032 redundant transitions.
May 28, 2018 10:53:16 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/LTLFireability.pnml.gal : 24 ms
May 28, 2018 10:53:16 AM fr.lip6.move.serialization.SerializationUtil serializePropertiesForITSLTLTools
INFO: Time to serialize properties into /home/mcc/execution/LTLFireability.ltl : 16 ms
May 28, 2018 10:53:16 AM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 1242 transitions.
May 28, 2018 10:53:17 AM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 23 place invariants in 321 ms
May 28, 2018 10:53:18 AM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 834 variables to be positive in 1689 ms
May 28, 2018 10:53:18 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may disable matrix : 1242 transitions.
May 28, 2018 10:53:18 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of disable matrix completed :0/1242 took 1 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 28, 2018 10:53:18 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete disable matrix. took 169 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 28, 2018 10:53:18 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may enable matrix : 1242 transitions.
May 28, 2018 10:53:18 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete enable matrix. took 67 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 28, 2018 10:54:48 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeCoEnablingMatrix
INFO: Computing symmetric co enabling matrix : 1242 transitions.
May 28, 2018 10:54:50 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(0/1242) took 1841 ms. Total solver calls (SAT/UNSAT): 231(0/231)
SMT solver raised 'unknown', retrying with same input.
SMT solver raised 'unknown' twice, overapproximating result to 1.
May 28, 2018 10:54:52 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Finished co-enabling matrix. took 3455 ms. Total solver calls (SAT/UNSAT): 982(26/956)
May 28, 2018 10:54:52 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeDoNotAccord
INFO: Computing Do-Not-Accords matrix : 1242 transitions.
May 28, 2018 10:55:10 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed DNA matrix. took 17906 ms. Total solver calls (SAT/UNSAT): 6029(0/6029)
May 28, 2018 10:55:10 AM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 114069ms conformant to PINS in folder :/home/mcc/execution

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="Peterson-PT-5"
export BK_EXAMINATION="LTLFireability"
export BK_TOOL="itstoolsl"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

tar xzf /home/mcc/BenchKit/INPUTS/Peterson-PT-5.tgz
mv Peterson-PT-5 execution
cd execution
pwd
ls -lh

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3637"
echo " Executing tool itstoolsl"
echo " Input is Peterson-PT-5, examination is LTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r261-csrt-152732586000166"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' LTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;