About the Execution of ITS-Tools.L for Peterson-PT-3
Execution Summary | |||||
Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
15758.020 | 97237.00 | 248770.00 | 153.10 | TFFFFTFFFFFFFFFF | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Waiting for the VM to be ready (probing ssh)
...................
/home/mcc/execution
total 688K
-rw-r--r-- 1 mcc users 15K May 15 18:54 CTLCardinality.txt
-rw-r--r-- 1 mcc users 49K May 15 18:54 CTLCardinality.xml
-rw-r--r-- 1 mcc users 17K May 15 18:54 CTLFireability.txt
-rw-r--r-- 1 mcc users 59K May 15 18:54 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K May 15 18:50 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.0K May 15 18:50 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 11K May 26 09:26 LTLCardinality.txt
-rw-r--r-- 1 mcc users 32K May 26 09:26 LTLCardinality.xml
-rw-r--r-- 1 mcc users 7.0K May 26 09:26 LTLFireability.txt
-rw-r--r-- 1 mcc users 27K May 26 09:26 LTLFireability.xml
-rw-r--r-- 1 mcc users 14K May 15 18:54 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 41K May 15 18:54 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 104 May 15 18:54 ReachabilityDeadlock.txt
-rw-r--r-- 1 mcc users 342 May 15 18:54 ReachabilityDeadlock.xml
-rw-r--r-- 1 mcc users 21K May 15 18:54 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 74K May 15 18:54 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 4.2K May 15 18:54 UpperBounds.txt
-rw-r--r-- 1 mcc users 8.8K May 15 18:54 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 May 15 18:50 equiv_col
-rw-r--r-- 1 mcc users 2 May 15 18:50 instance
-rw-r--r-- 1 mcc users 6 May 15 18:50 iscolored
-rw-r--r-- 1 mcc users 248K May 15 18:50 model.pnml
=====================================================================
Generated by BenchKit 2-3637
Executing tool itstoolsl
Input is Peterson-PT-3, examination is LTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r261-csrt-152732586000162
=====================================================================
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME Peterson-PT-3-LTLFireability-00
FORMULA_NAME Peterson-PT-3-LTLFireability-01
FORMULA_NAME Peterson-PT-3-LTLFireability-02
FORMULA_NAME Peterson-PT-3-LTLFireability-03
FORMULA_NAME Peterson-PT-3-LTLFireability-04
FORMULA_NAME Peterson-PT-3-LTLFireability-05
FORMULA_NAME Peterson-PT-3-LTLFireability-06
FORMULA_NAME Peterson-PT-3-LTLFireability-07
FORMULA_NAME Peterson-PT-3-LTLFireability-08
FORMULA_NAME Peterson-PT-3-LTLFireability-09
FORMULA_NAME Peterson-PT-3-LTLFireability-10
FORMULA_NAME Peterson-PT-3-LTLFireability-11
FORMULA_NAME Peterson-PT-3-LTLFireability-12
FORMULA_NAME Peterson-PT-3-LTLFireability-13
FORMULA_NAME Peterson-PT-3-LTLFireability-14
FORMULA_NAME Peterson-PT-3-LTLFireability-15
=== Now, execution of the tool begins
BK_START 1527504683676
Converted graph to binary with : CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.louvain.binaries_1.0.0.201805241334/bin/convert-linux64, -i, /tmp/graph3884320082240761828.txt, -o, /tmp/graph3884320082240761828.bin, -w, /tmp/graph3884320082240761828.weights], workingDir=null]
Built communities with : CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.louvain.binaries_1.0.0.201805241334/bin/louvain-linux64, /tmp/graph3884320082240761828.bin, -l, -1, -v, -w, /tmp/graph3884320082240761828.weights, -q, 0, -e, 0.001], workingDir=null]
Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805241334/bin/its-ltl-linux64, --gc-threshold, 2000000, -i, /home/mcc/execution/LTLFireability.pnml.gal, -t, CGAL, -LTL, /home/mcc/execution/LTLFireability.ltl, -c, -stutter-deadlock], workingDir=/home/mcc/execution]
its-ltl command run as :
/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805241334/bin/its-ltl-linux64 --gc-threshold 2000000 -i /home/mcc/execution/LTLFireability.pnml.gal -t CGAL -LTL /home/mcc/execution/LTLFireability.ltl -c -stutter-deadlock
Read 16 LTL properties
Checking formula 0 : !(("(((((i7.u63.WantSection_3_F>=1)&&(i7.u63.Idle_3>=1))||((i2.u26.WantSection_1_F>=1)&&(i2.u26.Idle_1>=1)))||((i6.u25.WantSection_2_F>=1)&&(i6.u25.Idle_2>=1)))||((i2.u64.WantSection_0_F>=1)&&(i2.u64.Idle_0>=1)))"))
Formula 0 simplified : !"(((((i7.u63.WantSection_3_F>=1)&&(i7.u63.Idle_3>=1))||((i2.u26.WantSection_1_F>=1)&&(i2.u26.Idle_1>=1)))||((i6.u25.WantSection_2_F>=1)&&(i6.u25.Idle_2>=1)))||((i2.u64.WantSection_0_F>=1)&&(i2.u64.Idle_0>=1)))"
built 69 ordering constraints for composite.
built 8 ordering constraints for composite.
built 6 ordering constraints for composite.
built 9 ordering constraints for composite.
built 6 ordering constraints for composite.
built 45 ordering constraints for composite.
built 53 ordering constraints for composite.
built 24 ordering constraints for composite.
built 65 ordering constraints for composite.
built 6 ordering constraints for composite.
built 6 ordering constraints for composite.
built 6 ordering constraints for composite.
built 8 ordering constraints for composite.
built 52 ordering constraints for composite.
built 6 ordering constraints for composite.
built 6 ordering constraints for composite.
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
Normalized transition count is 308
// Phase 1: matrix 308 rows 244 cols
invariant :i14:u62:Turn_1_2 + i14:u62:Turn_1_0 + i14:u62:Turn_1_1 + i14:u62:Turn_1_3 = 1
invariant :i7:u8:Turn_0_2 + i7:u8:Turn_0_1 + i7:u8:Turn_0_0 + i7:u8:Turn_0_3 = 1
invariant :i2:u26:Idle_1 + i5:u21:IsEndLoop_1_0_0 + i5:u21:IsEndLoop_1_0_1 + i5:u21:BeginLoop_1_0_1 + i5:u21:TestIdentity_1_0_1 + i5:u30:BeginLoop_1_0_2 + i5:u30:TestAlone_1_0_2 + i5:u30:TestIdentity_1_0_2 + i5:u52:IsEndLoop_1_0_2 + i5:u52:BeginLoop_1_0_3 + i5:u52:TestAlone_1_0_3 + i5:u52:TestIdentity_1_0_3 + i6:u2:IsEndLoop_1_1_0 + i6:u2:IsEndLoop_1_1_1 + i6:u2:BeginLoop_1_1_1 + i6:u2:TestIdentity_1_1_1 + i6:u57:BeginLoop_1_1_2 + i6:u57:TestAlone_1_1_2 + i6:u57:TestIdentity_1_1_2 + i6:u37:IsEndLoop_1_1_2 + i6:u37:BeginLoop_1_1_3 + i6:u37:TestAlone_1_1_3 + i6:u37:TestIdentity_1_1_3 + i7:u9:IsEndLoop_1_0_3 + i7:u9:EndTurn_1_0 + i7:u9:TestTurn_1_0 + i7:u9:AskForSection_1_0 + i7:u39:BeginLoop_1_0_0 + i7:u39:TestAlone_1_0_0 + i7:u39:TestIdentity_1_0_0 + i8:u16:BeginLoop_1_2_0 + i8:u16:TestAlone_1_2_0 + i8:u16:TestIdentity_1_2_0 + i8:u44:IsEndLoop_1_2_3 + i8:u44:EndTurn_1_2 + i8:u44:TestTurn_1_2 + i8:u44:CS_1 + i8:u44:AskForSection_1_2 + i11:u3:IsEndLoop_1_2_0 + i11:u3:IsEndLoop_1_2_1 + i11:u3:BeginLoop_1_2_1 + i11:u3:TestIdentity_1_2_1 + i11:u33:IsEndLoop_1_2_2 + i11:u33:BeginLoop_1_2_3 + i11:u33:TestAlone_1_2_3 + i11:u33:TestIdentity_1_2_3 + i11:u55:BeginLoop_1_2_2 + i11:u55:TestAlone_1_2_2 + i11:u55:TestIdentity_1_2_2 + i14:u42:BeginLoop_1_1_0 + i14:u42:TestAlone_1_1_0 + i14:u42:TestIdentity_1_1_0 + i14:u43:IsEndLoop_1_1_3 + i14:u43:EndTurn_1_1 + i14:u43:TestTurn_1_1 + i14:u43:AskForSection_1_1 = 1
invariant :i3:u6:IsEndLoop_3_2_2 + i3:u6:IsEndLoop_3_2_3 + i3:u6:BeginLoop_3_2_3 + i3:u6:TestIdentity_3_2_3 + i3:u28:IsEndLoop_3_2_0 + i3:u28:BeginLoop_3_2_1 + i3:u28:TestAlone_3_2_1 + i3:u28:TestIdentity_3_2_1 + i3:u56:IsEndLoop_3_2_1 + i3:u56:BeginLoop_3_2_2 + i3:u56:TestAlone_3_2_2 + i3:u56:TestIdentity_3_2_2 + i7:u15:BeginLoop_3_0_0 + i7:u15:TestAlone_3_0_0 + i7:u15:TestIdentity_3_0_0 + i7:u35:EndTurn_3_0 + i7:u35:TestTurn_3_0 + i7:u35:AskForSection_3_0 + i7:u63:Idle_3 + i8:u12:EndTurn_3_2 + i8:u12:TestTurn_3_2 + i8:u12:CS_3 + i8:u12:AskForSection_3_2 + i8:u18:BeginLoop_3_2_0 + i8:u18:TestAlone_3_2_0 + i8:u18:TestIdentity_3_2_0 + i9:u29:IsEndLoop_3_0_1 + i9:u29:BeginLoop_3_0_2 + i9:u29:TestAlone_3_0_2 + i9:u29:TestIdentity_3_0_2 + i9:u48:IsEndLoop_3_0_0 + i9:u48:BeginLoop_3_0_1 + i9:u48:TestAlone_3_0_1 + i9:u48:TestIdentity_3_0_1 + i9:u54:IsEndLoop_3_0_2 + i9:u54:IsEndLoop_3_0_3 + i9:u54:BeginLoop_3_0_3 + i9:u54:TestIdentity_3_0_3 + i12:u5:IsEndLoop_3_1_2 + i12:u5:IsEndLoop_3_1_3 + i12:u5:BeginLoop_3_1_3 + i12:u5:TestIdentity_3_1_3 + i12:u20:IsEndLoop_3_1_0 + i12:u20:BeginLoop_3_1_1 + i12:u20:TestAlone_3_1_1 + i12:u20:TestIdentity_3_1_1 + i12:u59:IsEndLoop_3_1_1 + i12:u59:BeginLoop_3_1_2 + i12:u59:TestAlone_3_1_2 + i12:u59:TestIdentity_3_1_2 + i14:u40:BeginLoop_3_1_0 + i14:u40:TestAlone_3_1_0 + i14:u40:TestIdentity_3_1_0 + i14:u62:EndTurn_3_1 + i14:u62:TestTurn_3_1 + i14:u62:AskForSection_3_1 = 1
invariant :i7:u63:WantSection_3_F + -1'i7:u63:Idle_3 = 0
invariant :i2:u26:WantSection_1_F + -1'i2:u26:Idle_1 = 0
invariant :i2:u64:WantSection_0_F + -1'i2:u64:Idle_0 = 0
invariant :i2:u26:WantSection_1_T + i2:u26:Idle_1 = 1
invariant :i6:u25:WantSection_2_T + i6:u25:Idle_2 = 1
invariant :i8:u44:Turn_2_1 + i8:u44:Turn_2_2 + i8:u44:Turn_2_0 + i8:u44:Turn_2_3 = 1
invariant :i2:u4:IsEndLoop_2_2_1 + i2:u4:IsEndLoop_2_2_2 + i2:u4:BeginLoop_2_2_2 + i2:u4:TestIdentity_2_2_2 + i2:u23:BeginLoop_2_2_3 + i2:u23:TestAlone_2_2_3 + i2:u23:TestIdentity_2_2_3 + i2:u13:IsEndLoop_2_2_3 + i2:u13:EndTurn_2_2 + i2:u13:TestTurn_2_2 + i2:u13:CS_2 + i2:u13:AskForSection_2_2 + i2:u17:BeginLoop_2_2_0 + i2:u17:TestAlone_2_2_0 + i2:u17:TestIdentity_2_2_0 + i2:u46:IsEndLoop_2_2_0 + i2:u46:BeginLoop_2_2_1 + i2:u46:TestAlone_2_2_1 + i2:u46:TestIdentity_2_2_1 + i6:u25:Idle_2 + i7:u8:IsEndLoop_2_0_3 + i7:u8:EndTurn_2_0 + i7:u8:TestTurn_2_0 + i7:u8:AskForSection_2_0 + i7:u38:BeginLoop_2_0_0 + i7:u38:TestAlone_2_0_0 + i7:u38:TestIdentity_2_0_0 + i10:u22:IsEndLoop_2_0_1 + i10:u22:IsEndLoop_2_0_2 + i10:u22:BeginLoop_2_0_2 + i10:u22:TestIdentity_2_0_2 + i10:u50:IsEndLoop_2_0_0 + i10:u50:BeginLoop_2_0_1 + i10:u50:TestAlone_2_0_1 + i10:u50:TestIdentity_2_0_1 + i10:u51:BeginLoop_2_0_3 + i10:u51:TestAlone_2_0_3 + i10:u51:TestIdentity_2_0_3 + i13:u24:IsEndLoop_2_1_1 + i13:u24:IsEndLoop_2_1_2 + i13:u24:BeginLoop_2_1_2 + i13:u24:TestIdentity_2_1_2 + i13:u45:IsEndLoop_2_1_0 + i13:u45:BeginLoop_2_1_1 + i13:u45:TestAlone_2_1_1 + i13:u45:TestIdentity_2_1_1 + i13:u61:BeginLoop_2_1_3 + i13:u61:TestAlone_2_1_3 + i13:u61:TestIdentity_2_1_3 + i14:u11:IsEndLoop_2_1_3 + i14:u11:EndTurn_2_1 + i14:u11:TestTurn_2_1 + i14:u11:AskForSection_2_1 + i14:u41:BeginLoop_2_1_0 + i14:u41:TestAlone_2_1_0 + i14:u41:TestIdentity_2_1_0 = 1
invariant :i7:u63:WantSection_3_T + i7:u63:Idle_3 = 1
invariant :i0:u0:IsEndLoop_0_0_0 + i0:u0:BeginLoop_0_0_0 + i0:u0:TestIdentity_0_0_0 + i0:u47:BeginLoop_0_0_1 + i0:u47:TestAlone_0_0_1 + i0:u47:TestIdentity_0_0_1 + i0:u27:IsEndLoop_0_0_1 + i0:u27:BeginLoop_0_0_2 + i0:u27:TestAlone_0_0_2 + i0:u27:TestIdentity_0_0_2 + i0:u36:IsEndLoop_0_0_2 + i0:u36:BeginLoop_0_0_3 + i0:u36:TestAlone_0_0_3 + i0:u36:TestIdentity_0_0_3 + i1:u1:IsEndLoop_0_1_0 + i1:u1:BeginLoop_0_1_0 + i1:u1:TestIdentity_0_1_0 + i1:u49:BeginLoop_0_1_1 + i1:u49:TestAlone_0_1_1 + i1:u49:TestIdentity_0_1_1 + i1:u53:IsEndLoop_0_1_2 + i1:u53:BeginLoop_0_1_3 + i1:u53:TestAlone_0_1_3 + i1:u53:TestIdentity_0_1_3 + i1:u60:IsEndLoop_0_1_1 + i1:u60:BeginLoop_0_1_2 + i1:u60:TestAlone_0_1_2 + i1:u60:TestIdentity_0_1_2 + i2:u64:Idle_0 + i4:u14:BeginLoop_0_2_0 + i4:u14:TestIdentity_0_2_0 + i4:u19:IsEndLoop_0_2_0 + i4:u19:BeginLoop_0_2_1 + i4:u31:TestAlone_0_2_1 + i4:u31:TestIdentity_0_2_1 + i4:u32:IsEndLoop_0_2_2 + i4:u32:BeginLoop_0_2_3 + i4:u32:TestAlone_0_2_3 + i4:u32:TestIdentity_0_2_3 + i4:u58:IsEndLoop_0_2_1 + i4:u58:BeginLoop_0_2_2 + i4:u58:TestAlone_0_2_2 + i4:u58:TestIdentity_0_2_2 + i7:u34:IsEndLoop_0_0_3 + i7:u34:EndTurn_0_0 + i7:u34:TestTurn_0_0 + i7:u34:AskForSection_0_0 + i8:u10:IsEndLoop_0_2_3 + i8:u10:EndTurn_0_2 + i8:u10:TestTurn_0_2 + i8:u10:AskForSection_0_2 + i8:u10:CS_0 + i14:u7:IsEndLoop_0_1_3 + i14:u7:EndTurn_0_1 + i14:u7:TestTurn_0_1 + i14:u7:AskForSection_0_1 = 1
invariant :i2:u64:WantSection_0_T + i2:u64:Idle_0 = 1
invariant :i6:u25:WantSection_2_F + -1'i6:u25:Idle_2 = 0
Reverse transition relation is NOT exact ! Due to transitions BecomeIdle_0, UpdateTurn_2_3_2, UpdateTurn_3_3_2, BecomeIdle_1, BecomeIdle_2, BecomeIdle_3, EndLoop_3_1, EndLoop_3_0, NotAlone_2_3_0, NotAlone_1_3_0, NotAlone_0_3_0, NotAlone_3_2_0, NotAlone_1_2_0, NotAlone_0_2_0, NotAlone_3_1_0, NotAlone_3_2_1, NotAlone_1_2_1, NotAlone_0_2_1, NotAlone_3_1_1, NotAlone_2_1_1, NotAlone_2_1_0, NotAlone_2_1_2, NotAlone_0_3_1, NotAlone_1_3_1, NotAlone_2_3_1, NotAlone_0_3_2, NotAlone_1_3_2, NotAlone_2_3_2, NotAlone_3_1_2, NotAlone_0_2_2, NotAlone_1_2_2, NotAlone_3_2_2, UpdateTurn_3_2_0, UpdateTurn_0_3_0, UpdateTurn_1_2_0, UpdateTurn_3_1_0, UpdateTurn_0_2_0, UpdateTurn_1_1_0, UpdateTurn_3_0_0, UpdateTurn_0_1_0, UpdateTurn_1_0_0, UpdateTurn_0_0_0, UpdateTurn_2_2_2, UpdateTurn_3_2_2, UpdateTurn_0_3_2, UpdateTurn_2_1_2, UpdateTurn_3_1_2, UpdateTurn_0_2_2, UpdateTurn_2_0_2, UpdateTurn_3_0_2, UpdateTurn_0_1_2, UpdateTurn_1_3_1, UpdateTurn_2_3_1, UpdateTurn_0_0_2, UpdateTurn_2_2_1, UpdateTurn_1_2_1, UpdateTurn_0_3_1, UpdateTurn_2_1_1, UpdateTurn_1_1_1, UpdateTurn_0_2_1, UpdateTurn_2_0_1, UpdateTurn_1_0_1, UpdateTurn_0_1_1, UpdateTurn_1_3_0, UpdateTurn_0_0_1, UpdateTurn_3_3_0, i7.u8.EndLoop_2_0, i7.u8.UpdateTurn_2_2_0, i7.u8.UpdateTurn_2_1_0, i7.u8.UpdateTurn_2_0_0, i7.u8.UpdateTurn_2_3_0, i7.u9.EndLoop_1_0, i7.u34.EndLoop_0_0, i8.u44.UpdateTurn_1_3_2, i8.u44.UpdateTurn_1_2_2, i8.u44.UpdateTurn_1_1_2, i8.u44.UpdateTurn_1_0_2, i14.u7.EndLoop_0_1, i14.u11.EndLoop_2_1, i14.u43.EndLoop_1_1, i14.u62.UpdateTurn_3_3_1, i14.u62.UpdateTurn_3_2_1, i14.u62.UpdateTurn_3_1_1, i14.u62.UpdateTurn_3_0_1, Intersection with reachable at each step enabled. (destroyed/reverse/intersect/total) :0/248/84/332
1 unique states visited
0 strongly connected components in search stack
0 transitions explored
1 items max in DFS search stack
2072 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,20.7876,328588,1,0,378059,6099,2994,2.52522e+06,646,58273,869363
no accepting run found
Formula 0 is TRUE no accepting run found.
FORMULA Peterson-PT-3-LTLFireability-00 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 1 : !((("((((((((((((i0.u0.TestIdentity_0_0_0>=1)||(i12.u5.TestIdentity_3_1_3>=1))||(i4.u14.TestIdentity_0_2_0>=1))||(i6.u2.TestIdentity_1_1_1>=1))||(i13.u24.TestIdentity_2_1_2>=1))||(i9.u54.TestIdentity_3_0_3>=1))||(i1.u1.TestIdentity_0_1_0>=1))||(i5.u21.TestIdentity_1_0_1>=1))||(i10.u22.TestIdentity_2_0_2>=1))||(i3.u6.TestIdentity_3_2_3>=1))||(i2.u4.TestIdentity_2_2_2>=1))||(i11.u3.TestIdentity_1_2_1>=1))")U(X(("((((((((((((i0.u0.TestIdentity_0_0_0>=1)||(i12.u5.TestIdentity_3_1_3>=1))||(i4.u14.TestIdentity_0_2_0>=1))||(i6.u2.TestIdentity_1_1_1>=1))||(i13.u24.TestIdentity_2_1_2>=1))||(i9.u54.TestIdentity_3_0_3>=1))||(i1.u1.TestIdentity_0_1_0>=1))||(i5.u21.TestIdentity_1_0_1>=1))||(i10.u22.TestIdentity_2_0_2>=1))||(i3.u6.TestIdentity_3_2_3>=1))||(i2.u4.TestIdentity_2_2_2>=1))||(i11.u3.TestIdentity_1_2_1>=1))")U("((((((((((((((((((((((((((((((((((((i1.u60.IsEndLoop_0_1_1>=1)||(i12.u20.IsEndLoop_3_1_0>=1))||(i13.u45.IsEndLoop_2_1_0>=1))||(i6.u2.IsEndLoop_1_1_0>=1))||(i1.u53.IsEndLoop_0_1_2>=1))||(i12.u59.IsEndLoop_3_1_1>=1))||(i13.u24.IsEndLoop_2_1_1>=1))||(i6.u2.IsEndLoop_1_1_1>=1))||(i4.u19.IsEndLoop_0_2_0>=1))||(i12.u5.IsEndLoop_3_1_2>=1))||(i13.u24.IsEndLoop_2_1_2>=1))||(i6.u37.IsEndLoop_1_1_2>=1))||(i4.u58.IsEndLoop_0_2_1>=1))||(i3.u28.IsEndLoop_3_2_0>=1))||(i2.u46.IsEndLoop_2_2_0>=1))||(i11.u3.IsEndLoop_1_2_0>=1))||(i0.u0.IsEndLoop_0_0_0>=1))||(i9.u48.IsEndLoop_3_0_0>=1))||(i0.u27.IsEndLoop_0_0_1>=1))||(i5.u21.IsEndLoop_1_0_0>=1))||(i10.u50.IsEndLoop_2_0_0>=1))||(i9.u29.IsEndLoop_3_0_1>=1))||(i0.u36.IsEndLoop_0_0_2>=1))||(i5.u21.IsEndLoop_1_0_1>=1))||(i10.u22.IsEndLoop_2_0_1>=1))||(i9.u54.IsEndLoop_3_0_2>=1))||(i1.u1.IsEndLoop_0_1_0>=1))||(i5.u52.IsEndLoop_1_0_2>=1))||(i10.u22.IsEndLoop_2_0_2>=1))||(i11.u3.IsEndLoop_1_2_1>=1))||(i2.u4.IsEndLoop_2_2_1>=1))||(i3.u56.IsEndLoop_3_2_1>=1))||(i4.u32.IsEndLoop_0_2_2>=1))||(i11.u33.IsEndLoop_1_2_2>=1))||(i2.u4.IsEndLoop_2_2_2>=1))||(i3.u6.IsEndLoop_3_2_2>=1))")))))
Formula 1 simplified : !("((((((((((((i0.u0.TestIdentity_0_0_0>=1)||(i12.u5.TestIdentity_3_1_3>=1))||(i4.u14.TestIdentity_0_2_0>=1))||(i6.u2.TestIdentity_1_1_1>=1))||(i13.u24.TestIdentity_2_1_2>=1))||(i9.u54.TestIdentity_3_0_3>=1))||(i1.u1.TestIdentity_0_1_0>=1))||(i5.u21.TestIdentity_1_0_1>=1))||(i10.u22.TestIdentity_2_0_2>=1))||(i3.u6.TestIdentity_3_2_3>=1))||(i2.u4.TestIdentity_2_2_2>=1))||(i11.u3.TestIdentity_1_2_1>=1))" U X("((((((((((((i0.u0.TestIdentity_0_0_0>=1)||(i12.u5.TestIdentity_3_1_3>=1))||(i4.u14.TestIdentity_0_2_0>=1))||(i6.u2.TestIdentity_1_1_1>=1))||(i13.u24.TestIdentity_2_1_2>=1))||(i9.u54.TestIdentity_3_0_3>=1))||(i1.u1.TestIdentity_0_1_0>=1))||(i5.u21.TestIdentity_1_0_1>=1))||(i10.u22.TestIdentity_2_0_2>=1))||(i3.u6.TestIdentity_3_2_3>=1))||(i2.u4.TestIdentity_2_2_2>=1))||(i11.u3.TestIdentity_1_2_1>=1))" U "((((((((((((((((((((((((((((((((((((i1.u60.IsEndLoop_0_1_1>=1)||(i12.u20.IsEndLoop_3_1_0>=1))||(i13.u45.IsEndLoop_2_1_0>=1))||(i6.u2.IsEndLoop_1_1_0>=1))||(i1.u53.IsEndLoop_0_1_2>=1))||(i12.u59.IsEndLoop_3_1_1>=1))||(i13.u24.IsEndLoop_2_1_1>=1))||(i6.u2.IsEndLoop_1_1_1>=1))||(i4.u19.IsEndLoop_0_2_0>=1))||(i12.u5.IsEndLoop_3_1_2>=1))||(i13.u24.IsEndLoop_2_1_2>=1))||(i6.u37.IsEndLoop_1_1_2>=1))||(i4.u58.IsEndLoop_0_2_1>=1))||(i3.u28.IsEndLoop_3_2_0>=1))||(i2.u46.IsEndLoop_2_2_0>=1))||(i11.u3.IsEndLoop_1_2_0>=1))||(i0.u0.IsEndLoop_0_0_0>=1))||(i9.u48.IsEndLoop_3_0_0>=1))||(i0.u27.IsEndLoop_0_0_1>=1))||(i5.u21.IsEndLoop_1_0_0>=1))||(i10.u50.IsEndLoop_2_0_0>=1))||(i9.u29.IsEndLoop_3_0_1>=1))||(i0.u36.IsEndLoop_0_0_2>=1))||(i5.u21.IsEndLoop_1_0_1>=1))||(i10.u22.IsEndLoop_2_0_1>=1))||(i9.u54.IsEndLoop_3_0_2>=1))||(i1.u1.IsEndLoop_0_1_0>=1))||(i5.u52.IsEndLoop_1_0_2>=1))||(i10.u22.IsEndLoop_2_0_2>=1))||(i11.u3.IsEndLoop_1_2_1>=1))||(i2.u4.IsEndLoop_2_2_1>=1))||(i3.u56.IsEndLoop_3_2_1>=1))||(i4.u32.IsEndLoop_0_2_2>=1))||(i11.u33.IsEndLoop_1_2_2>=1))||(i2.u4.IsEndLoop_2_2_2>=1))||(i3.u6.IsEndLoop_3_2_2>=1))"))
4 unique states visited
4 strongly connected components in search stack
4 transitions explored
4 items max in DFS search stack
1271 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,33.5074,572592,1,0,630015,10326,3974,4.60373e+06,717,87485,1586435
an accepting run exists (use option '-e' to print it)
Formula 1 is FALSE accepting run found.
FORMULA Peterson-PT-3-LTLFireability-01 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 2 : !((F(F("((((((((((((((((((((((((((((((((((((i2.u23.TestIdentity_2_2_3>=1)||(i4.u32.TestIdentity_0_2_3>=1))||(i11.u33.TestIdentity_1_2_3>=1))||(i11.u55.TestIdentity_1_2_2>=1))||(i3.u56.TestIdentity_3_2_2>=1))||(i3.u28.TestIdentity_3_2_1>=1))||(i4.u58.TestIdentity_0_2_2>=1))||(i7.u38.TestIdentity_2_0_0>=1))||(i7.u15.TestIdentity_3_0_0>=1))||(i0.u47.TestIdentity_0_0_1>=1))||(i10.u50.TestIdentity_2_0_1>=1))||(i7.u39.TestIdentity_1_0_0>=1))||(i0.u36.TestIdentity_0_0_3>=1))||(i5.u52.TestIdentity_1_0_3>=1))||(i10.u51.TestIdentity_2_0_3>=1))||(i14.u42.TestIdentity_1_1_0>=1))||(i9.u48.TestIdentity_3_0_1>=1))||(i0.u27.TestIdentity_0_0_2>=1))||(i5.u30.TestIdentity_1_0_2>=1))||(i9.u29.TestIdentity_3_0_2>=1))||(i1.u60.TestIdentity_0_1_2>=1))||(i12.u20.TestIdentity_3_1_1>=1))||(i12.u59.TestIdentity_3_1_2>=1))||(i6.u57.TestIdentity_1_1_2>=1))||(i14.u40.TestIdentity_3_1_0>=1))||(i14.u41.TestIdentity_2_1_0>=1))||(i13.u45.TestIdentity_2_1_1>=1))||(i1.u49.TestIdentity_0_1_1>=1))||(i8.u18.TestIdentity_3_2_0>=1))||(i2.u17.TestIdentity_2_2_0>=1))||(i2.u46.TestIdentity_2_2_1>=1))||(i4.u31.TestIdentity_0_2_1>=1))||(i6.u37.TestIdentity_1_1_3>=1))||(i1.u53.TestIdentity_0_1_3>=1))||(i8.u16.TestIdentity_1_2_0>=1))||(i13.u61.TestIdentity_2_1_3>=1))"))))
Formula 2 simplified : !F"((((((((((((((((((((((((((((((((((((i2.u23.TestIdentity_2_2_3>=1)||(i4.u32.TestIdentity_0_2_3>=1))||(i11.u33.TestIdentity_1_2_3>=1))||(i11.u55.TestIdentity_1_2_2>=1))||(i3.u56.TestIdentity_3_2_2>=1))||(i3.u28.TestIdentity_3_2_1>=1))||(i4.u58.TestIdentity_0_2_2>=1))||(i7.u38.TestIdentity_2_0_0>=1))||(i7.u15.TestIdentity_3_0_0>=1))||(i0.u47.TestIdentity_0_0_1>=1))||(i10.u50.TestIdentity_2_0_1>=1))||(i7.u39.TestIdentity_1_0_0>=1))||(i0.u36.TestIdentity_0_0_3>=1))||(i5.u52.TestIdentity_1_0_3>=1))||(i10.u51.TestIdentity_2_0_3>=1))||(i14.u42.TestIdentity_1_1_0>=1))||(i9.u48.TestIdentity_3_0_1>=1))||(i0.u27.TestIdentity_0_0_2>=1))||(i5.u30.TestIdentity_1_0_2>=1))||(i9.u29.TestIdentity_3_0_2>=1))||(i1.u60.TestIdentity_0_1_2>=1))||(i12.u20.TestIdentity_3_1_1>=1))||(i12.u59.TestIdentity_3_1_2>=1))||(i6.u57.TestIdentity_1_1_2>=1))||(i14.u40.TestIdentity_3_1_0>=1))||(i14.u41.TestIdentity_2_1_0>=1))||(i13.u45.TestIdentity_2_1_1>=1))||(i1.u49.TestIdentity_0_1_1>=1))||(i8.u18.TestIdentity_3_2_0>=1))||(i2.u17.TestIdentity_2_2_0>=1))||(i2.u46.TestIdentity_2_2_1>=1))||(i4.u31.TestIdentity_0_2_1>=1))||(i6.u37.TestIdentity_1_1_3>=1))||(i1.u53.TestIdentity_0_1_3>=1))||(i8.u16.TestIdentity_1_2_0>=1))||(i13.u61.TestIdentity_2_1_3>=1))"
2 unique states visited
2 strongly connected components in search stack
2 transitions explored
2 items max in DFS search stack
328 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,36.7812,667160,1,0,745784,10851,4108,5.41954e+06,717,92909,1778307
an accepting run exists (use option '-e' to print it)
Formula 2 is FALSE accepting run found.
FORMULA Peterson-PT-3-LTLFireability-02 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 3 : !((F(G(G(X(F("(((((i8.u10.CS_0>=1)&&(i2.u64.WantSection_0_T>=1))||((i2.u26.WantSection_1_T>=1)&&(i8.u44.CS_1>=1)))||((i2.u13.CS_2>=1)&&(i6.u25.WantSection_2_T>=1)))||((i7.u63.WantSection_3_T>=1)&&(i8.u12.CS_3>=1)))")))))))
Formula 3 simplified : !FGXF"(((((i8.u10.CS_0>=1)&&(i2.u64.WantSection_0_T>=1))||((i2.u26.WantSection_1_T>=1)&&(i8.u44.CS_1>=1)))||((i2.u13.CS_2>=1)&&(i6.u25.WantSection_2_T>=1)))||((i7.u63.WantSection_3_T>=1)&&(i8.u12.CS_3>=1)))"
3 unique states visited
3 strongly connected components in search stack
4 transitions explored
3 items max in DFS search stack
788 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,44.6639,741392,1,0,804139,10921,4166,5.95687e+06,717,94328,1915590
an accepting run exists (use option '-e' to print it)
Formula 3 is FALSE accepting run found.
FORMULA Peterson-PT-3-LTLFireability-03 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 4 : !((G((("((((((((((((((((((((((((((((((((((((i1.u60.IsEndLoop_0_1_1>=1)||(i12.u20.IsEndLoop_3_1_0>=1))||(i13.u45.IsEndLoop_2_1_0>=1))||(i6.u2.IsEndLoop_1_1_0>=1))||(i1.u53.IsEndLoop_0_1_2>=1))||(i12.u59.IsEndLoop_3_1_1>=1))||(i13.u24.IsEndLoop_2_1_1>=1))||(i6.u2.IsEndLoop_1_1_1>=1))||(i4.u19.IsEndLoop_0_2_0>=1))||(i12.u5.IsEndLoop_3_1_2>=1))||(i13.u24.IsEndLoop_2_1_2>=1))||(i6.u37.IsEndLoop_1_1_2>=1))||(i4.u58.IsEndLoop_0_2_1>=1))||(i3.u28.IsEndLoop_3_2_0>=1))||(i2.u46.IsEndLoop_2_2_0>=1))||(i11.u3.IsEndLoop_1_2_0>=1))||(i0.u0.IsEndLoop_0_0_0>=1))||(i9.u48.IsEndLoop_3_0_0>=1))||(i0.u27.IsEndLoop_0_0_1>=1))||(i5.u21.IsEndLoop_1_0_0>=1))||(i10.u50.IsEndLoop_2_0_0>=1))||(i9.u29.IsEndLoop_3_0_1>=1))||(i0.u36.IsEndLoop_0_0_2>=1))||(i5.u21.IsEndLoop_1_0_1>=1))||(i10.u22.IsEndLoop_2_0_1>=1))||(i9.u54.IsEndLoop_3_0_2>=1))||(i1.u1.IsEndLoop_0_1_0>=1))||(i5.u52.IsEndLoop_1_0_2>=1))||(i10.u22.IsEndLoop_2_0_2>=1))||(i11.u3.IsEndLoop_1_2_1>=1))||(i2.u4.IsEndLoop_2_2_1>=1))||(i3.u56.IsEndLoop_3_2_1>=1))||(i4.u32.IsEndLoop_0_2_2>=1))||(i11.u33.IsEndLoop_1_2_2>=1))||(i2.u4.IsEndLoop_2_2_2>=1))||(i3.u6.IsEndLoop_3_2_2>=1))")U("(((((((((((((i8.u12.TestTurn_3_2>=1)&&(i8.u44.Turn_2_3>=1))||((i2.u13.TestTurn_2_2>=1)&&(i8.u44.Turn_2_2>=1)))||((i8.u44.TestTurn_1_2>=1)&&(i8.u44.Turn_2_1>=1)))||((i8.u10.TestTurn_0_2>=1)&&(i8.u44.Turn_2_0>=1)))||((i14.u62.TestTurn_3_1>=1)&&(i14.u62.Turn_1_3>=1)))||((i14.u11.TestTurn_2_1>=1)&&(i14.u62.Turn_1_2>=1)))||((i14.u43.TestTurn_1_1>=1)&&(i14.u62.Turn_1_1>=1)))||((i14.u7.TestTurn_0_1>=1)&&(i14.u62.Turn_1_0>=1)))||((i7.u8.Turn_0_3>=1)&&(i7.u35.TestTurn_3_0>=1)))||((i7.u8.TestTurn_2_0>=1)&&(i7.u8.Turn_0_2>=1)))||((i7.u9.TestTurn_1_0>=1)&&(i7.u8.Turn_0_1>=1)))||((i7.u34.TestTurn_0_0>=1)&&(i7.u8.Turn_0_0>=1)))"))U(G("((((((((((((((((((((((((((((((((((((((((((((((((i10.u50.BeginLoop_2_0_1>=1)||(i5.u21.BeginLoop_1_0_1>=1))||(i0.u27.BeginLoop_0_0_2>=1))||(i9.u48.BeginLoop_3_0_1>=1))||(i7.u38.BeginLoop_2_0_0>=1))||(i7.u39.BeginLoop_1_0_0>=1))||(i0.u47.BeginLoop_0_0_1>=1))||(i7.u15.BeginLoop_3_0_0>=1))||(i10.u51.BeginLoop_2_0_3>=1))||(i5.u52.BeginLoop_1_0_3>=1))||(i1.u1.BeginLoop_0_1_0>=1))||(i9.u54.BeginLoop_3_0_3>=1))||(i10.u22.BeginLoop_2_0_2>=1))||(i5.u30.BeginLoop_1_0_2>=1))||(i0.u36.BeginLoop_0_0_3>=1))||(i9.u29.BeginLoop_3_0_2>=1))||(i0.u0.BeginLoop_0_0_0>=1))||(i3.u56.BeginLoop_3_2_2>=1))||(i4.u32.BeginLoop_0_2_3>=1))||(i11.u55.BeginLoop_1_2_2>=1))||(i2.u4.BeginLoop_2_2_2>=1))||(i3.u6.BeginLoop_3_2_3>=1))||(i11.u33.BeginLoop_1_2_3>=1))||(i2.u23.BeginLoop_2_2_3>=1))||(i8.u18.BeginLoop_3_2_0>=1))||(i4.u19.BeginLoop_0_2_1>=1))||(i8.u16.BeginLoop_1_2_0>=1))||(i2.u17.BeginLoop_2_2_0>=1))||(i3.u28.BeginLoop_3_2_1>=1))||(i4.u58.BeginLoop_0_2_2>=1))||(i11.u3.BeginLoop_1_2_1>=1))||(i2.u46.BeginLoop_2_2_1>=1))||(i1.u53.BeginLoop_0_1_3>=1))||(i12.u59.BeginLoop_3_1_2>=1))||(i13.u24.BeginLoop_2_1_2>=1))||(i6.u57.BeginLoop_1_1_2>=1))||(i4.u14.BeginLoop_0_2_0>=1))||(i12.u5.BeginLoop_3_1_3>=1))||(i13.u61.BeginLoop_2_1_3>=1))||(i6.u37.BeginLoop_1_1_3>=1))||(i1.u49.BeginLoop_0_1_1>=1))||(i14.u40.BeginLoop_3_1_0>=1))||(i14.u41.BeginLoop_2_1_0>=1))||(i14.u42.BeginLoop_1_1_0>=1))||(i1.u60.BeginLoop_0_1_2>=1))||(i12.u20.BeginLoop_3_1_1>=1))||(i13.u45.BeginLoop_2_1_1>=1))||(i6.u2.BeginLoop_1_1_1>=1))")))))
Formula 4 simplified : !G(("((((((((((((((((((((((((((((((((((((i1.u60.IsEndLoop_0_1_1>=1)||(i12.u20.IsEndLoop_3_1_0>=1))||(i13.u45.IsEndLoop_2_1_0>=1))||(i6.u2.IsEndLoop_1_1_0>=1))||(i1.u53.IsEndLoop_0_1_2>=1))||(i12.u59.IsEndLoop_3_1_1>=1))||(i13.u24.IsEndLoop_2_1_1>=1))||(i6.u2.IsEndLoop_1_1_1>=1))||(i4.u19.IsEndLoop_0_2_0>=1))||(i12.u5.IsEndLoop_3_1_2>=1))||(i13.u24.IsEndLoop_2_1_2>=1))||(i6.u37.IsEndLoop_1_1_2>=1))||(i4.u58.IsEndLoop_0_2_1>=1))||(i3.u28.IsEndLoop_3_2_0>=1))||(i2.u46.IsEndLoop_2_2_0>=1))||(i11.u3.IsEndLoop_1_2_0>=1))||(i0.u0.IsEndLoop_0_0_0>=1))||(i9.u48.IsEndLoop_3_0_0>=1))||(i0.u27.IsEndLoop_0_0_1>=1))||(i5.u21.IsEndLoop_1_0_0>=1))||(i10.u50.IsEndLoop_2_0_0>=1))||(i9.u29.IsEndLoop_3_0_1>=1))||(i0.u36.IsEndLoop_0_0_2>=1))||(i5.u21.IsEndLoop_1_0_1>=1))||(i10.u22.IsEndLoop_2_0_1>=1))||(i9.u54.IsEndLoop_3_0_2>=1))||(i1.u1.IsEndLoop_0_1_0>=1))||(i5.u52.IsEndLoop_1_0_2>=1))||(i10.u22.IsEndLoop_2_0_2>=1))||(i11.u3.IsEndLoop_1_2_1>=1))||(i2.u4.IsEndLoop_2_2_1>=1))||(i3.u56.IsEndLoop_3_2_1>=1))||(i4.u32.IsEndLoop_0_2_2>=1))||(i11.u33.IsEndLoop_1_2_2>=1))||(i2.u4.IsEndLoop_2_2_2>=1))||(i3.u6.IsEndLoop_3_2_2>=1))" U "(((((((((((((i8.u12.TestTurn_3_2>=1)&&(i8.u44.Turn_2_3>=1))||((i2.u13.TestTurn_2_2>=1)&&(i8.u44.Turn_2_2>=1)))||((i8.u44.TestTurn_1_2>=1)&&(i8.u44.Turn_2_1>=1)))||((i8.u10.TestTurn_0_2>=1)&&(i8.u44.Turn_2_0>=1)))||((i14.u62.TestTurn_3_1>=1)&&(i14.u62.Turn_1_3>=1)))||((i14.u11.TestTurn_2_1>=1)&&(i14.u62.Turn_1_2>=1)))||((i14.u43.TestTurn_1_1>=1)&&(i14.u62.Turn_1_1>=1)))||((i14.u7.TestTurn_0_1>=1)&&(i14.u62.Turn_1_0>=1)))||((i7.u8.Turn_0_3>=1)&&(i7.u35.TestTurn_3_0>=1)))||((i7.u8.TestTurn_2_0>=1)&&(i7.u8.Turn_0_2>=1)))||((i7.u9.TestTurn_1_0>=1)&&(i7.u8.Turn_0_1>=1)))||((i7.u34.TestTurn_0_0>=1)&&(i7.u8.Turn_0_0>=1)))") U G"((((((((((((((((((((((((((((((((((((((((((((((((i10.u50.BeginLoop_2_0_1>=1)||(i5.u21.BeginLoop_1_0_1>=1))||(i0.u27.BeginLoop_0_0_2>=1))||(i9.u48.BeginLoop_3_0_1>=1))||(i7.u38.BeginLoop_2_0_0>=1))||(i7.u39.BeginLoop_1_0_0>=1))||(i0.u47.BeginLoop_0_0_1>=1))||(i7.u15.BeginLoop_3_0_0>=1))||(i10.u51.BeginLoop_2_0_3>=1))||(i5.u52.BeginLoop_1_0_3>=1))||(i1.u1.BeginLoop_0_1_0>=1))||(i9.u54.BeginLoop_3_0_3>=1))||(i10.u22.BeginLoop_2_0_2>=1))||(i5.u30.BeginLoop_1_0_2>=1))||(i0.u36.BeginLoop_0_0_3>=1))||(i9.u29.BeginLoop_3_0_2>=1))||(i0.u0.BeginLoop_0_0_0>=1))||(i3.u56.BeginLoop_3_2_2>=1))||(i4.u32.BeginLoop_0_2_3>=1))||(i11.u55.BeginLoop_1_2_2>=1))||(i2.u4.BeginLoop_2_2_2>=1))||(i3.u6.BeginLoop_3_2_3>=1))||(i11.u33.BeginLoop_1_2_3>=1))||(i2.u23.BeginLoop_2_2_3>=1))||(i8.u18.BeginLoop_3_2_0>=1))||(i4.u19.BeginLoop_0_2_1>=1))||(i8.u16.BeginLoop_1_2_0>=1))||(i2.u17.BeginLoop_2_2_0>=1))||(i3.u28.BeginLoop_3_2_1>=1))||(i4.u58.BeginLoop_0_2_2>=1))||(i11.u3.BeginLoop_1_2_1>=1))||(i2.u46.BeginLoop_2_2_1>=1))||(i1.u53.BeginLoop_0_1_3>=1))||(i12.u59.BeginLoop_3_1_2>=1))||(i13.u24.BeginLoop_2_1_2>=1))||(i6.u57.BeginLoop_1_1_2>=1))||(i4.u14.BeginLoop_0_2_0>=1))||(i12.u5.BeginLoop_3_1_3>=1))||(i13.u61.BeginLoop_2_1_3>=1))||(i6.u37.BeginLoop_1_1_3>=1))||(i1.u49.BeginLoop_0_1_1>=1))||(i14.u40.BeginLoop_3_1_0>=1))||(i14.u41.BeginLoop_2_1_0>=1))||(i14.u42.BeginLoop_1_1_0>=1))||(i1.u60.BeginLoop_0_1_2>=1))||(i12.u20.BeginLoop_3_1_1>=1))||(i13.u45.BeginLoop_2_1_1>=1))||(i6.u2.BeginLoop_1_1_1>=1))")
3 unique states visited
3 strongly connected components in search stack
3 transitions explored
3 items max in DFS search stack
13 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,44.7929,743540,1,0,804586,10921,4497,5.96109e+06,722,94331,1917020
an accepting run exists (use option '-e' to print it)
Formula 4 is FALSE accepting run found.
FORMULA Peterson-PT-3-LTLFireability-04 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 5 : !((X((G(X("(((((((((((((((((((((((((((((((((((((i7.u8.Turn_0_0>=1)&&(i7.u9.TestTurn_1_0>=1))||((i8.u44.Turn_2_0>=1)&&(i2.u13.TestTurn_2_2>=1)))||((i8.u12.TestTurn_3_2>=1)&&(i8.u44.Turn_2_0>=1)))||((i8.u10.TestTurn_0_2>=1)&&(i8.u44.Turn_2_1>=1)))||((i2.u13.TestTurn_2_2>=1)&&(i8.u44.Turn_2_1>=1)))||((i8.u44.Turn_2_1>=1)&&(i8.u12.TestTurn_3_2>=1)))||((i8.u10.TestTurn_0_2>=1)&&(i8.u44.Turn_2_2>=1)))||((i8.u44.TestTurn_1_2>=1)&&(i8.u44.Turn_2_2>=1)))||((i8.u44.Turn_2_2>=1)&&(i8.u12.TestTurn_3_2>=1)))||((i14.u62.Turn_1_1>=1)&&(i14.u62.TestTurn_3_1>=1)))||((i14.u7.TestTurn_0_1>=1)&&(i14.u62.Turn_1_2>=1)))||((i14.u43.TestTurn_1_1>=1)&&(i14.u62.Turn_1_2>=1)))||((i14.u62.TestTurn_3_1>=1)&&(i14.u62.Turn_1_2>=1)))||((i14.u62.Turn_1_3>=1)&&(i14.u7.TestTurn_0_1>=1)))||((i14.u43.TestTurn_1_1>=1)&&(i14.u62.Turn_1_3>=1)))||((i14.u62.Turn_1_3>=1)&&(i14.u11.TestTurn_2_1>=1)))||((i8.u44.TestTurn_1_2>=1)&&(i8.u44.Turn_2_0>=1)))||((i7.u8.Turn_0_3>=1)&&(i7.u9.TestTurn_1_0>=1)))||((i7.u8.Turn_0_3>=1)&&(i7.u34.TestTurn_0_0>=1)))||((i14.u62.Turn_1_0>=1)&&(i14.u43.TestTurn_1_1>=1)))||((i7.u8.TestTurn_2_0>=1)&&(i7.u8.Turn_0_3>=1)))||((i14.u62.Turn_1_0>=1)&&(i14.u62.TestTurn_3_1>=1)))||((i14.u62.Turn_1_0>=1)&&(i14.u11.TestTurn_2_1>=1)))||((i14.u11.TestTurn_2_1>=1)&&(i14.u62.Turn_1_1>=1)))||((i14.u7.TestTurn_0_1>=1)&&(i14.u62.Turn_1_1>=1)))||((i7.u8.Turn_0_0>=1)&&(i7.u35.TestTurn_3_0>=1)))||((i7.u8.Turn_0_0>=1)&&(i7.u8.TestTurn_2_0>=1)))||((i7.u8.Turn_0_1>=1)&&(i7.u8.TestTurn_2_0>=1)))||((i7.u34.TestTurn_0_0>=1)&&(i7.u8.Turn_0_1>=1)))||((i7.u8.Turn_0_2>=1)&&(i7.u34.TestTurn_0_0>=1)))||((i7.u8.Turn_0_1>=1)&&(i7.u35.TestTurn_3_0>=1)))||((i7.u8.Turn_0_2>=1)&&(i7.u35.TestTurn_3_0>=1)))||((i7.u8.Turn_0_2>=1)&&(i7.u9.TestTurn_1_0>=1)))||((i8.u44.Turn_2_3>=1)&&(i2.u13.TestTurn_2_2>=1)))||((i8.u44.Turn_2_3>=1)&&(i8.u44.TestTurn_1_2>=1)))||((i8.u10.TestTurn_0_2>=1)&&(i8.u44.Turn_2_3>=1)))")))U(X(F("(((((((((((((i8.u12.TestTurn_3_2>=1)&&(i8.u44.Turn_2_3>=1))||((i2.u13.TestTurn_2_2>=1)&&(i8.u44.Turn_2_2>=1)))||((i8.u44.TestTurn_1_2>=1)&&(i8.u44.Turn_2_1>=1)))||((i8.u10.TestTurn_0_2>=1)&&(i8.u44.Turn_2_0>=1)))||((i14.u62.TestTurn_3_1>=1)&&(i14.u62.Turn_1_3>=1)))||((i14.u11.TestTurn_2_1>=1)&&(i14.u62.Turn_1_2>=1)))||((i14.u43.TestTurn_1_1>=1)&&(i14.u62.Turn_1_1>=1)))||((i14.u7.TestTurn_0_1>=1)&&(i14.u62.Turn_1_0>=1)))||((i7.u8.Turn_0_3>=1)&&(i7.u35.TestTurn_3_0>=1)))||((i7.u8.TestTurn_2_0>=1)&&(i7.u8.Turn_0_2>=1)))||((i7.u9.TestTurn_1_0>=1)&&(i7.u8.Turn_0_1>=1)))||((i7.u34.TestTurn_0_0>=1)&&(i7.u8.Turn_0_0>=1)))"))))))
Formula 5 simplified : !X(GX"(((((((((((((((((((((((((((((((((((((i7.u8.Turn_0_0>=1)&&(i7.u9.TestTurn_1_0>=1))||((i8.u44.Turn_2_0>=1)&&(i2.u13.TestTurn_2_2>=1)))||((i8.u12.TestTurn_3_2>=1)&&(i8.u44.Turn_2_0>=1)))||((i8.u10.TestTurn_0_2>=1)&&(i8.u44.Turn_2_1>=1)))||((i2.u13.TestTurn_2_2>=1)&&(i8.u44.Turn_2_1>=1)))||((i8.u44.Turn_2_1>=1)&&(i8.u12.TestTurn_3_2>=1)))||((i8.u10.TestTurn_0_2>=1)&&(i8.u44.Turn_2_2>=1)))||((i8.u44.TestTurn_1_2>=1)&&(i8.u44.Turn_2_2>=1)))||((i8.u44.Turn_2_2>=1)&&(i8.u12.TestTurn_3_2>=1)))||((i14.u62.Turn_1_1>=1)&&(i14.u62.TestTurn_3_1>=1)))||((i14.u7.TestTurn_0_1>=1)&&(i14.u62.Turn_1_2>=1)))||((i14.u43.TestTurn_1_1>=1)&&(i14.u62.Turn_1_2>=1)))||((i14.u62.TestTurn_3_1>=1)&&(i14.u62.Turn_1_2>=1)))||((i14.u62.Turn_1_3>=1)&&(i14.u7.TestTurn_0_1>=1)))||((i14.u43.TestTurn_1_1>=1)&&(i14.u62.Turn_1_3>=1)))||((i14.u62.Turn_1_3>=1)&&(i14.u11.TestTurn_2_1>=1)))||((i8.u44.TestTurn_1_2>=1)&&(i8.u44.Turn_2_0>=1)))||((i7.u8.Turn_0_3>=1)&&(i7.u9.TestTurn_1_0>=1)))||((i7.u8.Turn_0_3>=1)&&(i7.u34.TestTurn_0_0>=1)))||((i14.u62.Turn_1_0>=1)&&(i14.u43.TestTurn_1_1>=1)))||((i7.u8.TestTurn_2_0>=1)&&(i7.u8.Turn_0_3>=1)))||((i14.u62.Turn_1_0>=1)&&(i14.u62.TestTurn_3_1>=1)))||((i14.u62.Turn_1_0>=1)&&(i14.u11.TestTurn_2_1>=1)))||((i14.u11.TestTurn_2_1>=1)&&(i14.u62.Turn_1_1>=1)))||((i14.u7.TestTurn_0_1>=1)&&(i14.u62.Turn_1_1>=1)))||((i7.u8.Turn_0_0>=1)&&(i7.u35.TestTurn_3_0>=1)))||((i7.u8.Turn_0_0>=1)&&(i7.u8.TestTurn_2_0>=1)))||((i7.u8.Turn_0_1>=1)&&(i7.u8.TestTurn_2_0>=1)))||((i7.u34.TestTurn_0_0>=1)&&(i7.u8.Turn_0_1>=1)))||((i7.u8.Turn_0_2>=1)&&(i7.u34.TestTurn_0_0>=1)))||((i7.u8.Turn_0_1>=1)&&(i7.u35.TestTurn_3_0>=1)))||((i7.u8.Turn_0_2>=1)&&(i7.u35.TestTurn_3_0>=1)))||((i7.u8.Turn_0_2>=1)&&(i7.u9.TestTurn_1_0>=1)))||((i8.u44.Turn_2_3>=1)&&(i2.u13.TestTurn_2_2>=1)))||((i8.u44.Turn_2_3>=1)&&(i8.u44.TestTurn_1_2>=1)))||((i8.u10.TestTurn_0_2>=1)&&(i8.u44.Turn_2_3>=1)))" U XF"(((((((((((((i8.u12.TestTurn_3_2>=1)&&(i8.u44.Turn_2_3>=1))||((i2.u13.TestTurn_2_2>=1)&&(i8.u44.Turn_2_2>=1)))||((i8.u44.TestTurn_1_2>=1)&&(i8.u44.Turn_2_1>=1)))||((i8.u10.TestTurn_0_2>=1)&&(i8.u44.Turn_2_0>=1)))||((i14.u62.TestTurn_3_1>=1)&&(i14.u62.Turn_1_3>=1)))||((i14.u11.TestTurn_2_1>=1)&&(i14.u62.Turn_1_2>=1)))||((i14.u43.TestTurn_1_1>=1)&&(i14.u62.Turn_1_1>=1)))||((i14.u7.TestTurn_0_1>=1)&&(i14.u62.Turn_1_0>=1)))||((i7.u8.Turn_0_3>=1)&&(i7.u35.TestTurn_3_0>=1)))||((i7.u8.TestTurn_2_0>=1)&&(i7.u8.Turn_0_2>=1)))||((i7.u9.TestTurn_1_0>=1)&&(i7.u8.Turn_0_1>=1)))||((i7.u34.TestTurn_0_0>=1)&&(i7.u8.Turn_0_0>=1)))")
3 unique states visited
0 strongly connected components in search stack
2 transitions explored
3 items max in DFS search stack
1 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,44.8056,743740,1,0,805131,10921,4532,5.96288e+06,722,94331,1918843
no accepting run found
Formula 5 is TRUE no accepting run found.
FORMULA Peterson-PT-3-LTLFireability-05 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 6 : !((F(F(F(X(G("(((((((((((((((((((((((((((((((((((((i7.u63.WantSection_3_F>=1)&&(i5.u52.TestAlone_1_0_3>=1))||((i0.u36.TestAlone_0_0_3>=1)&&(i7.u63.WantSection_3_F>=1)))||((i2.u64.WantSection_0_F>=1)&&(i14.u42.TestAlone_1_1_0>=1)))||((i7.u63.WantSection_3_F>=1)&&(i10.u51.TestAlone_2_0_3>=1)))||((i2.u64.WantSection_0_F>=1)&&(i14.u40.TestAlone_3_1_0>=1)))||((i14.u41.TestAlone_2_1_0>=1)&&(i2.u64.WantSection_0_F>=1)))||((i13.u45.TestAlone_2_1_1>=1)&&(i2.u26.WantSection_1_F>=1)))||((i1.u49.TestAlone_0_1_1>=1)&&(i2.u26.WantSection_1_F>=1)))||((i1.u60.TestAlone_0_1_2>=1)&&(i6.u25.WantSection_2_F>=1)))||((i12.u20.TestAlone_3_1_1>=1)&&(i2.u26.WantSection_1_F>=1)))||((i12.u59.TestAlone_3_1_2>=1)&&(i6.u25.WantSection_2_F>=1)))||((i6.u25.WantSection_2_F>=1)&&(i6.u57.TestAlone_1_1_2>=1)))||((i6.u37.TestAlone_1_1_3>=1)&&(i7.u63.WantSection_3_F>=1)))||((i1.u53.TestAlone_0_1_3>=1)&&(i7.u63.WantSection_3_F>=1)))||((i8.u16.TestAlone_1_2_0>=1)&&(i2.u64.WantSection_0_F>=1)))||((i7.u63.WantSection_3_F>=1)&&(i13.u61.TestAlone_2_1_3>=1)))||((i2.u64.WantSection_0_F>=1)&&(i7.u39.TestAlone_1_0_0>=1)))||((i7.u38.TestAlone_2_0_0>=1)&&(i2.u64.WantSection_0_F>=1)))||((i2.u64.WantSection_0_F>=1)&&(i7.u15.TestAlone_3_0_0>=1)))||((i2.u26.WantSection_1_F>=1)&&(i0.u47.TestAlone_0_0_1>=1)))||((i2.u26.WantSection_1_F>=1)&&(i10.u50.TestAlone_2_0_1>=1)))||((i9.u48.TestAlone_3_0_1>=1)&&(i2.u26.WantSection_1_F>=1)))||((i6.u25.WantSection_2_F>=1)&&(i0.u27.TestAlone_0_0_2>=1)))||((i6.u25.WantSection_2_F>=1)&&(i5.u30.TestAlone_1_0_2>=1)))||((i6.u25.WantSection_2_F>=1)&&(i9.u29.TestAlone_3_0_2>=1)))||((i6.u25.WantSection_2_F>=1)&&(i11.u55.TestAlone_1_2_2>=1)))||((i6.u25.WantSection_2_F>=1)&&(i3.u56.TestAlone_3_2_2>=1)))||((i3.u28.TestAlone_3_2_1>=1)&&(i2.u26.WantSection_1_F>=1)))||((i4.u58.TestAlone_0_2_2>=1)&&(i6.u25.WantSection_2_F>=1)))||((i2.u26.WantSection_1_F>=1)&&(i4.u31.TestAlone_0_2_1>=1)))||((i2.u46.TestAlone_2_2_1>=1)&&(i2.u26.WantSection_1_F>=1)))||((i2.u17.TestAlone_2_2_0>=1)&&(i2.u64.WantSection_0_F>=1)))||((i8.u18.TestAlone_3_2_0>=1)&&(i2.u64.WantSection_0_F>=1)))||((i7.u63.WantSection_3_F>=1)&&(i2.u23.TestAlone_2_2_3>=1)))||((i7.u63.WantSection_3_F>=1)&&(i4.u32.TestAlone_0_2_3>=1)))||((i7.u63.WantSection_3_F>=1)&&(i11.u33.TestAlone_1_2_3>=1)))")))))))
Formula 6 simplified : !FXG"(((((((((((((((((((((((((((((((((((((i7.u63.WantSection_3_F>=1)&&(i5.u52.TestAlone_1_0_3>=1))||((i0.u36.TestAlone_0_0_3>=1)&&(i7.u63.WantSection_3_F>=1)))||((i2.u64.WantSection_0_F>=1)&&(i14.u42.TestAlone_1_1_0>=1)))||((i7.u63.WantSection_3_F>=1)&&(i10.u51.TestAlone_2_0_3>=1)))||((i2.u64.WantSection_0_F>=1)&&(i14.u40.TestAlone_3_1_0>=1)))||((i14.u41.TestAlone_2_1_0>=1)&&(i2.u64.WantSection_0_F>=1)))||((i13.u45.TestAlone_2_1_1>=1)&&(i2.u26.WantSection_1_F>=1)))||((i1.u49.TestAlone_0_1_1>=1)&&(i2.u26.WantSection_1_F>=1)))||((i1.u60.TestAlone_0_1_2>=1)&&(i6.u25.WantSection_2_F>=1)))||((i12.u20.TestAlone_3_1_1>=1)&&(i2.u26.WantSection_1_F>=1)))||((i12.u59.TestAlone_3_1_2>=1)&&(i6.u25.WantSection_2_F>=1)))||((i6.u25.WantSection_2_F>=1)&&(i6.u57.TestAlone_1_1_2>=1)))||((i6.u37.TestAlone_1_1_3>=1)&&(i7.u63.WantSection_3_F>=1)))||((i1.u53.TestAlone_0_1_3>=1)&&(i7.u63.WantSection_3_F>=1)))||((i8.u16.TestAlone_1_2_0>=1)&&(i2.u64.WantSection_0_F>=1)))||((i7.u63.WantSection_3_F>=1)&&(i13.u61.TestAlone_2_1_3>=1)))||((i2.u64.WantSection_0_F>=1)&&(i7.u39.TestAlone_1_0_0>=1)))||((i7.u38.TestAlone_2_0_0>=1)&&(i2.u64.WantSection_0_F>=1)))||((i2.u64.WantSection_0_F>=1)&&(i7.u15.TestAlone_3_0_0>=1)))||((i2.u26.WantSection_1_F>=1)&&(i0.u47.TestAlone_0_0_1>=1)))||((i2.u26.WantSection_1_F>=1)&&(i10.u50.TestAlone_2_0_1>=1)))||((i9.u48.TestAlone_3_0_1>=1)&&(i2.u26.WantSection_1_F>=1)))||((i6.u25.WantSection_2_F>=1)&&(i0.u27.TestAlone_0_0_2>=1)))||((i6.u25.WantSection_2_F>=1)&&(i5.u30.TestAlone_1_0_2>=1)))||((i6.u25.WantSection_2_F>=1)&&(i9.u29.TestAlone_3_0_2>=1)))||((i6.u25.WantSection_2_F>=1)&&(i11.u55.TestAlone_1_2_2>=1)))||((i6.u25.WantSection_2_F>=1)&&(i3.u56.TestAlone_3_2_2>=1)))||((i3.u28.TestAlone_3_2_1>=1)&&(i2.u26.WantSection_1_F>=1)))||((i4.u58.TestAlone_0_2_2>=1)&&(i6.u25.WantSection_2_F>=1)))||((i2.u26.WantSection_1_F>=1)&&(i4.u31.TestAlone_0_2_1>=1)))||((i2.u46.TestAlone_2_2_1>=1)&&(i2.u26.WantSection_1_F>=1)))||((i2.u17.TestAlone_2_2_0>=1)&&(i2.u64.WantSection_0_F>=1)))||((i8.u18.TestAlone_3_2_0>=1)&&(i2.u64.WantSection_0_F>=1)))||((i7.u63.WantSection_3_F>=1)&&(i2.u23.TestAlone_2_2_3>=1)))||((i7.u63.WantSection_3_F>=1)&&(i4.u32.TestAlone_0_2_3>=1)))||((i7.u63.WantSection_3_F>=1)&&(i11.u33.TestAlone_1_2_3>=1)))"
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O3, model.c], workingDir=/home/mcc/execution]
Compilation finished in 5713 ms.
Running link step : CommandLine [args=[gcc, -shared, -o, gal.so, model.o], workingDir=/home/mcc/execution]
Link finished in 72 ms.
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, <>(<>(<>(X([]((LTLAP8==true)))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 32 ms.
FORMULA Peterson-PT-3-LTLFireability-06 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, [](X((<>((LTLAP9==true)))U([]((LTLAP10==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 24 ms.
FORMULA Peterson-PT-3-LTLFireability-07 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, (<>(<>(X((LTLAP11==true)))))U(<>(((LTLAP12==true))U((LTLAP13==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 59 ms.
FORMULA Peterson-PT-3-LTLFireability-08 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, (LTLAP14==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 173 ms.
FORMULA Peterson-PT-3-LTLFireability-09 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, <>((X(<>((LTLAP15==true))))U(X((LTLAP16==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 38 ms.
FORMULA Peterson-PT-3-LTLFireability-10 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, (X(<>((LTLAP17==true))))U((LTLAP18==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 39 ms.
FORMULA Peterson-PT-3-LTLFireability-11 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, (LTLAP19==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 202 ms.
FORMULA Peterson-PT-3-LTLFireability-12 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, []([](([]((LTLAP20==true)))U(X((LTLAP21==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 82 ms.
FORMULA Peterson-PT-3-LTLFireability-13 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X([](X(X(<>((LTLAP22==true)))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 64 ms.
FORMULA Peterson-PT-3-LTLFireability-14 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, <>((X((LTLAP23==true)))U(X((LTLAP24==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 56 ms.
FORMULA Peterson-PT-3-LTLFireability-15 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
ITS tools runner thread asked to quit. Dying gracefully.
BK_STOP 1527504780913
--------------------
content from stderr:
+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution LTLFireability -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -louvain -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -consoleLog -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination LTLFireability -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -louvain -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
May 28, 2018 10:51:25 AM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, LTLFireability, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -louvain, -smt]
May 28, 2018 10:51:25 AM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
May 28, 2018 10:51:25 AM fr.lip6.move.gal.nupn.PTNetReader loadFromXML
INFO: Load time of PNML (sax parser for PT used): 82 ms
May 28, 2018 10:51:25 AM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 244 places.
May 28, 2018 10:51:25 AM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 332 transitions.
May 28, 2018 10:51:25 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.img.gal : 23 ms
May 28, 2018 10:51:25 AM fr.lip6.move.gal.application.MccTranslator applyOrder
INFO: Applying decomposition
May 28, 2018 10:51:26 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 66 ms
May 28, 2018 10:51:26 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 35 ms
Begin: Mon May 28 10:51:26 2018
Computation of communities with the Newman-Girvan Modularity quality function
level 0:
start computation: Mon May 28 10:51:26 2018
network size: 244 nodes, 972 links, 664 weight
quality increased from -0.00546614 to 0.553271
end computation: Mon May 28 10:51:26 2018
level 1:
start computation: Mon May 28 10:51:26 2018
network size: 65 nodes, 417 links, 664 weight
quality increased from 0.553271 to 0.675066
end computation: Mon May 28 10:51:26 2018
level 2:
start computation: Mon May 28 10:51:26 2018
network size: 20 nodes, 132 links, 664 weight
quality increased from 0.675066 to 0.677924
end computation: Mon May 28 10:51:26 2018
level 3:
start computation: Mon May 28 10:51:26 2018
network size: 15 nodes, 91 links, 664 weight
quality increased from 0.677924 to 0.677924
end computation: Mon May 28 10:51:26 2018
End: Mon May 28 10:51:26 2018
Total duration: 0 sec
0.677924
May 28, 2018 10:51:26 AM fr.lip6.move.gal.instantiate.CompositeBuilder decomposeWithOrder
INFO: Decomposing Gal with order
May 28, 2018 10:51:26 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 36 ms
May 28, 2018 10:51:26 AM fr.lip6.move.gal.instantiate.CompositeBuilder rewriteArraysToAllowPartition
INFO: Rewriting arrays to variables to allow decomposition.
May 28, 2018 10:51:26 AM fr.lip6.move.gal.instantiate.Instantiator fuseIsomorphicEffects
INFO: Removed a total of 202 redundant transitions.
May 28, 2018 10:51:26 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/LTLFireability.pnml.gal : 7 ms
May 28, 2018 10:51:26 AM fr.lip6.move.serialization.SerializationUtil serializePropertiesForITSLTLTools
INFO: Time to serialize properties into /home/mcc/execution/LTLFireability.ltl : 3 ms
May 28, 2018 10:51:26 AM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 332 transitions.
May 28, 2018 10:51:26 AM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 15 place invariants in 77 ms
May 28, 2018 10:51:27 AM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 244 variables to be positive in 753 ms
May 28, 2018 10:51:27 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may disable matrix : 332 transitions.
May 28, 2018 10:51:27 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of disable matrix completed :0/332 took 0 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 28, 2018 10:51:27 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete disable matrix. took 24 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 28, 2018 10:51:27 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may enable matrix : 332 transitions.
May 28, 2018 10:51:27 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete enable matrix. took 23 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 28, 2018 10:51:37 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeCoEnablingMatrix
INFO: Computing symmetric co enabling matrix : 332 transitions.
May 28, 2018 10:51:37 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(0/332) took 204 ms. Total solver calls (SAT/UNSAT): 82(0/82)
May 28, 2018 10:51:40 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(14/332) took 3311 ms. Total solver calls (SAT/UNSAT): 1292(47/1245)
May 28, 2018 10:51:43 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(28/332) took 6569 ms. Total solver calls (SAT/UNSAT): 2401(83/2318)
May 28, 2018 10:51:47 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(43/332) took 9846 ms. Total solver calls (SAT/UNSAT): 3566(162/3404)
May 28, 2018 10:51:50 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(53/332) took 13029 ms. Total solver calls (SAT/UNSAT): 4314(212/4102)
May 28, 2018 10:51:53 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(57/332) took 16275 ms. Total solver calls (SAT/UNSAT): 4612(231/4381)
May 28, 2018 10:51:57 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(63/332) took 19919 ms. Total solver calls (SAT/UNSAT): 5046(256/4790)
May 28, 2018 10:52:00 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(69/332) took 23495 ms. Total solver calls (SAT/UNSAT): 5460(279/5181)
May 28, 2018 10:52:06 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(74/332) took 28911 ms. Total solver calls (SAT/UNSAT): 5791(291/5500)
May 28, 2018 10:52:09 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(88/332) took 32204 ms. Total solver calls (SAT/UNSAT): 6705(327/6378)
May 28, 2018 10:52:12 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(102/332) took 35255 ms. Total solver calls (SAT/UNSAT): 7631(358/7273)
May 28, 2018 10:52:15 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(112/332) took 38309 ms. Total solver calls (SAT/UNSAT): 8400(410/7990)
May 28, 2018 10:52:18 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(124/332) took 41627 ms. Total solver calls (SAT/UNSAT): 9266(472/8794)
May 28, 2018 10:52:21 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(131/332) took 44722 ms. Total solver calls (SAT/UNSAT): 9717(498/9219)
May 28, 2018 10:52:25 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(139/332) took 47933 ms. Total solver calls (SAT/UNSAT): 10165(513/9652)
May 28, 2018 10:52:28 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(150/332) took 51576 ms. Total solver calls (SAT/UNSAT): 10811(546/10265)
May 28, 2018 10:52:31 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(160/332) took 54730 ms. Total solver calls (SAT/UNSAT): 11345(572/10773)
May 28, 2018 10:52:35 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(174/332) took 58791 ms. Total solver calls (SAT/UNSAT): 12052(610/11442)
May 28, 2018 10:52:39 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(177/332) took 62360 ms. Total solver calls (SAT/UNSAT): 12163(612/11551)
May 28, 2018 10:52:42 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(205/332) took 65371 ms. Total solver calls (SAT/UNSAT): 12905(612/12293)
May 28, 2018 10:52:45 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(244/332) took 68433 ms. Total solver calls (SAT/UNSAT): 13961(612/13349)
May 28, 2018 10:52:48 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(263/332) took 71454 ms. Total solver calls (SAT/UNSAT): 14349(612/13737)
May 28, 2018 10:52:51 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(307/332) took 74482 ms. Total solver calls (SAT/UNSAT): 14994(612/14382)
May 28, 2018 10:52:52 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Finished co-enabling matrix. took 75324 ms. Total solver calls (SAT/UNSAT): 15088(612/14476)
May 28, 2018 10:52:52 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeDoNotAccord
INFO: Computing Do-Not-Accords matrix : 332 transitions.
May 28, 2018 10:52:53 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed DNA matrix. took 1265 ms. Total solver calls (SAT/UNSAT): 36(0/36)
May 28, 2018 10:52:53 AM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 87359ms conformant to PINS in folder :/home/mcc/execution
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="Peterson-PT-3"
export BK_EXAMINATION="LTLFireability"
export BK_TOOL="itstoolsl"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
tar xzf /home/mcc/BenchKit/INPUTS/Peterson-PT-3.tgz
mv Peterson-PT-3 execution
cd execution
pwd
ls -lh
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3637"
echo " Executing tool itstoolsl"
echo " Input is Peterson-PT-3, examination is LTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r261-csrt-152732586000162"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;