Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Waiting for the VM to be ready (probing ssh)
..........................................................
/home/mcc/execution
total 228K
-rw-r--r-- 1 mcc users 4.3K May 15 18:54 CTLCardinality.txt
-rw-r--r-- 1 mcc users 24K May 15 18:54 CTLCardinality.xml
-rw-r--r-- 1 mcc users 3.0K May 15 18:54 CTLFireability.txt
-rw-r--r-- 1 mcc users 20K May 15 18:54 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K May 15 18:50 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.0K May 15 18:50 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 2.5K May 26 09:26 LTLCardinality.txt
-rw-r--r-- 1 mcc users 12K May 26 09:26 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.0K May 26 09:26 LTLFireability.txt
-rw-r--r-- 1 mcc users 11K May 26 09:26 LTLFireability.xml
-rw-r--r-- 1 mcc users 3.6K May 15 18:54 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 17K May 15 18:54 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 105 May 15 18:54 ReachabilityDeadlock.txt
-rw-r--r-- 1 mcc users 343 May 15 18:54 ReachabilityDeadlock.xml
-rw-r--r-- 1 mcc users 3.5K May 15 18:54 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 22K May 15 18:54 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K May 15 18:54 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.7K May 15 18:54 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 May 15 18:50 equiv_pt
-rw-r--r-- 1 mcc users 2 May 15 18:50 instance
-rw-r--r-- 1 mcc users 5 May 15 18:50 iscolored
-rw-r--r-- 1 mcc users 45K May 15 18:50 model.pnml
=====================================================================
Generated by BenchKit 2-3637
Executing tool itstoolsl
Input is Peterson-COL-5, examination is LTLCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r261-csrt-152732586000153
=====================================================================

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME Peterson-COL-5-LTLCardinality-00
FORMULA_NAME Peterson-COL-5-LTLCardinality-01
FORMULA_NAME Peterson-COL-5-LTLCardinality-02
FORMULA_NAME Peterson-COL-5-LTLCardinality-03
FORMULA_NAME Peterson-COL-5-LTLCardinality-04
FORMULA_NAME Peterson-COL-5-LTLCardinality-05
FORMULA_NAME Peterson-COL-5-LTLCardinality-06
FORMULA_NAME Peterson-COL-5-LTLCardinality-07
FORMULA_NAME Peterson-COL-5-LTLCardinality-08
FORMULA_NAME Peterson-COL-5-LTLCardinality-09
FORMULA_NAME Peterson-COL-5-LTLCardinality-10
FORMULA_NAME Peterson-COL-5-LTLCardinality-11
FORMULA_NAME Peterson-COL-5-LTLCardinality-12
FORMULA_NAME Peterson-COL-5-LTLCardinality-13
FORMULA_NAME Peterson-COL-5-LTLCardinality-14
FORMULA_NAME Peterson-COL-5-LTLCardinality-15

=== Now, execution of the tool begins

BK_START 1527504407440

10:46:49.937 [main] ERROR PNML validation - The rng grammar file can't be accessed : www.pnml.org
10:46:49.943 [main] ERROR import - Grammar file errors have been raised, the validation can't be done, process will continue without Grammar validation
Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805241334/bin/its-ltl-linux64, --gc-threshold, 2000000, -i, /home/mcc/execution/LTLCardinality.pnml.gal, -t, CGAL, -LTL, /home/mcc/execution/LTLCardinality.ltl, -c, -stutter-deadlock], workingDir=/home/mcc/execution]

its-ltl command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805241334/bin/its-ltl-linux64 --gc-threshold 2000000 -i /home/mcc/execution/LTLCardinality.pnml.gal -t CGAL -LTL /home/mcc/execution/LTLCardinality.ltl -c -stutter-deadlock
Read 16 LTL properties
Checking formula 0 : !((F(F(F(X("((((((((((((wantSection_0+wantSection_1)+wantSection_2)+wantSection_3)+wantSection_4)+wantSection_5)+wantSection_6)+wantSection_7)+wantSection_8)+wantSection_9)+wantSection_10)+wantSection_11)>=3)"))))))
Formula 0 simplified : !FX"((((((((((((wantSection_0+wantSection_1)+wantSection_2)+wantSection_3)+wantSection_4)+wantSection_5)+wantSection_6)+wantSection_7)+wantSection_8)+wantSection_9)+wantSection_10)+wantSection_11)>=3)"
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
Normalized transition count is 1182
// Phase 1: matrix 1182 rows 864 cols
invariant :wantSection_6 + wantSection_7 = 1
invariant :-1'wantSection_3 + askForSection_5 + askForSection_6 + askForSection_7 + askForSection_8 + askForSection_9 + testTurn_5 + testTurn_6 + testTurn_7 + testTurn_8 + testTurn_9 + beginLoop_30 + beginLoop_31 + beginLoop_32 + beginLoop_33 + beginLoop_34 + beginLoop_35 + beginLoop_36 + beginLoop_37 + beginLoop_38 + beginLoop_39 + beginLoop_40 + beginLoop_41 + beginLoop_42 + beginLoop_43 + beginLoop_44 + beginLoop_45 + beginLoop_46 + beginLoop_47 + beginLoop_48 + beginLoop_49 + beginLoop_50 + beginLoop_51 + beginLoop_52 + beginLoop_53 + beginLoop_54 + beginLoop_55 + beginLoop_56 + beginLoop_57 + beginLoop_58 + beginLoop_59 + endTurn_5 + endTurn_6 + endTurn_7 + endTurn_8 + endTurn_9 + CS_1 + testIdentity_30 + testIdentity_31 + testIdentity_32 + testIdentity_33 + testIdentity_34 + testIdentity_35 + testIdentity_36 + testIdentity_37 + testIdentity_38 + testIdentity_39 + testIdentity_40 + testIdentity_41 + testIdentity_42 + testIdentity_43 + testIdentity_44 + testIdentity_45 + testIdentity_46 + testIdentity_47 + testIdentity_48 + testIdentity_49 + testIdentity_50 + testIdentity_51 + testIdentity_52 + testIdentity_53 + testIdentity_54 + testIdentity_55 + testIdentity_56 + testIdentity_57 + testIdentity_58 + testIdentity_59 + testAlone_30 + testAlone_31 + testAlone_32 + testAlone_33 + testAlone_34 + testAlone_35 + testAlone_36 + testAlone_37 + testAlone_38 + testAlone_39 + testAlone_40 + testAlone_41 + testAlone_42 + testAlone_43 + testAlone_44 + testAlone_45 + testAlone_46 + testAlone_47 + testAlone_48 + testAlone_49 + testAlone_50 + testAlone_51 + testAlone_52 + testAlone_53 + testAlone_54 + testAlone_55 + testAlone_56 + testAlone_57 + testAlone_58 + testAlone_59 + isEndLoop_30 + isEndLoop_31 + isEndLoop_32 + isEndLoop_33 + isEndLoop_34 + isEndLoop_35 + isEndLoop_36 + isEndLoop_37 + isEndLoop_38 + isEndLoop_39 + isEndLoop_40 + isEndLoop_41 + isEndLoop_42 + isEndLoop_43 + isEndLoop_44 + isEndLoop_45 + isEndLoop_46 + isEndLoop_47 + isEndLoop_48 + isEndLoop_49 + isEndLoop_50 + isEndLoop_51 + isEndLoop_52 + isEndLoop_53 + isEndLoop_54 + isEndLoop_55 + isEndLoop_56 + isEndLoop_57 + isEndLoop_58 + isEndLoop_59 = 0
invariant :idle_0 + wantSection_1 = 1
invariant :-1'wantSection_7 + askForSection_15 + askForSection_16 + askForSection_17 + askForSection_18 + askForSection_19 + testTurn_15 + testTurn_16 + testTurn_17 + testTurn_18 + testTurn_19 + beginLoop_90 + beginLoop_91 + beginLoop_92 + beginLoop_93 + beginLoop_94 + beginLoop_95 + beginLoop_96 + beginLoop_97 + beginLoop_98 + beginLoop_99 + beginLoop_100 + beginLoop_101 + beginLoop_102 + beginLoop_103 + beginLoop_104 + beginLoop_105 + beginLoop_106 + beginLoop_107 + beginLoop_108 + beginLoop_109 + beginLoop_110 + beginLoop_111 + beginLoop_112 + beginLoop_113 + beginLoop_114 + beginLoop_115 + beginLoop_116 + beginLoop_117 + beginLoop_118 + beginLoop_119 + endTurn_15 + endTurn_16 + endTurn_17 + endTurn_18 + endTurn_19 + CS_3 + testIdentity_90 + testIdentity_91 + testIdentity_92 + testIdentity_93 + testIdentity_94 + testIdentity_95 + testIdentity_96 + testIdentity_97 + testIdentity_98 + testIdentity_99 + testIdentity_100 + testIdentity_101 + testIdentity_102 + testIdentity_103 + testIdentity_104 + testIdentity_105 + testIdentity_106 + testIdentity_107 + testIdentity_108 + testIdentity_109 + testIdentity_110 + testIdentity_111 + testIdentity_112 + testIdentity_113 + testIdentity_114 + testIdentity_115 + testIdentity_116 + testIdentity_117 + testIdentity_118 + testIdentity_119 + testAlone_90 + testAlone_91 + testAlone_92 + testAlone_93 + testAlone_94 + testAlone_95 + testAlone_96 + testAlone_97 + testAlone_98 + testAlone_99 + testAlone_100 + testAlone_101 + testAlone_102 + testAlone_103 + testAlone_104 + testAlone_105 + testAlone_106 + testAlone_107 + testAlone_108 + testAlone_109 + testAlone_110 + testAlone_111 + testAlone_112 + testAlone_113 + testAlone_114 + testAlone_115 + testAlone_116 + testAlone_117 + testAlone_118 + testAlone_119 + isEndLoop_90 + isEndLoop_91 + isEndLoop_92 + isEndLoop_93 + isEndLoop_94 + isEndLoop_95 + isEndLoop_96 + isEndLoop_97 + isEndLoop_98 + isEndLoop_99 + isEndLoop_100 + isEndLoop_101 + isEndLoop_102 + isEndLoop_103 + isEndLoop_104 + isEndLoop_105 + isEndLoop_106 + isEndLoop_107 + isEndLoop_108 + isEndLoop_109 + isEndLoop_110 + isEndLoop_111 + isEndLoop_112 + isEndLoop_113 + isEndLoop_114 + isEndLoop_115 + isEndLoop_116 + isEndLoop_117 + isEndLoop_118 + isEndLoop_119 = 0
invariant :turn_6 + turn_7 + turn_8 + turn_9 + turn_10 + turn_11 = 1
invariant :turn_24 + turn_25 + turn_26 + turn_27 + turn_28 + turn_29 = 1
invariant :idle_2 + wantSection_5 = 1
invariant :wantSection_4 + wantSection_5 = 1
invariant :idle_5 + wantSection_11 = 1
invariant :turn_12 + turn_13 + turn_14 + turn_15 + turn_16 + turn_17 = 1
invariant :turn_18 + turn_19 + turn_20 + turn_21 + turn_22 + turn_23 = 1
invariant :-1'wantSection_1 + askForSection_0 + askForSection_1 + askForSection_2 + askForSection_3 + askForSection_4 + testTurn_0 + testTurn_1 + testTurn_2 + testTurn_3 + testTurn_4 + beginLoop_0 + beginLoop_1 + beginLoop_2 + beginLoop_3 + beginLoop_4 + beginLoop_5 + beginLoop_6 + beginLoop_7 + beginLoop_8 + beginLoop_9 + beginLoop_10 + beginLoop_11 + beginLoop_12 + beginLoop_13 + beginLoop_14 + beginLoop_15 + beginLoop_16 + beginLoop_17 + beginLoop_18 + beginLoop_19 + beginLoop_20 + beginLoop_21 + beginLoop_22 + beginLoop_23 + beginLoop_24 + beginLoop_25 + beginLoop_26 + beginLoop_27 + beginLoop_28 + beginLoop_29 + endTurn_0 + endTurn_1 + endTurn_2 + endTurn_3 + endTurn_4 + CS_0 + testIdentity_0 + testIdentity_1 + testIdentity_2 + testIdentity_3 + testIdentity_4 + testIdentity_5 + testIdentity_6 + testIdentity_7 + testIdentity_8 + testIdentity_9 + testIdentity_10 + testIdentity_11 + testIdentity_12 + testIdentity_13 + testIdentity_14 + testIdentity_15 + testIdentity_16 + testIdentity_17 + testIdentity_18 + testIdentity_19 + testIdentity_20 + testIdentity_21 + testIdentity_22 + testIdentity_23 + testIdentity_24 + testIdentity_25 + testIdentity_26 + testIdentity_27 + testIdentity_28 + testIdentity_29 + testAlone_0 + testAlone_1 + testAlone_2 + testAlone_3 + testAlone_4 + testAlone_5 + testAlone_6 + testAlone_7 + testAlone_8 + testAlone_9 + testAlone_10 + testAlone_11 + testAlone_12 + testAlone_13 + testAlone_14 + testAlone_15 + testAlone_16 + testAlone_17 + testAlone_18 + testAlone_19 + testAlone_20 + testAlone_21 + testAlone_22 + testAlone_23 + testAlone_24 + testAlone_25 + testAlone_26 + testAlone_27 + testAlone_28 + testAlone_29 + isEndLoop_0 + isEndLoop_1 + isEndLoop_2 + isEndLoop_3 + isEndLoop_4 + isEndLoop_5 + isEndLoop_6 + isEndLoop_7 + isEndLoop_8 + isEndLoop_9 + isEndLoop_10 + isEndLoop_11 + isEndLoop_12 + isEndLoop_13 + isEndLoop_14 + isEndLoop_15 + isEndLoop_16 + isEndLoop_17 + isEndLoop_18 + isEndLoop_19 + isEndLoop_20 + isEndLoop_21 + isEndLoop_22 + isEndLoop_23 + isEndLoop_24 + isEndLoop_25 + isEndLoop_26 + isEndLoop_27 + isEndLoop_28 + isEndLoop_29 = 0
invariant :wantSection_10 + wantSection_11 = 1
invariant :idle_1 + wantSection_3 = 1
invariant :-1'wantSection_5 + askForSection_10 + askForSection_11 + askForSection_12 + askForSection_13 + askForSection_14 + testTurn_10 + testTurn_11 + testTurn_12 + testTurn_13 + testTurn_14 + beginLoop_60 + beginLoop_61 + beginLoop_62 + beginLoop_63 + beginLoop_64 + beginLoop_65 + beginLoop_66 + beginLoop_67 + beginLoop_68 + beginLoop_69 + beginLoop_70 + beginLoop_71 + beginLoop_72 + beginLoop_73 + beginLoop_74 + beginLoop_75 + beginLoop_76 + beginLoop_77 + beginLoop_78 + beginLoop_79 + beginLoop_80 + beginLoop_81 + beginLoop_82 + beginLoop_83 + beginLoop_84 + beginLoop_85 + beginLoop_86 + beginLoop_87 + beginLoop_88 + beginLoop_89 + endTurn_10 + endTurn_11 + endTurn_12 + endTurn_13 + endTurn_14 + CS_2 + testIdentity_60 + testIdentity_61 + testIdentity_62 + testIdentity_63 + testIdentity_64 + testIdentity_65 + testIdentity_66 + testIdentity_67 + testIdentity_68 + testIdentity_69 + testIdentity_70 + testIdentity_71 + testIdentity_72 + testIdentity_73 + testIdentity_74 + testIdentity_75 + testIdentity_76 + testIdentity_77 + testIdentity_78 + testIdentity_79 + testIdentity_80 + testIdentity_81 + testIdentity_82 + testIdentity_83 + testIdentity_84 + testIdentity_85 + testIdentity_86 + testIdentity_87 + testIdentity_88 + testIdentity_89 + testAlone_60 + testAlone_61 + testAlone_62 + testAlone_63 + testAlone_64 + testAlone_65 + testAlone_66 + testAlone_67 + testAlone_68 + testAlone_69 + testAlone_70 + testAlone_71 + testAlone_72 + testAlone_73 + testAlone_74 + testAlone_75 + testAlone_76 + testAlone_77 + testAlone_78 + testAlone_79 + testAlone_80 + testAlone_81 + testAlone_82 + testAlone_83 + testAlone_84 + testAlone_85 + testAlone_86 + testAlone_87 + testAlone_88 + testAlone_89 + isEndLoop_60 + isEndLoop_61 + isEndLoop_62 + isEndLoop_63 + isEndLoop_64 + isEndLoop_65 + isEndLoop_66 + isEndLoop_67 + isEndLoop_68 + isEndLoop_69 + isEndLoop_70 + isEndLoop_71 + isEndLoop_72 + isEndLoop_73 + isEndLoop_74 + isEndLoop_75 + isEndLoop_76 + isEndLoop_77 + isEndLoop_78 + isEndLoop_79 + isEndLoop_80 + isEndLoop_81 + isEndLoop_82 + isEndLoop_83 + isEndLoop_84 + isEndLoop_85 + isEndLoop_86 + isEndLoop_87 + isEndLoop_88 + isEndLoop_89 = 0
invariant :wantSection_2 + wantSection_3 = 1
invariant :idle_4 + wantSection_9 = 1
invariant :wantSection_8 + wantSection_9 = 1
invariant :-1'wantSection_11 + askForSection_25 + askForSection_26 + askForSection_27 + askForSection_28 + askForSection_29 + testTurn_25 + testTurn_26 + testTurn_27 + testTurn_28 + testTurn_29 + beginLoop_150 + beginLoop_151 + beginLoop_152 + beginLoop_153 + beginLoop_154 + beginLoop_155 + beginLoop_156 + beginLoop_157 + beginLoop_158 + beginLoop_159 + beginLoop_160 + beginLoop_161 + beginLoop_162 + beginLoop_163 + beginLoop_164 + beginLoop_165 + beginLoop_166 + beginLoop_167 + beginLoop_168 + beginLoop_169 + beginLoop_170 + beginLoop_171 + beginLoop_172 + beginLoop_173 + beginLoop_174 + beginLoop_175 + beginLoop_176 + beginLoop_177 + beginLoop_178 + beginLoop_179 + endTurn_25 + endTurn_26 + endTurn_27 + endTurn_28 + endTurn_29 + CS_5 + testIdentity_150 + testIdentity_151 + testIdentity_152 + testIdentity_153 + testIdentity_154 + testIdentity_155 + testIdentity_156 + testIdentity_157 + testIdentity_158 + testIdentity_159 + testIdentity_160 + testIdentity_161 + testIdentity_162 + testIdentity_163 + testIdentity_164 + testIdentity_165 + testIdentity_166 + testIdentity_167 + testIdentity_168 + testIdentity_169 + testIdentity_170 + testIdentity_171 + testIdentity_172 + testIdentity_173 + testIdentity_174 + testIdentity_175 + testIdentity_176 + testIdentity_177 + testIdentity_178 + testIdentity_179 + testAlone_150 + testAlone_151 + testAlone_152 + testAlone_153 + testAlone_154 + testAlone_155 + testAlone_156 + testAlone_157 + testAlone_158 + testAlone_159 + testAlone_160 + testAlone_161 + testAlone_162 + testAlone_163 + testAlone_164 + testAlone_165 + testAlone_166 + testAlone_167 + testAlone_168 + testAlone_169 + testAlone_170 + testAlone_171 + testAlone_172 + testAlone_173 + testAlone_174 + testAlone_175 + testAlone_176 + testAlone_177 + testAlone_178 + testAlone_179 + isEndLoop_150 + isEndLoop_151 + isEndLoop_152 + isEndLoop_153 + isEndLoop_154 + isEndLoop_155 + isEndLoop_156 + isEndLoop_157 + isEndLoop_158 + isEndLoop_159 + isEndLoop_160 + isEndLoop_161 + isEndLoop_162 + isEndLoop_163 + isEndLoop_164 + isEndLoop_165 + isEndLoop_166 + isEndLoop_167 + isEndLoop_168 + isEndLoop_169 + isEndLoop_170 + isEndLoop_171 + isEndLoop_172 + isEndLoop_173 + isEndLoop_174 + isEndLoop_175 + isEndLoop_176 + isEndLoop_177 + isEndLoop_178 + isEndLoop_179 = 0
invariant :idle_3 + wantSection_7 = 1
invariant :-1'wantSection_9 + askForSection_20 + askForSection_21 + askForSection_22 + askForSection_23 + askForSection_24 + testTurn_20 + testTurn_21 + testTurn_22 + testTurn_23 + testTurn_24 + beginLoop_120 + beginLoop_121 + beginLoop_122 + beginLoop_123 + beginLoop_124 + beginLoop_125 + beginLoop_126 + beginLoop_127 + beginLoop_128 + beginLoop_129 + beginLoop_130 + beginLoop_131 + beginLoop_132 + beginLoop_133 + beginLoop_134 + beginLoop_135 + beginLoop_136 + beginLoop_137 + beginLoop_138 + beginLoop_139 + beginLoop_140 + beginLoop_141 + beginLoop_142 + beginLoop_143 + beginLoop_144 + beginLoop_145 + beginLoop_146 + beginLoop_147 + beginLoop_148 + beginLoop_149 + endTurn_20 + endTurn_21 + endTurn_22 + endTurn_23 + endTurn_24 + CS_4 + testIdentity_120 + testIdentity_121 + testIdentity_122 + testIdentity_123 + testIdentity_124 + testIdentity_125 + testIdentity_126 + testIdentity_127 + testIdentity_128 + testIdentity_129 + testIdentity_130 + testIdentity_131 + testIdentity_132 + testIdentity_133 + testIdentity_134 + testIdentity_135 + testIdentity_136 + testIdentity_137 + testIdentity_138 + testIdentity_139 + testIdentity_140 + testIdentity_141 + testIdentity_142 + testIdentity_143 + testIdentity_144 + testIdentity_145 + testIdentity_146 + testIdentity_147 + testIdentity_148 + testIdentity_149 + testAlone_120 + testAlone_121 + testAlone_122 + testAlone_123 + testAlone_124 + testAlone_125 + testAlone_126 + testAlone_127 + testAlone_128 + testAlone_129 + testAlone_130 + testAlone_131 + testAlone_132 + testAlone_133 + testAlone_134 + testAlone_135 + testAlone_136 + testAlone_137 + testAlone_138 + testAlone_139 + testAlone_140 + testAlone_141 + testAlone_142 + testAlone_143 + testAlone_144 + testAlone_145 + testAlone_146 + testAlone_147 + testAlone_148 + testAlone_149 + isEndLoop_120 + isEndLoop_121 + isEndLoop_122 + isEndLoop_123 + isEndLoop_124 + isEndLoop_125 + isEndLoop_126 + isEndLoop_127 + isEndLoop_128 + isEndLoop_129 + isEndLoop_130 + isEndLoop_131 + isEndLoop_132 + isEndLoop_133 + isEndLoop_134 + isEndLoop_135 + isEndLoop_136 + isEndLoop_137 + isEndLoop_138 + isEndLoop_139 + isEndLoop_140 + isEndLoop_141 + isEndLoop_142 + isEndLoop_143 + isEndLoop_144 + isEndLoop_145 + isEndLoop_146 + isEndLoop_147 + isEndLoop_148 + isEndLoop_149 = 0
invariant :turn_0 + turn_1 + turn_2 + turn_3 + turn_4 + turn_5 = 1
invariant :wantSection_0 + wantSection_1 = 1
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O3, model.c], workingDir=/home/mcc/execution]
Compilation finished in 17712 ms.
Running link step : CommandLine [args=[gcc, -shared, -o, gal.so, model.o], workingDir=/home/mcc/execution]
Link finished in 173 ms.
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, <>(<>(<>(X((LTLAP0==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 336 ms.
FORMULA Peterson-COL-5-LTLCardinality-00 TRUE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, [](X((LTLAP1==true))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 119 ms.
FORMULA Peterson-COL-5-LTLCardinality-01 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X((X((LTLAP2==true)))U((LTLAP3==true))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 128 ms.
FORMULA Peterson-COL-5-LTLCardinality-02 TRUE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, (X((LTLAP4==true)))U(((LTLAP5==true))U((LTLAP6==true))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 155 ms.
FORMULA Peterson-COL-5-LTLCardinality-03 TRUE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, [](([]((LTLAP7==true)))U((LTLAP8==true))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 14558 ms.
FORMULA Peterson-COL-5-LTLCardinality-04 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, (<>([]((LTLAP9==true))))U(<>(<>((LTLAP10==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 6969 ms.
FORMULA Peterson-COL-5-LTLCardinality-05 TRUE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, []((LTLAP11==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
sparsehash FATAL ERROR: failed to allocate 38 groups
WARNING : LTSmin timed out (>225 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, []((LTLAP11==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, <>((LTLAP12==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 6916 ms.
FORMULA Peterson-COL-5-LTLCardinality-07 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X((<>((LTLAP1==true)))U([]((LTLAP13==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 1806 ms.
FORMULA Peterson-COL-5-LTLCardinality-08 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, [](<>([]([]((LTLAP10==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
WARNING : LTSmin timed out (>225 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, [](<>([]([]((LTLAP10==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, (LTLAP14==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 6873 ms.
FORMULA Peterson-COL-5-LTLCardinality-10 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, (LTLAP0==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 6772 ms.
FORMULA Peterson-COL-5-LTLCardinality-11 TRUE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X(<>(((LTLAP15==true))U((LTLAP16==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 92 ms.
FORMULA Peterson-COL-5-LTLCardinality-12 TRUE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, [](X(((LTLAP17==true))U((LTLAP18==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 231 ms.
FORMULA Peterson-COL-5-LTLCardinality-13 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, (LTLAP19==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 6784 ms.
FORMULA Peterson-COL-5-LTLCardinality-14 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, ([](<>((LTLAP0==true))))U(((LTLAP20==true))U((LTLAP11==true))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 6779 ms.
FORMULA Peterson-COL-5-LTLCardinality-15 TRUE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Retrying LTSmin with larger timeout 1800 s
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, []((LTLAP11==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
WARNING : LTSmin timed out (>1800 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, []((LTLAP11==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, [](<>([]([]((LTLAP10==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]

BK_TIME_CONFINEMENT_REACHED

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution LTLCardinality -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -louvain -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -consoleLog -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination LTLCardinality -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -louvain -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
May 28, 2018 10:46:49 AM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, LTLCardinality, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -louvain, -smt]
May 28, 2018 10:46:49 AM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
May 28, 2018 10:46:49 AM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Detected file is not PT type :http://www.pnml.org/version-2009/grammar/symmetricnet
May 28, 2018 10:46:50 AM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Load time of PNML (colored model parsed with PNMLFW) : 852 ms
May 28, 2018 10:46:50 AM fr.lip6.move.gal.pnml.togal.HLGALTransformer handlePage
INFO: Transformed 11 places.
May 28, 2018 10:46:50 AM fr.lip6.move.gal.pnml.togal.HLGALTransformer handlePage
INFO: Computed order using colors.
May 28, 2018 10:46:50 AM fr.lip6.move.gal.pnml.togal.HLGALTransformer handlePage
INFO: sort/places :ProcTourProc->beginLoop,testIdentity,testAlone,isEndLoop,
ProcBool->wantSection,
ProcTour->askForSection,testTurn,endTurn,
TourProc->turn,
Process->idle,CS,

May 28, 2018 10:46:50 AM fr.lip6.move.gal.pnml.togal.HLGALTransformer handlePage
INFO: Transformed 14 transitions.
May 28, 2018 10:46:50 AM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Computed order based on color domains.
May 28, 2018 10:46:50 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.img.gal : 8 ms
May 28, 2018 10:46:50 AM fr.lip6.move.gal.instantiate.Instantiator instantiateParameters
INFO: On-the-fly reduction of False transitions avoided exploring 96.0 instantiations of transitions. Total transitions/syncs built is 1308
May 28, 2018 10:46:50 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 282 ms
May 28, 2018 10:46:51 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/LTLCardinality.pnml.gal : 29 ms
May 28, 2018 10:46:51 AM fr.lip6.move.serialization.SerializationUtil serializePropertiesForITSLTLTools
INFO: Time to serialize properties into /home/mcc/execution/LTLCardinality.ltl : 7 ms
May 28, 2018 10:46:52 AM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was not deterministic with 1284 transitions. Expanding to a total of 1308 deterministic transitions.
May 28, 2018 10:46:52 AM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Determinization took 9 ms.
May 28, 2018 10:46:53 AM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 23 place invariants in 527 ms
May 28, 2018 10:46:54 AM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 864 variables to be positive in 1590 ms
May 28, 2018 10:46:54 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may disable matrix : 1302 transitions.
May 28, 2018 10:46:54 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of disable matrix completed :0/1302 took 1 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 28, 2018 10:46:54 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete disable matrix. took 103 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 28, 2018 10:46:54 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may enable matrix : 1302 transitions.
May 28, 2018 10:46:54 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete enable matrix. took 48 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 28, 2018 10:49:55 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeCoEnablingMatrix
INFO: Computing symmetric co enabling matrix : 1302 transitions.
May 28, 2018 10:49:55 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(0/1302) took 39 ms. Total solver calls (SAT/UNSAT): 61(30/31)
May 28, 2018 10:49:59 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(10/1302) took 3330 ms. Total solver calls (SAT/UNSAT): 1856(1380/476)
May 28, 2018 10:50:02 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(16/1302) took 6779 ms. Total solver calls (SAT/UNSAT): 3611(2815/796)
May 28, 2018 10:50:05 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(22/1302) took 9833 ms. Total solver calls (SAT/UNSAT): 5330(4244/1086)
May 28, 2018 10:50:09 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(27/1302) took 13307 ms. Total solver calls (SAT/UNSAT): 6735(5430/1305)
May 28, 2018 10:50:12 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(33/1302) took 16575 ms. Total solver calls (SAT/UNSAT): 8388(6848/1540)
May 28, 2018 10:50:15 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(39/1302) took 20190 ms. Total solver calls (SAT/UNSAT): 10005(8260/1745)
May 28, 2018 10:50:19 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(45/1302) took 23528 ms. Total solver calls (SAT/UNSAT): 11706(9666/2040)
May 28, 2018 10:50:22 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(51/1302) took 26535 ms. Total solver calls (SAT/UNSAT): 13431(11066/2365)
May 28, 2018 10:50:25 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(58/1302) took 29940 ms. Total solver calls (SAT/UNSAT): 15398(12692/2706)
May 28, 2018 10:50:29 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(64/1302) took 33628 ms. Total solver calls (SAT/UNSAT): 17045(14079/2966)
May 28, 2018 10:50:34 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(65/1302) took 38813 ms. Total solver calls (SAT/UNSAT): 17316(14310/3006)
May 28, 2018 10:50:40 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(66/1302) took 44837 ms. Total solver calls (SAT/UNSAT): 17586(14540/3046)
May 28, 2018 10:50:43 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(67/1302) took 48165 ms. Total solver calls (SAT/UNSAT): 17855(14770/3085)
May 28, 2018 10:50:47 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(68/1302) took 51335 ms. Total solver calls (SAT/UNSAT): 18123(15000/3123)
May 28, 2018 10:50:50 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(73/1302) took 54721 ms. Total solver calls (SAT/UNSAT): 19448(16148/3300)
May 28, 2018 10:50:53 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(80/1302) took 58070 ms. Total solver calls (SAT/UNSAT): 21351(17748/3603)
May 28, 2018 10:50:57 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(86/1302) took 61543 ms. Total solver calls (SAT/UNSAT): 23046(19113/3933)
May 28, 2018 10:51:00 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(92/1302) took 64765 ms. Total solver calls (SAT/UNSAT): 24705(20472/4233)
May 28, 2018 10:51:03 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(98/1302) took 67904 ms. Total solver calls (SAT/UNSAT): 26328(21825/4503)
May 28, 2018 10:51:07 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(100/1302) took 71879 ms. Total solver calls (SAT/UNSAT): 26861(22275/4586)
May 28, 2018 10:51:10 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(102/1302) took 74916 ms. Total solver calls (SAT/UNSAT): 27390(22724/4666)
May 28, 2018 10:51:13 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(108/1302) took 78040 ms. Total solver calls (SAT/UNSAT): 28953(24067/4886)
May 28, 2018 10:51:17 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(111/1302) took 81344 ms. Total solver calls (SAT/UNSAT): 29721(24736/4985)
May 28, 2018 10:51:20 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(117/1302) took 84401 ms. Total solver calls (SAT/UNSAT): 31350(26070/5280)
May 28, 2018 10:51:23 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(121/1302) took 87474 ms. Total solver calls (SAT/UNSAT): 32456(26956/5500)
May 28, 2018 10:51:30 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(122/1302) took 94752 ms. Total solver calls (SAT/UNSAT): 32730(27177/5553)
May 28, 2018 10:51:34 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(124/1302) took 98924 ms. Total solver calls (SAT/UNSAT): 33275(27619/5656)
May 28, 2018 10:51:38 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(126/1302) took 102847 ms. Total solver calls (SAT/UNSAT): 33816(28060/5756)
May 28, 2018 10:51:42 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(133/1302) took 106397 ms. Total solver calls (SAT/UNSAT): 35678(29598/6080)
May 28, 2018 10:51:45 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(140/1302) took 109642 ms. Total solver calls (SAT/UNSAT): 37491(31128/6363)
May 28, 2018 10:51:48 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(147/1302) took 112775 ms. Total solver calls (SAT/UNSAT): 39255(32650/6605)
May 28, 2018 10:51:51 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(154/1302) took 116196 ms. Total solver calls (SAT/UNSAT): 41120(34164/6956)
May 28, 2018 10:51:55 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(161/1302) took 119432 ms. Total solver calls (SAT/UNSAT): 42996(35670/7326)
May 28, 2018 10:51:58 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(168/1302) took 123061 ms. Total solver calls (SAT/UNSAT): 44823(37167/7656)
May 28, 2018 10:52:01 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(175/1302) took 126184 ms. Total solver calls (SAT/UNSAT): 46601(38656/7945)
May 28, 2018 10:52:05 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(181/1302) took 129694 ms. Total solver calls (SAT/UNSAT): 48086(39926/8160)
May 28, 2018 10:52:08 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(185/1302) took 132784 ms. Total solver calls (SAT/UNSAT): 49056(40770/8286)
May 28, 2018 10:52:12 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(189/1302) took 136322 ms. Total solver calls (SAT/UNSAT): 50010(41610/8400)
May 28, 2018 10:52:15 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(193/1302) took 139539 ms. Total solver calls (SAT/UNSAT): 50958(42448/8510)
May 28, 2018 10:52:19 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(198/1302) took 143417 ms. Total solver calls (SAT/UNSAT): 52138(43492/8646)
May 28, 2018 10:52:22 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(204/1302) took 146514 ms. Total solver calls (SAT/UNSAT): 53550(44739/8811)
May 28, 2018 10:52:25 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(211/1302) took 149796 ms. Total solver calls (SAT/UNSAT): 55191(46186/9005)
May 28, 2018 10:52:28 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(218/1302) took 152893 ms. Total solver calls (SAT/UNSAT): 56808(47625/9183)
May 28, 2018 10:52:31 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(225/1302) took 156012 ms. Total solver calls (SAT/UNSAT): 58376(49056/9320)
May 28, 2018 10:52:34 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(231/1302) took 159148 ms. Total solver calls (SAT/UNSAT): 59681(50276/9405)
May 28, 2018 10:52:39 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(235/1302) took 163604 ms. Total solver calls (SAT/UNSAT): 60531(51086/9445)
May 28, 2018 10:52:43 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(241/1302) took 167277 ms. Total solver calls (SAT/UNSAT): 61776(52296/9480)
May 28, 2018 10:52:46 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(244/1302) took 171071 ms. Total solver calls (SAT/UNSAT): 62385(52899/9486)
May 28, 2018 10:52:50 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(249/1302) took 174397 ms. Total solver calls (SAT/UNSAT): 63480(53900/9580)
May 28, 2018 10:52:53 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(256/1302) took 177513 ms. Total solver calls (SAT/UNSAT): 65006(55295/9711)
May 28, 2018 10:52:56 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(263/1302) took 180848 ms. Total solver calls (SAT/UNSAT): 66483(56682/9801)
May 28, 2018 10:52:59 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(271/1302) took 183934 ms. Total solver calls (SAT/UNSAT): 68111(58256/9855)
May 28, 2018 10:53:04 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(277/1302) took 188342 ms. Total solver calls (SAT/UNSAT): 69340(59430/9910)
May 28, 2018 10:53:07 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(283/1302) took 191835 ms. Total solver calls (SAT/UNSAT): 70633(60598/10035)
May 28, 2018 10:53:10 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(290/1302) took 195002 ms. Total solver calls (SAT/UNSAT): 72096(61953/10143)
May 28, 2018 10:53:14 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(296/1302) took 199140 ms. Total solver calls (SAT/UNSAT): 73311(63108/10203)
May 28, 2018 10:53:18 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(303/1302) took 202334 ms. Total solver calls (SAT/UNSAT): 74683(64448/10235)
May 28, 2018 10:53:22 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(304/1302) took 206885 ms. Total solver calls (SAT/UNSAT): 74875(64639/10236)
May 28, 2018 10:53:25 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(310/1302) took 209981 ms. Total solver calls (SAT/UNSAT): 76131(65780/10351)
May 28, 2018 10:53:30 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(317/1302) took 214690 ms. Total solver calls (SAT/UNSAT): 77580(67104/10476)
May 28, 2018 10:53:34 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(318/1302) took 218420 ms. Total solver calls (SAT/UNSAT): 77783(67292/10491)
May 28, 2018 10:53:37 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(325/1302) took 221424 ms. Total solver calls (SAT/UNSAT): 79176(68606/10570)
May 28, 2018 10:53:40 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(333/1302) took 224566 ms. Total solver calls (SAT/UNSAT): 80708(70098/10610)
May 28, 2018 10:53:43 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(341/1302) took 227987 ms. Total solver calls (SAT/UNSAT): 82326(71580/10746)
May 28, 2018 10:53:47 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(344/1302) took 231266 ms. Total solver calls (SAT/UNSAT): 82935(72132/10803)
May 28, 2018 10:53:50 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(350/1302) took 234566 ms. Total solver calls (SAT/UNSAT): 84126(73233/10893)
May 28, 2018 10:53:54 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(354/1302) took 239124 ms. Total solver calls (SAT/UNSAT): 84900(73964/10936)
May 28, 2018 10:53:58 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(358/1302) took 242325 ms. Total solver calls (SAT/UNSAT): 85658(74692/10966)
May 28, 2018 10:54:01 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(366/1302) took 245563 ms. Total solver calls (SAT/UNSAT): 87126(76140/10986)
May 28, 2018 10:54:05 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(372/1302) took 249982 ms. Total solver calls (SAT/UNSAT): 88205(77219/10986)
May 28, 2018 10:54:09 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(377/1302) took 253263 ms. Total solver calls (SAT/UNSAT): 89093(78107/10986)
May 28, 2018 10:54:12 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(386/1302) took 256493 ms. Total solver calls (SAT/UNSAT): 90690(79704/10986)
May 28, 2018 10:54:21 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(391/1302) took 265718 ms. Total solver calls (SAT/UNSAT): 91576(80590/10986)
May 28, 2018 10:54:26 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(392/1302) took 270485 ms. Total solver calls (SAT/UNSAT): 91755(80769/10986)
May 28, 2018 10:54:33 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(394/1302) took 277505 ms. Total solver calls (SAT/UNSAT): 92110(81124/10986)
May 28, 2018 10:54:38 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(395/1302) took 283249 ms. Total solver calls (SAT/UNSAT): 92286(81300/10986)
May 28, 2018 10:54:42 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(396/1302) took 286414 ms. Total solver calls (SAT/UNSAT): 92486(81325/11161)
SMT solver raised 'unknown', retrying with same input.
SMT solver raised 'unknown' twice, overapproximating result to 1.
May 28, 2018 10:54:44 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Finished co-enabling matrix. took 288944 ms. Total solver calls (SAT/UNSAT): 92573(81326/11247)
May 28, 2018 10:54:45 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeDoNotAccord
INFO: Computing Do-Not-Accords matrix : 1302 transitions.
May 28, 2018 10:55:02 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed DNA matrix. took 16875 ms. Total solver calls (SAT/UNSAT): 4206(0/4206)
May 28, 2018 10:55:02 AM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 490025ms conformant to PINS in folder :/home/mcc/execution
ITS-tools command line returned an error code 1

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="Peterson-COL-5"
export BK_EXAMINATION="LTLCardinality"
export BK_TOOL="itstoolsl"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

tar xzf /home/mcc/BenchKit/INPUTS/Peterson-COL-5.tgz
mv Peterson-COL-5 execution
cd execution
pwd
ls -lh

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3637"
echo " Executing tool itstoolsl"
echo " Input is Peterson-COL-5, examination is LTLCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r261-csrt-152732586000153"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' LTLCardinality.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;