Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Waiting for the VM to be ready (probing ssh)
...........................
/home/mcc/execution
total 324K
-rw-r--r-- 1 mcc users 3.4K May 15 18:54 CTLCardinality.txt
-rw-r--r-- 1 mcc users 16K May 15 18:54 CTLCardinality.xml
-rw-r--r-- 1 mcc users 3.3K May 15 18:54 CTLFireability.txt
-rw-r--r-- 1 mcc users 18K May 15 18:54 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K May 15 18:50 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 5.8K May 15 18:50 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 2.6K May 26 09:26 LTLCardinality.txt
-rw-r--r-- 1 mcc users 10K May 26 09:26 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.1K May 26 09:26 LTLFireability.txt
-rw-r--r-- 1 mcc users 7.5K May 26 09:26 LTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K May 15 18:54 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 18K May 15 18:54 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 115 May 15 18:54 ReachabilityDeadlock.txt
-rw-r--r-- 1 mcc users 353 May 15 18:54 ReachabilityDeadlock.xml
-rw-r--r-- 1 mcc users 3.2K May 15 18:54 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 15K May 15 18:54 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.9K May 15 18:54 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.9K May 15 18:54 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 15 18:50 equiv_col
-rw-r--r-- 1 mcc users 2 May 15 18:50 instance
-rw-r--r-- 1 mcc users 6 May 15 18:50 iscolored
-rw-r--r-- 1 mcc users 167K May 15 18:50 model.pnml
=====================================================================
Generated by BenchKit 2-3637
Executing tool itstoolsl
Input is ParamProductionCell-PT-4, examination is LTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r261-csrt-152732585900108
=====================================================================

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME ParamProductionCell-PT-4-LTLFireability-00
FORMULA_NAME ParamProductionCell-PT-4-LTLFireability-01
FORMULA_NAME ParamProductionCell-PT-4-LTLFireability-02
FORMULA_NAME ParamProductionCell-PT-4-LTLFireability-03
FORMULA_NAME ParamProductionCell-PT-4-LTLFireability-04
FORMULA_NAME ParamProductionCell-PT-4-LTLFireability-05
FORMULA_NAME ParamProductionCell-PT-4-LTLFireability-06
FORMULA_NAME ParamProductionCell-PT-4-LTLFireability-07
FORMULA_NAME ParamProductionCell-PT-4-LTLFireability-08
FORMULA_NAME ParamProductionCell-PT-4-LTLFireability-09
FORMULA_NAME ParamProductionCell-PT-4-LTLFireability-10
FORMULA_NAME ParamProductionCell-PT-4-LTLFireability-11
FORMULA_NAME ParamProductionCell-PT-4-LTLFireability-12
FORMULA_NAME ParamProductionCell-PT-4-LTLFireability-13
FORMULA_NAME ParamProductionCell-PT-4-LTLFireability-14
FORMULA_NAME ParamProductionCell-PT-4-LTLFireability-15

=== Now, execution of the tool begins

BK_START 1527502963988

Converted graph to binary with : CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.louvain.binaries_1.0.0.201805241334/bin/convert-linux64, -i, /tmp/graph3868062876117527596.txt, -o, /tmp/graph3868062876117527596.bin, -w, /tmp/graph3868062876117527596.weights], workingDir=null]
Built communities with : CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.louvain.binaries_1.0.0.201805241334/bin/louvain-linux64, /tmp/graph3868062876117527596.bin, -l, -1, -v, -w, /tmp/graph3868062876117527596.weights, -q, 0, -e, 0.001], workingDir=null]
Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805241334/bin/its-ltl-linux64, --gc-threshold, 2000000, -i, /home/mcc/execution/LTLFireability.pnml.gal, -t, CGAL, -LTL, /home/mcc/execution/LTLFireability.ltl, -c, -stutter-deadlock], workingDir=/home/mcc/execution]

its-ltl command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805241334/bin/its-ltl-linux64 --gc-threshold 2000000 -i /home/mcc/execution/LTLFireability.pnml.gal -t CGAL -LTL /home/mcc/execution/LTLFireability.ltl -c -stutter-deadlock
Read 16 LTL properties
Checking formula 0 : !((G((F(X("((i6.u45.A2U_ext_run>=1)&&(i6.u45.arm2_release_ext>=1))")))U("((i1.u15.table_stop_h>=1)&&(i4.u19.TU_in>=1))"))))
Formula 0 simplified : !G(FX"((i6.u45.A2U_ext_run>=1)&&(i6.u45.arm2_release_ext>=1))" U "((i1.u15.table_stop_h>=1)&&(i4.u19.TU_in>=1))")
built 26 ordering constraints for composite.
built 13 ordering constraints for composite.
built 12 ordering constraints for composite.
built 21 ordering constraints for composite.
built 11 ordering constraints for composite.
built 17 ordering constraints for composite.
built 15 ordering constraints for composite.
built 68 ordering constraints for composite.
built 16 ordering constraints for composite.
built 16 ordering constraints for composite.
built 15 ordering constraints for composite.
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
// Phase 1: matrix 202 rows 231 cols
invariant :i5:u37:robot_right + -1'i5:u38:A2U_rot1_rs + -1'i5:u38:A2U_rot1_run + -1'i5:u40:A2U_rot3_rs + -1'i5:u40:A2U_rot3_run + -1'i5:u65:A1U_rot1_rs + -1'i5:u65:A1U_rot1_run + -1'i5:u66:A1U_rot2_rs + -1'i5:u66:A1U_rot2_run = 0
invariant :i0:u10:press_at_lower_pos + i0:u11:press_at_upper_pos + i0:u12:press_at_middle_pos = 1
invariant :i7:u3:ch_A1P_free + i7:u8:ch_A1P_full + -1'i7:u8:press_ready_for_loading + i7:u2:A1U_out + -1'i7:u53:arm1_storing + -1'i7:u53:arm1_having_swivel_1 + -1'i7:u53:A1L_out + -1'i8:u59:A1L_loaded + i8:u60:A1U_unloadet + -1'i8:u61:arm1_magnet_off + -1'i8:u63:A1L_ret_rs + -1'i8:u63:A1L_ret_run + i8:u69:A1U_ret_rs + i8:u69:A1U_ret_run = -1
invariant :i8:u58:arm1_stop + i8:u62:A1L_ext_rs + i8:u62:A1L_ext_run + i8:u63:A1L_ret_rs + i8:u63:A1L_ret_run + i8:u68:A1U_ext_rs + i8:u68:A1U_ext_run + i8:u69:A1U_ret_rs + i8:u69:A1U_ret_run = 1
invariant :i2:u0:DB_in + i2:u23:deposit_belt_idle + i2:u23:deposit_belt_occupied + i2:u24:deposit_belt_empty + i2:u24:DB_out + i2:u25:DB_at_end + i2:u27:DB_trans_rs + i2:u27:DB_trans_run + i2:u28:DB_deliver_rs + i2:u28:DB_deliver_run = 1
invariant :i4:u5:FB_in + i4:u19:FB_out + i4:u1:feed_belt_idle + i4:u1:feed_belt_occupied + i4:u29:feed_belt_empty + i4:u30:FB_at_end + i4:u31:FB_trans_rs + i4:u31:FB_trans_run + i4:u32:FB_deliver_rs + i4:u32:FB_deliver_run = 1
invariant :i2:u33:arm2_store_free + i2:u33:arm2_waiting_for_swivel_1 + i2:u35:arm2_storing + i2:u35:arm2_waiting_for_swivel_2 + -1'i5:u52:swivel + i7:u3:arm1_waiting_for_swivel_2 + -1'i7:u2:arm1_having_swivel_2 + -1'i7:u2:A1U_out + i7:u20:ch_TA1_full + i7:u20:arm1_waiting_for_swivel_1 + i7:u14:ch_TA1_free + -1'i7:u14:table_ready_for_unloading + i7:u53:arm1_storing + i7:u53:A1L_out + i8:u59:A1L_loaded + -1'i8:u60:A1U_unloadet + i8:u61:arm1_magnet_off + i8:u63:A1L_ret_rs + i8:u63:A1L_ret_run + -1'i8:u69:A1U_ret_rs + -1'i8:u69:A1U_ret_run = 1
invariant :i0:u9:press_up + -1'i0:u12:PL_lower_rs + -1'i0:u12:PL_lower_run = 0
invariant :i6:u41:arm2_stop + i6:u45:A2U_ext_rs + i6:u45:A2U_ext_run + i6:u46:A2U_ret_rs + i6:u46:A2U_ret_run + i6:u50:A2L_ext_rs + i6:u50:A2L_ext_run + i6:u51:A2L_ret_rs + i6:u51:A2L_ret_run = 1
invariant :i9:u71:crane_lift + -1'i9:u76:CU_lift_rs + -1'i9:u76:CU_lift_run + -1'i9:u82:CL_lift_rs + -1'i9:u82:CL_lift_run = 0
invariant :i5:u37:A1L_rotated + i5:u54:A1L_in + i5:u54:A1L_rot1_in + i5:u54:A1L_rot2_in + i5:u54:A1L_rot3_in + i5:u55:A1L_rot1_rs + i5:u55:A1L_rot1_run + i5:u56:A1L_rot2_rs + i5:u56:A1L_rot2_run + i5:u57:A1L_rot3_rs + i5:u57:A1L_rot3_run + i7:u20:ch_TA1_full + i7:u20:arm1_waiting_for_swivel_1 + i7:u14:ch_TA1_free + -1'i7:u14:table_ready_for_unloading + i7:u53:A1L_out + i8:u59:A1_extended + i8:u59:A1L_loaded + i8:u62:A1L_ext_rs + i8:u62:A1L_ext_run + i8:u63:A1L_ret_rs + i8:u63:A1L_ret_run = 0
invariant :i1:u15:table_at_unload_angle + i1:u17:TL_rot_rs + i1:u17:TL_rot_run + i1:u22:TU_rot_rs + i1:u22:TU_rot_run + i1:u16:table_at_load_angle + i1:u18:TL_lower_rs + i1:u18:TL_lower_run + i1:u21:TU_lift_rs + i1:u21:TU_lift_run + i4:u13:table_ready_for_loading + i4:u13:TL_out + i4:u19:TU_in + i7:u20:TU_out + i7:u14:table_ready_for_unloading + i7:u14:TL_in = 1
invariant :i0:u6:PL_in + i0:u7:press_ready_for_unloading + i0:u7:PU_out + i0:u9:blank_forged + i0:u10:PU_lower_rs + i0:u10:PU_lower_run + i0:u11:forge_rs + i0:u11:forge_run + i0:u12:PL_lower_rs + i0:u12:PL_lower_run + i7:u3:PL_out + i7:u8:press_ready_for_loading + i7:u8:PU_in = 1
invariant :i5:u37:robot_stop + i5:u38:A2U_rot1_rs + i5:u38:A2U_rot1_run + i5:u39:A2U_rot2_rs + i5:u39:A2U_rot2_run + i5:u40:A2U_rot3_rs + i5:u40:A2U_rot3_run + i5:u47:A2L_rot1_rs + i5:u47:A2L_rot1_run + i5:u48:A2L_rot2_rs + i5:u48:A2L_rot2_run + i5:u49:A2L_rot3_rs + i5:u49:A2L_rot3_run + i5:u55:A1L_rot1_rs + i5:u55:A1L_rot1_run + i5:u56:A1L_rot2_rs + i5:u56:A1L_rot2_run + i5:u57:A1L_rot3_rs + i5:u57:A1L_rot3_run + i5:u65:A1U_rot1_rs + i5:u65:A1U_rot1_run + i5:u66:A1U_rot2_rs + i5:u66:A1U_rot2_run + i5:u67:A1U_rot3_rs + i5:u67:A1U_rot3_run = 1
invariant :i2:u0:CL_out + i3:u81:CL_trans_rs + i3:u81:CL_trans_run + i4:u75:crane_storing + i4:u75:CU_in + -1'i9:u70:crane_mag_on + i9:u74:CU_ready_to_ungrasp + i9:u78:CU_lower_rs + i9:u78:CU_lower_run + i9:u79:CL_loaded + i9:u82:CL_ready_to_transport + i9:u82:CL_lift_rs + i9:u82:CL_lift_run = 0
invariant :i2:u4:ch_A2D_full + i2:u4:A2U_out + -1'i2:u23:deposit_belt_idle + i2:u24:ch_A2D_free + i2:u35:arm2_waiting_for_swivel_2 + i5:u36:A2U_in + i5:u36:A2U_rot1_in + i5:u36:A2U_rot2_in + i5:u36:A2U_rot3_in + i5:u37:A2U_rotated + i5:u38:A2U_rot1_rs + i5:u38:A2U_rot1_run + i5:u39:A2U_rot2_rs + i5:u39:A2U_rot2_run + i5:u40:A2U_rot3_rs + i5:u40:A2U_rot3_run + i6:u42:A2U_extended + i6:u42:A2U_unloaded + i6:u45:A2U_ext_rs + i6:u45:A2U_ext_run + i6:u46:A2U_ret_rs + i6:u46:A2U_ret_run = 0
invariant :i6:u45:arm2_release_ext + i6:u46:arm2_retract_ext + i6:u50:arm2_pick_up_ext = 1
invariant :i2:u25:belt2_stop + i2:u27:DB_trans_rs + i2:u27:DB_trans_run + i2:u28:DB_deliver_rs + i2:u28:DB_deliver_run = 1
invariant :i9:u71:crane_lower + -1'i9:u78:CU_lower_rs + -1'i9:u78:CU_lower_run + -1'i9:u80:CL_lower_rs + -1'i9:u80:CL_lower_run = 0
invariant :i0:u6:ch_PA2_free + -1'i0:u7:press_ready_for_unloading + -1'i0:u7:PU_out + -1'i0:u9:blank_forged + -1'i0:u10:PU_lower_rs + -1'i0:u10:PU_lower_run + -1'i0:u11:forge_rs + -1'i0:u11:forge_run + i1:u17:TL_rot_rs + i1:u17:TL_rot_run + i1:u16:table_at_load_angle + i1:u18:TL_lower_rs + i1:u18:TL_lower_run + i2:u24:ch_A2D_free + i2:u24:deposit_belt_empty + -1'i2:u35:arm2_storing + -1'i2:u35:arm2_having_swivel_1 + -1'i3:u26:ch_DC_full + i3:u73:crane_store_free + i4:u13:table_ready_for_loading + i4:u13:TL_out + -1'i4:u19:ch_FT_full + -1'i4:u1:ch_CF_full + i4:u1:feed_belt_idle + i4:u29:feed_belt_empty + -1'i7:u8:ch_A1P_full + -1'i7:u8:PU_in + -1'i7:u2:A1U_out + i7:u14:ch_TA1_free + i7:u14:TL_in + i7:u53:A1L_out + i8:u59:A1L_loaded + -1'i8:u60:A1U_unloadet + i8:u61:arm1_magnet_off + i8:u63:A1L_ret_rs + i8:u63:A1L_ret_run + -1'i8:u69:A1U_ret_rs + -1'i8:u69:A1U_ret_run = 1
invariant :i4:u30:belt1_stop + i4:u31:FB_trans_rs + i4:u31:FB_trans_run + i4:u32:FB_deliver_rs + i4:u32:FB_deliver_run = 1
invariant :i5:u37:robot_left + -1'i5:u39:A2U_rot2_rs + -1'i5:u39:A2U_rot2_run + -1'i5:u47:A2L_rot1_rs + -1'i5:u47:A2L_rot1_run + -1'i5:u48:A2L_rot2_rs + -1'i5:u48:A2L_rot2_run + -1'i5:u49:A2L_rot3_rs + -1'i5:u49:A2L_rot3_run + -1'i5:u55:A1L_rot1_rs + -1'i5:u55:A1L_rot1_run + -1'i5:u56:A1L_rot2_rs + -1'i5:u56:A1L_rot2_run + -1'i5:u57:A1L_rot3_rs + -1'i5:u57:A1L_rot3_run + -1'i5:u67:A1U_rot3_rs + -1'i5:u67:A1U_rot3_run = 0
invariant :i7:u2:arm1_store_free + i7:u2:arm1_having_swivel_2 + i7:u2:A1U_out + -1'i7:u20:ch_TA1_full + -1'i7:u14:ch_TA1_free + i7:u14:table_ready_for_unloading + -1'i7:u53:A1L_out + -1'i8:u59:A1L_loaded + i8:u60:A1U_unloadet + -1'i8:u61:arm1_magnet_off + -1'i8:u63:A1L_ret_rs + -1'i8:u63:A1L_ret_run + i8:u69:A1U_ret_rs + i8:u69:A1U_ret_run = 0
invariant :i3:u77:crane_above_deposit_belt + i3:u81:crane_above_feed_belt = 1
invariant :i8:u58:arm1_forward + -1'i8:u62:A1L_ext_rs + -1'i8:u62:A1L_ext_run + -1'i8:u68:A1U_ext_rs + -1'i8:u68:A1U_ext_run = 0
invariant :i6:u41:arm2_forward + -1'i6:u45:A2U_ext_rs + -1'i6:u45:A2U_ext_run + -1'i6:u50:A2L_ext_rs + -1'i6:u50:A2L_ext_run = 0
invariant :i0:u9:press_stop + i0:u10:PU_lower_rs + i0:u10:PU_lower_run + i0:u11:forge_rs + i0:u11:forge_run + i0:u12:PL_lower_rs + i0:u12:PL_lower_run = 1
invariant :i2:u0:ch_DC_free + -1'i2:u23:deposit_belt_idle + -1'i2:u23:deposit_belt_occupied + -1'i2:u24:deposit_belt_empty + i3:u26:ch_DC_full + -1'i3:u73:crane_store_free + i4:u1:ch_CF_full + -1'i4:u1:feed_belt_idle + i4:u29:ch_CF_free + -1'i4:u75:crane_storing = -1
invariant :i6:u41:arm2_backward + -1'i6:u46:A2U_ret_rs + -1'i6:u46:A2U_ret_run + -1'i6:u51:A2L_ret_rs + -1'i6:u51:A2L_ret_run = 0
invariant :i2:u4:A2U_out + i2:u33:arm2_having_swivel_2 + -1'i2:u35:arm2_storing + -1'i2:u35:arm2_waiting_for_swivel_2 + i5:u34:A2L_in + i5:u34:A2L_rot1_in + i5:u34:A2L_rot2_in + i5:u34:A2L_rot3_in + i5:u37:A2L_rotated + i5:u47:A2L_rot1_rs + i5:u47:A2L_rot1_run + i5:u48:A2L_rot2_rs + i5:u48:A2L_rot2_run + i5:u49:A2L_rot3_rs + i5:u49:A2L_rot3_run + i5:u52:swivel + i6:u42:A2U_unloaded + i6:u43:arm2_magnet_on + i6:u44:A2L_extended + i6:u46:A2U_ret_rs + i6:u46:A2U_ret_run + i6:u50:A2L_ext_rs + i6:u50:A2L_ext_run + -1'i7:u3:arm1_waiting_for_swivel_2 + i7:u2:arm1_having_swivel_2 + i7:u2:A1U_out + -1'i7:u20:ch_TA1_full + -1'i7:u20:arm1_waiting_for_swivel_1 + -1'i7:u14:ch_TA1_free + i7:u14:table_ready_for_unloading + -1'i7:u53:arm1_storing + -1'i7:u53:A1L_out + -1'i8:u59:A1L_loaded + i8:u60:A1U_unloadet + -1'i8:u61:arm1_magnet_off + -1'i8:u63:A1L_ret_rs + -1'i8:u63:A1L_ret_run + i8:u69:A1U_ret_rs + i8:u69:A1U_ret_run = 0
invariant :i8:u58:arm1_backward + -1'i8:u63:A1L_ret_rs + -1'i8:u63:A1L_ret_run + -1'i8:u69:A1U_ret_rs + -1'i8:u69:A1U_ret_run = 0
invariant :i1:u16:table_stop_v + i1:u18:TL_lower_rs + i1:u18:TL_lower_run + i1:u21:TU_lift_rs + i1:u21:TU_lift_run = 1
invariant :i1:u18:table_bottom_pos + i1:u21:table_top_pos = 1
invariant :i6:u43:arm2_magnet_off + i6:u43:arm2_magnet_on = 1
invariant :i1:u15:table_right + -1'i1:u17:TL_rot_rs + -1'i1:u17:TL_rot_run + -1'i1:u22:TU_rot_rs + -1'i1:u22:TU_rot_run = 0
invariant :i8:u62:arm1_pick_up_ext + i8:u63:arm1_retract_ext + i8:u68:arm1_release_ext = 1
invariant :i9:u70:crane_mag_off + i9:u70:crane_mag_on = 1
invariant :i8:u61:arm1_magnet_on + i8:u61:arm1_magnet_off = 1
invariant :i3:u72:crane_stop_h + i3:u77:CU_trans_rs + i3:u77:CU_trans_run + i3:u81:CL_trans_rs + i3:u81:CL_trans_run = 1
invariant :i3:u72:crane_to_belt1 + -1'i3:u81:CL_trans_rs + -1'i3:u81:CL_trans_run = 0
invariant :i1:u16:table_upward + -1'i1:u18:TL_lower_rs + -1'i1:u18:TL_lower_run + -1'i1:u21:TU_lift_rs + -1'i1:u21:TU_lift_run = 0
invariant :i0:u6:A2L_out + -1'i2:u4:ch_A2D_full + -1'i2:u4:A2U_out + i2:u23:deposit_belt_idle + -1'i2:u24:ch_A2D_free + i2:u35:arm2_storing + i2:u35:arm2_having_swivel_1 + -1'i6:u42:A2U_unloaded + -1'i6:u43:arm2_magnet_on + i6:u44:A2L_loaded + -1'i6:u46:A2U_ret_rs + -1'i6:u46:A2U_ret_run + i6:u51:A2L_ret_rs + i6:u51:A2L_ret_run = 0
invariant :i3:u26:CL_in + i3:u73:crane_store_free + -1'i4:u1:ch_CF_full + i4:u1:feed_belt_idle + -1'i4:u29:ch_CF_free + -1'i4:u75:CU_in + i9:u70:crane_mag_on + -1'i9:u74:CU_ready_to_ungrasp + -1'i9:u78:CU_lower_rs + -1'i9:u78:CU_lower_run + i9:u79:CL_ready_to_grasp + i9:u80:CL_lower_rs + i9:u80:CL_lower_run = 1
invariant :i3:u73:CU_out + i3:u72:CU_ready_to_transport + i3:u77:CU_trans_rs + i3:u77:CU_trans_run + i4:u1:ch_CF_full + -1'i4:u1:feed_belt_idle + i4:u29:ch_CF_free + i4:u75:CU_in + i9:u74:CU_unloaded + i9:u74:CU_ready_to_ungrasp + i9:u76:CU_lift_rs + i9:u76:CU_lift_run + i9:u78:CU_lower_rs + i9:u78:CU_lower_run = 0
invariant :i3:u72:crane_to_belt2 + -1'i3:u77:CU_trans_rs + -1'i3:u77:CU_trans_run = 0
invariant :i4:u30:belt1_start + -1'i4:u31:FB_trans_rs + -1'i4:u31:FB_trans_run + -1'i4:u32:FB_deliver_rs + -1'i4:u32:FB_deliver_run = 0
invariant :i5:u37:A1U_rotated + i5:u64:A1U_in + i5:u64:A1U_rot1_in + i5:u64:A1U_rot2_in + i5:u64:A1U_rot3_in + i5:u65:A1U_rot1_rs + i5:u65:A1U_rot1_run + i5:u66:A1U_rot2_rs + i5:u66:A1U_rot2_run + i5:u67:A1U_rot3_rs + i5:u67:A1U_rot3_run + i7:u3:arm1_waiting_for_swivel_2 + i7:u53:arm1_storing + i7:u53:arm1_having_swivel_1 + i7:u53:A1L_out + i8:u59:A1L_loaded + i8:u60:A1U_extendet + i8:u61:arm1_magnet_off + i8:u63:A1L_ret_rs + i8:u63:A1L_ret_run + i8:u68:A1U_ext_rs + i8:u68:A1U_ext_run = 1
invariant :i9:u71:crane_stop_v + i9:u76:CU_lift_rs + i9:u76:CU_lift_run + i9:u78:CU_lower_rs + i9:u78:CU_lower_run + i9:u80:CL_lower_rs + i9:u80:CL_lower_run + i9:u82:CL_lift_rs + i9:u82:CL_lift_run = 1
invariant :i1:u15:table_stop_h + i1:u17:TL_rot_rs + i1:u17:TL_rot_run + i1:u22:TU_rot_rs + i1:u22:TU_rot_run = 1
invariant :i4:u31:belt1_light_barrier_true + i4:u32:belt1_light_barrier_false = 1
invariant :i4:u5:ch_FT_free + -1'i4:u13:table_ready_for_loading + i4:u19:ch_FT_full + -1'i4:u1:feed_belt_idle + -1'i4:u1:feed_belt_occupied + -1'i4:u29:feed_belt_empty = -1
invariant :i1:u17:table_load_angle + i1:u22:table_unload_angle = 1
invariant :i5:u38:arm2_release_angle + i5:u47:arm2_pick_up_angle + i5:u55:arm1_pick_up_angle + i5:u65:arm1_release_angle = 1
invariant :i9:u76:crane_transport_height + i9:u78:crane_release_height + i9:u80:crane_pick_up_height = 1
invariant :i2:u25:belt2_start + -1'i2:u27:DB_trans_rs + -1'i2:u27:DB_trans_run + -1'i2:u28:DB_deliver_rs + -1'i2:u28:DB_deliver_run = 0
invariant :i2:u27:belt2_light_barrier_true + i2:u28:belt2_light_barrier_false = 1
invariant :i0:u7:ch_PA2_full + i0:u7:PU_out + i0:u9:blank_forged + i0:u10:PU_lower_rs + i0:u10:PU_lower_run + i0:u11:forge_rs + i0:u11:forge_run + -1'i1:u17:TL_rot_rs + -1'i1:u17:TL_rot_run + -1'i1:u16:table_at_load_angle + -1'i1:u18:TL_lower_rs + -1'i1:u18:TL_lower_run + i2:u4:ch_A2D_full + i2:u33:arm2_waiting_for_swivel_1 + -1'i2:u33:arm2_having_swivel_2 + -1'i2:u23:deposit_belt_idle + -1'i2:u24:deposit_belt_empty + i2:u35:arm2_storing + i2:u35:arm2_waiting_for_swivel_2 + i3:u26:ch_DC_full + -1'i3:u73:crane_store_free + -1'i4:u13:table_ready_for_loading + -1'i4:u13:TL_out + i4:u19:ch_FT_full + i4:u1:ch_CF_full + -1'i4:u1:feed_belt_idle + -1'i4:u29:feed_belt_empty + -1'i5:u52:swivel + i7:u3:arm1_waiting_for_swivel_2 + i7:u8:ch_A1P_full + i7:u8:PU_in + -1'i7:u2:arm1_having_swivel_2 + i7:u20:ch_TA1_full + i7:u20:arm1_waiting_for_swivel_1 + -1'i7:u14:table_ready_for_unloading + -1'i7:u14:TL_in + i7:u53:arm1_storing = -1
invariant :i0:u9:press_down + -1'i0:u10:PU_lower_rs + -1'i0:u10:PU_lower_run = 0
invariant :i0:u9:press_upward + -1'i0:u11:forge_rs + -1'i0:u11:forge_run = 0
Reverse transition relation is NOT exact ! Due to transitions PU_lower_Pstart, forge_Pstart, PL_lower_Pstart, TL_rot_Pstart, TL_lower_Pstart, TU_lift_Pstart, TU_rot_Pstart, DB_trans_Pstart, DB_deliver_Pstart, FB_trans_Pstart, FB_deliver_Pstart, arm2_unlock_swivel_1, arm2_unlock_swivel_2, A2U_rot1_Pstop, A2U_rot1_Pstart, A2U_rot2_Pstop, A2U_rot2_Pstart, A2U_rot3_Pstop, A2U_rot3_Pstart, A2U_ext_Pstart, A2U_ret_Pstart, A2L_rot1_Pstop, A2L_rot1_Pstart, A2L_rot2_Pstop, A2L_rot2_Pstart, A2L_rot3_Pstart, A2L_ext_Pstart, A2L_ret_Pstart, arm1_unlock_swivel_1, arm1_unlock_swivel_2, A1L_rot1_Pstop, A1L_rot1_Pstart, A1L_rot2_Pstop, A1L_rot2_Pstart, A1L_rot3_Pstop, A1L_rot3_Pstart, A1L_ext_Pstart, A1L_ret_Pstart, A1U_rot1_Pstart, A1U_rot2_Pstop, A1U_rot2_Pstart, A1U_rot3_Pstop, A1U_rot3_Pstart, A1U_ext_Pstart, A1U_ret_Pstart, CU_lift_Pstart, CU_trans_Pstart, CU_lower_Pstart, CL_lower_Pstart, CL_trans_Pstart, CL_lift_Pstart, Intersection with reachable at each step enabled. (destroyed/reverse/intersect/total) :0/151/51/202
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O3, model.c], workingDir=/home/mcc/execution]
Compilation finished in 3877 ms.
Running link step : CommandLine [args=[gcc, -shared, -o, gal.so, model.o], workingDir=/home/mcc/execution]
Link finished in 72 ms.
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, []((<>(X((LTLAP0==true))))U((LTLAP1==true))), --buchi-type=spotba], workingDir=/home/mcc/execution]
695 unique states visited
0 strongly connected components in search stack
752 transitions explored
387 items max in DFS search stack
19834 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,198.413,2197712,1,0,4.24304e+06,455,1870,3.16834e+06,163,1191,5358106
no accepting run found
Formula 0 is TRUE no accepting run found.
FORMULA ParamProductionCell-PT-4-LTLFireability-00 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 1 : !((F("((i8.u61.arm1_magnet_on>=1)&&(i8.u60.A1U_extendet>=1))")))
Formula 1 simplified : !F"((i8.u61.arm1_magnet_on>=1)&&(i8.u60.A1U_extendet>=1))"
1 unique states visited
0 strongly connected components in search stack
0 transitions explored
1 items max in DFS search stack
528 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,203.691,2197712,1,0,4.24304e+06,455,2292,3.16834e+06,181,1191,5659687
no accepting run found
Formula 1 is TRUE no accepting run found.
FORMULA ParamProductionCell-PT-4-LTLFireability-01 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 2 : !(("((i4.u1.feed_belt_occupied>=1)&&(i4.u5.ch_FT_free>=1))"))
Formula 2 simplified : !"((i4.u1.feed_belt_occupied>=1)&&(i4.u5.ch_FT_free>=1))"
3 unique states visited
3 strongly connected components in search stack
3 transitions explored
3 items max in DFS search stack
19 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,203.873,2197712,1,0,4.24304e+06,455,2307,3.16834e+06,181,1191,5682620
an accepting run exists (use option '-e' to print it)
Formula 2 is FALSE accepting run found.
FORMULA ParamProductionCell-PT-4-LTLFireability-02 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 3 : !((X("((i4.u13.table_ready_for_loading>=1)&&(i4.u19.ch_FT_full>=1))")))
Formula 3 simplified : !X"((i4.u13.table_ready_for_loading>=1)&&(i4.u19.ch_FT_full>=1))"
4 unique states visited
4 strongly connected components in search stack
4 transitions explored
4 items max in DFS search stack
2 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,203.9,2197712,1,0,4.24304e+06,455,2317,3.16834e+06,181,1191,5686727
an accepting run exists (use option '-e' to print it)
Formula 3 is FALSE accepting run found.
FORMULA ParamProductionCell-PT-4-LTLFireability-03 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 4 : !(("((i5.u54.A1L_rot1_in>=1)&&(i5.u37.robot_stop>=1))"))
Formula 4 simplified : !"((i5.u54.A1L_rot1_in>=1)&&(i5.u37.robot_stop>=1))"
3 unique states visited
3 strongly connected components in search stack
3 transitions explored
3 items max in DFS search stack
0 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,203.901,2197712,1,0,4.24304e+06,455,2328,3.16834e+06,181,1191,5686741
an accepting run exists (use option '-e' to print it)
Formula 4 is FALSE accepting run found.
FORMULA ParamProductionCell-PT-4-LTLFireability-04 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 5 : !((G(X((G("((i6.u44.A2L_loaded>=1)&&(i6.u41.arm2_stop>=1))"))U("(((i1.u22.TU_rot_run>=1)&&(i1.u15.table_right>=1))&&(i1.u17.table_load_angle>=1))")))))
Formula 5 simplified : !GX(G"((i6.u44.A2L_loaded>=1)&&(i6.u41.arm2_stop>=1))" U "(((i1.u22.TU_rot_run>=1)&&(i1.u15.table_right>=1))&&(i1.u17.table_load_angle>=1))")
102 unique states visited
102 strongly connected components in search stack
103 transitions explored
102 items max in DFS search stack
96 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,204.859,2198036,1,0,4.24304e+06,455,2386,3.16834e+06,181,1191,5855227
an accepting run exists (use option '-e' to print it)
Formula 5 is FALSE accepting run found.
FORMULA ParamProductionCell-PT-4-LTLFireability-05 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 6 : !((G(G(X(X(G("((i5.u34.A2L_rot2_in>=1)&&(i5.u37.robot_stop>=1))")))))))
Formula 6 simplified : !GXXG"((i5.u34.A2L_rot2_in>=1)&&(i5.u37.robot_stop>=1))"
5 unique states visited
5 strongly connected components in search stack
5 transitions explored
5 items max in DFS search stack
1 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,204.87,2198036,1,0,4.24304e+06,455,2408,3.16834e+06,181,1191,5856854
an accepting run exists (use option '-e' to print it)
Formula 6 is FALSE accepting run found.
FORMULA ParamProductionCell-PT-4-LTLFireability-06 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 7 : !((G(X("((i9.u80.CL_lower_rs>=1)&&(i9.u71.crane_lower>=1))"))))
Formula 7 simplified : !GX"((i9.u80.CL_lower_rs>=1)&&(i9.u71.crane_lower>=1))"
4 unique states visited
4 strongly connected components in search stack
4 transitions explored
4 items max in DFS search stack
0 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,204.873,2198036,1,0,4.24304e+06,455,2429,3.16834e+06,181,1191,5857029
an accepting run exists (use option '-e' to print it)
Formula 7 is FALSE accepting run found.
FORMULA ParamProductionCell-PT-4-LTLFireability-07 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 8 : !((X(F(("((i2.u25.belt2_stop>=1)&&(i2.u25.DB_at_end>=1))")U(F("(((i9.u80.CL_lower_run>=1)&&(i9.u71.crane_lower>=1))&&(i9.u76.crane_transport_height>=1))"))))))
Formula 8 simplified : !XF("((i2.u25.belt2_stop>=1)&&(i2.u25.DB_at_end>=1))" U F"(((i9.u80.CL_lower_run>=1)&&(i9.u71.crane_lower>=1))&&(i9.u76.crane_transport_height>=1))")
2 unique states visited
0 strongly connected components in search stack
1 transitions explored
2 items max in DFS search stack
87 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,205.745,2198036,1,0,4.24304e+06,455,2454,3.16834e+06,181,1191,5998343
no accepting run found
Formula 8 is TRUE no accepting run found.
FORMULA ParamProductionCell-PT-4-LTLFireability-08 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 9 : !((X((G(F("(i2.u24.deposit_belt_empty>=1)")))U("((i1.u17.TL_rot_rs>=1)&&(i1.u15.table_right>=1))"))))
Formula 9 simplified : !X(GF"(i2.u24.deposit_belt_empty>=1)" U "((i1.u17.TL_rot_rs>=1)&&(i1.u15.table_right>=1))")
WARNING : LTSmin timed out (>225 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, []((<>(X((LTLAP0==true))))U((LTLAP1==true))), --buchi-type=spotba], workingDir=/home/mcc/execution]
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X(([](<>((LTLAP12==true))))U((LTLAP13==true))), --buchi-type=spotba], workingDir=/home/mcc/execution]
368 unique states visited
0 strongly connected components in search stack
549 transitions explored
185 items max in DFS search stack
12225 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,327.996,2420368,1,0,4.68031e+06,455,1931,3.27246e+06,160,1191,8144638
no accepting run found
Formula 9 is TRUE no accepting run found.
FORMULA ParamProductionCell-PT-4-LTLFireability-09 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 10 : !((F(F(X(G("((i6.u41.arm2_stop>=1)&&(i5.u37.A2L_rotated>=1))"))))))
Formula 10 simplified : !FXG"((i6.u41.arm2_stop>=1)&&(i5.u37.A2L_rotated>=1))"
3 unique states visited
3 strongly connected components in search stack
3 transitions explored
3 items max in DFS search stack
1767 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,345.66,2607008,1,0,5.28374e+06,455,2311,3.81027e+06,178,1191,9483245
an accepting run exists (use option '-e' to print it)
Formula 10 is FALSE accepting run found.
FORMULA ParamProductionCell-PT-4-LTLFireability-10 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 11 : !((X("(((i9.u82.CL_lift_run>=1)&&(i9.u71.crane_lift>=1))&&(i9.u80.crane_pick_up_height>=1))")))
Formula 11 simplified : !X"(((i9.u82.CL_lift_run>=1)&&(i9.u71.crane_lift>=1))&&(i9.u80.crane_pick_up_height>=1))"
4 unique states visited
4 strongly connected components in search stack
4 transitions explored
4 items max in DFS search stack
0 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,345.671,2607272,1,0,5.28396e+06,455,2328,3.81045e+06,178,1191,9483756
an accepting run exists (use option '-e' to print it)
Formula 11 is FALSE accepting run found.
FORMULA ParamProductionCell-PT-4-LTLFireability-11 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 12 : !(((F(F(X("((i3.u81.CL_trans_run>=1)&&(i3.u81.crane_above_feed_belt>=1))"))))U(X(G("((i5.u34.A2L_rot2_in>=1)&&(i5.u37.robot_stop>=1))")))))
Formula 12 simplified : !(FX"((i3.u81.CL_trans_run>=1)&&(i3.u81.crane_above_feed_belt>=1))" U XG"((i5.u34.A2L_rot2_in>=1)&&(i5.u37.robot_stop>=1))")
9 unique states visited
3 strongly connected components in search stack
9 transitions explored
5 items max in DFS search stack
2951 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,375.178,2657168,1,0,5.42596e+06,455,1947,3.87679e+06,162,1191,1471330
an accepting run exists (use option '-e' to print it)
Formula 12 is FALSE accepting run found.
FORMULA ParamProductionCell-PT-4-LTLFireability-12 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 13 : !(("(((i6.u50.A2L_ext_run>=1)&&(i6.u46.arm2_retract_ext>=1))&&(i6.u41.arm2_forward>=1))"))
Formula 13 simplified : !"(((i6.u50.A2L_ext_run>=1)&&(i6.u46.arm2_retract_ext>=1))&&(i6.u41.arm2_forward>=1))"
3 unique states visited
3 strongly connected components in search stack
3 transitions explored
3 items max in DFS search stack
18 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,375.361,2657168,1,0,5.42596e+06,455,2313,3.87679e+06,180,1191,1520841
an accepting run exists (use option '-e' to print it)
Formula 13 is FALSE accepting run found.
FORMULA ParamProductionCell-PT-4-LTLFireability-13 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 14 : !(("(((i6.u51.A2L_ret_run>=1)&&(i6.u50.arm2_pick_up_ext>=1))&&(i6.u41.arm2_backward>=1))"))
Formula 14 simplified : !"(((i6.u51.A2L_ret_run>=1)&&(i6.u50.arm2_pick_up_ext>=1))&&(i6.u41.arm2_backward>=1))"
3 unique states visited
3 strongly connected components in search stack
3 transitions explored
3 items max in DFS search stack
0 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,375.362,2657168,1,0,5.42596e+06,455,2328,3.87679e+06,180,1191,1520849
an accepting run exists (use option '-e' to print it)
Formula 14 is FALSE accepting run found.
FORMULA ParamProductionCell-PT-4-LTLFireability-14 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 15 : !((F("((i3.u72.crane_stop_h>=1)&&(i9.u82.CL_ready_to_transport>=1))")))
Formula 15 simplified : !F"((i3.u72.crane_stop_h>=1)&&(i9.u82.CL_ready_to_transport>=1))"
1 unique states visited
0 strongly connected components in search stack
0 transitions explored
1 items max in DFS search stack
10 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,375.482,2657168,1,0,5.42596e+06,455,2350,3.87679e+06,180,1191,1543719
no accepting run found
Formula 15 is TRUE no accepting run found.
FORMULA ParamProductionCell-PT-4-LTLFireability-15 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
WARNING : LTS min runner thread was asked to interrupt. Dying gracefully.

BK_STOP 1527503345271

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution LTLFireability -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -louvain -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -consoleLog -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination LTLFireability -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -louvain -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
May 28, 2018 10:22:46 AM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, LTLFireability, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -louvain, -smt]
May 28, 2018 10:22:46 AM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
May 28, 2018 10:22:46 AM fr.lip6.move.gal.nupn.PTNetReader loadFromXML
INFO: Load time of PNML (sax parser for PT used): 88 ms
May 28, 2018 10:22:46 AM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 231 places.
May 28, 2018 10:22:46 AM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 202 transitions.
May 28, 2018 10:22:46 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.img.gal : 16 ms
May 28, 2018 10:22:46 AM fr.lip6.move.gal.application.MccTranslator applyOrder
INFO: Applying decomposition
May 28, 2018 10:22:46 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 111 ms
May 28, 2018 10:22:46 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 40 ms
Begin: Mon May 28 10:22:46 2018

Computation of communities with the Newman-Girvan Modularity quality function

level 0:
start computation: Mon May 28 10:22:46 2018
network size: 231 nodes, 1014 links, 404 weight
quality increased from -0.00673613 to 0.431033
end computation: Mon May 28 10:22:46 2018
level 1:
start computation: Mon May 28 10:22:46 2018
network size: 83 nodes, 500 links, 404 weight
quality increased from 0.431033 to 0.742688
end computation: Mon May 28 10:22:46 2018
level 2:
start computation: Mon May 28 10:22:46 2018
network size: 20 nodes, 94 links, 404 weight
quality increased from 0.742688 to 0.764628
end computation: Mon May 28 10:22:46 2018
level 3:
start computation: Mon May 28 10:22:46 2018
network size: 10 nodes, 42 links, 404 weight
quality increased from 0.764628 to 0.764628
end computation: Mon May 28 10:22:46 2018
End: Mon May 28 10:22:46 2018
Total duration: 0 sec
0.764628
May 28, 2018 10:22:46 AM fr.lip6.move.gal.instantiate.CompositeBuilder decomposeWithOrder
INFO: Decomposing Gal with order
May 28, 2018 10:22:46 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 25 ms
May 28, 2018 10:22:46 AM fr.lip6.move.gal.instantiate.CompositeBuilder rewriteArraysToAllowPartition
INFO: Rewriting arrays to variables to allow decomposition.
May 28, 2018 10:22:47 AM fr.lip6.move.gal.instantiate.Instantiator fuseIsomorphicEffects
INFO: Removed a total of 87 redundant transitions.
May 28, 2018 10:22:47 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/LTLFireability.pnml.gal : 9 ms
May 28, 2018 10:22:47 AM fr.lip6.move.serialization.SerializationUtil serializePropertiesForITSLTLTools
INFO: Time to serialize properties into /home/mcc/execution/LTLFireability.ltl : 2 ms
May 28, 2018 10:22:47 AM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 202 transitions.
May 28, 2018 10:22:47 AM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 59 place invariants in 70 ms
May 28, 2018 10:22:47 AM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 231 variables to be positive in 438 ms
May 28, 2018 10:22:47 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may disable matrix : 202 transitions.
May 28, 2018 10:22:47 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of disable matrix completed :0/202 took 0 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 28, 2018 10:22:47 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete disable matrix. took 11 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 28, 2018 10:22:47 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may enable matrix : 202 transitions.
May 28, 2018 10:22:47 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete enable matrix. took 10 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 28, 2018 10:22:48 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeCoEnablingMatrix
INFO: Computing symmetric co enabling matrix : 202 transitions.
May 28, 2018 10:22:51 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(26/202) took 2234 ms. Total solver calls (SAT/UNSAT): 858(530/328)
May 28, 2018 10:22:54 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(71/202) took 5288 ms. Total solver calls (SAT/UNSAT): 2324(1196/1128)
May 28, 2018 10:22:57 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(89/202) took 8355 ms. Total solver calls (SAT/UNSAT): 3252(1694/1558)
May 28, 2018 10:23:00 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(99/202) took 11651 ms. Total solver calls (SAT/UNSAT): 3491(1846/1645)
May 28, 2018 10:23:04 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(108/202) took 15448 ms. Total solver calls (SAT/UNSAT): 3811(2006/1805)
May 28, 2018 10:23:07 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(116/202) took 18473 ms. Total solver calls (SAT/UNSAT): 4059(2096/1963)
May 28, 2018 10:23:10 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(123/202) took 21568 ms. Total solver calls (SAT/UNSAT): 4261(2152/2109)
May 28, 2018 10:23:13 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(147/202) took 24908 ms. Total solver calls (SAT/UNSAT): 4650(2236/2414)
May 28, 2018 10:23:16 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(167/202) took 27932 ms. Total solver calls (SAT/UNSAT): 4936(2330/2606)
May 28, 2018 10:23:19 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Finished co-enabling matrix. took 30750 ms. Total solver calls (SAT/UNSAT): 5048(2378/2670)
May 28, 2018 10:23:19 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeDoNotAccord
INFO: Computing Do-Not-Accords matrix : 202 transitions.
May 28, 2018 10:23:19 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed DNA matrix. took 329 ms. Total solver calls (SAT/UNSAT): 80(0/80)
May 28, 2018 10:23:19 AM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 32767ms conformant to PINS in folder :/home/mcc/execution

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="ParamProductionCell-PT-4"
export BK_EXAMINATION="LTLFireability"
export BK_TOOL="itstoolsl"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

tar xzf /home/mcc/BenchKit/INPUTS/ParamProductionCell-PT-4.tgz
mv ParamProductionCell-PT-4 execution
cd execution
pwd
ls -lh

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3637"
echo " Executing tool itstoolsl"
echo " Input is ParamProductionCell-PT-4, examination is LTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r261-csrt-152732585900108"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' LTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;