Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Waiting for the VM to be ready (probing ssh)
........................................................
/home/mcc/execution
total 456K
-rw-r--r-- 1 mcc users 7.6K May 15 18:54 CTLCardinality.txt
-rw-r--r-- 1 mcc users 34K May 15 18:54 CTLCardinality.xml
-rw-r--r-- 1 mcc users 6.0K May 15 18:54 CTLFireability.txt
-rw-r--r-- 1 mcc users 28K May 15 18:54 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K May 15 18:50 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.3K May 15 18:50 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.4K May 26 09:26 LTLCardinality.txt
-rw-r--r-- 1 mcc users 12K May 26 09:26 LTLCardinality.xml
-rw-r--r-- 1 mcc users 4.2K May 26 09:26 LTLFireability.txt
-rw-r--r-- 1 mcc users 17K May 26 09:26 LTLFireability.xml
-rw-r--r-- 1 mcc users 7.2K May 15 18:54 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 32K May 15 18:54 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 112 May 15 18:54 ReachabilityDeadlock.txt
-rw-r--r-- 1 mcc users 350 May 15 18:54 ReachabilityDeadlock.xml
-rw-r--r-- 1 mcc users 17K May 15 18:54 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 74K May 15 18:54 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 2.6K May 15 18:54 UpperBounds.txt
-rw-r--r-- 1 mcc users 6.1K May 15 18:54 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 May 15 18:50 equiv_col
-rw-r--r-- 1 mcc users 2 May 15 18:50 instance
-rw-r--r-- 1 mcc users 6 May 15 18:50 iscolored
-rw-r--r-- 1 mcc users 152K May 15 18:50 model.pnml
=====================================================================
Generated by BenchKit 2-3637
Executing tool itstoolsl
Input is LamportFastMutEx-PT-5, examination is LTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r261-csrt-152732585800038
=====================================================================

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME LamportFastMutEx-PT-5-LTLFireability-00
FORMULA_NAME LamportFastMutEx-PT-5-LTLFireability-01
FORMULA_NAME LamportFastMutEx-PT-5-LTLFireability-02
FORMULA_NAME LamportFastMutEx-PT-5-LTLFireability-03
FORMULA_NAME LamportFastMutEx-PT-5-LTLFireability-04
FORMULA_NAME LamportFastMutEx-PT-5-LTLFireability-05
FORMULA_NAME LamportFastMutEx-PT-5-LTLFireability-06
FORMULA_NAME LamportFastMutEx-PT-5-LTLFireability-07
FORMULA_NAME LamportFastMutEx-PT-5-LTLFireability-08
FORMULA_NAME LamportFastMutEx-PT-5-LTLFireability-09
FORMULA_NAME LamportFastMutEx-PT-5-LTLFireability-10
FORMULA_NAME LamportFastMutEx-PT-5-LTLFireability-11
FORMULA_NAME LamportFastMutEx-PT-5-LTLFireability-12
FORMULA_NAME LamportFastMutEx-PT-5-LTLFireability-13
FORMULA_NAME LamportFastMutEx-PT-5-LTLFireability-14
FORMULA_NAME LamportFastMutEx-PT-5-LTLFireability-15

=== Now, execution of the tool begins

BK_START 1527499801053

Converted graph to binary with : CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.louvain.binaries_1.0.0.201805241334/bin/convert-linux64, -i, /tmp/graph5601766619873414499.txt, -o, /tmp/graph5601766619873414499.bin, -w, /tmp/graph5601766619873414499.weights], workingDir=null]
Built communities with : CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.louvain.binaries_1.0.0.201805241334/bin/louvain-linux64, /tmp/graph5601766619873414499.bin, -l, -1, -v, -w, /tmp/graph5601766619873414499.weights, -q, 0, -e, 0.001], workingDir=null]
Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805241334/bin/its-ltl-linux64, --gc-threshold, 2000000, -i, /home/mcc/execution/LTLFireability.pnml.gal, -t, CGAL, -LTL, /home/mcc/execution/LTLFireability.ltl, -c, -stutter-deadlock], workingDir=/home/mcc/execution]

its-ltl command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805241334/bin/its-ltl-linux64 --gc-threshold 2000000 -i /home/mcc/execution/LTLFireability.pnml.gal -t CGAL -LTL /home/mcc/execution/LTLFireability.ltl -c -stutter-deadlock
Read 16 LTL properties
Checking formula 0 : !((F("((((((((((((((((((((((((((((((((((((((i1.u1.P_b_0_false>=1)&&(i1.u35.P_wait_0_0>=1))&&(i1.u35.P_await_13_0>=1))||(((i5.u2.P_b_1_false>=1)&&(i1.u19.P_wait_0_1>=1))&&(i1.u35.P_await_13_0>=1)))||(((i3.u3.P_b_2_false>=1)&&(i1.u20.P_wait_0_2>=1))&&(i1.u35.P_await_13_0>=1)))||(((i4.u4.P_b_3_false>=1)&&(i1.u36.P_wait_0_3>=1))&&(i1.u35.P_await_13_0>=1)))||(((i2.u5.P_b_4_false>=1)&&(i1.u21.P_wait_0_4>=1))&&(i1.u35.P_await_13_0>=1)))||(((i6.u6.P_b_5_false>=1)&&(i1.u37.P_wait_0_5>=1))&&(i1.u35.P_await_13_0>=1)))||(((i1.u1.P_b_0_false>=1)&&(i5.u22.P_wait_1_0>=1))&&(i5.u22.P_await_13_1>=1)))||(((i5.u2.P_b_1_false>=1)&&(i5.u38.P_wait_1_1>=1))&&(i5.u22.P_await_13_1>=1)))||(((i3.u3.P_b_2_false>=1)&&(i5.u39.P_wait_1_2>=1))&&(i5.u22.P_await_13_1>=1)))||(((i4.u4.P_b_3_false>=1)&&(i5.u23.P_wait_1_3>=1))&&(i5.u22.P_await_13_1>=1)))||(((i2.u5.P_b_4_false>=1)&&(i5.u40.P_wait_1_4>=1))&&(i5.u22.P_await_13_1>=1)))||(((i6.u6.P_b_5_false>=1)&&(i5.u24.P_wait_1_5>=1))&&(i5.u22.P_await_13_1>=1)))||(((i1.u1.P_b_0_false>=1)&&(i3.u41.P_wait_2_0>=1))&&(i3.u41.P_await_13_2>=1)))||(((i5.u2.P_b_1_false>=1)&&(i3.u25.P_wait_2_1>=1))&&(i3.u41.P_await_13_2>=1)))||(((i3.u3.P_b_2_false>=1)&&(i3.u42.P_wait_2_2>=1))&&(i3.u41.P_await_13_2>=1)))||(((i4.u4.P_b_3_false>=1)&&(i3.u43.P_wait_2_3>=1))&&(i3.u41.P_await_13_2>=1)))||(((i2.u5.P_b_4_false>=1)&&(i3.u26.P_wait_2_4>=1))&&(i3.u41.P_await_13_2>=1)))||(((i6.u6.P_b_5_false>=1)&&(i3.u44.P_wait_2_5>=1))&&(i3.u41.P_await_13_2>=1)))||(((i1.u1.P_b_0_false>=1)&&(i4.u27.P_wait_3_0>=1))&&(i4.u27.P_await_13_3>=1)))||(((i5.u2.P_b_1_false>=1)&&(i4.u45.P_wait_3_1>=1))&&(i4.u27.P_await_13_3>=1)))||(((i3.u3.P_b_2_false>=1)&&(i4.u28.P_wait_3_2>=1))&&(i4.u27.P_await_13_3>=1)))||(((i4.u4.P_b_3_false>=1)&&(i4.u29.P_wait_3_3>=1))&&(i4.u27.P_await_13_3>=1)))||(((i2.u5.P_b_4_false>=1)&&(i4.u46.P_wait_3_4>=1))&&(i4.u27.P_await_13_3>=1)))||(((i6.u6.P_b_5_false>=1)&&(i4.u47.P_wait_3_5>=1))&&(i4.u27.P_await_13_3>=1)))||(((i1.u1.P_b_0_false>=1)&&(i2.u48.P_wait_4_0>=1))&&(i2.u48.P_await_13_4>=1)))||(((i5.u2.P_b_1_false>=1)&&(i2.u30.P_wait_4_1>=1))&&(i2.u48.P_await_13_4>=1)))||(((i3.u3.P_b_2_false>=1)&&(i2.u31.P_wait_4_2>=1))&&(i2.u48.P_await_13_4>=1)))||(((i4.u4.P_b_3_false>=1)&&(i2.u49.P_wait_4_3>=1))&&(i2.u48.P_await_13_4>=1)))||(((i2.u5.P_b_4_false>=1)&&(i2.u50.P_wait_4_4>=1))&&(i2.u48.P_await_13_4>=1)))||(((i6.u6.P_b_5_false>=1)&&(i2.u51.P_wait_4_5>=1))&&(i2.u48.P_await_13_4>=1)))||(((i1.u1.P_b_0_false>=1)&&(i6.u52.P_wait_5_0>=1))&&(i6.u52.P_await_13_5>=1)))||(((i5.u2.P_b_1_false>=1)&&(i6.u53.P_wait_5_1>=1))&&(i6.u52.P_await_13_5>=1)))||(((i3.u3.P_b_2_false>=1)&&(i6.u32.P_wait_5_2>=1))&&(i6.u52.P_await_13_5>=1)))||(((i4.u4.P_b_3_false>=1)&&(i6.u33.P_wait_5_3>=1))&&(i6.u52.P_await_13_5>=1)))||(((i2.u5.P_b_4_false>=1)&&(i6.u34.P_wait_5_4>=1))&&(i6.u52.P_await_13_5>=1)))||(((i6.u6.P_b_5_false>=1)&&(i6.u54.P_wait_5_5>=1))&&(i6.u52.P_await_13_5>=1)))")))
Formula 0 simplified : !F"((((((((((((((((((((((((((((((((((((((i1.u1.P_b_0_false>=1)&&(i1.u35.P_wait_0_0>=1))&&(i1.u35.P_await_13_0>=1))||(((i5.u2.P_b_1_false>=1)&&(i1.u19.P_wait_0_1>=1))&&(i1.u35.P_await_13_0>=1)))||(((i3.u3.P_b_2_false>=1)&&(i1.u20.P_wait_0_2>=1))&&(i1.u35.P_await_13_0>=1)))||(((i4.u4.P_b_3_false>=1)&&(i1.u36.P_wait_0_3>=1))&&(i1.u35.P_await_13_0>=1)))||(((i2.u5.P_b_4_false>=1)&&(i1.u21.P_wait_0_4>=1))&&(i1.u35.P_await_13_0>=1)))||(((i6.u6.P_b_5_false>=1)&&(i1.u37.P_wait_0_5>=1))&&(i1.u35.P_await_13_0>=1)))||(((i1.u1.P_b_0_false>=1)&&(i5.u22.P_wait_1_0>=1))&&(i5.u22.P_await_13_1>=1)))||(((i5.u2.P_b_1_false>=1)&&(i5.u38.P_wait_1_1>=1))&&(i5.u22.P_await_13_1>=1)))||(((i3.u3.P_b_2_false>=1)&&(i5.u39.P_wait_1_2>=1))&&(i5.u22.P_await_13_1>=1)))||(((i4.u4.P_b_3_false>=1)&&(i5.u23.P_wait_1_3>=1))&&(i5.u22.P_await_13_1>=1)))||(((i2.u5.P_b_4_false>=1)&&(i5.u40.P_wait_1_4>=1))&&(i5.u22.P_await_13_1>=1)))||(((i6.u6.P_b_5_false>=1)&&(i5.u24.P_wait_1_5>=1))&&(i5.u22.P_await_13_1>=1)))||(((i1.u1.P_b_0_false>=1)&&(i3.u41.P_wait_2_0>=1))&&(i3.u41.P_await_13_2>=1)))||(((i5.u2.P_b_1_false>=1)&&(i3.u25.P_wait_2_1>=1))&&(i3.u41.P_await_13_2>=1)))||(((i3.u3.P_b_2_false>=1)&&(i3.u42.P_wait_2_2>=1))&&(i3.u41.P_await_13_2>=1)))||(((i4.u4.P_b_3_false>=1)&&(i3.u43.P_wait_2_3>=1))&&(i3.u41.P_await_13_2>=1)))||(((i2.u5.P_b_4_false>=1)&&(i3.u26.P_wait_2_4>=1))&&(i3.u41.P_await_13_2>=1)))||(((i6.u6.P_b_5_false>=1)&&(i3.u44.P_wait_2_5>=1))&&(i3.u41.P_await_13_2>=1)))||(((i1.u1.P_b_0_false>=1)&&(i4.u27.P_wait_3_0>=1))&&(i4.u27.P_await_13_3>=1)))||(((i5.u2.P_b_1_false>=1)&&(i4.u45.P_wait_3_1>=1))&&(i4.u27.P_await_13_3>=1)))||(((i3.u3.P_b_2_false>=1)&&(i4.u28.P_wait_3_2>=1))&&(i4.u27.P_await_13_3>=1)))||(((i4.u4.P_b_3_false>=1)&&(i4.u29.P_wait_3_3>=1))&&(i4.u27.P_await_13_3>=1)))||(((i2.u5.P_b_4_false>=1)&&(i4.u46.P_wait_3_4>=1))&&(i4.u27.P_await_13_3>=1)))||(((i6.u6.P_b_5_false>=1)&&(i4.u47.P_wait_3_5>=1))&&(i4.u27.P_await_13_3>=1)))||(((i1.u1.P_b_0_false>=1)&&(i2.u48.P_wait_4_0>=1))&&(i2.u48.P_await_13_4>=1)))||(((i5.u2.P_b_1_false>=1)&&(i2.u30.P_wait_4_1>=1))&&(i2.u48.P_await_13_4>=1)))||(((i3.u3.P_b_2_false>=1)&&(i2.u31.P_wait_4_2>=1))&&(i2.u48.P_await_13_4>=1)))||(((i4.u4.P_b_3_false>=1)&&(i2.u49.P_wait_4_3>=1))&&(i2.u48.P_await_13_4>=1)))||(((i2.u5.P_b_4_false>=1)&&(i2.u50.P_wait_4_4>=1))&&(i2.u48.P_await_13_4>=1)))||(((i6.u6.P_b_5_false>=1)&&(i2.u51.P_wait_4_5>=1))&&(i2.u48.P_await_13_4>=1)))||(((i1.u1.P_b_0_false>=1)&&(i6.u52.P_wait_5_0>=1))&&(i6.u52.P_await_13_5>=1)))||(((i5.u2.P_b_1_false>=1)&&(i6.u53.P_wait_5_1>=1))&&(i6.u52.P_await_13_5>=1)))||(((i3.u3.P_b_2_false>=1)&&(i6.u32.P_wait_5_2>=1))&&(i6.u52.P_await_13_5>=1)))||(((i4.u4.P_b_3_false>=1)&&(i6.u33.P_wait_5_3>=1))&&(i6.u52.P_await_13_5>=1)))||(((i2.u5.P_b_4_false>=1)&&(i6.u34.P_wait_5_4>=1))&&(i6.u52.P_await_13_5>=1)))||(((i6.u6.P_b_5_false>=1)&&(i6.u54.P_wait_5_5>=1))&&(i6.u52.P_await_13_5>=1)))"
built 28 ordering constraints for composite.
built 170 ordering constraints for composite.
built 50 ordering constraints for composite.
built 67 ordering constraints for composite.
built 67 ordering constraints for composite.
built 50 ordering constraints for composite.
built 67 ordering constraints for composite.
built 67 ordering constraints for composite.
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
Normalized transition count is 246
// Phase 1: matrix 246 rows 174 cols
invariant :i1:u19:P_wait_0_1 + i1:u19:P_done_0_1 + -1'i1:u37:P_wait_0_5 + -1'i1:u37:P_done_0_5 = 0
invariant :i4:u27:P_await_13_3 + -1'i4:u47:P_wait_3_5 + -1'i4:u47:P_done_3_5 = 0
invariant :i4:u4:P_b_3_false + i4:u4:P_b_3_true = 1
invariant :i3:u3:P_start_1_2 + i3:u3:P_fordo_12_2 + i3:u9:P_setx_3_2 + i3:u9:P_setbi_5_2 + i3:u9:P_ify0_4_2 + i3:u17:P_sety_9_2 + i3:u17:P_ifxi_10_2 + i3:u17:P_setbi_11_2 + i3:u56:P_ifyi_15_2 + i3:u56:P_awaity_2 + i3:u61:P_CS_21_2 + i3:u61:P_setbi_24_2 + i3:u44:P_wait_2_5 + i3:u44:P_done_2_5 = 1
invariant :i4:u45:P_wait_3_1 + i4:u45:P_done_3_1 + -1'i4:u47:P_wait_3_5 + -1'i4:u47:P_done_3_5 = 0
invariant :i3:u41:P_wait_2_0 + i3:u41:P_done_2_0 = 0
invariant :i2:u5:P_start_1_4 + i2:u5:P_fordo_12_4 + i2:u11:P_setx_3_4 + i2:u11:P_setbi_5_4 + i2:u11:P_ify0_4_4 + i2:u18:P_sety_9_4 + i2:u18:P_ifxi_10_4 + i2:u18:P_setbi_11_4 + i2:u57:P_ifyi_15_4 + i2:u57:P_awaity_4 + i2:u65:P_CS_21_4 + i2:u65:P_setbi_24_4 + i2:u51:P_wait_4_5 + i2:u51:P_done_4_5 = 1
invariant :i3:u26:P_wait_2_4 + i3:u26:P_done_2_4 + -1'i3:u44:P_wait_2_5 + -1'i3:u44:P_done_2_5 = 0
invariant :i4:u46:P_wait_3_4 + i4:u46:P_done_3_4 + -1'i4:u47:P_wait_3_5 + -1'i4:u47:P_done_3_5 = 0
invariant :i0:u16:P_sety_9_0 + i0:u16:P_ifxi_10_0 + i0:u16:P_setbi_11_0 + i0:u63:P_CS_21_0 + i0:u63:P_setbi_24_0 + i1:u1:P_start_1_0 + i1:u1:P_fordo_12_0 + i1:u7:P_setx_3_0 + i1:u7:P_setbi_5_0 + i1:u7:P_ify0_4_0 + i1:u37:P_wait_0_5 + i1:u37:P_done_0_5 + i1:u55:P_ifyi_15_0 + i1:u55:P_awaity_0 = 0
invariant :i6:u6:P_start_1_5 + i6:u6:P_fordo_12_5 + i6:u12:P_setx_3_5 + i6:u12:P_setbi_5_5 + i6:u12:P_ify0_4_5 + i6:u15:P_sety_9_5 + i6:u15:P_ifxi_10_5 + i6:u15:P_setbi_11_5 + i6:u60:P_ifyi_15_5 + i6:u60:P_awaity_5 + i6:u66:P_CS_21_5 + i6:u66:P_setbi_24_5 + i6:u53:P_wait_5_1 + i6:u53:P_done_5_1 = 1
invariant :i3:u43:P_wait_2_3 + i3:u43:P_done_2_3 + -1'i3:u44:P_wait_2_5 + -1'i3:u44:P_done_2_5 = 0
invariant :i4:u27:P_wait_3_0 + i4:u27:P_done_3_0 = 0
invariant :i6:u52:P_await_13_5 + -1'i6:u53:P_wait_5_1 + -1'i6:u53:P_done_5_1 = 0
invariant :i1:u35:P_await_13_0 + -1'i1:u37:P_wait_0_5 + -1'i1:u37:P_done_0_5 = 0
invariant :i2:u30:P_wait_4_1 + i2:u30:P_done_4_1 + -1'i2:u51:P_wait_4_5 + -1'i2:u51:P_done_4_5 = 0
invariant :i6:u6:P_b_5_false + i6:u6:P_b_5_true = 1
invariant :i1:u21:P_wait_0_4 + i1:u21:P_done_0_4 + -1'i1:u37:P_wait_0_5 + -1'i1:u37:P_done_0_5 = 0
invariant :i6:u52:P_wait_5_0 + i6:u52:P_done_5_0 = 0
invariant :i3:u25:P_wait_2_1 + i3:u25:P_done_2_1 + -1'i3:u44:P_wait_2_5 + -1'i3:u44:P_done_2_5 = 0
invariant :i4:u29:P_wait_3_3 + i4:u29:P_done_3_3 + -1'i4:u47:P_wait_3_5 + -1'i4:u47:P_done_3_5 = 0
invariant :i5:u38:P_wait_1_1 + i5:u38:P_done_1_1 + -1'i5:u40:P_wait_1_4 + -1'i5:u40:P_done_1_4 = 0
invariant :i5:u2:P_b_1_false + i5:u2:P_b_1_true = 1
invariant :i5:u22:P_await_13_1 + -1'i5:u40:P_wait_1_4 + -1'i5:u40:P_done_1_4 = 0
invariant :i2:u48:P_await_13_4 + -1'i2:u51:P_wait_4_5 + -1'i2:u51:P_done_4_5 = 0
invariant :i1:u20:P_wait_0_2 + i1:u20:P_done_0_2 + -1'i1:u37:P_wait_0_5 + -1'i1:u37:P_done_0_5 = 0
invariant :i1:u35:P_wait_0_0 + i1:u35:P_done_0_0 = 0
invariant :i6:u34:P_wait_5_4 + i6:u34:P_done_5_4 + -1'i6:u53:P_wait_5_1 + -1'i6:u53:P_done_5_1 = 0
invariant :i1:u1:P_b_0_false + i1:u1:P_b_0_true = 0
invariant :i6:u33:P_wait_5_3 + i6:u33:P_done_5_3 + -1'i6:u53:P_wait_5_1 + -1'i6:u53:P_done_5_1 = 0
invariant :i2:u50:P_wait_4_4 + i2:u50:P_done_4_4 + -1'i2:u51:P_wait_4_5 + -1'i2:u51:P_done_4_5 = 0
invariant :i5:u22:P_wait_1_0 + i5:u22:P_done_1_0 = 0
invariant :i6:u32:P_wait_5_2 + i6:u32:P_done_5_2 + -1'i6:u53:P_wait_5_1 + -1'i6:u53:P_done_5_1 = 0
invariant :i5:u2:P_start_1_1 + i5:u2:P_fordo_12_1 + i5:u8:P_setx_3_1 + i5:u8:P_setbi_5_1 + i5:u8:P_ify0_4_1 + i5:u13:P_sety_9_1 + i5:u13:P_ifxi_10_1 + i5:u13:P_setbi_11_1 + i5:u58:P_ifyi_15_1 + i5:u58:P_awaity_1 + i5:u64:P_CS_21_1 + i5:u64:P_setbi_24_1 + i5:u40:P_wait_1_4 + i5:u40:P_done_1_4 = 1
invariant :i4:u28:P_wait_3_2 + i4:u28:P_done_3_2 + -1'i4:u47:P_wait_3_5 + -1'i4:u47:P_done_3_5 = 0
invariant :i5:u24:P_wait_1_5 + i5:u24:P_done_1_5 + -1'i5:u40:P_wait_1_4 + -1'i5:u40:P_done_1_4 = 0
invariant :i6:u54:P_wait_5_5 + i6:u54:P_done_5_5 + -1'i6:u53:P_wait_5_1 + -1'i6:u53:P_done_5_1 = 0
invariant :i2:u5:P_b_4_false + i2:u5:P_b_4_true = 1
invariant :i1:u36:P_wait_0_3 + i1:u36:P_done_0_3 + -1'i1:u37:P_wait_0_5 + -1'i1:u37:P_done_0_5 = 0
invariant :i0:u0:y_0 + i0:u0:y_1 + i0:u0:y_2 + i0:u0:y_3 + i0:u0:y_4 + i0:u0:y_5 = 1
invariant :i0:u14:P_sety_9_3 + i0:u14:P_ifxi_10_3 + i0:u14:P_setbi_11_3 + i0:u62:P_CS_21_3 + i0:u62:P_setbi_24_3 + i4:u4:P_start_1_3 + i4:u4:P_fordo_12_3 + i4:u10:P_setx_3_3 + i4:u10:P_setbi_5_3 + i4:u10:P_ify0_4_3 + i4:u59:P_ifyi_15_3 + i4:u59:P_awaity_3 + i4:u47:P_wait_3_5 + i4:u47:P_done_3_5 = 1
invariant :i2:u31:P_wait_4_2 + i2:u31:P_done_4_2 + -1'i2:u51:P_wait_4_5 + -1'i2:u51:P_done_4_5 = 0
invariant :i3:u3:P_b_2_false + i3:u3:P_b_2_true = 1
invariant :i1:u7:x_0 + i2:u11:x_4 + i3:u9:x_2 + i4:u10:x_3 + i5:u8:x_1 + i6:u12:x_5 = 1
invariant :i5:u39:P_wait_1_2 + i5:u39:P_done_1_2 + -1'i5:u40:P_wait_1_4 + -1'i5:u40:P_done_1_4 = 0
invariant :i3:u42:P_wait_2_2 + i3:u42:P_done_2_2 + -1'i3:u44:P_wait_2_5 + -1'i3:u44:P_done_2_5 = 0
invariant :i5:u23:P_wait_1_3 + i5:u23:P_done_1_3 + -1'i5:u40:P_wait_1_4 + -1'i5:u40:P_done_1_4 = 0
invariant :i2:u48:P_wait_4_0 + i2:u48:P_done_4_0 = 0
invariant :i3:u41:P_await_13_2 + -1'i3:u44:P_wait_2_5 + -1'i3:u44:P_done_2_5 = 0
invariant :i2:u49:P_wait_4_3 + i2:u49:P_done_4_3 + -1'i2:u51:P_wait_4_5 + -1'i2:u51:P_done_4_5 = 0
Reverse transition relation is NOT exact ! Due to transitions T_setx_3_7, T_setx_3_9, T_setx_3_10, T_setx_3_11, T_setx_3_12, T_setx_3_13, T_setx_3_14, T_setx_3_16, T_setx_3_17, T_setx_3_18, T_setx_3_19, T_setx_3_20, T_setx_3_21, T_setx_3_23, T_setx_3_24, T_setx_3_25, T_setx_3_26, T_setx_3_27, T_setx_3_28, T_setx_3_30, T_setx_3_31, T_setx_3_32, T_setx_3_33, T_setx_3_34, T_setx_3_35, T_setbi_5_4, T_setbi_5_6, T_setbi_5_8, T_setbi_5_10, T_setbi_5_12, T_awaity_2, T_awaity_3, T_awaity_4, T_awaity_5, T_awaity_6, T_sety_9_7, T_sety_9_9, T_sety_9_10, T_sety_9_11, T_sety_9_12, T_sety_9_13, T_sety_9_14, T_sety_9_16, T_sety_9_17, T_sety_9_18, T_sety_9_19, T_sety_9_20, T_sety_9_21, T_sety_9_23, T_sety_9_24, T_sety_9_25, T_sety_9_26, T_sety_9_27, T_sety_9_28, T_sety_9_30, T_sety_9_31, T_sety_9_32, T_sety_9_33, T_sety_9_34, T_sety_9_35, T_setbi_11_4, T_setbi_11_6, T_setbi_11_8, T_setbi_11_10, T_setbi_11_12, T_ynei_15_7, T_ynei_15_9, T_ynei_15_10, T_ynei_15_11, T_ynei_15_12, T_ynei_15_13, T_ynei_15_14, T_ynei_15_16, T_ynei_15_17, T_ynei_15_18, T_ynei_15_19, T_ynei_15_20, T_ynei_15_21, T_ynei_15_23, T_ynei_15_24, T_ynei_15_25, T_ynei_15_26, T_ynei_15_27, T_ynei_15_28, T_ynei_15_30, T_ynei_15_31, T_ynei_15_32, T_ynei_15_33, T_ynei_15_34, T_ynei_15_35, T_yeqi_15_8, T_yeqi_15_15, T_yeqi_15_22, T_yeqi_15_29, T_yeqi_15_36, T_sety0_23_8, T_sety0_23_9, T_sety0_23_10, T_sety0_23_11, T_sety0_23_12, T_sety0_23_14, T_sety0_23_15, T_sety0_23_16, T_sety0_23_17, T_sety0_23_18, T_sety0_23_20, T_sety0_23_21, T_sety0_23_22, T_sety0_23_23, T_sety0_23_24, T_sety0_23_26, T_sety0_23_27, T_sety0_23_28, T_sety0_23_29, T_sety0_23_30, T_sety0_23_32, T_sety0_23_33, T_sety0_23_34, T_sety0_23_35, T_sety0_23_36, T_setbi_24_3, T_setbi_24_4, T_setbi_24_5, T_setbi_24_6, T_setbi_24_7, T_setbi_24_8, T_setbi_24_9, T_setbi_24_10, T_setbi_24_11, T_setbi_24_12, i2.u11.T_setx_3_29, i3.u9.T_setx_3_15, i4.u10.T_setx_3_22, i5.u8.T_setx_3_8, i6.u12.T_setx_3_36, Intersection with reachable at each step enabled. (destroyed/reverse/intersect/total) :93/90/135/318
2 unique states visited
2 strongly connected components in search stack
2 transitions explored
2 items max in DFS search stack
5129 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,51.357,585292,1,0,751922,1222,3217,1.99034e+06,416,4257,2274268
an accepting run exists (use option '-e' to print it)
Formula 0 is FALSE accepting run found.
FORMULA LamportFastMutEx-PT-5-LTLFireability-00 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 1 : !(((G("((((((i1.u1.P_fordo_12_0>=1)||(i5.u2.P_fordo_12_1>=1))||(i3.u3.P_fordo_12_2>=1))||(i4.u4.P_fordo_12_3>=1))||(i2.u5.P_fordo_12_4>=1))||(i6.u6.P_fordo_12_5>=1))"))U(("(((((((((((((i1.u1.P_b_0_false>=1)&&(i0.u16.P_setbi_11_0>=1))||((i1.u1.P_b_0_true>=1)&&(i0.u16.P_setbi_11_0>=1)))||((i5.u2.P_b_1_false>=1)&&(i5.u13.P_setbi_11_1>=1)))||((i5.u2.P_b_1_true>=1)&&(i5.u13.P_setbi_11_1>=1)))||((i3.u3.P_b_2_false>=1)&&(i3.u17.P_setbi_11_2>=1)))||((i3.u3.P_b_2_true>=1)&&(i3.u17.P_setbi_11_2>=1)))||((i4.u4.P_b_3_false>=1)&&(i0.u14.P_setbi_11_3>=1)))||((i4.u4.P_b_3_true>=1)&&(i0.u14.P_setbi_11_3>=1)))||((i2.u5.P_b_4_false>=1)&&(i2.u18.P_setbi_11_4>=1)))||((i2.u5.P_b_4_true>=1)&&(i2.u18.P_setbi_11_4>=1)))||((i6.u6.P_b_5_false>=1)&&(i6.u15.P_setbi_11_5>=1)))||((i6.u6.P_b_5_true>=1)&&(i6.u15.P_setbi_11_5>=1)))")U(X("(((((((((((i1.u35.P_await_13_0>=1)&&(i1.u19.P_done_0_1>=1))&&(i1.u20.P_done_0_2>=1))&&(i1.u36.P_done_0_3>=1))&&(i1.u21.P_done_0_4>=1))&&(i1.u37.P_done_0_5>=1))||((((((i5.u22.P_await_13_1>=1)&&(i5.u38.P_done_1_1>=1))&&(i5.u39.P_done_1_2>=1))&&(i5.u23.P_done_1_3>=1))&&(i5.u40.P_done_1_4>=1))&&(i5.u24.P_done_1_5>=1)))||((((((i3.u41.P_await_13_2>=1)&&(i3.u25.P_done_2_1>=1))&&(i3.u42.P_done_2_2>=1))&&(i3.u43.P_done_2_3>=1))&&(i3.u26.P_done_2_4>=1))&&(i3.u44.P_done_2_5>=1)))||((((((i4.u27.P_await_13_3>=1)&&(i4.u45.P_done_3_1>=1))&&(i4.u28.P_done_3_2>=1))&&(i4.u29.P_done_3_3>=1))&&(i4.u46.P_done_3_4>=1))&&(i4.u47.P_done_3_5>=1)))||((((((i2.u48.P_await_13_4>=1)&&(i2.u30.P_done_4_1>=1))&&(i2.u31.P_done_4_2>=1))&&(i2.u49.P_done_4_3>=1))&&(i2.u50.P_done_4_4>=1))&&(i2.u51.P_done_4_5>=1)))||((((((i6.u52.P_await_13_5>=1)&&(i6.u53.P_done_5_1>=1))&&(i6.u32.P_done_5_2>=1))&&(i6.u33.P_done_5_3>=1))&&(i6.u34.P_done_5_4>=1))&&(i6.u54.P_done_5_5>=1)))")))))
Formula 1 simplified : !(G"((((((i1.u1.P_fordo_12_0>=1)||(i5.u2.P_fordo_12_1>=1))||(i3.u3.P_fordo_12_2>=1))||(i4.u4.P_fordo_12_3>=1))||(i2.u5.P_fordo_12_4>=1))||(i6.u6.P_fordo_12_5>=1))" U ("(((((((((((((i1.u1.P_b_0_false>=1)&&(i0.u16.P_setbi_11_0>=1))||((i1.u1.P_b_0_true>=1)&&(i0.u16.P_setbi_11_0>=1)))||((i5.u2.P_b_1_false>=1)&&(i5.u13.P_setbi_11_1>=1)))||((i5.u2.P_b_1_true>=1)&&(i5.u13.P_setbi_11_1>=1)))||((i3.u3.P_b_2_false>=1)&&(i3.u17.P_setbi_11_2>=1)))||((i3.u3.P_b_2_true>=1)&&(i3.u17.P_setbi_11_2>=1)))||((i4.u4.P_b_3_false>=1)&&(i0.u14.P_setbi_11_3>=1)))||((i4.u4.P_b_3_true>=1)&&(i0.u14.P_setbi_11_3>=1)))||((i2.u5.P_b_4_false>=1)&&(i2.u18.P_setbi_11_4>=1)))||((i2.u5.P_b_4_true>=1)&&(i2.u18.P_setbi_11_4>=1)))||((i6.u6.P_b_5_false>=1)&&(i6.u15.P_setbi_11_5>=1)))||((i6.u6.P_b_5_true>=1)&&(i6.u15.P_setbi_11_5>=1)))" U X"(((((((((((i1.u35.P_await_13_0>=1)&&(i1.u19.P_done_0_1>=1))&&(i1.u20.P_done_0_2>=1))&&(i1.u36.P_done_0_3>=1))&&(i1.u21.P_done_0_4>=1))&&(i1.u37.P_done_0_5>=1))||((((((i5.u22.P_await_13_1>=1)&&(i5.u38.P_done_1_1>=1))&&(i5.u39.P_done_1_2>=1))&&(i5.u23.P_done_1_3>=1))&&(i5.u40.P_done_1_4>=1))&&(i5.u24.P_done_1_5>=1)))||((((((i3.u41.P_await_13_2>=1)&&(i3.u25.P_done_2_1>=1))&&(i3.u42.P_done_2_2>=1))&&(i3.u43.P_done_2_3>=1))&&(i3.u26.P_done_2_4>=1))&&(i3.u44.P_done_2_5>=1)))||((((((i4.u27.P_await_13_3>=1)&&(i4.u45.P_done_3_1>=1))&&(i4.u28.P_done_3_2>=1))&&(i4.u29.P_done_3_3>=1))&&(i4.u46.P_done_3_4>=1))&&(i4.u47.P_done_3_5>=1)))||((((((i2.u48.P_await_13_4>=1)&&(i2.u30.P_done_4_1>=1))&&(i2.u31.P_done_4_2>=1))&&(i2.u49.P_done_4_3>=1))&&(i2.u50.P_done_4_4>=1))&&(i2.u51.P_done_4_5>=1)))||((((((i6.u52.P_await_13_5>=1)&&(i6.u53.P_done_5_1>=1))&&(i6.u32.P_done_5_2>=1))&&(i6.u33.P_done_5_3>=1))&&(i6.u34.P_done_5_4>=1))&&(i6.u54.P_done_5_5>=1)))"))
4 unique states visited
4 strongly connected components in search stack
4 transitions explored
4 items max in DFS search stack
2999 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,81.3513,1004940,1,0,1.30854e+06,1265,3847,3.55499e+06,419,4572,4765783
an accepting run exists (use option '-e' to print it)
Formula 1 is FALSE accepting run found.
FORMULA LamportFastMutEx-PT-5-LTLFireability-01 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 2 : !(((G(X("(((((((i0.u0.y_0>=1)&&(i1.u7.P_ify0_4_0>=1))||((i0.u0.y_0>=1)&&(i5.u8.P_ify0_4_1>=1)))||((i0.u0.y_0>=1)&&(i3.u9.P_ify0_4_2>=1)))||((i0.u0.y_0>=1)&&(i4.u10.P_ify0_4_3>=1)))||((i0.u0.y_0>=1)&&(i2.u11.P_ify0_4_4>=1)))||((i0.u0.y_0>=1)&&(i6.u12.P_ify0_4_5>=1)))")))U(X(F(G("(((((((((((((((((((((((((((((((((((((i0.u0.y_0>=1)&&(i0.u16.P_sety_9_0>=1))||((i0.u0.y_1>=1)&&(i0.u16.P_sety_9_0>=1)))||((i0.u0.y_2>=1)&&(i0.u16.P_sety_9_0>=1)))||((i0.u0.y_3>=1)&&(i0.u16.P_sety_9_0>=1)))||((i0.u0.y_4>=1)&&(i0.u16.P_sety_9_0>=1)))||((i0.u0.y_5>=1)&&(i0.u16.P_sety_9_0>=1)))||((i0.u0.y_0>=1)&&(i5.u13.P_sety_9_1>=1)))||((i0.u0.y_1>=1)&&(i5.u13.P_sety_9_1>=1)))||((i0.u0.y_2>=1)&&(i5.u13.P_sety_9_1>=1)))||((i0.u0.y_3>=1)&&(i5.u13.P_sety_9_1>=1)))||((i0.u0.y_4>=1)&&(i5.u13.P_sety_9_1>=1)))||((i0.u0.y_5>=1)&&(i5.u13.P_sety_9_1>=1)))||((i0.u0.y_0>=1)&&(i3.u17.P_sety_9_2>=1)))||((i0.u0.y_1>=1)&&(i3.u17.P_sety_9_2>=1)))||((i0.u0.y_2>=1)&&(i3.u17.P_sety_9_2>=1)))||((i0.u0.y_3>=1)&&(i3.u17.P_sety_9_2>=1)))||((i0.u0.y_4>=1)&&(i3.u17.P_sety_9_2>=1)))||((i0.u0.y_5>=1)&&(i3.u17.P_sety_9_2>=1)))||((i0.u0.y_0>=1)&&(i0.u14.P_sety_9_3>=1)))||((i0.u0.y_1>=1)&&(i0.u14.P_sety_9_3>=1)))||((i0.u0.y_2>=1)&&(i0.u14.P_sety_9_3>=1)))||((i0.u0.y_3>=1)&&(i0.u14.P_sety_9_3>=1)))||((i0.u0.y_4>=1)&&(i0.u14.P_sety_9_3>=1)))||((i0.u0.y_5>=1)&&(i0.u14.P_sety_9_3>=1)))||((i0.u0.y_0>=1)&&(i2.u18.P_sety_9_4>=1)))||((i0.u0.y_1>=1)&&(i2.u18.P_sety_9_4>=1)))||((i0.u0.y_2>=1)&&(i2.u18.P_sety_9_4>=1)))||((i0.u0.y_3>=1)&&(i2.u18.P_sety_9_4>=1)))||((i0.u0.y_4>=1)&&(i2.u18.P_sety_9_4>=1)))||((i0.u0.y_5>=1)&&(i2.u18.P_sety_9_4>=1)))||((i0.u0.y_0>=1)&&(i6.u15.P_sety_9_5>=1)))||((i0.u0.y_1>=1)&&(i6.u15.P_sety_9_5>=1)))||((i0.u0.y_2>=1)&&(i6.u15.P_sety_9_5>=1)))||((i0.u0.y_3>=1)&&(i6.u15.P_sety_9_5>=1)))||((i0.u0.y_4>=1)&&(i6.u15.P_sety_9_5>=1)))||((i0.u0.y_5>=1)&&(i6.u15.P_sety_9_5>=1)))"))))))
Formula 2 simplified : !(GX"(((((((i0.u0.y_0>=1)&&(i1.u7.P_ify0_4_0>=1))||((i0.u0.y_0>=1)&&(i5.u8.P_ify0_4_1>=1)))||((i0.u0.y_0>=1)&&(i3.u9.P_ify0_4_2>=1)))||((i0.u0.y_0>=1)&&(i4.u10.P_ify0_4_3>=1)))||((i0.u0.y_0>=1)&&(i2.u11.P_ify0_4_4>=1)))||((i0.u0.y_0>=1)&&(i6.u12.P_ify0_4_5>=1)))" U XFG"(((((((((((((((((((((((((((((((((((((i0.u0.y_0>=1)&&(i0.u16.P_sety_9_0>=1))||((i0.u0.y_1>=1)&&(i0.u16.P_sety_9_0>=1)))||((i0.u0.y_2>=1)&&(i0.u16.P_sety_9_0>=1)))||((i0.u0.y_3>=1)&&(i0.u16.P_sety_9_0>=1)))||((i0.u0.y_4>=1)&&(i0.u16.P_sety_9_0>=1)))||((i0.u0.y_5>=1)&&(i0.u16.P_sety_9_0>=1)))||((i0.u0.y_0>=1)&&(i5.u13.P_sety_9_1>=1)))||((i0.u0.y_1>=1)&&(i5.u13.P_sety_9_1>=1)))||((i0.u0.y_2>=1)&&(i5.u13.P_sety_9_1>=1)))||((i0.u0.y_3>=1)&&(i5.u13.P_sety_9_1>=1)))||((i0.u0.y_4>=1)&&(i5.u13.P_sety_9_1>=1)))||((i0.u0.y_5>=1)&&(i5.u13.P_sety_9_1>=1)))||((i0.u0.y_0>=1)&&(i3.u17.P_sety_9_2>=1)))||((i0.u0.y_1>=1)&&(i3.u17.P_sety_9_2>=1)))||((i0.u0.y_2>=1)&&(i3.u17.P_sety_9_2>=1)))||((i0.u0.y_3>=1)&&(i3.u17.P_sety_9_2>=1)))||((i0.u0.y_4>=1)&&(i3.u17.P_sety_9_2>=1)))||((i0.u0.y_5>=1)&&(i3.u17.P_sety_9_2>=1)))||((i0.u0.y_0>=1)&&(i0.u14.P_sety_9_3>=1)))||((i0.u0.y_1>=1)&&(i0.u14.P_sety_9_3>=1)))||((i0.u0.y_2>=1)&&(i0.u14.P_sety_9_3>=1)))||((i0.u0.y_3>=1)&&(i0.u14.P_sety_9_3>=1)))||((i0.u0.y_4>=1)&&(i0.u14.P_sety_9_3>=1)))||((i0.u0.y_5>=1)&&(i0.u14.P_sety_9_3>=1)))||((i0.u0.y_0>=1)&&(i2.u18.P_sety_9_4>=1)))||((i0.u0.y_1>=1)&&(i2.u18.P_sety_9_4>=1)))||((i0.u0.y_2>=1)&&(i2.u18.P_sety_9_4>=1)))||((i0.u0.y_3>=1)&&(i2.u18.P_sety_9_4>=1)))||((i0.u0.y_4>=1)&&(i2.u18.P_sety_9_4>=1)))||((i0.u0.y_5>=1)&&(i2.u18.P_sety_9_4>=1)))||((i0.u0.y_0>=1)&&(i6.u15.P_sety_9_5>=1)))||((i0.u0.y_1>=1)&&(i6.u15.P_sety_9_5>=1)))||((i0.u0.y_2>=1)&&(i6.u15.P_sety_9_5>=1)))||((i0.u0.y_3>=1)&&(i6.u15.P_sety_9_5>=1)))||((i0.u0.y_4>=1)&&(i6.u15.P_sety_9_5>=1)))||((i0.u0.y_5>=1)&&(i6.u15.P_sety_9_5>=1)))")
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O3, model.c], workingDir=/home/mcc/execution]
Compilation finished in 5033 ms.
Running link step : CommandLine [args=[gcc, -shared, -o, gal.so, model.o], workingDir=/home/mcc/execution]
Link finished in 100 ms.
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, ([](X((LTLAP4==true))))U(X(<>([]((LTLAP5==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 49 ms.
FORMULA LamportFastMutEx-PT-5-LTLFireability-02 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, []([]((LTLAP6==true))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 158 ms.
FORMULA LamportFastMutEx-PT-5-LTLFireability-03 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X(X([](X(X((LTLAP4==true)))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 79 ms.
FORMULA LamportFastMutEx-PT-5-LTLFireability-04 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, <>(X(<>((LTLAP6==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 41 ms.
FORMULA LamportFastMutEx-PT-5-LTLFireability-05 TRUE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X([]([]((LTLAP7==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 29 ms.
FORMULA LamportFastMutEx-PT-5-LTLFireability-06 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, (LTLAP8==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 163 ms.
FORMULA LamportFastMutEx-PT-5-LTLFireability-07 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, [](X((LTLAP9==true))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 46 ms.
FORMULA LamportFastMutEx-PT-5-LTLFireability-08 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, (LTLAP10==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 132 ms.
FORMULA LamportFastMutEx-PT-5-LTLFireability-09 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, ((LTLAP11==true))U(<>((LTLAP12==true))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 165 ms.
FORMULA LamportFastMutEx-PT-5-LTLFireability-10 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, (X(<>((LTLAP13==true))))U(<>([](<>((LTLAP14==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 65 ms.
FORMULA LamportFastMutEx-PT-5-LTLFireability-11 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X(X(X((LTLAP15==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 68 ms.
FORMULA LamportFastMutEx-PT-5-LTLFireability-12 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X((<>(X((LTLAP16==true))))U(X(<>((LTLAP17==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 6130 ms.
FORMULA LamportFastMutEx-PT-5-LTLFireability-13 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, (LTLAP18==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 125 ms.
FORMULA LamportFastMutEx-PT-5-LTLFireability-14 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, ([]((LTLAP19==true)))U([](<>(X((LTLAP20==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 2538 ms.
FORMULA LamportFastMutEx-PT-5-LTLFireability-15 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
ITS tools runner thread asked to quit. Dying gracefully.

BK_STOP 1527499969849

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution LTLFireability -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -louvain -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -consoleLog -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination LTLFireability -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -louvain -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
May 28, 2018 9:30:03 AM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, LTLFireability, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -louvain, -smt]
May 28, 2018 9:30:03 AM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
May 28, 2018 9:30:03 AM fr.lip6.move.gal.nupn.PTNetReader loadFromXML
INFO: Load time of PNML (sax parser for PT used): 97 ms
May 28, 2018 9:30:03 AM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 174 places.
May 28, 2018 9:30:03 AM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 318 transitions.
May 28, 2018 9:30:03 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.img.gal : 24 ms
May 28, 2018 9:30:03 AM fr.lip6.move.gal.application.MccTranslator applyOrder
INFO: Applying decomposition
May 28, 2018 9:30:03 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 126 ms
May 28, 2018 9:30:03 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 64 ms
Begin: Mon May 28 09:30:04 2018

Computation of communities with the Newman-Girvan Modularity quality function

level 0:
start computation: Mon May 28 09:30:04 2018
network size: 174 nodes, 1208 links, 636 weight
quality increased from -0.0118089 to 0.369281
end computation: Mon May 28 09:30:04 2018
level 1:
start computation: Mon May 28 09:30:04 2018
network size: 67 nodes, 589 links, 636 weight
quality increased from 0.369281 to 0.489867
end computation: Mon May 28 09:30:04 2018
level 2:
start computation: Mon May 28 09:30:04 2018
network size: 12 nodes, 114 links, 636 weight
quality increased from 0.489867 to 0.502674
end computation: Mon May 28 09:30:04 2018
level 3:
start computation: Mon May 28 09:30:04 2018
network size: 7 nodes, 49 links, 636 weight
quality increased from 0.502674 to 0.502674
end computation: Mon May 28 09:30:04 2018
End: Mon May 28 09:30:04 2018
Total duration: 0 sec
0.502674
May 28, 2018 9:30:04 AM fr.lip6.move.gal.instantiate.CompositeBuilder decomposeWithOrder
INFO: Decomposing Gal with order
May 28, 2018 9:30:04 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 36 ms
May 28, 2018 9:30:04 AM fr.lip6.move.gal.instantiate.CompositeBuilder rewriteArraysToAllowPartition
INFO: Rewriting arrays to variables to allow decomposition.
May 28, 2018 9:30:04 AM fr.lip6.move.gal.instantiate.Instantiator fuseIsomorphicEffects
INFO: Removed a total of 420 redundant transitions.
May 28, 2018 9:30:04 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/LTLFireability.pnml.gal : 16 ms
May 28, 2018 9:30:04 AM fr.lip6.move.serialization.SerializationUtil serializePropertiesForITSLTLTools
INFO: Time to serialize properties into /home/mcc/execution/LTLFireability.ltl : 5 ms
May 28, 2018 9:30:04 AM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 318 transitions.
May 28, 2018 9:30:04 AM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 50 place invariants in 85 ms
May 28, 2018 9:30:05 AM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 174 variables to be positive in 485 ms
May 28, 2018 9:30:05 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may disable matrix : 318 transitions.
May 28, 2018 9:30:05 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of disable matrix completed :0/318 took 0 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 28, 2018 9:30:05 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete disable matrix. took 28 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 28, 2018 9:30:05 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may enable matrix : 318 transitions.
May 28, 2018 9:30:05 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete enable matrix. took 17 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 28, 2018 9:30:15 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeCoEnablingMatrix
INFO: Computing symmetric co enabling matrix : 318 transitions.
May 28, 2018 9:30:16 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(0/318) took 222 ms. Total solver calls (SAT/UNSAT): 53(0/53)
May 28, 2018 9:30:19 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(3/318) took 3228 ms. Total solver calls (SAT/UNSAT): 210(6/204)
May 28, 2018 9:30:23 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(16/318) took 7324 ms. Total solver calls (SAT/UNSAT): 1145(30/1115)
May 28, 2018 9:30:26 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(20/318) took 10753 ms. Total solver calls (SAT/UNSAT): 1539(67/1472)
May 28, 2018 9:30:32 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(22/318) took 16176 ms. Total solver calls (SAT/UNSAT): 1730(85/1645)
May 28, 2018 9:30:35 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(23/318) took 19424 ms. Total solver calls (SAT/UNSAT): 1824(94/1730)
May 28, 2018 9:30:39 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(25/318) took 23898 ms. Total solver calls (SAT/UNSAT): 2009(110/1899)
May 28, 2018 9:30:47 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(47/318) took 31444 ms. Total solver calls (SAT/UNSAT): 4320(239/4081)
May 28, 2018 9:30:52 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(53/318) took 36716 ms. Total solver calls (SAT/UNSAT): 5259(351/4908)
May 28, 2018 9:30:57 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(64/318) took 41669 ms. Total solver calls (SAT/UNSAT): 6887(538/6349)
May 28, 2018 9:31:04 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(67/318) took 48630 ms. Total solver calls (SAT/UNSAT): 7310(585/6725)
May 28, 2018 9:31:07 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(73/318) took 51642 ms. Total solver calls (SAT/UNSAT): 7941(645/7296)
May 28, 2018 9:31:11 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(86/318) took 55127 ms. Total solver calls (SAT/UNSAT): 8742(722/8020)
May 28, 2018 9:31:16 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(92/318) took 60219 ms. Total solver calls (SAT/UNSAT): 9507(822/8685)
May 28, 2018 9:31:20 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(103/318) took 64098 ms. Total solver calls (SAT/UNSAT): 10816(898/9918)
May 28, 2018 9:31:23 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(110/318) took 67369 ms. Total solver calls (SAT/UNSAT): 11586(993/10593)
May 28, 2018 9:31:27 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(116/318) took 71234 ms. Total solver calls (SAT/UNSAT): 12207(1068/11139)
May 28, 2018 9:31:32 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(122/318) took 76623 ms. Total solver calls (SAT/UNSAT): 12792(1137/11655)
May 28, 2018 9:31:36 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(127/318) took 80450 ms. Total solver calls (SAT/UNSAT): 13252(1190/12062)
May 28, 2018 9:31:39 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(130/318) took 83712 ms. Total solver calls (SAT/UNSAT): 13516(1220/12296)
May 28, 2018 9:31:44 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(132/318) took 88201 ms. Total solver calls (SAT/UNSAT): 13662(1230/12432)
May 28, 2018 9:31:48 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(140/318) took 92116 ms. Total solver calls (SAT/UNSAT): 14106(1251/12855)
May 28, 2018 9:31:51 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(142/318) took 95622 ms. Total solver calls (SAT/UNSAT): 14207(1261/12946)
May 28, 2018 9:31:54 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(152/318) took 98964 ms. Total solver calls (SAT/UNSAT): 14652(1299/13353)
May 28, 2018 9:31:58 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(156/318) took 102072 ms. Total solver calls (SAT/UNSAT): 14802(1310/13492)
May 28, 2018 9:32:01 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(167/318) took 105183 ms. Total solver calls (SAT/UNSAT): 15120(1332/13788)
May 28, 2018 9:32:04 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(173/318) took 108351 ms. Total solver calls (SAT/UNSAT): 15273(1350/13923)
May 28, 2018 9:32:07 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(194/318) took 111448 ms. Total solver calls (SAT/UNSAT): 15563(1444/14119)
May 28, 2018 9:32:10 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(205/318) took 114494 ms. Total solver calls (SAT/UNSAT): 15678(1497/14181)
May 28, 2018 9:32:13 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(219/318) took 117634 ms. Total solver calls (SAT/UNSAT): 15829(1533/14296)
May 28, 2018 9:32:17 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(233/318) took 121259 ms. Total solver calls (SAT/UNSAT): 16695(1597/15098)
May 28, 2018 9:32:20 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(242/318) took 124454 ms. Total solver calls (SAT/UNSAT): 17226(1666/15560)
May 28, 2018 9:32:23 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(256/318) took 127732 ms. Total solver calls (SAT/UNSAT): 17891(1743/16148)
May 28, 2018 9:32:26 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(265/318) took 130820 ms. Total solver calls (SAT/UNSAT): 18105(1748/16357)
May 28, 2018 9:32:29 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(277/318) took 134050 ms. Total solver calls (SAT/UNSAT): 18471(1778/16693)
May 28, 2018 9:32:33 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(290/318) took 137154 ms. Total solver calls (SAT/UNSAT): 18705(1805/16900)
May 28, 2018 9:32:34 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Finished co-enabling matrix. took 138260 ms. Total solver calls (SAT/UNSAT): 18801(1808/16993)
May 28, 2018 9:32:34 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeDoNotAccord
INFO: Computing Do-Not-Accords matrix : 318 transitions.
May 28, 2018 9:32:34 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed DNA matrix. took 84 ms. Total solver calls (SAT/UNSAT): 30(0/30)
May 28, 2018 9:32:34 AM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 149869ms conformant to PINS in folder :/home/mcc/execution

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="LamportFastMutEx-PT-5"
export BK_EXAMINATION="LTLFireability"
export BK_TOOL="itstoolsl"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

tar xzf /home/mcc/BenchKit/INPUTS/LamportFastMutEx-PT-5.tgz
mv LamportFastMutEx-PT-5 execution
cd execution
pwd
ls -lh

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3637"
echo " Executing tool itstoolsl"
echo " Input is LamportFastMutEx-PT-5, examination is LTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r261-csrt-152732585800038"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' LTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;