About the Execution of ITS-Tools for PhaseVariation-PT-D05CS010
Execution Summary | |||||
Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
15754.860 | 339547.00 | 921811.00 | 141.70 | FFFFFFFTFFFFFFFF | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Waiting for the VM to be ready (probing ssh)
.....................................
/home/mcc/execution
total 812K
-rw-r--r-- 1 mcc users 3.7K May 15 18:54 CTLCardinality.txt
-rw-r--r-- 1 mcc users 17K May 15 18:54 CTLCardinality.xml
-rw-r--r-- 1 mcc users 4.0K May 15 18:54 CTLFireability.txt
-rw-r--r-- 1 mcc users 18K May 15 18:54 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K May 15 18:50 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 5.6K May 15 18:50 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 2.4K May 26 09:26 LTLCardinality.txt
-rw-r--r-- 1 mcc users 8.0K May 26 09:26 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.6K May 26 09:26 LTLFireability.txt
-rw-r--r-- 1 mcc users 10K May 26 09:26 LTLFireability.xml
-rw-r--r-- 1 mcc users 4.1K May 15 18:54 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 18K May 15 18:54 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 117 May 15 18:54 ReachabilityDeadlock.txt
-rw-r--r-- 1 mcc users 355 May 15 18:54 ReachabilityDeadlock.xml
-rw-r--r-- 1 mcc users 4.9K May 15 18:54 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 21K May 15 18:54 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.9K May 15 18:54 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.9K May 15 18:54 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 15 18:50 equiv_col
-rw-r--r-- 1 mcc users 9 May 15 18:50 instance
-rw-r--r-- 1 mcc users 6 May 15 18:50 iscolored
-rw-r--r-- 1 mcc users 633K May 15 18:50 model.pnml
=====================================================================
Generated by BenchKit 2-3637
Executing tool itstools
Input is PhaseVariation-PT-D05CS010, examination is LTLCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r260-csrt-152732585400175
=====================================================================
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME PhaseVariation-PT-D05CS010-LTLCardinality-00
FORMULA_NAME PhaseVariation-PT-D05CS010-LTLCardinality-01
FORMULA_NAME PhaseVariation-PT-D05CS010-LTLCardinality-02
FORMULA_NAME PhaseVariation-PT-D05CS010-LTLCardinality-03
FORMULA_NAME PhaseVariation-PT-D05CS010-LTLCardinality-04
FORMULA_NAME PhaseVariation-PT-D05CS010-LTLCardinality-05
FORMULA_NAME PhaseVariation-PT-D05CS010-LTLCardinality-06
FORMULA_NAME PhaseVariation-PT-D05CS010-LTLCardinality-07
FORMULA_NAME PhaseVariation-PT-D05CS010-LTLCardinality-08
FORMULA_NAME PhaseVariation-PT-D05CS010-LTLCardinality-09
FORMULA_NAME PhaseVariation-PT-D05CS010-LTLCardinality-10
FORMULA_NAME PhaseVariation-PT-D05CS010-LTLCardinality-11
FORMULA_NAME PhaseVariation-PT-D05CS010-LTLCardinality-12
FORMULA_NAME PhaseVariation-PT-D05CS010-LTLCardinality-13
FORMULA_NAME PhaseVariation-PT-D05CS010-LTLCardinality-14
FORMULA_NAME PhaseVariation-PT-D05CS010-LTLCardinality-15
=== Now, execution of the tool begins
BK_START 1527490073259
Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805151631/bin/its-ltl-linux64, --gc-threshold, 2000000, -i, /home/mcc/execution/LTLCardinality.pnml.gal, -t, CGAL, -LTL, /home/mcc/execution/LTLCardinality.ltl, -c, -stutter-deadlock], workingDir=/home/mcc/execution]
its-ltl command run as :
/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805151631/bin/its-ltl-linux64 --gc-threshold 2000000 -i /home/mcc/execution/LTLCardinality.pnml.gal -t CGAL -LTL /home/mcc/execution/LTLCardinality.ltl -c -stutter-deadlock
Read 16 LTL properties
Checking formula 0 : !((G(X(F("(pool__2_3_>=3)")))))
Formula 0 simplified : !GXF"(pool__2_3_>=3)"
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
Normalized transition count is 51
// Phase 1: matrix 51 rows 77 cols
invariant :cell___4_4__A_ + cell___4_4__B_ + pool__4_4_ = 1
invariant :cell___1_3__A_ + cell___1_3__B_ + pool__1_3_ = 1
invariant :cell___5_4__A_ + cell___5_4__B_ + pool__5_4_ = 1
invariant :cell___3_4__A_ + cell___3_4__B_ + pool__3_4_ = 1
invariant :cell___5_1__A_ + cell___5_1__B_ + pool__5_1_ = 1
invariant :cell___1_4__A_ + cell___1_4__B_ + pool__1_4_ = 1
invariant :pool__1_1_ + pool__1_2_ + pool__1_3_ + pool__1_4_ + pool__1_5_ + pool__2_1_ + pool__2_2_ + pool__2_3_ + pool__2_4_ + pool__2_5_ + pool__3_1_ + pool__3_2_ + pool__3_3_ + pool__3_4_ + pool__3_5_ + pool__4_1_ + pool__4_2_ + pool__4_3_ + pool__4_4_ + pool__4_5_ + pool__5_1_ + pool__5_2_ + pool__5_3_ + pool__5_4_ + pool__5_5_ + size_dot = 25
invariant :cell___5_3__A_ + cell___5_3__B_ + pool__5_3_ = 1
invariant :cell___3_5__A_ + cell___3_5__B_ + pool__3_5_ = 1
invariant :cell___3_2__A_ + cell___3_2__B_ + pool__3_2_ = 1
invariant :cell___5_5__A_ + cell___5_5__B_ + pool__5_5_ = 1
invariant :cell___2_4__A_ + cell___2_4__B_ + pool__2_4_ = 1
invariant :cell___2_1__A_ + cell___2_1__B_ + pool__2_1_ = 1
invariant :cell___1_2__A_ + cell___1_2__B_ + pool__1_2_ = 1
invariant :cell___2_5__A_ + cell___2_5__B_ + pool__2_5_ = 1
invariant :cell___4_5__A_ + cell___4_5__B_ + pool__4_5_ = 1
invariant :cell___2_3__A_ + cell___2_3__B_ + pool__2_3_ = 1
invariant :cell___4_3__A_ + cell___4_3__B_ + pool__4_3_ = 1
invariant :cell___3_3__A_ + cell___3_3__B_ + pool__3_3_ = 1
invariant :cell___5_2__A_ + cell___5_2__B_ + pool__5_2_ = 1
invariant :cell___1_5__A_ + cell___1_5__B_ + pool__1_5_ = 1
invariant :cell___4_2__A_ + cell___4_2__B_ + pool__4_2_ = 1
invariant :cell___3_1__A_ + cell___3_1__B_ + pool__3_1_ = 1
invariant :cell___1_1__A_ + cell___1_1__B_ + -1'pool__1_2_ + -1'pool__1_3_ + -1'pool__1_4_ + -1'pool__1_5_ + -1'pool__2_1_ + -1'pool__2_2_ + -1'pool__2_3_ + -1'pool__2_4_ + -1'pool__2_5_ + -1'pool__3_1_ + -1'pool__3_2_ + -1'pool__3_3_ + -1'pool__3_4_ + -1'pool__3_5_ + -1'pool__4_1_ + -1'pool__4_2_ + -1'pool__4_3_ + -1'pool__4_4_ + -1'pool__4_5_ + -1'pool__5_1_ + -1'pool__5_2_ + -1'pool__5_3_ + -1'pool__5_4_ + -1'pool__5_5_ + -1'size_dot = -24
invariant :cell___2_2__A_ + cell___2_2__B_ + pool__2_2_ = 1
invariant :cell___4_1__A_ + cell___4_1__B_ + pool__4_1_ = 1
Reverse transition relation is NOT exact ! Due to transitions division2_mutate_1_3_A_1_2, division2_mutate_1_3_A_1_4, division2_mutate_1_3_A_2_2, division2_mutate_1_3_A_2_4, division2_mutate_1_3_B_1_2, division2_mutate_1_3_B_1_4, division2_mutate_1_3_B_2_4, division2_mutate_1_4_A_1_3, division2_mutate_1_4_A_1_5, division2_mutate_1_4_A_2_3, division2_mutate_1_4_A_2_5, division2_mutate_1_4_B_1_3, division2_mutate_1_4_B_1_5, division2_mutate_1_4_B_2_3, division2_mutate_1_4_B_2_5, division2_mutate_2_3_A_1_2, division2_mutate_2_3_A_1_3, division2_mutate_2_3_A_1_4, division2_mutate_2_3_A_2_2, division2_mutate_2_3_A_2_4, division2_mutate_2_3_A_3_2, division2_mutate_2_3_A_3_3, division2_mutate_2_3_A_3_4, division2_mutate_2_3_B_1_2, division2_mutate_2_3_B_1_3, division2_mutate_2_3_B_1_4, division2_mutate_2_3_B_2_4, division2_mutate_2_3_B_3_2, division2_mutate_2_3_B_3_3, division2_mutate_2_3_B_3_4, division2_mutate_2_4_A_1_3, division2_mutate_2_4_A_1_4, division2_mutate_2_4_A_1_5, division2_mutate_2_4_A_2_3, division2_mutate_2_4_A_2_5, division2_mutate_2_4_A_3_3, division2_mutate_2_4_A_3_4, division2_mutate_2_4_A_3_5, division2_mutate_2_4_B_1_3, division2_mutate_2_4_B_1_4, division2_mutate_2_4_B_1_5, division2_mutate_2_4_B_2_3, division2_mutate_2_4_B_2_5, division2_mutate_2_4_B_3_3, division2_mutate_2_4_B_3_4, division2_mutate_2_4_B_3_5, division2_mutate_2_5_A_1_4, division2_mutate_2_5_A_1_5, division2_mutate_2_5_A_3_4, division2_mutate_2_5_A_3_5, division2_mutate_2_5_B_1_4, division2_mutate_2_5_B_1_5, division2_mutate_2_5_B_3_4, division2_mutate_2_5_B_3_5, division2_mutate_3_1_A_2_1, division2_mutate_3_1_A_2_2, division2_mutate_3_1_A_4_1, division2_mutate_3_1_A_4_2, division2_mutate_3_1_B_2_1, division2_mutate_3_1_B_4_1, division2_mutate_3_1_B_4_2, division2_mutate_3_2_A_2_1, division2_mutate_3_2_A_2_2, division2_mutate_3_2_A_2_3, division2_mutate_3_2_A_3_1, division2_mutate_3_2_A_3_3, division2_mutate_3_2_A_4_1, division2_mutate_3_2_A_4_2, division2_mutate_3_2_A_4_3, division2_mutate_3_2_B_2_1, division2_mutate_3_2_B_2_3, division2_mutate_3_2_B_3_1, division2_mutate_3_2_B_3_3, division2_mutate_3_2_B_4_1, division2_mutate_3_2_B_4_2, division2_mutate_3_2_B_4_3, division2_mutate_3_3_A_2_2, division2_mutate_3_3_A_2_3, division2_mutate_3_3_A_2_4, division2_mutate_3_3_A_3_2, division2_mutate_3_3_A_3_4, division2_mutate_3_3_A_4_2, division2_mutate_3_3_A_4_3, division2_mutate_3_3_A_4_4, division2_mutate_3_3_B_2_3, division2_mutate_3_3_B_2_4, division2_mutate_3_3_B_3_2, division2_mutate_3_3_B_3_4, division2_mutate_3_3_B_4_2, division2_mutate_3_3_B_4_3, division2_mutate_3_3_B_4_4, division2_mutate_3_4_A_2_3, division2_mutate_3_4_A_2_4, division2_mutate_3_4_A_2_5, division2_mutate_3_4_A_3_3, division2_mutate_3_4_A_3_5, division2_mutate_3_4_A_4_3, division2_mutate_3_4_A_4_4, division2_mutate_3_4_A_4_5, division2_mutate_3_4_B_2_3, division2_mutate_3_4_B_2_4, division2_mutate_3_4_B_2_5, division2_mutate_3_4_B_3_3, division2_mutate_3_4_B_3_5, division2_mutate_3_4_B_4_3, division2_mutate_3_4_B_4_4, division2_mutate_3_4_B_4_5, division2_mutate_3_5_A_2_4, division2_mutate_3_5_A_2_5, division2_mutate_3_5_A_4_4, division2_mutate_3_5_A_4_5, division2_mutate_3_5_B_2_4, division2_mutate_3_5_B_2_5, division2_mutate_3_5_B_4_4, division2_mutate_3_5_B_4_5, division2_mutate_4_1_A_3_1, division2_mutate_4_1_A_3_2, division2_mutate_4_1_A_5_1, division2_mutate_4_1_A_5_2, division2_mutate_4_1_B_3_1, division2_mutate_4_1_B_3_2, division2_mutate_4_1_B_5_1, division2_mutate_4_1_B_5_2, division2_mutate_4_2_A_3_1, division2_mutate_4_2_A_3_2, division2_mutate_4_2_A_3_3, division2_mutate_4_2_A_4_1, division2_mutate_4_2_A_4_3, division2_mutate_4_2_A_5_1, division2_mutate_4_2_A_5_2, division2_mutate_4_2_A_5_3, division2_mutate_4_2_B_3_1, division2_mutate_4_2_B_3_2, division2_mutate_4_2_B_3_3, division2_mutate_4_2_B_4_1, division2_mutate_4_2_B_4_3, division2_mutate_4_2_B_5_1, division2_mutate_4_2_B_5_2, division2_mutate_4_2_B_5_3, division2_mutate_4_3_A_3_2, division2_mutate_4_3_A_3_3, division2_mutate_4_3_A_3_4, division2_mutate_4_3_A_4_2, division2_mutate_4_3_A_4_4, division2_mutate_4_3_A_5_2, division2_mutate_4_3_A_5_3, division2_mutate_4_3_A_5_4, division2_mutate_4_3_B_3_2, division2_mutate_4_3_B_3_3, division2_mutate_4_3_B_3_4, division2_mutate_4_3_B_4_2, division2_mutate_4_3_B_4_4, division2_mutate_4_3_B_5_2, division2_mutate_4_3_B_5_3, division2_mutate_4_3_B_5_4, division2_mutate_4_4_A_3_3, division2_mutate_4_4_A_3_4, division2_mutate_4_4_A_3_5, division2_mutate_4_4_A_4_3, division2_mutate_4_4_A_4_5, division2_mutate_4_4_A_5_3, division2_mutate_4_4_A_5_4, division2_mutate_4_4_A_5_5, division2_mutate_4_4_B_3_3, division2_mutate_4_4_B_3_4, division2_mutate_4_4_B_3_5, division2_mutate_4_4_B_4_3, division2_mutate_4_4_B_4_5, division2_mutate_4_4_B_5_3, division2_mutate_4_4_B_5_4, division2_mutate_4_4_B_5_5, division2_mutate_4_5_A_3_4, division2_mutate_4_5_A_3_5, division2_mutate_4_5_A_5_4, division2_mutate_4_5_A_5_5, division2_mutate_4_5_B_3_4, division2_mutate_4_5_B_3_5, division2_mutate_4_5_B_5_4, division2_mutate_4_5_B_5_5, division2_mutate_5_2_A_4_1, division2_mutate_5_2_A_4_3, division2_mutate_5_2_A_5_1, division2_mutate_5_2_A_5_3, division2_mutate_5_2_B_4_1, division2_mutate_5_2_B_4_3, division2_mutate_5_2_B_5_1, division2_mutate_5_2_B_5_3, division2_mutate_5_3_A_4_2, division2_mutate_5_3_A_4_4, division2_mutate_5_3_A_5_2, division2_mutate_5_3_A_5_4, division2_mutate_5_3_B_4_2, division2_mutate_5_3_B_4_4, division2_mutate_5_3_B_5_2, division2_mutate_5_3_B_5_4, division2_mutate_5_4_A_4_3, division2_mutate_5_4_A_4_5, division2_mutate_5_4_A_5_3, division2_mutate_5_4_A_5_5, division2_mutate_5_4_B_4_3, division2_mutate_5_4_B_4_5, division2_mutate_5_4_B_5_3, division2_mutate_5_4_B_5_5, division2_replicate_1_3_A_1_2, division2_replicate_1_3_A_1_4, division2_replicate_1_3_A_2_2, division2_replicate_1_3_A_2_4, division2_replicate_1_3_B_1_2, division2_replicate_1_3_B_1_4, division2_replicate_1_3_B_2_4, division2_replicate_1_4_A_1_3, division2_replicate_1_4_A_1_5, division2_replicate_1_4_A_2_3, division2_replicate_1_4_A_2_5, division2_replicate_1_4_B_1_3, division2_replicate_1_4_B_1_5, division2_replicate_1_4_B_2_3, division2_replicate_1_4_B_2_5, division2_replicate_2_3_A_1_2, division2_replicate_2_3_A_1_3, division2_replicate_2_3_A_1_4, division2_replicate_2_3_A_2_2, division2_replicate_2_3_A_2_4, division2_replicate_2_3_A_3_2, division2_replicate_2_3_A_3_3, division2_replicate_2_3_A_3_4, division2_replicate_2_3_B_1_2, division2_replicate_2_3_B_1_3, division2_replicate_2_3_B_1_4, division2_replicate_2_3_B_2_4, division2_replicate_2_3_B_3_2, division2_replicate_2_3_B_3_3, division2_replicate_2_3_B_3_4, division2_replicate_2_4_A_1_3, division2_replicate_2_4_A_1_4, division2_replicate_2_4_A_1_5, division2_replicate_2_4_A_2_3, division2_replicate_2_4_A_2_5, division2_replicate_2_4_A_3_3, division2_replicate_2_4_A_3_4, division2_replicate_2_4_A_3_5, division2_replicate_2_4_B_1_3, division2_replicate_2_4_B_1_4, division2_replicate_2_4_B_1_5, division2_replicate_2_4_B_2_3, division2_replicate_2_4_B_2_5, division2_replicate_2_4_B_3_3, division2_replicate_2_4_B_3_4, division2_replicate_2_4_B_3_5, division2_replicate_2_5_A_1_4, division2_replicate_2_5_A_1_5, division2_replicate_2_5_A_3_4, division2_replicate_2_5_A_3_5, division2_replicate_2_5_B_1_4, division2_replicate_2_5_B_1_5, division2_replicate_2_5_B_3_4, division2_replicate_2_5_B_3_5, division2_replicate_3_1_A_2_1, division2_replicate_3_1_A_2_2, division2_replicate_3_1_A_4_1, division2_replicate_3_1_A_4_2, division2_replicate_3_1_B_2_1, division2_replicate_3_1_B_4_1, division2_replicate_3_1_B_4_2, division2_replicate_3_2_A_2_1, division2_replicate_3_2_A_2_2, division2_replicate_3_2_A_2_3, division2_replicate_3_2_A_3_1, division2_replicate_3_2_A_3_3, division2_replicate_3_2_A_4_1, division2_replicate_3_2_A_4_2, division2_replicate_3_2_A_4_3, division2_replicate_3_2_B_2_1, division2_replicate_3_2_B_2_3, division2_replicate_3_2_B_3_1, division2_replicate_3_2_B_3_3, division2_replicate_3_2_B_4_1, division2_replicate_3_2_B_4_2, division2_replicate_3_2_B_4_3, division2_replicate_3_3_A_2_2, division2_replicate_3_3_A_2_3, division2_replicate_3_3_A_2_4, division2_replicate_3_3_A_3_2, division2_replicate_3_3_A_3_4, division2_replicate_3_3_A_4_2, division2_replicate_3_3_A_4_3, division2_replicate_3_3_A_4_4, division2_replicate_3_3_B_2_3, division2_replicate_3_3_B_2_4, division2_replicate_3_3_B_3_2, division2_replicate_3_3_B_3_4, division2_replicate_3_3_B_4_2, division2_replicate_3_3_B_4_3, division2_replicate_3_3_B_4_4, division2_replicate_3_4_A_2_3, division2_replicate_3_4_A_2_4, division2_replicate_3_4_A_2_5, division2_replicate_3_4_A_3_3, division2_replicate_3_4_A_3_5, division2_replicate_3_4_A_4_3, division2_replicate_3_4_A_4_4, division2_replicate_3_4_A_4_5, division2_replicate_3_4_B_2_3, division2_replicate_3_4_B_2_4, division2_replicate_3_4_B_2_5, division2_replicate_3_4_B_3_3, division2_replicate_3_4_B_3_5, division2_replicate_3_4_B_4_3, division2_replicate_3_4_B_4_4, division2_replicate_3_4_B_4_5, division2_replicate_3_5_A_2_4, division2_replicate_3_5_A_2_5, division2_replicate_3_5_A_4_4, division2_replicate_3_5_A_4_5, division2_replicate_3_5_B_2_4, division2_replicate_3_5_B_2_5, division2_replicate_3_5_B_4_4, division2_replicate_3_5_B_4_5, division2_replicate_4_1_A_3_1, division2_replicate_4_1_A_3_2, division2_replicate_4_1_A_5_1, division2_replicate_4_1_A_5_2, division2_replicate_4_1_B_3_1, division2_replicate_4_1_B_3_2, division2_replicate_4_1_B_5_1, division2_replicate_4_1_B_5_2, division2_replicate_4_2_A_3_1, division2_replicate_4_2_A_3_2, division2_replicate_4_2_A_3_3, division2_replicate_4_2_A_4_1, division2_replicate_4_2_A_4_3, division2_replicate_4_2_A_5_1, division2_replicate_4_2_A_5_2, division2_replicate_4_2_A_5_3, division2_replicate_4_2_B_3_1, division2_replicate_4_2_B_3_2, division2_replicate_4_2_B_3_3, division2_replicate_4_2_B_4_1, division2_replicate_4_2_B_4_3, division2_replicate_4_2_B_5_1, division2_replicate_4_2_B_5_2, division2_replicate_4_2_B_5_3, division2_replicate_4_3_A_3_2, division2_replicate_4_3_A_3_3, division2_replicate_4_3_A_3_4, division2_replicate_4_3_A_4_2, division2_replicate_4_3_A_4_4, division2_replicate_4_3_A_5_2, division2_replicate_4_3_A_5_3, division2_replicate_4_3_A_5_4, division2_replicate_4_3_B_3_2, division2_replicate_4_3_B_3_3, division2_replicate_4_3_B_3_4, division2_replicate_4_3_B_4_2, division2_replicate_4_3_B_4_4, division2_replicate_4_3_B_5_2, division2_replicate_4_3_B_5_3, division2_replicate_4_3_B_5_4, division2_replicate_4_4_A_3_3, division2_replicate_4_4_A_3_4, division2_replicate_4_4_A_3_5, division2_replicate_4_4_A_4_3, division2_replicate_4_4_A_4_5, division2_replicate_4_4_A_5_3, division2_replicate_4_4_A_5_4, division2_replicate_4_4_A_5_5, division2_replicate_4_4_B_3_3, division2_replicate_4_4_B_3_4, division2_replicate_4_4_B_3_5, division2_replicate_4_4_B_4_3, division2_replicate_4_4_B_4_5, division2_replicate_4_4_B_5_3, division2_replicate_4_4_B_5_4, division2_replicate_4_4_B_5_5, division2_replicate_4_5_A_3_4, division2_replicate_4_5_A_3_5, division2_replicate_4_5_A_5_4, division2_replicate_4_5_A_5_5, division2_replicate_4_5_B_3_4, division2_replicate_4_5_B_3_5, division2_replicate_4_5_B_5_4, division2_replicate_4_5_B_5_5, division2_replicate_5_2_A_4_1, division2_replicate_5_2_A_4_3, division2_replicate_5_2_A_5_1, division2_replicate_5_2_A_5_3, division2_replicate_5_2_B_4_1, division2_replicate_5_2_B_4_3, division2_replicate_5_2_B_5_1, division2_replicate_5_2_B_5_3, division2_replicate_5_3_A_4_2, division2_replicate_5_3_A_4_4, division2_replicate_5_3_A_5_2, division2_replicate_5_3_A_5_4, division2_replicate_5_3_B_4_2, division2_replicate_5_3_B_4_4, division2_replicate_5_3_B_5_2, division2_replicate_5_3_B_5_4, division2_replicate_5_4_A_4_3, division2_replicate_5_4_A_4_5, division2_replicate_5_4_A_5_3, division2_replicate_5_4_A_5_5, division2_replicate_5_4_B_4_3, division2_replicate_5_4_B_4_5, division2_replicate_5_4_B_5_3, division2_replicate_5_4_B_5_5, Intersection with reachable at each step enabled. (destroyed/reverse/intersect/total) :148/123/406/677
Computing Next relation with stutter on 2.38171e+11 deadlock states
28 unique states visited
28 strongly connected components in search stack
29 transitions explored
28 items max in DFS search stack
4701 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,47.1373,760096,1,0,1031,4.15318e+06,1236,334,8919,3.69384e+06,1375
an accepting run exists (use option '-e' to print it)
Formula 0 is FALSE accepting run found.
FORMULA PhaseVariation-PT-D05CS010-LTLCardinality-00 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Checking formula 1 : !((G(G(X(X("(pool__4_3_<=cell___2_4__B_)"))))))
Formula 1 simplified : !GXX"(pool__4_3_<=cell___2_4__B_)"
Computing Next relation with stutter on 2.38171e+11 deadlock states
5 unique states visited
5 strongly connected components in search stack
5 transitions explored
5 items max in DFS search stack
2778 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,74.9252,1283336,1,0,1152,6.46589e+06,1244,450,8924,5.99193e+06,1592
an accepting run exists (use option '-e' to print it)
Formula 1 is FALSE accepting run found.
FORMULA PhaseVariation-PT-D05CS010-LTLCardinality-01 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Checking formula 2 : !(("(cell___2_2__A_>=2)"))
Formula 2 simplified : !"(cell___2_2__A_>=2)"
Computing Next relation with stutter on 2.38171e+11 deadlock states
3 unique states visited
3 strongly connected components in search stack
3 transitions explored
3 items max in DFS search stack
4 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,74.9598,1283864,1,0,1152,6.46646e+06,1247,450,8926,5.99227e+06,1599
an accepting run exists (use option '-e' to print it)
Formula 2 is FALSE accepting run found.
FORMULA PhaseVariation-PT-D05CS010-LTLCardinality-02 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Checking formula 3 : !((G("(pool__3_4_>=2)")))
Formula 3 simplified : !G"(pool__3_4_>=2)"
Computing Next relation with stutter on 2.38171e+11 deadlock states
3 unique states visited
3 strongly connected components in search stack
3 transitions explored
3 items max in DFS search stack
0 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,74.9606,1284380,1,0,1152,6.46646e+06,1253,450,8928,5.99227e+06,1604
an accepting run exists (use option '-e' to print it)
Formula 3 is FALSE accepting run found.
FORMULA PhaseVariation-PT-D05CS010-LTLCardinality-03 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Checking formula 4 : !(("(pool__2_5_<=cell___4_3__A_)"))
Formula 4 simplified : !"(pool__2_5_<=cell___4_3__A_)"
Computing Next relation with stutter on 2.38171e+11 deadlock states
3 unique states visited
3 strongly connected components in search stack
3 transitions explored
3 items max in DFS search stack
0 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,74.961,1284380,1,0,1152,6.46646e+06,1256,450,8931,5.99227e+06,1606
an accepting run exists (use option '-e' to print it)
Formula 4 is FALSE accepting run found.
FORMULA PhaseVariation-PT-D05CS010-LTLCardinality-04 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Checking formula 5 : !(("(cell___4_3__B_>=1)"))
Formula 5 simplified : !"(cell___4_3__B_>=1)"
Computing Next relation with stutter on 2.38171e+11 deadlock states
3 unique states visited
3 strongly connected components in search stack
3 transitions explored
3 items max in DFS search stack
0 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,74.9613,1284380,1,0,1152,6.46646e+06,1259,450,8932,5.99227e+06,1608
an accepting run exists (use option '-e' to print it)
Formula 5 is FALSE accepting run found.
FORMULA PhaseVariation-PT-D05CS010-LTLCardinality-05 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Checking formula 6 : !((F(G(("(size_dot<=cell___1_3__B_)")U("(pool__4_1_<=cell___1_1__B_)")))))
Formula 6 simplified : !FG("(size_dot<=cell___1_3__B_)" U "(pool__4_1_<=cell___1_1__B_)")
Computing Next relation with stutter on 2.38171e+11 deadlock states
26 unique states visited
26 strongly connected components in search stack
26 transitions explored
26 items max in DFS search stack
14783 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,222.801,2223796,1,0,1222,1.08628e+07,24,520,3022,9.75785e+06,356
an accepting run exists (use option '-e' to print it)
Formula 6 is FALSE accepting run found.
FORMULA PhaseVariation-PT-D05CS010-LTLCardinality-06 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Checking formula 7 : !(("(cell___2_4__B_<=pool__5_5_)"))
Formula 7 simplified : !"(cell___2_4__B_<=pool__5_5_)"
Computing Next relation with stutter on 2.38171e+11 deadlock states
1 unique states visited
0 strongly connected components in search stack
0 transitions explored
1 items max in DFS search stack
279 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,225.597,2223796,1,0,1222,1.08628e+07,28,520,3981,9.75785e+06,362
no accepting run found
Formula 7 is TRUE no accepting run found.
FORMULA PhaseVariation-PT-D05CS010-LTLCardinality-07 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Checking formula 8 : !((G("(cell___1_4__A_>=2)")))
Formula 8 simplified : !G"(cell___1_4__A_>=2)"
Computing Next relation with stutter on 2.38171e+11 deadlock states
3 unique states visited
3 strongly connected components in search stack
3 transitions explored
3 items max in DFS search stack
2103 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,246.629,2223796,1,0,1222,1.08628e+07,36,520,3983,9.75785e+06,455
an accepting run exists (use option '-e' to print it)
Formula 8 is FALSE accepting run found.
FORMULA PhaseVariation-PT-D05CS010-LTLCardinality-08 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Checking formula 9 : !((X(F(F(F("(cell___2_3__B_>=2)"))))))
Formula 9 simplified : !XF"(cell___2_3__B_>=2)"
Computing Next relation with stutter on 2.38171e+11 deadlock states
3 unique states visited
3 strongly connected components in search stack
3 transitions explored
3 items max in DFS search stack
1981 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,266.438,2394340,1,0,1222,1.12992e+07,45,520,3985,9.75785e+06,631
an accepting run exists (use option '-e' to print it)
Formula 9 is FALSE accepting run found.
FORMULA PhaseVariation-PT-D05CS010-LTLCardinality-09 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Checking formula 10 : !(("(pool__4_5_>=3)"))
Formula 10 simplified : !"(pool__4_5_>=3)"
Computing Next relation with stutter on 2.38171e+11 deadlock states
3 unique states visited
3 strongly connected components in search stack
3 transitions explored
3 items max in DFS search stack
0 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,266.438,2394340,1,0,1222,1.12992e+07,48,520,3987,9.75785e+06,633
an accepting run exists (use option '-e' to print it)
Formula 10 is FALSE accepting run found.
FORMULA PhaseVariation-PT-D05CS010-LTLCardinality-10 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Checking formula 11 : !((X(X(G(X("(pool__1_1_>=3)"))))))
Formula 11 simplified : !XXGX"(pool__1_1_>=3)"
Computing Next relation with stutter on 2.38171e+11 deadlock states
6 unique states visited
6 strongly connected components in search stack
6 transitions explored
6 items max in DFS search stack
4459 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,311.035,2612600,1,0,1222,1.21741e+07,18,520,2985,1.00338e+07,75
an accepting run exists (use option '-e' to print it)
Formula 11 is FALSE accepting run found.
FORMULA PhaseVariation-PT-D05CS010-LTLCardinality-11 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Checking formula 12 : !((X("(cell___3_4__B_>=1)")))
Formula 12 simplified : !X"(cell___3_4__B_>=1)"
Computing Next relation with stutter on 2.38171e+11 deadlock states
4 unique states visited
4 strongly connected components in search stack
4 transitions explored
4 items max in DFS search stack
726 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,318.285,2612600,1,0,1222,1.21741e+07,22,520,3938,1.00338e+07,98
an accepting run exists (use option '-e' to print it)
Formula 12 is FALSE accepting run found.
FORMULA PhaseVariation-PT-D05CS010-LTLCardinality-12 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Checking formula 13 : !((F(X(F("(pool__3_3_>=1)")))))
Formula 13 simplified : !FXF"(pool__3_3_>=1)"
Computing Next relation with stutter on 2.38171e+11 deadlock states
3 unique states visited
3 strongly connected components in search stack
3 transitions explored
3 items max in DFS search stack
1097 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,329.293,2612600,1,0,1222,1.21741e+07,31,520,3939,1.00338e+07,349
an accepting run exists (use option '-e' to print it)
Formula 13 is FALSE accepting run found.
FORMULA PhaseVariation-PT-D05CS010-LTLCardinality-13 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Checking formula 14 : !((X("(pool__1_5_>=2)")))
Formula 14 simplified : !X"(pool__1_5_>=2)"
Computing Next relation with stutter on 2.38171e+11 deadlock states
4 unique states visited
4 strongly connected components in search stack
4 transitions explored
4 items max in DFS search stack
0 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,329.293,2612600,1,0,1222,1.21741e+07,34,520,3941,1.00338e+07,351
an accepting run exists (use option '-e' to print it)
Formula 14 is FALSE accepting run found.
FORMULA PhaseVariation-PT-D05CS010-LTLCardinality-14 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Checking formula 15 : !(("(pool__4_2_>=2)"))
Formula 15 simplified : !"(pool__4_2_>=2)"
Computing Next relation with stutter on 2.38171e+11 deadlock states
3 unique states visited
3 strongly connected components in search stack
3 transitions explored
3 items max in DFS search stack
25 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,329.552,2612600,1,0,1222,1.21741e+07,37,520,3943,1.00338e+07,361
an accepting run exists (use option '-e' to print it)
Formula 15 is FALSE accepting run found.
FORMULA PhaseVariation-PT-D05CS010-LTLCardinality-15 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O3, model.c], workingDir=/home/mcc/execution]
WARNING : LTS min runner thread was asked to interrupt. Dying gracefully.
BK_STOP 1527490412806
--------------------
content from stderr:
+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution LTLCardinality -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -consoleLog -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination LTLCardinality -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
May 28, 2018 6:47:55 AM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, LTLCardinality, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -smt]
May 28, 2018 6:47:55 AM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
May 28, 2018 6:47:55 AM fr.lip6.move.gal.nupn.PTNetReader loadFromXML
INFO: Load time of PNML (sax parser for PT used): 117 ms
May 28, 2018 6:47:55 AM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 77 places.
May 28, 2018 6:47:55 AM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 677 transitions.
May 28, 2018 6:47:55 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.img.gal : 35 ms
May 28, 2018 6:47:55 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 190 ms
May 28, 2018 6:47:55 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/LTLCardinality.pnml.gal : 6 ms
May 28, 2018 6:47:55 AM fr.lip6.move.serialization.SerializationUtil serializePropertiesForITSLTLTools
INFO: Time to serialize properties into /home/mcc/execution/LTLCardinality.ltl : 1 ms
May 28, 2018 6:47:56 AM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 677 transitions.
May 28, 2018 6:47:56 AM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 26 place invariants in 17 ms
May 28, 2018 6:47:56 AM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 77 variables to be positive in 375 ms
May 28, 2018 6:47:56 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may disable matrix : 677 transitions.
May 28, 2018 6:47:56 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of disable matrix completed :0/677 took 0 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 28, 2018 6:47:56 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete disable matrix. took 96 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 28, 2018 6:47:56 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may enable matrix : 677 transitions.
May 28, 2018 6:47:56 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete enable matrix. took 48 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 28, 2018 6:47:58 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeCoEnablingMatrix
INFO: Computing symmetric co enabling matrix : 677 transitions.
May 28, 2018 6:48:00 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(7/677) took 1117 ms. Total solver calls (SAT/UNSAT): 5380(0/5380)
May 28, 2018 6:48:03 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(31/677) took 4253 ms. Total solver calls (SAT/UNSAT): 21136(0/21136)
May 28, 2018 6:48:06 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(38/677) took 7508 ms. Total solver calls (SAT/UNSAT): 25623(0/25623)
May 28, 2018 6:48:09 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(60/677) took 10611 ms. Total solver calls (SAT/UNSAT): 39406(0/39406)
May 28, 2018 6:48:13 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(76/677) took 14235 ms. Total solver calls (SAT/UNSAT): 49126(0/49126)
May 28, 2018 6:48:16 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(83/677) took 17458 ms. Total solver calls (SAT/UNSAT): 53298(0/53298)
May 28, 2018 6:48:19 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(92/677) took 21103 ms. Total solver calls (SAT/UNSAT): 58590(0/58590)
May 28, 2018 6:48:23 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(96/677) took 24416 ms. Total solver calls (SAT/UNSAT): 60916(0/60916)
May 28, 2018 6:48:27 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(100/677) took 28294 ms. Total solver calls (SAT/UNSAT): 63226(546/62680)
May 28, 2018 6:48:31 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(102/677) took 33095 ms. Total solver calls (SAT/UNSAT): 64375(1617/62758)
May 28, 2018 6:48:38 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(103/677) took 39287 ms. Total solver calls (SAT/UNSAT): 64948(2161/62787)
May 28, 2018 6:48:51 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(104/677) took 53093 ms. Total solver calls (SAT/UNSAT): 65520(2704/62816)
May 28, 2018 6:49:04 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(105/677) took 65665 ms. Total solver calls (SAT/UNSAT): 66091(3228/62863)
May 28, 2018 6:49:20 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(106/677) took 81188 ms. Total solver calls (SAT/UNSAT): 66661(3770/62891)
May 28, 2018 6:49:28 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(107/677) took 89518 ms. Total solver calls (SAT/UNSAT): 67230(4295/62935)
May 28, 2018 6:49:40 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(108/677) took 101382 ms. Total solver calls (SAT/UNSAT): 67798(4820/62978)
May 28, 2018 6:49:52 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(109/677) took 114031 ms. Total solver calls (SAT/UNSAT): 68365(5326/63039)
May 28, 2018 6:50:01 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(110/677) took 122700 ms. Total solver calls (SAT/UNSAT): 68931(5830/63101)
May 28, 2018 6:50:09 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(111/677) took 130848 ms. Total solver calls (SAT/UNSAT): 69496(6368/63128)
May 28, 2018 6:50:18 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(112/677) took 139297 ms. Total solver calls (SAT/UNSAT): 70060(6889/63171)
May 28, 2018 6:50:32 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(113/677) took 153945 ms. Total solver calls (SAT/UNSAT): 70623(7410/63213)
May 28, 2018 6:50:45 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(114/677) took 166477 ms. Total solver calls (SAT/UNSAT): 71185(7912/63273)
May 28, 2018 6:50:51 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(115/677) took 172148 ms. Total solver calls (SAT/UNSAT): 71746(8412/63334)
May 28, 2018 6:51:03 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(116/677) took 184160 ms. Total solver calls (SAT/UNSAT): 72306(8937/63369)
May 28, 2018 6:51:10 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(118/677) took 191590 ms. Total solver calls (SAT/UNSAT): 73423(9950/63473)
May 28, 2018 6:51:24 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(120/677) took 205281 ms. Total solver calls (SAT/UNSAT): 74536(10940/63596)
May 28, 2018 6:51:32 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(121/677) took 213409 ms. Total solver calls (SAT/UNSAT): 75091(11461/63630)
May 28, 2018 6:51:40 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(122/677) took 221843 ms. Total solver calls (SAT/UNSAT): 75645(11972/63673)
May 28, 2018 6:51:46 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(123/677) took 227863 ms. Total solver calls (SAT/UNSAT): 76198(12466/63732)
May 28, 2018 6:51:52 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(124/677) took 233759 ms. Total solver calls (SAT/UNSAT): 76750(12958/63792)
May 28, 2018 6:52:01 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(125/677) took 242913 ms. Total solver calls (SAT/UNSAT): 77301(13448/63853)
May 28, 2018 6:52:08 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(126/677) took 249322 ms. Total solver calls (SAT/UNSAT): 77851(13963/63888)
May 28, 2018 6:52:14 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(127/677) took 256093 ms. Total solver calls (SAT/UNSAT): 78400(14480/63920)
May 28, 2018 6:52:21 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(128/677) took 262660 ms. Total solver calls (SAT/UNSAT): 78948(14968/63980)
May 28, 2018 6:52:32 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(129/677) took 273117 ms. Total solver calls (SAT/UNSAT): 79495(15454/64041)
May 28, 2018 6:52:44 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(130/677) took 285437 ms. Total solver calls (SAT/UNSAT): 80041(15956/64085)
May 28, 2018 6:52:49 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(131/677) took 290226 ms. Total solver calls (SAT/UNSAT): 80586(16467/64119)
May 28, 2018 6:52:56 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(132/677) took 297143 ms. Total solver calls (SAT/UNSAT): 81130(16980/64150)
May 28, 2018 6:53:03 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(133/677) took 304565 ms. Total solver calls (SAT/UNSAT): 81673(17464/64209)
May 28, 2018 6:53:08 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(134/677) took 309423 ms. Total solver calls (SAT/UNSAT): 82215(17946/64269)
May 28, 2018 6:53:15 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(135/677) took 316255 ms. Total solver calls (SAT/UNSAT): 82756(18444/64312)
May 28, 2018 6:53:19 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(136/677) took 320729 ms. Total solver calls (SAT/UNSAT): 83296(18957/64339)
May 28, 2018 6:53:24 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(137/677) took 325854 ms. Total solver calls (SAT/UNSAT): 83835(19444/64391)
Skipping mayMatrices nes/nds SMT solver raised an exception or timeout.
java.lang.RuntimeException: SMT solver raised an exception or timeout.
at fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver.computeCoEnablingMatrix(NecessaryEnablingsolver.java:480)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.printLabels(Gal2PinsTransformerNext.java:530)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.printDependencyMatrix(Gal2PinsTransformerNext.java:209)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.buildBodyFile(Gal2PinsTransformerNext.java:85)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.transform(Gal2PinsTransformerNext.java:830)
at fr.lip6.move.gal.application.LTSminRunner$1.run(LTSminRunner.java:71)
at java.lang.Thread.run(Thread.java:748)
May 28, 2018 6:53:32 AM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 336723ms conformant to PINS in folder :/home/mcc/execution
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="PhaseVariation-PT-D05CS010"
export BK_EXAMINATION="LTLCardinality"
export BK_TOOL="itstools"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
tar xzf /home/mcc/BenchKit/INPUTS/PhaseVariation-PT-D05CS010.tgz
mv PhaseVariation-PT-D05CS010 execution
cd execution
pwd
ls -lh
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3637"
echo " Executing tool itstools"
echo " Input is PhaseVariation-PT-D05CS010, examination is LTLCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r260-csrt-152732585400175"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;