Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Waiting for the VM to be ready (probing ssh)
...........................................................
/home/mcc/execution
total 4.7M
-rw-r--r-- 1 mcc users 116K May 15 18:54 CTLCardinality.txt
-rw-r--r-- 1 mcc users 314K May 15 18:54 CTLCardinality.xml
-rw-r--r-- 1 mcc users 115K May 15 18:54 CTLFireability.txt
-rw-r--r-- 1 mcc users 387K May 15 18:54 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K May 15 18:50 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.0K May 15 18:50 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 64K May 26 09:26 LTLCardinality.txt
-rw-r--r-- 1 mcc users 152K May 26 09:26 LTLCardinality.xml
-rw-r--r-- 1 mcc users 50K May 26 09:26 LTLFireability.txt
-rw-r--r-- 1 mcc users 177K May 26 09:26 LTLFireability.xml
-rw-r--r-- 1 mcc users 141K May 15 18:54 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 368K May 15 18:54 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 104 May 15 18:54 ReachabilityDeadlock.txt
-rw-r--r-- 1 mcc users 342 May 15 18:54 ReachabilityDeadlock.xml
-rw-r--r-- 1 mcc users 95K May 15 18:54 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 306K May 15 18:54 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 63K May 15 18:54 UpperBounds.txt
-rw-r--r-- 1 mcc users 126K May 15 18:54 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 May 15 18:50 equiv_col
-rw-r--r-- 1 mcc users 2 May 15 18:50 instance
-rw-r--r-- 1 mcc users 6 May 15 18:50 iscolored
-rw-r--r-- 1 mcc users 2.3M May 15 18:50 model.pnml
=====================================================================
Generated by BenchKit 2-3637
Executing tool itstools
Input is Peterson-PT-7, examination is LTLCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r260-csrt-152732585400169
=====================================================================

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME Peterson-PT-7-LTLCardinality-00
FORMULA_NAME Peterson-PT-7-LTLCardinality-01
FORMULA_NAME Peterson-PT-7-LTLCardinality-02
FORMULA_NAME Peterson-PT-7-LTLCardinality-03
FORMULA_NAME Peterson-PT-7-LTLCardinality-04
FORMULA_NAME Peterson-PT-7-LTLCardinality-05
FORMULA_NAME Peterson-PT-7-LTLCardinality-06
FORMULA_NAME Peterson-PT-7-LTLCardinality-07
FORMULA_NAME Peterson-PT-7-LTLCardinality-08
FORMULA_NAME Peterson-PT-7-LTLCardinality-09
FORMULA_NAME Peterson-PT-7-LTLCardinality-10
FORMULA_NAME Peterson-PT-7-LTLCardinality-11
FORMULA_NAME Peterson-PT-7-LTLCardinality-12
FORMULA_NAME Peterson-PT-7-LTLCardinality-13
FORMULA_NAME Peterson-PT-7-LTLCardinality-14
FORMULA_NAME Peterson-PT-7-LTLCardinality-15

=== Now, execution of the tool begins

BK_START 1527489917856

Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805151631/bin/its-ltl-linux64, --gc-threshold, 2000000, -i, /home/mcc/execution/LTLCardinality.pnml.gal, -t, CGAL, -LTL, /home/mcc/execution/LTLCardinality.ltl, -c, -stutter-deadlock], workingDir=/home/mcc/execution]

its-ltl command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805151631/bin/its-ltl-linux64 --gc-threshold 2000000 -i /home/mcc/execution/LTLCardinality.pnml.gal -t CGAL -LTL /home/mcc/execution/LTLCardinality.ltl -c -stutter-deadlock
Read 16 LTL properties
Checking formula 0 : !(("((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((IsEndLoop_0_0_0+IsEndLoop_1_0_0)+IsEndLoop_2_0_0)+IsEndLoop_3_0_0)+IsEndLoop_4_0_0)+IsEndLoop_5_0_0)+IsEndLoop_6_0_0)+IsEndLoop_7_0_0)+IsEndLoop_0_1_0)+IsEndLoop_1_1_0)+IsEndLoop_2_1_0)+IsEndLoop_3_1_0)+IsEndLoop_4_1_0)+IsEndLoop_6_1_0)+IsEndLoop_5_1_0)+IsEndLoop_0_2_0)+IsEndLoop_7_1_0)+IsEndLoop_2_2_0)+IsEndLoop_1_2_0)+IsEndLoop_4_2_0)+IsEndLoop_3_2_0)+IsEndLoop_6_2_0)+IsEndLoop_5_2_0)+IsEndLoop_0_3_0)+IsEndLoop_7_2_0)+IsEndLoop_2_3_0)+IsEndLoop_1_3_0)+IsEndLoop_4_3_0)+IsEndLoop_3_3_0)+IsEndLoop_7_3_0)+IsEndLoop_0_4_0)+IsEndLoop_5_3_0)+IsEndLoop_6_3_0)+IsEndLoop_3_4_0)+IsEndLoop_4_4_0)+IsEndLoop_1_4_0)+IsEndLoop_2_4_0)+IsEndLoop_7_4_0)+IsEndLoop_0_5_0)+IsEndLoop_5_4_0)+IsEndLoop_6_4_0)+IsEndLoop_3_5_0)+IsEndLoop_4_5_0)+IsEndLoop_1_5_0)+IsEndLoop_2_5_0)+IsEndLoop_0_6_0)+IsEndLoop_7_5_0)+IsEndLoop_6_5_0)+IsEndLoop_5_5_0)+IsEndLoop_4_6_0)+IsEndLoop_3_6_0)+IsEndLoop_2_6_0)+IsEndLoop_1_6_0)+IsEndLoop_0_0_1)+IsEndLoop_7_6_0)+IsEndLoop_6_6_0)+IsEndLoop_5_6_0)+IsEndLoop_4_0_1)+IsEndLoop_3_0_1)+IsEndLoop_2_0_1)+IsEndLoop_1_0_1)+IsEndLoop_1_1_1)+IsEndLoop_2_1_1)+IsEndLoop_3_1_1)+IsEndLoop_4_1_1)+IsEndLoop_5_0_1)+IsEndLoop_6_0_1)+IsEndLoop_7_0_1)+IsEndLoop_0_1_1)+IsEndLoop_1_2_1)+IsEndLoop_2_2_1)+IsEndLoop_3_2_1)+IsEndLoop_4_2_1)+IsEndLoop_5_1_1)+IsEndLoop_6_1_1)+IsEndLoop_7_1_1)+IsEndLoop_0_2_1)+IsEndLoop_2_3_1)+IsEndLoop_1_3_1)+IsEndLoop_4_3_1)+IsEndLoop_3_3_1)+IsEndLoop_6_2_1)+IsEndLoop_5_2_1)+IsEndLoop_0_3_1)+IsEndLoop_7_2_1)+IsEndLoop_2_4_1)+IsEndLoop_1_4_1)+IsEndLoop_4_4_1)+IsEndLoop_3_4_1)+IsEndLoop_6_3_1)+IsEndLoop_5_3_1)+IsEndLoop_0_4_1)+IsEndLoop_7_3_1)+IsEndLoop_3_5_1)+IsEndLoop_4_5_1)+IsEndLoop_1_5_1)+IsEndLoop_2_5_1)+IsEndLoop_7_4_1)+IsEndLoop_0_5_1)+IsEndLoop_5_4_1)+IsEndLoop_6_4_1)+IsEndLoop_3_6_1)+IsEndLoop_4_6_1)+IsEndLoop_1_6_1)+IsEndLoop_2_6_1)+IsEndLoop_7_5_1)+IsEndLoop_0_6_1)+IsEndLoop_5_5_1)+IsEndLoop_6_5_1)+IsEndLoop_4_0_2)+IsEndLoop_3_0_2)+IsEndLoop_2_0_2)+IsEndLoop_1_0_2)+IsEndLoop_0_0_2)+IsEndLoop_7_6_1)+IsEndLoop_6_6_1)+IsEndLoop_5_6_1)+IsEndLoop_4_1_2)+IsEndLoop_3_1_2)+IsEndLoop_2_1_2)+IsEndLoop_1_1_2)+IsEndLoop_0_1_2)+IsEndLoop_7_0_2)+IsEndLoop_6_0_2)+IsEndLoop_5_0_2)+IsEndLoop_6_2_2)+IsEndLoop_5_2_2)+IsEndLoop_0_3_2)+IsEndLoop_7_2_2)+IsEndLoop_2_3_2)+IsEndLoop_1_3_2)+IsEndLoop_4_3_2)+IsEndLoop_3_3_2)+IsEndLoop_6_1_2)+IsEndLoop_5_1_2)+IsEndLoop_0_2_2)+IsEndLoop_7_1_2)+IsEndLoop_2_2_2)+IsEndLoop_1_2_2)+IsEndLoop_4_2_2)+IsEndLoop_3_2_2)+IsEndLoop_5_4_2)+IsEndLoop_6_4_2)+IsEndLoop_7_4_2)+IsEndLoop_0_5_2)+IsEndLoop_1_5_2)+IsEndLoop_2_5_2)+IsEndLoop_3_5_2)+IsEndLoop_4_5_2)+IsEndLoop_5_3_2)+IsEndLoop_6_3_2)+IsEndLoop_7_3_2)+IsEndLoop_0_4_2)+IsEndLoop_1_4_2)+IsEndLoop_2_4_2)+IsEndLoop_3_4_2)+IsEndLoop_4_4_2)+IsEndLoop_0_0_3)+IsEndLoop_7_6_2)+IsEndLoop_6_6_2)+IsEndLoop_5_6_2)+IsEndLoop_4_0_3)+IsEndLoop_3_0_3)+IsEndLoop_2_0_3)+IsEndLoop_1_0_3)+IsEndLoop_0_6_2)+IsEndLoop_7_5_2)+IsEndLoop_6_5_2)+IsEndLoop_5_5_2)+IsEndLoop_4_6_2)+IsEndLoop_3_6_2)+IsEndLoop_2_6_2)+IsEndLoop_1_6_2)+IsEndLoop_7_1_3)+IsEndLoop_0_2_3)+IsEndLoop_5_1_3)+IsEndLoop_6_1_3)+IsEndLoop_3_2_3)+IsEndLoop_4_2_3)+IsEndLoop_1_2_3)+IsEndLoop_2_2_3)+IsEndLoop_7_0_3)+IsEndLoop_0_1_3)+IsEndLoop_5_0_3)+IsEndLoop_6_0_3)+IsEndLoop_3_1_3)+IsEndLoop_4_1_3)+IsEndLoop_1_1_3)+IsEndLoop_2_1_3)+IsEndLoop_2_4_3)+IsEndLoop_1_4_3)+IsEndLoop_4_4_3)+IsEndLoop_3_4_3)+IsEndLoop_6_3_3)+IsEndLoop_5_3_3)+IsEndLoop_0_4_3)+IsEndLoop_7_3_3)+IsEndLoop_2_3_3)+IsEndLoop_1_3_3)+IsEndLoop_4_3_3)+IsEndLoop_3_3_3)+IsEndLoop_6_2_3)+IsEndLoop_5_2_3)+IsEndLoop_0_3_3)+IsEndLoop_7_2_3)+IsEndLoop_1_6_3)+IsEndLoop_2_6_3)+IsEndLoop_3_6_3)+IsEndLoop_4_6_3)+IsEndLoop_5_5_3)+IsEndLoop_6_5_3)+IsEndLoop_7_5_3)+IsEndLoop_0_6_3)+IsEndLoop_1_5_3)+IsEndLoop_2_5_3)+IsEndLoop_3_5_3)+IsEndLoop_4_5_3)+IsEndLoop_5_4_3)+IsEndLoop_6_4_3)+IsEndLoop_7_4_3)+IsEndLoop_0_5_3)+IsEndLoop_4_1_4)+IsEndLoop_3_1_4)+IsEndLoop_2_1_4)+IsEndLoop_1_1_4)+IsEndLoop_0_1_4)+IsEndLoop_7_0_4)+IsEndLoop_6_0_4)+IsEndLoop_5_0_4)+IsEndLoop_4_0_4)+IsEndLoop_3_0_4)+IsEndLoop_2_0_4)+IsEndLoop_1_0_4)+IsEndLoop_0_0_4)+IsEndLoop_7_6_3)+IsEndLoop_6_6_3)+IsEndLoop_5_6_3)+IsEndLoop_3_3_4)+IsEndLoop_4_3_4)+IsEndLoop_1_3_4)+IsEndLoop_2_3_4)+IsEndLoop_7_2_4)+IsEndLoop_0_3_4)+IsEndLoop_5_2_4)+IsEndLoop_6_2_4)+IsEndLoop_3_2_4)+IsEndLoop_4_2_4)+IsEndLoop_1_2_4)+IsEndLoop_2_2_4)+IsEndLoop_7_1_4)+IsEndLoop_0_2_4)+IsEndLoop_5_1_4)+IsEndLoop_6_1_4)+IsEndLoop_0_6_4)+IsEndLoop_7_5_4)+IsEndLoop_6_5_4)+IsEndLoop_5_5_4)+IsEndLoop_4_6_4)+IsEndLoop_3_6_4)+IsEndLoop_2_6_4)+IsEndLoop_1_6_4)+IsEndLoop_0_0_5)+IsEndLoop_7_6_4)+IsEndLoop_6_6_4)+IsEndLoop_5_6_4)+IsEndLoop_4_0_5)+IsEndLoop_3_0_5)+IsEndLoop_2_0_5)+IsEndLoop_1_0_5)+IsEndLoop_7_3_4)+IsEndLoop_0_4_4)+IsEndLoop_5_3_4)+IsEndLoop_6_3_4)+IsEndLoop_3_4_4)+IsEndLoop_4_4_4)+IsEndLoop_1_4_4)+IsEndLoop_2_4_4)+IsEndLoop_7_4_4)+IsEndLoop_0_5_4)+IsEndLoop_5_4_4)+IsEndLoop_6_4_4)+IsEndLoop_3_5_4)+IsEndLoop_4_5_4)+IsEndLoop_1_5_4)+IsEndLoop_2_5_4)+IsEndLoop_6_2_5)+IsEndLoop_5_2_5)+IsEndLoop_0_3_5)+IsEndLoop_7_2_5)+IsEndLoop_2_3_5)+IsEndLoop_1_3_5)+IsEndLoop_4_3_5)+IsEndLoop_3_3_5)+IsEndLoop_6_3_5)+IsEndLoop_5_3_5)+IsEndLoop_0_4_5)+IsEndLoop_7_3_5)+IsEndLoop_2_4_5)+IsEndLoop_1_4_5)+IsEndLoop_4_4_5)+IsEndLoop_3_4_5)+IsEndLoop_5_0_5)+IsEndLoop_6_0_5)+IsEndLoop_7_0_5)+IsEndLoop_0_1_5)+IsEndLoop_1_1_5)+IsEndLoop_2_1_5)+IsEndLoop_3_1_5)+IsEndLoop_4_1_5)+IsEndLoop_5_1_5)+IsEndLoop_6_1_5)+IsEndLoop_7_1_5)+IsEndLoop_0_2_5)+IsEndLoop_1_2_5)+IsEndLoop_2_2_5)+IsEndLoop_3_2_5)+IsEndLoop_4_2_5)+IsEndLoop_4_0_6)+IsEndLoop_3_0_6)+IsEndLoop_2_0_6)+IsEndLoop_1_0_6)+IsEndLoop_0_0_6)+IsEndLoop_7_6_5)+IsEndLoop_6_6_5)+IsEndLoop_5_6_5)+IsEndLoop_4_1_6)+IsEndLoop_3_1_6)+IsEndLoop_2_1_6)+IsEndLoop_1_1_6)+IsEndLoop_0_1_6)+IsEndLoop_7_0_6)+IsEndLoop_6_0_6)+IsEndLoop_5_0_6)+IsEndLoop_3_5_5)+IsEndLoop_4_5_5)+IsEndLoop_1_5_5)+IsEndLoop_2_5_5)+IsEndLoop_7_4_5)+IsEndLoop_0_5_5)+IsEndLoop_5_4_5)+IsEndLoop_6_4_5)+IsEndLoop_3_6_5)+IsEndLoop_4_6_5)+IsEndLoop_1_6_5)+IsEndLoop_2_6_5)+IsEndLoop_7_5_5)+IsEndLoop_0_6_5)+IsEndLoop_5_5_5)+IsEndLoop_6_5_5)+IsEndLoop_2_4_6)+IsEndLoop_1_4_6)+IsEndLoop_4_4_6)+IsEndLoop_3_4_6)+IsEndLoop_6_3_6)+IsEndLoop_5_3_6)+IsEndLoop_0_4_6)+IsEndLoop_7_3_6)+IsEndLoop_2_5_6)+IsEndLoop_1_5_6)+IsEndLoop_4_5_6)+IsEndLoop_3_5_6)+IsEndLoop_6_4_6)+IsEndLoop_5_4_6)+IsEndLoop_0_5_6)+IsEndLoop_7_4_6)+IsEndLoop_1_2_6)+IsEndLoop_2_2_6)+IsEndLoop_3_2_6)+IsEndLoop_4_2_6)+IsEndLoop_5_1_6)+IsEndLoop_6_1_6)+IsEndLoop_7_1_6)+IsEndLoop_0_2_6)+IsEndLoop_1_3_6)+IsEndLoop_2_3_6)+IsEndLoop_3_3_6)+IsEndLoop_4_3_6)+IsEndLoop_5_2_6)+IsEndLoop_6_2_6)+IsEndLoop_7_2_6)+IsEndLoop_0_3_6)+IsEndLoop_7_1_7)+IsEndLoop_0_2_7)+IsEndLoop_5_1_7)+IsEndLoop_6_1_7)+IsEndLoop_3_2_7)+IsEndLoop_4_2_7)+IsEndLoop_1_2_7)+IsEndLoop_2_2_7)+IsEndLoop_7_0_7)+IsEndLoop_0_1_7)+IsEndLoop_5_0_7)+IsEndLoop_6_0_7)+IsEndLoop_3_1_7)+IsEndLoop_4_1_7)+IsEndLoop_1_1_7)+IsEndLoop_2_1_7)+IsEndLoop_0_0_7)+IsEndLoop_7_6_6)+IsEndLoop_6_6_6)+IsEndLoop_5_6_6)+IsEndLoop_4_0_7)+IsEndLoop_3_0_7)+IsEndLoop_2_0_7)+IsEndLoop_1_0_7)+IsEndLoop_0_6_6)+IsEndLoop_7_5_6)+IsEndLoop_6_5_6)+IsEndLoop_5_5_6)+IsEndLoop_4_6_6)+IsEndLoop_3_6_6)+IsEndLoop_2_6_6)+IsEndLoop_1_6_6)+IsEndLoop_5_5_7)+IsEndLoop_6_5_7)+IsEndLoop_7_5_7)+IsEndLoop_0_6_7)+IsEndLoop_1_6_7)+IsEndLoop_2_6_7)+IsEndLoop_3_6_7)+IsEndLoop_4_6_7)+IsEndLoop_5_4_7)+IsEndLoop_6_4_7)+IsEndLoop_7_4_7)+IsEndLoop_0_5_7)+IsEndLoop_1_5_7)+IsEndLoop_2_5_7)+IsEndLoop_3_5_7)+IsEndLoop_4_5_7)+IsEndLoop_6_3_7)+IsEndLoop_5_3_7)+IsEndLoop_0_4_7)+IsEndLoop_7_3_7)+IsEndLoop_2_4_7)+IsEndLoop_1_4_7)+IsEndLoop_4_4_7)+IsEndLoop_3_4_7)+IsEndLoop_6_2_7)+IsEndLoop_5_2_7)+IsEndLoop_0_3_7)+IsEndLoop_7_2_7)+IsEndLoop_2_3_7)+IsEndLoop_1_3_7)+IsEndLoop_4_3_7)+IsEndLoop_3_3_7)+IsEndLoop_7_6_7)+IsEndLoop_6_6_7)+IsEndLoop_5_6_7)<=(((((((((((((((((((((((((((((((((((((((((((((((((((((((Turn_4_6+Turn_3_6)+Turn_6_6)+Turn_5_6)+Turn_1_7)+Turn_0_7)+Turn_3_7)+Turn_2_7)+Turn_3_5)+Turn_2_5)+Turn_5_5)+Turn_4_5)+Turn_0_6)+Turn_6_5)+Turn_2_6)+Turn_1_6)+Turn_1_4)+Turn_2_4)+Turn_3_4)+Turn_4_4)+Turn_5_4)+Turn_6_4)+Turn_0_5)+Turn_1_5)+Turn_0_3)+Turn_1_3)+Turn_2_3)+Turn_3_3)+Turn_4_3)+Turn_5_3)+Turn_6_3)+Turn_0_4)+Turn_2_2)+Turn_1_2)+Turn_0_2)+Turn_6_1)+Turn_6_2)+Turn_5_2)+Turn_4_2)+Turn_3_2)+Turn_1_1)+Turn_0_1)+Turn_6_0)+Turn_5_0)+Turn_5_1)+Turn_4_1)+Turn_3_1)+Turn_2_1)+Turn_0_0)+Turn_3_0)+Turn_4_0)+Turn_1_0)+Turn_2_0)+Turn_6_7)+Turn_5_7)+Turn_4_7))"))
Formula 0 simplified : !"((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((IsEndLoop_0_0_0+IsEndLoop_1_0_0)+IsEndLoop_2_0_0)+IsEndLoop_3_0_0)+IsEndLoop_4_0_0)+IsEndLoop_5_0_0)+IsEndLoop_6_0_0)+IsEndLoop_7_0_0)+IsEndLoop_0_1_0)+IsEndLoop_1_1_0)+IsEndLoop_2_1_0)+IsEndLoop_3_1_0)+IsEndLoop_4_1_0)+IsEndLoop_6_1_0)+IsEndLoop_5_1_0)+IsEndLoop_0_2_0)+IsEndLoop_7_1_0)+IsEndLoop_2_2_0)+IsEndLoop_1_2_0)+IsEndLoop_4_2_0)+IsEndLoop_3_2_0)+IsEndLoop_6_2_0)+IsEndLoop_5_2_0)+IsEndLoop_0_3_0)+IsEndLoop_7_2_0)+IsEndLoop_2_3_0)+IsEndLoop_1_3_0)+IsEndLoop_4_3_0)+IsEndLoop_3_3_0)+IsEndLoop_7_3_0)+IsEndLoop_0_4_0)+IsEndLoop_5_3_0)+IsEndLoop_6_3_0)+IsEndLoop_3_4_0)+IsEndLoop_4_4_0)+IsEndLoop_1_4_0)+IsEndLoop_2_4_0)+IsEndLoop_7_4_0)+IsEndLoop_0_5_0)+IsEndLoop_5_4_0)+IsEndLoop_6_4_0)+IsEndLoop_3_5_0)+IsEndLoop_4_5_0)+IsEndLoop_1_5_0)+IsEndLoop_2_5_0)+IsEndLoop_0_6_0)+IsEndLoop_7_5_0)+IsEndLoop_6_5_0)+IsEndLoop_5_5_0)+IsEndLoop_4_6_0)+IsEndLoop_3_6_0)+IsEndLoop_2_6_0)+IsEndLoop_1_6_0)+IsEndLoop_0_0_1)+IsEndLoop_7_6_0)+IsEndLoop_6_6_0)+IsEndLoop_5_6_0)+IsEndLoop_4_0_1)+IsEndLoop_3_0_1)+IsEndLoop_2_0_1)+IsEndLoop_1_0_1)+IsEndLoop_1_1_1)+IsEndLoop_2_1_1)+IsEndLoop_3_1_1)+IsEndLoop_4_1_1)+IsEndLoop_5_0_1)+IsEndLoop_6_0_1)+IsEndLoop_7_0_1)+IsEndLoop_0_1_1)+IsEndLoop_1_2_1)+IsEndLoop_2_2_1)+IsEndLoop_3_2_1)+IsEndLoop_4_2_1)+IsEndLoop_5_1_1)+IsEndLoop_6_1_1)+IsEndLoop_7_1_1)+IsEndLoop_0_2_1)+IsEndLoop_2_3_1)+IsEndLoop_1_3_1)+IsEndLoop_4_3_1)+IsEndLoop_3_3_1)+IsEndLoop_6_2_1)+IsEndLoop_5_2_1)+IsEndLoop_0_3_1)+IsEndLoop_7_2_1)+IsEndLoop_2_4_1)+IsEndLoop_1_4_1)+IsEndLoop_4_4_1)+IsEndLoop_3_4_1)+IsEndLoop_6_3_1)+IsEndLoop_5_3_1)+IsEndLoop_0_4_1)+IsEndLoop_7_3_1)+IsEndLoop_3_5_1)+IsEndLoop_4_5_1)+IsEndLoop_1_5_1)+IsEndLoop_2_5_1)+IsEndLoop_7_4_1)+IsEndLoop_0_5_1)+IsEndLoop_5_4_1)+IsEndLoop_6_4_1)+IsEndLoop_3_6_1)+IsEndLoop_4_6_1)+IsEndLoop_1_6_1)+IsEndLoop_2_6_1)+IsEndLoop_7_5_1)+IsEndLoop_0_6_1)+IsEndLoop_5_5_1)+IsEndLoop_6_5_1)+IsEndLoop_4_0_2)+IsEndLoop_3_0_2)+IsEndLoop_2_0_2)+IsEndLoop_1_0_2)+IsEndLoop_0_0_2)+IsEndLoop_7_6_1)+IsEndLoop_6_6_1)+IsEndLoop_5_6_1)+IsEndLoop_4_1_2)+IsEndLoop_3_1_2)+IsEndLoop_2_1_2)+IsEndLoop_1_1_2)+IsEndLoop_0_1_2)+IsEndLoop_7_0_2)+IsEndLoop_6_0_2)+IsEndLoop_5_0_2)+IsEndLoop_6_2_2)+IsEndLoop_5_2_2)+IsEndLoop_0_3_2)+IsEndLoop_7_2_2)+IsEndLoop_2_3_2)+IsEndLoop_1_3_2)+IsEndLoop_4_3_2)+IsEndLoop_3_3_2)+IsEndLoop_6_1_2)+IsEndLoop_5_1_2)+IsEndLoop_0_2_2)+IsEndLoop_7_1_2)+IsEndLoop_2_2_2)+IsEndLoop_1_2_2)+IsEndLoop_4_2_2)+IsEndLoop_3_2_2)+IsEndLoop_5_4_2)+IsEndLoop_6_4_2)+IsEndLoop_7_4_2)+IsEndLoop_0_5_2)+IsEndLoop_1_5_2)+IsEndLoop_2_5_2)+IsEndLoop_3_5_2)+IsEndLoop_4_5_2)+IsEndLoop_5_3_2)+IsEndLoop_6_3_2)+IsEndLoop_7_3_2)+IsEndLoop_0_4_2)+IsEndLoop_1_4_2)+IsEndLoop_2_4_2)+IsEndLoop_3_4_2)+IsEndLoop_4_4_2)+IsEndLoop_0_0_3)+IsEndLoop_7_6_2)+IsEndLoop_6_6_2)+IsEndLoop_5_6_2)+IsEndLoop_4_0_3)+IsEndLoop_3_0_3)+IsEndLoop_2_0_3)+IsEndLoop_1_0_3)+IsEndLoop_0_6_2)+IsEndLoop_7_5_2)+IsEndLoop_6_5_2)+IsEndLoop_5_5_2)+IsEndLoop_4_6_2)+IsEndLoop_3_6_2)+IsEndLoop_2_6_2)+IsEndLoop_1_6_2)+IsEndLoop_7_1_3)+IsEndLoop_0_2_3)+IsEndLoop_5_1_3)+IsEndLoop_6_1_3)+IsEndLoop_3_2_3)+IsEndLoop_4_2_3)+IsEndLoop_1_2_3)+IsEndLoop_2_2_3)+IsEndLoop_7_0_3)+IsEndLoop_0_1_3)+IsEndLoop_5_0_3)+IsEndLoop_6_0_3)+IsEndLoop_3_1_3)+IsEndLoop_4_1_3)+IsEndLoop_1_1_3)+IsEndLoop_2_1_3)+IsEndLoop_2_4_3)+IsEndLoop_1_4_3)+IsEndLoop_4_4_3)+IsEndLoop_3_4_3)+IsEndLoop_6_3_3)+IsEndLoop_5_3_3)+IsEndLoop_0_4_3)+IsEndLoop_7_3_3)+IsEndLoop_2_3_3)+IsEndLoop_1_3_3)+IsEndLoop_4_3_3)+IsEndLoop_3_3_3)+IsEndLoop_6_2_3)+IsEndLoop_5_2_3)+IsEndLoop_0_3_3)+IsEndLoop_7_2_3)+IsEndLoop_1_6_3)+IsEndLoop_2_6_3)+IsEndLoop_3_6_3)+IsEndLoop_4_6_3)+IsEndLoop_5_5_3)+IsEndLoop_6_5_3)+IsEndLoop_7_5_3)+IsEndLoop_0_6_3)+IsEndLoop_1_5_3)+IsEndLoop_2_5_3)+IsEndLoop_3_5_3)+IsEndLoop_4_5_3)+IsEndLoop_5_4_3)+IsEndLoop_6_4_3)+IsEndLoop_7_4_3)+IsEndLoop_0_5_3)+IsEndLoop_4_1_4)+IsEndLoop_3_1_4)+IsEndLoop_2_1_4)+IsEndLoop_1_1_4)+IsEndLoop_0_1_4)+IsEndLoop_7_0_4)+IsEndLoop_6_0_4)+IsEndLoop_5_0_4)+IsEndLoop_4_0_4)+IsEndLoop_3_0_4)+IsEndLoop_2_0_4)+IsEndLoop_1_0_4)+IsEndLoop_0_0_4)+IsEndLoop_7_6_3)+IsEndLoop_6_6_3)+IsEndLoop_5_6_3)+IsEndLoop_3_3_4)+IsEndLoop_4_3_4)+IsEndLoop_1_3_4)+IsEndLoop_2_3_4)+IsEndLoop_7_2_4)+IsEndLoop_0_3_4)+IsEndLoop_5_2_4)+IsEndLoop_6_2_4)+IsEndLoop_3_2_4)+IsEndLoop_4_2_4)+IsEndLoop_1_2_4)+IsEndLoop_2_2_4)+IsEndLoop_7_1_4)+IsEndLoop_0_2_4)+IsEndLoop_5_1_4)+IsEndLoop_6_1_4)+IsEndLoop_0_6_4)+IsEndLoop_7_5_4)+IsEndLoop_6_5_4)+IsEndLoop_5_5_4)+IsEndLoop_4_6_4)+IsEndLoop_3_6_4)+IsEndLoop_2_6_4)+IsEndLoop_1_6_4)+IsEndLoop_0_0_5)+IsEndLoop_7_6_4)+IsEndLoop_6_6_4)+IsEndLoop_5_6_4)+IsEndLoop_4_0_5)+IsEndLoop_3_0_5)+IsEndLoop_2_0_5)+IsEndLoop_1_0_5)+IsEndLoop_7_3_4)+IsEndLoop_0_4_4)+IsEndLoop_5_3_4)+IsEndLoop_6_3_4)+IsEndLoop_3_4_4)+IsEndLoop_4_4_4)+IsEndLoop_1_4_4)+IsEndLoop_2_4_4)+IsEndLoop_7_4_4)+IsEndLoop_0_5_4)+IsEndLoop_5_4_4)+IsEndLoop_6_4_4)+IsEndLoop_3_5_4)+IsEndLoop_4_5_4)+IsEndLoop_1_5_4)+IsEndLoop_2_5_4)+IsEndLoop_6_2_5)+IsEndLoop_5_2_5)+IsEndLoop_0_3_5)+IsEndLoop_7_2_5)+IsEndLoop_2_3_5)+IsEndLoop_1_3_5)+IsEndLoop_4_3_5)+IsEndLoop_3_3_5)+IsEndLoop_6_3_5)+IsEndLoop_5_3_5)+IsEndLoop_0_4_5)+IsEndLoop_7_3_5)+IsEndLoop_2_4_5)+IsEndLoop_1_4_5)+IsEndLoop_4_4_5)+IsEndLoop_3_4_5)+IsEndLoop_5_0_5)+IsEndLoop_6_0_5)+IsEndLoop_7_0_5)+IsEndLoop_0_1_5)+IsEndLoop_1_1_5)+IsEndLoop_2_1_5)+IsEndLoop_3_1_5)+IsEndLoop_4_1_5)+IsEndLoop_5_1_5)+IsEndLoop_6_1_5)+IsEndLoop_7_1_5)+IsEndLoop_0_2_5)+IsEndLoop_1_2_5)+IsEndLoop_2_2_5)+IsEndLoop_3_2_5)+IsEndLoop_4_2_5)+IsEndLoop_4_0_6)+IsEndLoop_3_0_6)+IsEndLoop_2_0_6)+IsEndLoop_1_0_6)+IsEndLoop_0_0_6)+IsEndLoop_7_6_5)+IsEndLoop_6_6_5)+IsEndLoop_5_6_5)+IsEndLoop_4_1_6)+IsEndLoop_3_1_6)+IsEndLoop_2_1_6)+IsEndLoop_1_1_6)+IsEndLoop_0_1_6)+IsEndLoop_7_0_6)+IsEndLoop_6_0_6)+IsEndLoop_5_0_6)+IsEndLoop_3_5_5)+IsEndLoop_4_5_5)+IsEndLoop_1_5_5)+IsEndLoop_2_5_5)+IsEndLoop_7_4_5)+IsEndLoop_0_5_5)+IsEndLoop_5_4_5)+IsEndLoop_6_4_5)+IsEndLoop_3_6_5)+IsEndLoop_4_6_5)+IsEndLoop_1_6_5)+IsEndLoop_2_6_5)+IsEndLoop_7_5_5)+IsEndLoop_0_6_5)+IsEndLoop_5_5_5)+IsEndLoop_6_5_5)+IsEndLoop_2_4_6)+IsEndLoop_1_4_6)+IsEndLoop_4_4_6)+IsEndLoop_3_4_6)+IsEndLoop_6_3_6)+IsEndLoop_5_3_6)+IsEndLoop_0_4_6)+IsEndLoop_7_3_6)+IsEndLoop_2_5_6)+IsEndLoop_1_5_6)+IsEndLoop_4_5_6)+IsEndLoop_3_5_6)+IsEndLoop_6_4_6)+IsEndLoop_5_4_6)+IsEndLoop_0_5_6)+IsEndLoop_7_4_6)+IsEndLoop_1_2_6)+IsEndLoop_2_2_6)+IsEndLoop_3_2_6)+IsEndLoop_4_2_6)+IsEndLoop_5_1_6)+IsEndLoop_6_1_6)+IsEndLoop_7_1_6)+IsEndLoop_0_2_6)+IsEndLoop_1_3_6)+IsEndLoop_2_3_6)+IsEndLoop_3_3_6)+IsEndLoop_4_3_6)+IsEndLoop_5_2_6)+IsEndLoop_6_2_6)+IsEndLoop_7_2_6)+IsEndLoop_0_3_6)+IsEndLoop_7_1_7)+IsEndLoop_0_2_7)+IsEndLoop_5_1_7)+IsEndLoop_6_1_7)+IsEndLoop_3_2_7)+IsEndLoop_4_2_7)+IsEndLoop_1_2_7)+IsEndLoop_2_2_7)+IsEndLoop_7_0_7)+IsEndLoop_0_1_7)+IsEndLoop_5_0_7)+IsEndLoop_6_0_7)+IsEndLoop_3_1_7)+IsEndLoop_4_1_7)+IsEndLoop_1_1_7)+IsEndLoop_2_1_7)+IsEndLoop_0_0_7)+IsEndLoop_7_6_6)+IsEndLoop_6_6_6)+IsEndLoop_5_6_6)+IsEndLoop_4_0_7)+IsEndLoop_3_0_7)+IsEndLoop_2_0_7)+IsEndLoop_1_0_7)+IsEndLoop_0_6_6)+IsEndLoop_7_5_6)+IsEndLoop_6_5_6)+IsEndLoop_5_5_6)+IsEndLoop_4_6_6)+IsEndLoop_3_6_6)+IsEndLoop_2_6_6)+IsEndLoop_1_6_6)+IsEndLoop_5_5_7)+IsEndLoop_6_5_7)+IsEndLoop_7_5_7)+IsEndLoop_0_6_7)+IsEndLoop_1_6_7)+IsEndLoop_2_6_7)+IsEndLoop_3_6_7)+IsEndLoop_4_6_7)+IsEndLoop_5_4_7)+IsEndLoop_6_4_7)+IsEndLoop_7_4_7)+IsEndLoop_0_5_7)+IsEndLoop_1_5_7)+IsEndLoop_2_5_7)+IsEndLoop_3_5_7)+IsEndLoop_4_5_7)+IsEndLoop_6_3_7)+IsEndLoop_5_3_7)+IsEndLoop_0_4_7)+IsEndLoop_7_3_7)+IsEndLoop_2_4_7)+IsEndLoop_1_4_7)+IsEndLoop_4_4_7)+IsEndLoop_3_4_7)+IsEndLoop_6_2_7)+IsEndLoop_5_2_7)+IsEndLoop_0_3_7)+IsEndLoop_7_2_7)+IsEndLoop_2_3_7)+IsEndLoop_1_3_7)+IsEndLoop_4_3_7)+IsEndLoop_3_3_7)+IsEndLoop_7_6_7)+IsEndLoop_6_6_7)+IsEndLoop_5_6_7)<=(((((((((((((((((((((((((((((((((((((((((((((((((((((((Turn_4_6+Turn_3_6)+Turn_6_6)+Turn_5_6)+Turn_1_7)+Turn_0_7)+Turn_3_7)+Turn_2_7)+Turn_3_5)+Turn_2_5)+Turn_5_5)+Turn_4_5)+Turn_0_6)+Turn_6_5)+Turn_2_6)+Turn_1_6)+Turn_1_4)+Turn_2_4)+Turn_3_4)+Turn_4_4)+Turn_5_4)+Turn_6_4)+Turn_0_5)+Turn_1_5)+Turn_0_3)+Turn_1_3)+Turn_2_3)+Turn_3_3)+Turn_4_3)+Turn_5_3)+Turn_6_3)+Turn_0_4)+Turn_2_2)+Turn_1_2)+Turn_0_2)+Turn_6_1)+Turn_6_2)+Turn_5_2)+Turn_4_2)+Turn_3_2)+Turn_1_1)+Turn_0_1)+Turn_6_0)+Turn_5_0)+Turn_5_1)+Turn_4_1)+Turn_3_1)+Turn_2_1)+Turn_0_0)+Turn_3_0)+Turn_4_0)+Turn_1_0)+Turn_2_0)+Turn_6_7)+Turn_5_7)+Turn_4_7))"
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O3, model.c], workingDir=/home/mcc/execution]
Compilation finished in 38765 ms.
Running link step : CommandLine [args=[gcc, -shared, -o, gal.so, model.o], workingDir=/home/mcc/execution]
Link finished in 261 ms.
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, (LTLAP0==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
WARNING : LTSmin timed out (>225 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, (LTLAP0==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, (LTLAP1==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
WARNING : LTSmin timed out (>225 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, (LTLAP1==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, []((LTLAP2==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
WARNING : LTSmin timed out (>225 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, []((LTLAP2==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, []([]((LTLAP3==true))), --buchi-type=spotba], workingDir=/home/mcc/execution]
WARNING : LTS min runner thread failed on error :java.lang.RuntimeException: Unexpected exception when executing ltsmin :CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, []([]((LTLAP3==true))), --buchi-type=spotba], workingDir=/home/mcc/execution]
255
sparsehash FATAL ERROR: failed to allocate 45 groups

BK_STOP 1527490666726

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution LTLCardinality -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -consoleLog -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination LTLCardinality -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
May 28, 2018 6:45:19 AM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, LTLCardinality, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -smt]
May 28, 2018 6:45:20 AM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
May 28, 2018 6:45:20 AM fr.lip6.move.gal.nupn.PTNetReader loadFromXML
INFO: Load time of PNML (sax parser for PT used): 300 ms
May 28, 2018 6:45:20 AM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 1992 places.
May 28, 2018 6:45:20 AM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 3096 transitions.
May 28, 2018 6:45:21 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 704 ms
May 28, 2018 6:45:21 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/LTLCardinality.pnml.gal : 49 ms
May 28, 2018 6:45:21 AM fr.lip6.move.serialization.SerializationUtil serializePropertiesForITSLTLTools
INFO: Time to serialize properties into /home/mcc/execution/LTLCardinality.ltl : 15 ms
May 28, 2018 6:45:22 AM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 3096 transitions.
May 28, 2018 6:45:22 AM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Too many transitions (3096) to apply POR reductions. Disabling POR matrices.
May 28, 2018 6:45:22 AM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 631ms conformant to PINS in folder :/home/mcc/execution
pins2lts-mc, 0.000: Registering PINS so language module
pins2lts-mc, 0.000, ** error **: out of memory trying to get 4294967296
java.lang.RuntimeException: Unexpected exception when executing ltsmin :CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, []([]((LTLAP3==true))), --buchi-type=spotba], workingDir=/home/mcc/execution]
255
at fr.lip6.move.gal.application.LTSminRunner.checkProperty(LTSminRunner.java:167)
at fr.lip6.move.gal.application.LTSminRunner.access$9(LTSminRunner.java:122)
at fr.lip6.move.gal.application.LTSminRunner$1.run(LTSminRunner.java:91)
at java.lang.Thread.run(Thread.java:748)
ITS-tools command line returned an error code 1

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="Peterson-PT-7"
export BK_EXAMINATION="LTLCardinality"
export BK_TOOL="itstools"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

tar xzf /home/mcc/BenchKit/INPUTS/Peterson-PT-7.tgz
mv Peterson-PT-7 execution
cd execution
pwd
ls -lh

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3637"
echo " Executing tool itstools"
echo " Input is Peterson-PT-7, examination is LTLCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r260-csrt-152732585400169"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' LTLCardinality.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;