About the Execution of ITS-Tools for Peterson-PT-4
Execution Summary | |||||
Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
15739.610 | 468064.00 | 1077175.00 | 260.30 | FTFFFFFFFFFFFFFF | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Waiting for the VM to be ready (probing ssh)
..................
/home/mcc/execution
total 1.3M
-rw-r--r-- 1 mcc users 40K May 15 18:54 CTLCardinality.txt
-rw-r--r-- 1 mcc users 114K May 15 18:54 CTLCardinality.xml
-rw-r--r-- 1 mcc users 24K May 15 18:54 CTLFireability.txt
-rw-r--r-- 1 mcc users 82K May 15 18:54 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K May 15 18:50 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.0K May 15 18:50 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 20K May 26 09:26 LTLCardinality.txt
-rw-r--r-- 1 mcc users 53K May 26 09:26 LTLCardinality.xml
-rw-r--r-- 1 mcc users 15K May 26 09:26 LTLFireability.txt
-rw-r--r-- 1 mcc users 52K May 26 09:26 LTLFireability.xml
-rw-r--r-- 1 mcc users 37K May 15 18:54 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 106K May 15 18:54 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 104 May 15 18:54 ReachabilityDeadlock.txt
-rw-r--r-- 1 mcc users 342 May 15 18:54 ReachabilityDeadlock.xml
-rw-r--r-- 1 mcc users 29K May 15 18:54 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 100K May 15 18:54 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 12K May 15 18:54 UpperBounds.txt
-rw-r--r-- 1 mcc users 25K May 15 18:54 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 May 15 18:50 equiv_col
-rw-r--r-- 1 mcc users 2 May 15 18:50 instance
-rw-r--r-- 1 mcc users 6 May 15 18:50 iscolored
-rw-r--r-- 1 mcc users 511K May 15 18:50 model.pnml
=====================================================================
Generated by BenchKit 2-3637
Executing tool itstools
Input is Peterson-PT-4, examination is LTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r260-csrt-152732585400164
=====================================================================
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME Peterson-PT-4-LTLFireability-00
FORMULA_NAME Peterson-PT-4-LTLFireability-01
FORMULA_NAME Peterson-PT-4-LTLFireability-02
FORMULA_NAME Peterson-PT-4-LTLFireability-03
FORMULA_NAME Peterson-PT-4-LTLFireability-04
FORMULA_NAME Peterson-PT-4-LTLFireability-05
FORMULA_NAME Peterson-PT-4-LTLFireability-06
FORMULA_NAME Peterson-PT-4-LTLFireability-07
FORMULA_NAME Peterson-PT-4-LTLFireability-08
FORMULA_NAME Peterson-PT-4-LTLFireability-09
FORMULA_NAME Peterson-PT-4-LTLFireability-10
FORMULA_NAME Peterson-PT-4-LTLFireability-11
FORMULA_NAME Peterson-PT-4-LTLFireability-12
FORMULA_NAME Peterson-PT-4-LTLFireability-13
FORMULA_NAME Peterson-PT-4-LTLFireability-14
FORMULA_NAME Peterson-PT-4-LTLFireability-15
=== Now, execution of the tool begins
BK_START 1527489644759
Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805151631/bin/its-ltl-linux64, --gc-threshold, 2000000, -i, /home/mcc/execution/LTLFireability.pnml.gal, -t, CGAL, -LTL, /home/mcc/execution/LTLFireability.ltl, -c, -stutter-deadlock], workingDir=/home/mcc/execution]
its-ltl command run as :
/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805151631/bin/its-ltl-linux64 --gc-threshold 2000000 -i /home/mcc/execution/LTLFireability.pnml.gal -t CGAL -LTL /home/mcc/execution/LTLFireability.ltl -c -stutter-deadlock
Read 16 LTL properties
Checking formula 0 : !((G("((((((((((((((((((((IsEndLoop_2_3_4>=1)||(IsEndLoop_3_3_4>=1))||(IsEndLoop_4_3_4>=1))||(IsEndLoop_3_2_4>=1))||(IsEndLoop_4_2_4>=1))||(IsEndLoop_0_3_4>=1))||(IsEndLoop_1_3_4>=1))||(IsEndLoop_0_2_4>=1))||(IsEndLoop_4_1_4>=1))||(IsEndLoop_2_2_4>=1))||(IsEndLoop_1_2_4>=1))||(IsEndLoop_1_1_4>=1))||(IsEndLoop_0_1_4>=1))||(IsEndLoop_3_1_4>=1))||(IsEndLoop_2_1_4>=1))||(IsEndLoop_2_0_4>=1))||(IsEndLoop_1_0_4>=1))||(IsEndLoop_4_0_4>=1))||(IsEndLoop_3_0_4>=1))||(IsEndLoop_0_0_4>=1))")))
Formula 0 simplified : !G"((((((((((((((((((((IsEndLoop_2_3_4>=1)||(IsEndLoop_3_3_4>=1))||(IsEndLoop_4_3_4>=1))||(IsEndLoop_3_2_4>=1))||(IsEndLoop_4_2_4>=1))||(IsEndLoop_0_3_4>=1))||(IsEndLoop_1_3_4>=1))||(IsEndLoop_0_2_4>=1))||(IsEndLoop_4_1_4>=1))||(IsEndLoop_2_2_4>=1))||(IsEndLoop_1_2_4>=1))||(IsEndLoop_1_1_4>=1))||(IsEndLoop_0_1_4>=1))||(IsEndLoop_3_1_4>=1))||(IsEndLoop_2_1_4>=1))||(IsEndLoop_2_0_4>=1))||(IsEndLoop_1_0_4>=1))||(IsEndLoop_4_0_4>=1))||(IsEndLoop_3_0_4>=1))||(IsEndLoop_0_0_4>=1))"
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
Normalized transition count is 630
// Phase 1: matrix 630 rows 480 cols
invariant :IsEndLoop_0_0_0 + IsEndLoop_0_1_0 + IsEndLoop_0_2_0 + IsEndLoop_0_3_0 + IsEndLoop_0_0_1 + IsEndLoop_0_1_1 + IsEndLoop_0_2_1 + IsEndLoop_0_3_1 + IsEndLoop_0_0_2 + IsEndLoop_0_1_2 + IsEndLoop_0_2_2 + IsEndLoop_0_3_2 + IsEndLoop_0_0_3 + IsEndLoop_0_1_3 + IsEndLoop_0_3_3 + IsEndLoop_0_2_3 + IsEndLoop_0_0_4 + IsEndLoop_0_2_4 + IsEndLoop_0_1_4 + EndTurn_0_0 + IsEndLoop_0_3_4 + EndTurn_0_1 + EndTurn_0_3 + EndTurn_0_2 + BeginLoop_0_0_0 + BeginLoop_0_3_0 + BeginLoop_0_0_1 + BeginLoop_0_1_0 + BeginLoop_0_2_0 + BeginLoop_0_2_1 + BeginLoop_0_3_1 + BeginLoop_0_1_1 + BeginLoop_0_1_2 + BeginLoop_0_2_2 + BeginLoop_0_0_2 + BeginLoop_0_1_3 + BeginLoop_0_3_2 + BeginLoop_0_0_3 + BeginLoop_0_0_4 + BeginLoop_0_3_3 + BeginLoop_0_2_3 + BeginLoop_0_3_4 + BeginLoop_0_2_4 + BeginLoop_0_1_4 + TestAlone_0_1_1 + TestAlone_0_0_1 + TestAlone_0_2_2 + TestAlone_0_3_2 + TestAlone_0_0_3 + TestAlone_0_1_3 + TestAlone_0_2_1 + TestAlone_0_3_1 + TestAlone_0_0_2 + TestAlone_0_1_2 + TestAlone_0_2_4 + TestAlone_0_3_4 + TestTurn_0_0 + TestTurn_0_1 + TestAlone_0_2_3 + TestAlone_0_3_3 + TestAlone_0_0_4 + TestAlone_0_1_4 + TestIdentity_0_2_0 + TestIdentity_0_1_0 + TestIdentity_0_3_0 + TestTurn_0_2 + TestIdentity_0_0_0 + TestTurn_0_3 + TestIdentity_0_0_2 + TestIdentity_0_3_1 + TestIdentity_0_2_2 + TestIdentity_0_1_2 + TestIdentity_0_1_1 + TestIdentity_0_0_1 + TestIdentity_0_2_1 + TestIdentity_0_3_3 + TestIdentity_0_0_4 + TestIdentity_0_2_3 + TestIdentity_0_0_3 + TestIdentity_0_1_3 + TestIdentity_0_3_2 + TestIdentity_0_3_4 + TestIdentity_0_1_4 + TestIdentity_0_2_4 + CS_0 + AskForSection_0_3 + AskForSection_0_2 + AskForSection_0_1 + AskForSection_0_0 + Idle_0 = 1
invariant :IsEndLoop_1_0_0 + IsEndLoop_1_1_0 + IsEndLoop_1_2_0 + IsEndLoop_1_3_0 + IsEndLoop_1_0_1 + IsEndLoop_1_1_1 + IsEndLoop_1_2_1 + IsEndLoop_1_3_1 + IsEndLoop_1_0_2 + IsEndLoop_1_1_2 + IsEndLoop_1_2_2 + IsEndLoop_1_3_2 + IsEndLoop_1_1_3 + IsEndLoop_1_0_3 + IsEndLoop_1_3_3 + IsEndLoop_1_2_3 + IsEndLoop_1_0_4 + IsEndLoop_1_2_4 + IsEndLoop_1_1_4 + IsEndLoop_1_3_4 + EndTurn_1_1 + EndTurn_1_0 + EndTurn_1_3 + EndTurn_1_2 + BeginLoop_1_0_0 + BeginLoop_1_3_0 + BeginLoop_1_1_0 + BeginLoop_1_2_0 + BeginLoop_1_2_1 + BeginLoop_1_3_1 + BeginLoop_1_0_1 + BeginLoop_1_1_1 + BeginLoop_1_1_2 + BeginLoop_1_2_2 + BeginLoop_1_0_2 + BeginLoop_1_0_3 + BeginLoop_1_1_3 + BeginLoop_1_3_2 + BeginLoop_1_0_4 + BeginLoop_1_3_3 + BeginLoop_1_2_3 + BeginLoop_1_3_4 + BeginLoop_1_2_4 + BeginLoop_1_1_4 + TestAlone_1_1_0 + TestAlone_1_0_0 + TestAlone_1_3_0 + TestAlone_1_2_0 + TestAlone_1_2_2 + TestAlone_1_3_2 + TestAlone_1_0_3 + TestAlone_1_1_3 + TestAlone_1_0_2 + TestAlone_1_1_2 + TestAlone_1_2_4 + TestAlone_1_3_4 + TestTurn_1_0 + TestTurn_1_1 + TestAlone_1_2_3 + TestAlone_1_3_3 + TestAlone_1_0_4 + TestAlone_1_1_4 + TestIdentity_1_1_0 + TestIdentity_1_3_0 + TestIdentity_1_2_0 + TestTurn_1_2 + TestIdentity_1_0_0 + TestTurn_1_3 + TestIdentity_1_0_2 + TestIdentity_1_3_1 + TestIdentity_1_1_2 + TestIdentity_1_1_1 + TestIdentity_1_0_1 + TestIdentity_1_2_1 + TestIdentity_1_3_3 + TestIdentity_1_0_4 + TestIdentity_1_2_3 + TestIdentity_1_0_3 + TestIdentity_1_1_3 + TestIdentity_1_2_2 + TestIdentity_1_3_2 + TestIdentity_1_2_4 + TestIdentity_1_3_4 + TestIdentity_1_1_4 + CS_1 + AskForSection_1_3 + AskForSection_1_2 + AskForSection_1_1 + AskForSection_1_0 + Idle_1 = 1
invariant :WantSection_1_F + -1'Idle_1 = 0
invariant :Turn_0_2 + Turn_0_3 + Turn_0_0 + Turn_0_1 + Turn_0_4 = 1
invariant :WantSection_3_F + -1'Idle_3 = 0
invariant :Turn_1_2 + Turn_1_3 + Turn_1_0 + Turn_1_1 + Turn_1_4 = 1
invariant :WantSection_4_F + -1'Idle_4 = 0
invariant :WantSection_3_T + Idle_3 = 1
invariant :WantSection_0_F + -1'Idle_0 = 0
invariant :IsEndLoop_4_0_0 + IsEndLoop_4_1_0 + IsEndLoop_4_2_0 + IsEndLoop_4_3_0 + IsEndLoop_4_0_1 + IsEndLoop_4_1_1 + IsEndLoop_4_2_1 + IsEndLoop_4_3_1 + IsEndLoop_4_0_2 + IsEndLoop_4_1_2 + IsEndLoop_4_2_2 + IsEndLoop_4_3_2 + IsEndLoop_4_0_3 + IsEndLoop_4_2_3 + IsEndLoop_4_1_3 + IsEndLoop_4_0_4 + IsEndLoop_4_3_3 + IsEndLoop_4_1_4 + IsEndLoop_4_3_4 + IsEndLoop_4_2_4 + EndTurn_4_0 + EndTurn_4_2 + EndTurn_4_1 + BeginLoop_4_0_0 + EndTurn_4_3 + BeginLoop_4_2_0 + BeginLoop_4_3_0 + BeginLoop_4_1_0 + BeginLoop_4_1_1 + BeginLoop_4_2_1 + BeginLoop_4_0_1 + BeginLoop_4_1_2 + BeginLoop_4_3_1 + BeginLoop_4_0_2 + BeginLoop_4_0_3 + BeginLoop_4_2_2 + BeginLoop_4_3_2 + BeginLoop_4_0_4 + BeginLoop_4_3_3 + BeginLoop_4_2_3 + BeginLoop_4_1_3 + BeginLoop_4_3_4 + BeginLoop_4_2_4 + BeginLoop_4_1_4 + TestAlone_4_0_0 + TestAlone_4_0_1 + TestAlone_4_3_0 + TestAlone_4_2_0 + TestAlone_4_1_0 + TestAlone_4_1_2 + TestAlone_4_2_2 + TestAlone_4_3_2 + TestAlone_4_0_3 + TestAlone_4_1_1 + TestAlone_4_2_1 + TestAlone_4_3_1 + TestAlone_4_0_2 + TestTurn_4_0 + TestAlone_4_1_3 + TestAlone_4_2_3 + TestAlone_4_3_3 + TestIdentity_4_1_0 + TestIdentity_4_0_0 + TestIdentity_4_2_0 + TestTurn_4_2 + TestTurn_4_1 + TestTurn_4_3 + TestIdentity_4_3_1 + TestIdentity_4_1_2 + TestIdentity_4_0_2 + TestIdentity_4_0_1 + TestIdentity_4_3_0 + TestIdentity_4_2_1 + TestIdentity_4_1_1 + TestIdentity_4_3_3 + TestIdentity_4_1_3 + TestIdentity_4_2_3 + TestIdentity_4_3_2 + TestIdentity_4_0_3 + TestIdentity_4_2_2 + TestIdentity_4_3_4 + TestIdentity_4_2_4 + TestIdentity_4_0_4 + TestIdentity_4_1_4 + AskForSection_4_3 + AskForSection_4_2 + AskForSection_4_1 + AskForSection_4_0 + Idle_4 + CS_4 = 1
invariant :WantSection_4_T + Idle_4 = 1
invariant :WantSection_2_T + Idle_2 = 1
invariant :IsEndLoop_3_0_0 + IsEndLoop_3_1_0 + IsEndLoop_3_2_0 + IsEndLoop_3_3_0 + IsEndLoop_3_0_1 + IsEndLoop_3_1_1 + IsEndLoop_3_2_1 + IsEndLoop_3_3_1 + IsEndLoop_3_0_2 + IsEndLoop_3_1_2 + IsEndLoop_3_2_2 + IsEndLoop_3_3_2 + IsEndLoop_3_1_3 + IsEndLoop_3_0_3 + IsEndLoop_3_2_3 + IsEndLoop_3_0_4 + IsEndLoop_3_3_3 + IsEndLoop_3_1_4 + IsEndLoop_3_3_4 + IsEndLoop_3_2_4 + EndTurn_3_1 + EndTurn_3_0 + EndTurn_3_2 + BeginLoop_3_0_0 + EndTurn_3_3 + BeginLoop_3_2_0 + BeginLoop_3_3_0 + BeginLoop_3_1_0 + BeginLoop_3_2_1 + BeginLoop_3_0_1 + BeginLoop_3_1_1 + BeginLoop_3_1_2 + BeginLoop_3_3_1 + BeginLoop_3_0_2 + BeginLoop_3_0_3 + BeginLoop_3_1_3 + BeginLoop_3_2_2 + BeginLoop_3_3_2 + BeginLoop_3_0_4 + BeginLoop_3_3_3 + BeginLoop_3_2_3 + BeginLoop_3_3_4 + BeginLoop_3_2_4 + BeginLoop_3_1_4 + TestAlone_3_1_0 + TestAlone_3_0_0 + TestAlone_3_1_1 + TestAlone_3_0_1 + TestAlone_3_3_0 + TestAlone_3_2_0 + TestAlone_3_2_2 + TestAlone_3_3_2 + TestAlone_3_2_1 + TestAlone_3_3_1 + TestAlone_3_0_2 + TestAlone_3_1_2 + TestAlone_3_1_4 + TestAlone_3_2_4 + TestAlone_3_3_4 + TestTurn_3_0 + TestAlone_3_0_4 + TestIdentity_3_1_0 + TestIdentity_3_0_0 + TestIdentity_3_3_0 + TestIdentity_3_2_0 + TestTurn_3_2 + TestTurn_3_1 + TestTurn_3_3 + TestIdentity_3_3_1 + TestIdentity_3_1_2 + TestIdentity_3_0_2 + TestIdentity_3_0_1 + TestIdentity_3_2_1 + TestIdentity_3_1_1 + TestIdentity_3_3_3 + TestIdentity_3_1_3 + TestIdentity_3_2_3 + TestIdentity_3_0_3 + TestIdentity_3_2_2 + TestIdentity_3_3_2 + TestIdentity_3_2_4 + TestIdentity_3_3_4 + TestIdentity_3_0_4 + TestIdentity_3_1_4 + AskForSection_3_3 + AskForSection_3_2 + AskForSection_3_1 + AskForSection_3_0 + Idle_3 + CS_3 = 1
invariant :WantSection_0_T + Idle_0 = 1
invariant :WantSection_1_T + Idle_1 = 1
invariant :Turn_2_2 + Turn_2_3 + Turn_2_0 + Turn_2_1 + Turn_2_4 = 1
invariant :IsEndLoop_2_0_0 + IsEndLoop_2_1_0 + IsEndLoop_2_2_0 + IsEndLoop_2_3_0 + IsEndLoop_2_0_1 + IsEndLoop_2_1_1 + IsEndLoop_2_2_1 + IsEndLoop_2_3_1 + IsEndLoop_2_0_2 + IsEndLoop_2_1_2 + IsEndLoop_2_2_2 + IsEndLoop_2_3_2 + IsEndLoop_2_1_3 + IsEndLoop_2_0_3 + IsEndLoop_2_2_3 + IsEndLoop_2_0_4 + IsEndLoop_2_3_3 + IsEndLoop_2_2_4 + IsEndLoop_2_1_4 + IsEndLoop_2_3_4 + EndTurn_2_1 + EndTurn_2_0 + EndTurn_2_2 + BeginLoop_2_0_0 + EndTurn_2_3 + BeginLoop_2_3_0 + BeginLoop_2_1_0 + BeginLoop_2_2_0 + BeginLoop_2_2_1 + BeginLoop_2_0_1 + BeginLoop_2_1_1 + BeginLoop_2_1_2 + BeginLoop_2_2_2 + BeginLoop_2_3_1 + BeginLoop_2_0_2 + BeginLoop_2_0_3 + BeginLoop_2_1_3 + BeginLoop_2_3_2 + BeginLoop_2_0_4 + BeginLoop_2_3_3 + BeginLoop_2_2_3 + BeginLoop_2_3_4 + BeginLoop_2_2_4 + BeginLoop_2_1_4 + TestAlone_2_1_0 + TestAlone_2_0_0 + TestAlone_2_1_1 + TestAlone_2_0_1 + TestAlone_2_3_0 + TestAlone_2_2_0 + TestAlone_2_0_3 + TestAlone_2_1_3 + TestAlone_2_2_1 + TestAlone_2_3_1 + TestAlone_2_2_4 + TestAlone_2_3_4 + TestTurn_2_0 + TestAlone_2_2_3 + TestAlone_2_3_3 + TestAlone_2_0_4 + TestAlone_2_1_4 + TestIdentity_2_1_0 + TestIdentity_2_3_0 + TestIdentity_2_2_0 + TestTurn_2_2 + TestTurn_2_1 + TestIdentity_2_0_0 + TestTurn_2_3 + TestIdentity_2_0_2 + TestIdentity_2_3_1 + TestIdentity_2_1_2 + TestIdentity_2_0_1 + TestIdentity_2_2_1 + TestIdentity_2_1_1 + TestIdentity_2_3_3 + TestIdentity_2_0_4 + TestIdentity_2_1_3 + TestIdentity_2_2_3 + TestIdentity_2_0_3 + TestIdentity_2_2_2 + TestIdentity_2_3_2 + TestIdentity_2_2_4 + TestIdentity_2_3_4 + TestIdentity_2_1_4 + AskForSection_2_3 + AskForSection_2_2 + AskForSection_2_1 + AskForSection_2_0 + Idle_2 + CS_2 = 1
invariant :Turn_3_1 + Turn_3_2 + Turn_3_0 + Turn_3_4 + Turn_3_3 = 1
invariant :WantSection_2_F + -1'Idle_2 = 0
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O3, model.c], workingDir=/home/mcc/execution]
Compilation finished in 9542 ms.
Running link step : CommandLine [args=[gcc, -shared, -o, gal.so, model.o], workingDir=/home/mcc/execution]
Link finished in 333 ms.
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, []((LTLAP0==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 1276 ms.
FORMULA Peterson-PT-4-LTLFireability-00 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X(<>((<>((LTLAP1==true)))U(X((LTLAP2==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 55 ms.
FORMULA Peterson-PT-4-LTLFireability-01 TRUE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, <>((LTLAP1==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 1239 ms.
FORMULA Peterson-PT-4-LTLFireability-02 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X(((LTLAP3==true))U(X(X((LTLAP4==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 86 ms.
FORMULA Peterson-PT-4-LTLFireability-03 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, ([](X([]((LTLAP5==true)))))U([]([]([]((LTLAP6==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 41 ms.
FORMULA Peterson-PT-4-LTLFireability-04 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, ([]([](X((LTLAP7==true)))))U([]([]([]((LTLAP8==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 41 ms.
FORMULA Peterson-PT-4-LTLFireability-05 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, []([](X(((LTLAP9==true))U((LTLAP1==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 65 ms.
FORMULA Peterson-PT-4-LTLFireability-06 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X(<>((<>((LTLAP6==true)))U((LTLAP5==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 127 ms.
FORMULA Peterson-PT-4-LTLFireability-07 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, <>([](<>(X(<>((LTLAP10==true)))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 49 ms.
FORMULA Peterson-PT-4-LTLFireability-08 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, (X(X(X((LTLAP11==true)))))U((LTLAP12==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 72 ms.
FORMULA Peterson-PT-4-LTLFireability-09 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, (([]((LTLAP13==true)))U((LTLAP14==true)))U((LTLAP15==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 1168 ms.
FORMULA Peterson-PT-4-LTLFireability-10 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, <>([](X(((LTLAP16==true))U((LTLAP17==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 37 ms.
FORMULA Peterson-PT-4-LTLFireability-11 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, (LTLAP18==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 1186 ms.
FORMULA Peterson-PT-4-LTLFireability-12 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, (<>([](X((LTLAP19==true)))))U((LTLAP20==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 71 ms.
FORMULA Peterson-PT-4-LTLFireability-13 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X((<>((LTLAP21==true)))U(((LTLAP22==true))U((LTLAP23==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 45 ms.
FORMULA Peterson-PT-4-LTLFireability-14 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, []([]([](X(<>((LTLAP24==true)))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 65 ms.
FORMULA Peterson-PT-4-LTLFireability-15 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
ITS tools runner thread asked to quit. Dying gracefully.
BK_STOP 1527490112823
--------------------
content from stderr:
+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution LTLFireability -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -consoleLog -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination LTLFireability -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
May 28, 2018 6:40:46 AM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, LTLFireability, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -smt]
May 28, 2018 6:40:46 AM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
May 28, 2018 6:40:46 AM fr.lip6.move.gal.nupn.PTNetReader loadFromXML
INFO: Load time of PNML (sax parser for PT used): 112 ms
May 28, 2018 6:40:46 AM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 480 places.
May 28, 2018 6:40:47 AM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 690 transitions.
May 28, 2018 6:40:47 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.img.gal : 39 ms
May 28, 2018 6:40:47 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 131 ms
May 28, 2018 6:40:47 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/LTLFireability.pnml.gal : 9 ms
May 28, 2018 6:40:47 AM fr.lip6.move.serialization.SerializationUtil serializePropertiesForITSLTLTools
INFO: Time to serialize properties into /home/mcc/execution/LTLFireability.ltl : 8 ms
May 28, 2018 6:40:47 AM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 690 transitions.
May 28, 2018 6:40:48 AM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 19 place invariants in 231 ms
May 28, 2018 6:40:49 AM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 480 variables to be positive in 929 ms
May 28, 2018 6:40:49 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may disable matrix : 690 transitions.
May 28, 2018 6:40:49 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of disable matrix completed :0/690 took 0 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 28, 2018 6:40:49 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete disable matrix. took 66 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 28, 2018 6:40:49 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may enable matrix : 690 transitions.
May 28, 2018 6:40:49 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete enable matrix. took 30 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 28, 2018 6:41:12 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeCoEnablingMatrix
INFO: Computing symmetric co enabling matrix : 690 transitions.
May 28, 2018 6:41:12 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(0/690) took 65 ms. Total solver calls (SAT/UNSAT): 137(0/137)
May 28, 2018 6:41:15 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(23/690) took 3106 ms. Total solver calls (SAT/UNSAT): 3241(0/3241)
May 28, 2018 6:41:19 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(64/690) took 7549 ms. Total solver calls (SAT/UNSAT): 8555(8/8547)
May 28, 2018 6:41:23 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(67/690) took 10802 ms. Total solver calls (SAT/UNSAT): 9041(29/9012)
May 28, 2018 6:41:27 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(71/690) took 14838 ms. Total solver calls (SAT/UNSAT): 9676(53/9623)
May 28, 2018 6:41:31 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(73/690) took 18814 ms. Total solver calls (SAT/UNSAT): 9987(68/9919)
May 28, 2018 6:41:34 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(76/690) took 22149 ms. Total solver calls (SAT/UNSAT): 10447(86/10361)
May 28, 2018 6:41:37 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(79/690) took 25681 ms. Total solver calls (SAT/UNSAT): 10897(101/10796)
May 28, 2018 6:41:42 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(89/690) took 30199 ms. Total solver calls (SAT/UNSAT): 12154(112/12042)
May 28, 2018 6:41:46 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(93/690) took 34457 ms. Total solver calls (SAT/UNSAT): 12727(137/12590)
May 28, 2018 6:41:49 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(99/690) took 37470 ms. Total solver calls (SAT/UNSAT): 13478(146/13332)
May 28, 2018 6:41:52 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(128/690) took 40533 ms. Total solver calls (SAT/UNSAT): 16803(146/16657)
May 28, 2018 6:41:58 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(145/690) took 46008 ms. Total solver calls (SAT/UNSAT): 18705(178/18527)
May 28, 2018 6:42:04 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(147/690) took 52547 ms. Total solver calls (SAT/UNSAT): 18953(210/18743)
May 28, 2018 6:42:09 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(154/690) took 56874 ms. Total solver calls (SAT/UNSAT): 19718(226/19492)
May 28, 2018 6:42:12 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(203/690) took 59909 ms. Total solver calls (SAT/UNSAT): 24695(226/24469)
May 28, 2018 6:42:16 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(242/690) took 64569 ms. Total solver calls (SAT/UNSAT): 28330(240/28090)
May 28, 2018 6:42:20 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(244/690) took 67731 ms. Total solver calls (SAT/UNSAT): 28532(267/28265)
May 28, 2018 6:42:23 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(245/690) took 70893 ms. Total solver calls (SAT/UNSAT): 28632(279/28353)
May 28, 2018 6:42:28 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(248/690) took 76142 ms. Total solver calls (SAT/UNSAT): 28932(318/28614)
May 28, 2018 6:42:33 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(250/690) took 81258 ms. Total solver calls (SAT/UNSAT): 29129(342/28787)
May 28, 2018 6:42:38 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(253/690) took 86424 ms. Total solver calls (SAT/UNSAT): 29424(379/29045)
May 28, 2018 6:42:41 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(254/690) took 89615 ms. Total solver calls (SAT/UNSAT): 29523(392/29131)
May 28, 2018 6:42:46 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(256/690) took 94207 ms. Total solver calls (SAT/UNSAT): 29718(418/29300)
May 28, 2018 6:42:50 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(257/690) took 98502 ms. Total solver calls (SAT/UNSAT): 29814(429/29385)
May 28, 2018 6:42:54 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(259/690) took 101745 ms. Total solver calls (SAT/UNSAT): 30008(453/29555)
May 28, 2018 6:42:58 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(261/690) took 106653 ms. Total solver calls (SAT/UNSAT): 30200(476/29724)
May 28, 2018 6:43:03 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(264/690) took 111387 ms. Total solver calls (SAT/UNSAT): 30484(508/29976)
May 28, 2018 6:43:07 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(267/690) took 115124 ms. Total solver calls (SAT/UNSAT): 30763(538/30225)
May 28, 2018 6:43:10 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(269/690) took 118339 ms. Total solver calls (SAT/UNSAT): 30946(555/30391)
May 28, 2018 6:43:14 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(271/690) took 121878 ms. Total solver calls (SAT/UNSAT): 31131(576/30555)
May 28, 2018 6:43:18 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(273/690) took 126430 ms. Total solver calls (SAT/UNSAT): 31312(593/30719)
May 28, 2018 6:43:23 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(282/690) took 130949 ms. Total solver calls (SAT/UNSAT): 32067(614/31453)
May 28, 2018 6:43:26 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(284/690) took 134493 ms. Total solver calls (SAT/UNSAT): 32243(631/31612)
May 28, 2018 6:43:31 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(288/690) took 138853 ms. Total solver calls (SAT/UNSAT): 32588(660/31928)
May 28, 2018 6:43:34 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(291/690) took 141854 ms. Total solver calls (SAT/UNSAT): 32845(681/32164)
May 28, 2018 6:43:37 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(295/690) took 145413 ms. Total solver calls (SAT/UNSAT): 33182(707/32475)
May 28, 2018 6:43:41 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(298/690) took 149300 ms. Total solver calls (SAT/UNSAT): 33437(732/32705)
May 28, 2018 6:43:45 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(300/690) took 153215 ms. Total solver calls (SAT/UNSAT): 33606(748/32858)
May 28, 2018 6:43:49 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(303/690) took 157343 ms. Total solver calls (SAT/UNSAT): 33855(768/33087)
May 28, 2018 6:43:54 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(307/690) took 161998 ms. Total solver calls (SAT/UNSAT): 34193(802/33391)
May 28, 2018 6:43:57 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(309/690) took 165598 ms. Total solver calls (SAT/UNSAT): 34368(823/33545)
May 28, 2018 6:44:01 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(311/690) took 169234 ms. Total solver calls (SAT/UNSAT): 34542(844/33698)
May 28, 2018 6:44:05 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(313/690) took 173572 ms. Total solver calls (SAT/UNSAT): 34715(865/33850)
May 28, 2018 6:44:10 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(316/690) took 178502 ms. Total solver calls (SAT/UNSAT): 34973(897/34076)
May 28, 2018 6:44:15 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(319/690) took 183095 ms. Total solver calls (SAT/UNSAT): 35228(928/34300)
May 28, 2018 6:44:20 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(321/690) took 187981 ms. Total solver calls (SAT/UNSAT): 35398(949/34449)
May 28, 2018 6:44:23 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(323/690) took 191415 ms. Total solver calls (SAT/UNSAT): 35563(967/34596)
May 28, 2018 6:44:26 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(325/690) took 194707 ms. Total solver calls (SAT/UNSAT): 35724(982/34742)
May 28, 2018 6:44:30 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(328/690) took 197788 ms. Total solver calls (SAT/UNSAT): 35965(1005/34960)
May 28, 2018 6:44:33 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(330/690) took 201248 ms. Total solver calls (SAT/UNSAT): 36127(1022/35105)
May 28, 2018 6:44:37 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(333/690) took 205189 ms. Total solver calls (SAT/UNSAT): 36366(1045/35321)
May 28, 2018 6:44:41 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(336/690) took 209147 ms. Total solver calls (SAT/UNSAT): 36608(1072/35536)
May 28, 2018 6:44:45 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(338/690) took 213431 ms. Total solver calls (SAT/UNSAT): 36763(1086/35677)
May 28, 2018 6:44:49 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(343/690) took 216875 ms. Total solver calls (SAT/UNSAT): 37125(1107/36018)
May 28, 2018 6:44:52 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(348/690) took 219943 ms. Total solver calls (SAT/UNSAT): 37478(1123/36355)
May 28, 2018 6:44:56 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(351/690) took 224278 ms. Total solver calls (SAT/UNSAT): 37693(1139/36554)
May 28, 2018 6:44:59 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(354/690) took 227537 ms. Total solver calls (SAT/UNSAT): 37908(1155/36753)
May 28, 2018 6:45:05 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(358/690) took 232747 ms. Total solver calls (SAT/UNSAT): 38206(1184/37022)
May 28, 2018 6:45:08 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(360/690) took 235889 ms. Total solver calls (SAT/UNSAT): 38351(1197/37154)
May 28, 2018 6:45:11 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(364/690) took 239481 ms. Total solver calls (SAT/UNSAT): 38627(1215/37412)
May 28, 2018 6:45:14 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(367/690) took 242545 ms. Total solver calls (SAT/UNSAT): 38830(1228/37602)
May 28, 2018 6:45:18 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(379/690) took 246682 ms. Total solver calls (SAT/UNSAT): 39600(1244/38356)
May 28, 2018 6:45:23 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(383/690) took 250852 ms. Total solver calls (SAT/UNSAT): 39861(1258/38603)
May 28, 2018 6:45:26 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(392/690) took 253877 ms. Total solver calls (SAT/UNSAT): 40407(1265/39142)
May 28, 2018 6:45:29 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(403/690) took 256991 ms. Total solver calls (SAT/UNSAT): 41054(1276/39778)
May 28, 2018 6:45:32 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(410/690) took 260575 ms. Total solver calls (SAT/UNSAT): 41476(1297/40179)
May 28, 2018 6:45:36 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(415/690) took 264251 ms. Total solver calls (SAT/UNSAT): 41778(1319/40459)
May 28, 2018 6:45:39 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(422/690) took 267325 ms. Total solver calls (SAT/UNSAT): 42178(1336/40842)
May 28, 2018 6:45:43 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(430/690) took 271017 ms. Total solver calls (SAT/UNSAT): 42611(1345/41266)
May 28, 2018 6:45:46 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(491/690) took 274044 ms. Total solver calls (SAT/UNSAT): 45373(1346/44027)
May 28, 2018 6:45:51 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(500/690) took 279006 ms. Total solver calls (SAT/UNSAT): 45833(1369/44464)
May 28, 2018 6:45:55 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(503/690) took 283559 ms. Total solver calls (SAT/UNSAT): 46057(1388/44669)
May 28, 2018 6:45:58 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(506/690) took 286609 ms. Total solver calls (SAT/UNSAT): 46277(1408/44869)
May 28, 2018 6:46:02 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(510/690) took 290343 ms. Total solver calls (SAT/UNSAT): 46555(1434/45121)
May 28, 2018 6:46:05 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(513/690) took 293551 ms. Total solver calls (SAT/UNSAT): 46754(1453/45301)
May 28, 2018 6:46:08 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(516/690) took 296689 ms. Total solver calls (SAT/UNSAT): 46966(1474/45492)
May 28, 2018 6:46:13 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(522/690) took 301033 ms. Total solver calls (SAT/UNSAT): 47364(1515/45849)
May 28, 2018 6:46:16 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(526/690) took 304619 ms. Total solver calls (SAT/UNSAT): 47609(1541/46068)
May 28, 2018 6:46:20 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(532/690) took 307974 ms. Total solver calls (SAT/UNSAT): 47992(1580/46412)
May 28, 2018 6:46:24 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(537/690) took 312041 ms. Total solver calls (SAT/UNSAT): 48322(1612/46710)
May 28, 2018 6:46:27 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(541/690) took 315098 ms. Total solver calls (SAT/UNSAT): 48569(1638/46931)
May 28, 2018 6:46:31 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(545/690) took 318997 ms. Total solver calls (SAT/UNSAT): 48796(1661/47135)
May 28, 2018 6:46:34 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(557/690) took 322280 ms. Total solver calls (SAT/UNSAT): 49149(1669/47480)
May 28, 2018 6:46:37 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(560/690) took 325297 ms. Total solver calls (SAT/UNSAT): 49304(1687/47617)
May 28, 2018 6:46:40 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(563/690) took 328311 ms. Total solver calls (SAT/UNSAT): 49448(1701/47747)
May 28, 2018 6:46:43 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(566/690) took 331416 ms. Total solver calls (SAT/UNSAT): 49585(1715/47870)
May 28, 2018 6:46:48 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(571/690) took 336370 ms. Total solver calls (SAT/UNSAT): 49795(1726/48069)
May 28, 2018 6:46:51 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(573/690) took 339544 ms. Total solver calls (SAT/UNSAT): 49871(1729/48142)
May 28, 2018 6:46:56 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(578/690) took 344706 ms. Total solver calls (SAT/UNSAT): 50002(1733/48269)
May 28, 2018 6:47:01 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(581/690) took 349283 ms. Total solver calls (SAT/UNSAT): 50106(1741/48365)
May 28, 2018 6:47:06 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(583/690) took 354549 ms. Total solver calls (SAT/UNSAT): 50205(1756/48449)
May 28, 2018 6:47:10 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(585/690) took 357816 ms. Total solver calls (SAT/UNSAT): 50281(1764/48517)
May 28, 2018 6:47:14 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(589/690) took 362404 ms. Total solver calls (SAT/UNSAT): 50464(1780/48684)
May 28, 2018 6:47:18 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(592/690) took 366654 ms. Total solver calls (SAT/UNSAT): 50587(1792/48795)
May 28, 2018 6:47:22 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(597/690) took 370238 ms. Total solver calls (SAT/UNSAT): 50751(1806/48945)
May 28, 2018 6:47:25 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(602/690) took 373284 ms. Total solver calls (SAT/UNSAT): 50911(1815/49096)
May 28, 2018 6:47:28 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(610/690) took 376341 ms. Total solver calls (SAT/UNSAT): 51121(1824/49297)
May 28, 2018 6:47:31 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(614/690) took 379702 ms. Total solver calls (SAT/UNSAT): 51203(1830/49373)
May 28, 2018 6:47:35 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(617/690) took 383275 ms. Total solver calls (SAT/UNSAT): 51255(1839/49416)
May 28, 2018 6:47:38 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(620/690) took 386612 ms. Total solver calls (SAT/UNSAT): 51347(1853/49494)
May 28, 2018 6:47:43 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(625/690) took 391365 ms. Total solver calls (SAT/UNSAT): 51520(1877/49643)
May 28, 2018 6:47:48 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(629/690) took 395747 ms. Total solver calls (SAT/UNSAT): 51641(1891/49750)
May 28, 2018 6:47:51 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(636/690) took 399069 ms. Total solver calls (SAT/UNSAT): 51803(1903/49900)
May 28, 2018 6:47:55 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(642/690) took 403386 ms. Total solver calls (SAT/UNSAT): 51918(1911/50007)
May 28, 2018 6:47:58 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(646/690) took 406395 ms. Total solver calls (SAT/UNSAT): 51975(1923/50052)
May 28, 2018 6:48:01 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(652/690) took 409643 ms. Total solver calls (SAT/UNSAT): 52085(1937/50148)
May 28, 2018 6:48:05 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(658/690) took 412959 ms. Total solver calls (SAT/UNSAT): 52188(1945/50243)
May 28, 2018 6:48:08 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(667/690) took 416227 ms. Total solver calls (SAT/UNSAT): 52327(1964/50363)
May 28, 2018 6:48:12 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(676/690) took 420024 ms. Total solver calls (SAT/UNSAT): 52412(1983/50429)
May 28, 2018 6:48:15 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(687/690) took 423304 ms. Total solver calls (SAT/UNSAT): 52464(1999/50465)
May 28, 2018 6:48:15 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Finished co-enabling matrix. took 423575 ms. Total solver calls (SAT/UNSAT): 52465(2000/50465)
May 28, 2018 6:48:15 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeDoNotAccord
INFO: Computing Do-Not-Accords matrix : 690 transitions.
May 28, 2018 6:48:16 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed DNA matrix. took 466 ms. Total solver calls (SAT/UNSAT): 80(0/80)
May 28, 2018 6:48:16 AM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 448919ms conformant to PINS in folder :/home/mcc/execution
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="Peterson-PT-4"
export BK_EXAMINATION="LTLFireability"
export BK_TOOL="itstools"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
tar xzf /home/mcc/BenchKit/INPUTS/Peterson-PT-4.tgz
mv Peterson-PT-4 execution
cd execution
pwd
ls -lh
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3637"
echo " Executing tool itstools"
echo " Input is Peterson-PT-4, examination is LTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r260-csrt-152732585400164"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;