Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Waiting for the VM to be ready (probing ssh)
.................................................................
/home/mcc/execution
total 212K
-rw-r--r-- 1 mcc users 3.7K May 15 18:54 CTLCardinality.txt
-rw-r--r-- 1 mcc users 19K May 15 18:54 CTLCardinality.xml
-rw-r--r-- 1 mcc users 3.0K May 15 18:54 CTLFireability.txt
-rw-r--r-- 1 mcc users 21K May 15 18:54 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K May 15 18:50 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.0K May 15 18:50 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 2.2K May 26 09:26 LTLCardinality.txt
-rw-r--r-- 1 mcc users 8.0K May 26 09:26 LTLCardinality.xml
-rw-r--r-- 1 mcc users 1.9K May 26 09:26 LTLFireability.txt
-rw-r--r-- 1 mcc users 8.8K May 26 09:26 LTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K May 15 18:54 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 20K May 15 18:54 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 105 May 15 18:54 ReachabilityDeadlock.txt
-rw-r--r-- 1 mcc users 343 May 15 18:54 ReachabilityDeadlock.xml
-rw-r--r-- 1 mcc users 2.8K May 15 18:54 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 15K May 15 18:54 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K May 15 18:54 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.7K May 15 18:54 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 May 15 18:50 equiv_pt
-rw-r--r-- 1 mcc users 2 May 15 18:50 instance
-rw-r--r-- 1 mcc users 5 May 15 18:50 iscolored
-rw-r--r-- 1 mcc users 47K May 15 18:50 model.pnml
=====================================================================
Generated by BenchKit 2-3637
Executing tool itstools
Input is Peterson-COL-7, examination is LTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r260-csrt-152732585400158
=====================================================================

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME Peterson-COL-7-LTLFireability-00
FORMULA_NAME Peterson-COL-7-LTLFireability-01
FORMULA_NAME Peterson-COL-7-LTLFireability-02
FORMULA_NAME Peterson-COL-7-LTLFireability-03
FORMULA_NAME Peterson-COL-7-LTLFireability-04
FORMULA_NAME Peterson-COL-7-LTLFireability-05
FORMULA_NAME Peterson-COL-7-LTLFireability-06
FORMULA_NAME Peterson-COL-7-LTLFireability-07
FORMULA_NAME Peterson-COL-7-LTLFireability-08
FORMULA_NAME Peterson-COL-7-LTLFireability-09
FORMULA_NAME Peterson-COL-7-LTLFireability-10
FORMULA_NAME Peterson-COL-7-LTLFireability-11
FORMULA_NAME Peterson-COL-7-LTLFireability-12
FORMULA_NAME Peterson-COL-7-LTLFireability-13
FORMULA_NAME Peterson-COL-7-LTLFireability-14
FORMULA_NAME Peterson-COL-7-LTLFireability-15

=== Now, execution of the tool begins

BK_START 1527489492179

06:38:14.533 [main] ERROR PNML validation - The rng grammar file can't be accessed : www.pnml.org
06:38:14.536 [main] ERROR import - Grammar file errors have been raised, the validation can't be done, process will continue without Grammar validation
Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805151631/bin/its-ltl-linux64, --gc-threshold, 2000000, -i, /home/mcc/execution/LTLFireability.pnml.gal, -t, CGAL, -LTL, /home/mcc/execution/LTLFireability.ltl, -c, -stutter-deadlock], workingDir=/home/mcc/execution]

its-ltl command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805151631/bin/its-ltl-linux64 --gc-threshold 2000000 -i /home/mcc/execution/LTLFireability.pnml.gal -t CGAL -LTL /home/mcc/execution/LTLFireability.ltl -c -stutter-deadlock
Read 16 LTL properties
Checking formula 0 : !((("(((((((((Process0.idle_0>=1)&&(ProcBool0.wantSection_0>=1))||((Process1.idle_1>=1)&&(ProcBool2.wantSection_2>=1)))||((Process2.idle_2>=1)&&(ProcBool4.wantSection_4>=1)))||((Process3.idle_3>=1)&&(ProcBool6.wantSection_6>=1)))||((Process4.idle_4>=1)&&(ProcBool8.wantSection_8>=1)))||((Process5.idle_5>=1)&&(ProcBool10.wantSection_10>=1)))||((Process6.idle_6>=1)&&(ProcBool12.wantSection_12>=1)))||((Process7.idle_7>=1)&&(ProcBool14.wantSection_14>=1)))")U("(((((((((((((((((((((((((((((((((((((((((((((((((((((((((TourProc0.turn_0>=1)&&(ProcTour0.testTurn_0>=1))||((TourProc1.turn_1>=1)&&(ProcTour7.testTurn_7>=1)))||((TourProc2.turn_2>=1)&&(ProcTour14.testTurn_14>=1)))||((TourProc3.turn_3>=1)&&(ProcTour21.testTurn_21>=1)))||((TourProc4.turn_4>=1)&&(ProcTour28.testTurn_28>=1)))||((TourProc5.turn_5>=1)&&(ProcTour35.testTurn_35>=1)))||((TourProc6.turn_6>=1)&&(ProcTour42.testTurn_42>=1)))||((TourProc7.turn_7>=1)&&(ProcTour49.testTurn_49>=1)))||((TourProc8.turn_8>=1)&&(ProcTour1.testTurn_1>=1)))||((TourProc9.turn_9>=1)&&(ProcTour8.testTurn_8>=1)))||((TourProc10.turn_10>=1)&&(ProcTour15.testTurn_15>=1)))||((TourProc11.turn_11>=1)&&(ProcTour22.testTurn_22>=1)))||((TourProc12.turn_12>=1)&&(ProcTour29.testTurn_29>=1)))||((TourProc13.turn_13>=1)&&(ProcTour36.testTurn_36>=1)))||((TourProc14.turn_14>=1)&&(ProcTour43.testTurn_43>=1)))||((TourProc15.turn_15>=1)&&(ProcTour50.testTurn_50>=1)))||((TourProc16.turn_16>=1)&&(ProcTour2.testTurn_2>=1)))||((TourProc17.turn_17>=1)&&(ProcTour9.testTurn_9>=1)))||((TourProc18.turn_18>=1)&&(ProcTour16.testTurn_16>=1)))||((TourProc19.turn_19>=1)&&(ProcTour23.testTurn_23>=1)))||((TourProc20.turn_20>=1)&&(ProcTour30.testTurn_30>=1)))||((TourProc21.turn_21>=1)&&(ProcTour37.testTurn_37>=1)))||((TourProc22.turn_22>=1)&&(ProcTour44.testTurn_44>=1)))||((TourProc23.turn_23>=1)&&(ProcTour51.testTurn_51>=1)))||((TourProc24.turn_24>=1)&&(ProcTour3.testTurn_3>=1)))||((TourProc25.turn_25>=1)&&(ProcTour10.testTurn_10>=1)))||((TourProc26.turn_26>=1)&&(ProcTour17.testTurn_17>=1)))||((TourProc27.turn_27>=1)&&(ProcTour24.testTurn_24>=1)))||((TourProc28.turn_28>=1)&&(ProcTour31.testTurn_31>=1)))||((TourProc29.turn_29>=1)&&(ProcTour38.testTurn_38>=1)))||((TourProc30.turn_30>=1)&&(ProcTour45.testTurn_45>=1)))||((TourProc31.turn_31>=1)&&(ProcTour52.testTurn_52>=1)))||((TourProc32.turn_32>=1)&&(ProcTour4.testTurn_4>=1)))||((TourProc33.turn_33>=1)&&(ProcTour11.testTurn_11>=1)))||((TourProc34.turn_34>=1)&&(ProcTour18.testTurn_18>=1)))||((TourProc35.turn_35>=1)&&(ProcTour25.testTurn_25>=1)))||((TourProc36.turn_36>=1)&&(ProcTour32.testTurn_32>=1)))||((TourProc37.turn_37>=1)&&(ProcTour39.testTurn_39>=1)))||((TourProc38.turn_38>=1)&&(ProcTour46.testTurn_46>=1)))||((TourProc39.turn_39>=1)&&(ProcTour53.testTurn_53>=1)))||((TourProc40.turn_40>=1)&&(ProcTour5.testTurn_5>=1)))||((TourProc41.turn_41>=1)&&(ProcTour12.testTurn_12>=1)))||((TourProc42.turn_42>=1)&&(ProcTour19.testTurn_19>=1)))||((TourProc43.turn_43>=1)&&(ProcTour26.testTurn_26>=1)))||((TourProc44.turn_44>=1)&&(ProcTour33.testTurn_33>=1)))||((TourProc45.turn_45>=1)&&(ProcTour40.testTurn_40>=1)))||((TourProc46.turn_46>=1)&&(ProcTour47.testTurn_47>=1)))||((TourProc47.turn_47>=1)&&(ProcTour54.testTurn_54>=1)))||((TourProc48.turn_48>=1)&&(ProcTour6.testTurn_6>=1)))||((TourProc49.turn_49>=1)&&(ProcTour13.testTurn_13>=1)))||((TourProc50.turn_50>=1)&&(ProcTour20.testTurn_20>=1)))||((TourProc51.turn_51>=1)&&(ProcTour27.testTurn_27>=1)))||((TourProc52.turn_52>=1)&&(ProcTour34.testTurn_34>=1)))||((TourProc53.turn_53>=1)&&(ProcTour41.testTurn_41>=1)))||((TourProc54.turn_54>=1)&&(ProcTour48.testTurn_48>=1)))||((TourProc55.turn_55>=1)&&(ProcTour55.testTurn_55>=1)))")))
Formula 0 simplified : !("(((((((((Process0.idle_0>=1)&&(ProcBool0.wantSection_0>=1))||((Process1.idle_1>=1)&&(ProcBool2.wantSection_2>=1)))||((Process2.idle_2>=1)&&(ProcBool4.wantSection_4>=1)))||((Process3.idle_3>=1)&&(ProcBool6.wantSection_6>=1)))||((Process4.idle_4>=1)&&(ProcBool8.wantSection_8>=1)))||((Process5.idle_5>=1)&&(ProcBool10.wantSection_10>=1)))||((Process6.idle_6>=1)&&(ProcBool12.wantSection_12>=1)))||((Process7.idle_7>=1)&&(ProcBool14.wantSection_14>=1)))" U "(((((((((((((((((((((((((((((((((((((((((((((((((((((((((TourProc0.turn_0>=1)&&(ProcTour0.testTurn_0>=1))||((TourProc1.turn_1>=1)&&(ProcTour7.testTurn_7>=1)))||((TourProc2.turn_2>=1)&&(ProcTour14.testTurn_14>=1)))||((TourProc3.turn_3>=1)&&(ProcTour21.testTurn_21>=1)))||((TourProc4.turn_4>=1)&&(ProcTour28.testTurn_28>=1)))||((TourProc5.turn_5>=1)&&(ProcTour35.testTurn_35>=1)))||((TourProc6.turn_6>=1)&&(ProcTour42.testTurn_42>=1)))||((TourProc7.turn_7>=1)&&(ProcTour49.testTurn_49>=1)))||((TourProc8.turn_8>=1)&&(ProcTour1.testTurn_1>=1)))||((TourProc9.turn_9>=1)&&(ProcTour8.testTurn_8>=1)))||((TourProc10.turn_10>=1)&&(ProcTour15.testTurn_15>=1)))||((TourProc11.turn_11>=1)&&(ProcTour22.testTurn_22>=1)))||((TourProc12.turn_12>=1)&&(ProcTour29.testTurn_29>=1)))||((TourProc13.turn_13>=1)&&(ProcTour36.testTurn_36>=1)))||((TourProc14.turn_14>=1)&&(ProcTour43.testTurn_43>=1)))||((TourProc15.turn_15>=1)&&(ProcTour50.testTurn_50>=1)))||((TourProc16.turn_16>=1)&&(ProcTour2.testTurn_2>=1)))||((TourProc17.turn_17>=1)&&(ProcTour9.testTurn_9>=1)))||((TourProc18.turn_18>=1)&&(ProcTour16.testTurn_16>=1)))||((TourProc19.turn_19>=1)&&(ProcTour23.testTurn_23>=1)))||((TourProc20.turn_20>=1)&&(ProcTour30.testTurn_30>=1)))||((TourProc21.turn_21>=1)&&(ProcTour37.testTurn_37>=1)))||((TourProc22.turn_22>=1)&&(ProcTour44.testTurn_44>=1)))||((TourProc23.turn_23>=1)&&(ProcTour51.testTurn_51>=1)))||((TourProc24.turn_24>=1)&&(ProcTour3.testTurn_3>=1)))||((TourProc25.turn_25>=1)&&(ProcTour10.testTurn_10>=1)))||((TourProc26.turn_26>=1)&&(ProcTour17.testTurn_17>=1)))||((TourProc27.turn_27>=1)&&(ProcTour24.testTurn_24>=1)))||((TourProc28.turn_28>=1)&&(ProcTour31.testTurn_31>=1)))||((TourProc29.turn_29>=1)&&(ProcTour38.testTurn_38>=1)))||((TourProc30.turn_30>=1)&&(ProcTour45.testTurn_45>=1)))||((TourProc31.turn_31>=1)&&(ProcTour52.testTurn_52>=1)))||((TourProc32.turn_32>=1)&&(ProcTour4.testTurn_4>=1)))||((TourProc33.turn_33>=1)&&(ProcTour11.testTurn_11>=1)))||((TourProc34.turn_34>=1)&&(ProcTour18.testTurn_18>=1)))||((TourProc35.turn_35>=1)&&(ProcTour25.testTurn_25>=1)))||((TourProc36.turn_36>=1)&&(ProcTour32.testTurn_32>=1)))||((TourProc37.turn_37>=1)&&(ProcTour39.testTurn_39>=1)))||((TourProc38.turn_38>=1)&&(ProcTour46.testTurn_46>=1)))||((TourProc39.turn_39>=1)&&(ProcTour53.testTurn_53>=1)))||((TourProc40.turn_40>=1)&&(ProcTour5.testTurn_5>=1)))||((TourProc41.turn_41>=1)&&(ProcTour12.testTurn_12>=1)))||((TourProc42.turn_42>=1)&&(ProcTour19.testTurn_19>=1)))||((TourProc43.turn_43>=1)&&(ProcTour26.testTurn_26>=1)))||((TourProc44.turn_44>=1)&&(ProcTour33.testTurn_33>=1)))||((TourProc45.turn_45>=1)&&(ProcTour40.testTurn_40>=1)))||((TourProc46.turn_46>=1)&&(ProcTour47.testTurn_47>=1)))||((TourProc47.turn_47>=1)&&(ProcTour54.testTurn_54>=1)))||((TourProc48.turn_48>=1)&&(ProcTour6.testTurn_6>=1)))||((TourProc49.turn_49>=1)&&(ProcTour13.testTurn_13>=1)))||((TourProc50.turn_50>=1)&&(ProcTour20.testTurn_20>=1)))||((TourProc51.turn_51>=1)&&(ProcTour27.testTurn_27>=1)))||((TourProc52.turn_52>=1)&&(ProcTour34.testTurn_34>=1)))||((TourProc53.turn_53>=1)&&(ProcTour41.testTurn_41>=1)))||((TourProc54.turn_54>=1)&&(ProcTour48.testTurn_48>=1)))||((TourProc55.turn_55>=1)&&(ProcTour55.testTurn_55>=1)))")
built 2313 ordering constraints for composite.
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O3, model.c], workingDir=/home/mcc/execution]
Compilation finished in 36945 ms.
Running link step : CommandLine [args=[gcc, -shared, -o, gal.so, model.o], workingDir=/home/mcc/execution]
Link finished in 322 ms.
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, ((LTLAP0==true))U((LTLAP1==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
WARNING : LTSmin timed out (>225 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, ((LTLAP0==true))U((LTLAP1==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X(X(X(<>(X((LTLAP2==true)))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
WARNING : LTSmin timed out (>225 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X(X(X(<>(X((LTLAP2==true)))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, <>([](X(X(X((LTLAP3==true)))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
WARNING : LTS min runner thread failed on error :java.lang.RuntimeException: Unexpected exception when executing ltsmin :CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, <>([](X(X(X((LTLAP3==true)))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
255
sparsehash FATAL ERROR: failed to allocate 36 groups

BK_STOP 1527490055261

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution LTLFireability -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -consoleLog -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination LTLFireability -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
May 28, 2018 6:38:14 AM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, LTLFireability, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -smt]
May 28, 2018 6:38:14 AM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
May 28, 2018 6:38:14 AM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Detected file is not PT type :http://www.pnml.org/version-2009/grammar/symmetricnet
May 28, 2018 6:38:14 AM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Load time of PNML (colored model parsed with PNMLFW) : 837 ms
May 28, 2018 6:38:14 AM fr.lip6.move.gal.pnml.togal.HLGALTransformer handlePage
INFO: Transformed 11 places.
May 28, 2018 6:38:14 AM fr.lip6.move.gal.pnml.togal.HLGALTransformer handlePage
INFO: Computed order using colors.
May 28, 2018 6:38:14 AM fr.lip6.move.gal.pnml.togal.HLGALTransformer handlePage
INFO: sort/places :ProcTourProc->beginLoop,testIdentity,testAlone,isEndLoop,
ProcBool->wantSection,
ProcTour->askForSection,testTurn,endTurn,
TourProc->turn,
Process->idle,CS,

May 28, 2018 6:38:15 AM fr.lip6.move.gal.pnml.togal.HLGALTransformer handlePage
INFO: Transformed 14 transitions.
May 28, 2018 6:38:15 AM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Computed order based on color domains.
May 28, 2018 6:38:15 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.img.gal : 9 ms
May 28, 2018 6:38:15 AM fr.lip6.move.gal.application.MccTranslator applyOrder
INFO: Applying decomposition
May 28, 2018 6:38:15 AM fr.lip6.move.gal.instantiate.CompositeBuilder decomposeWithOrder
INFO: Decomposing Gal with order
May 28, 2018 6:38:15 AM fr.lip6.move.gal.instantiate.Instantiator instantiateParameters
INFO: On-the-fly reduction of False transitions avoided exploring 176.0 instantiations of transitions. Total transitions/syncs built is 3216
May 28, 2018 6:38:16 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 450 ms
May 28, 2018 6:38:19 AM fr.lip6.move.gal.instantiate.CompositeBuilder rewriteArraysToAllowPartition
INFO: Rewriting arrays idle, wantSection, askForSection, turn, testTurn, beginLoop, endTurn, CS, testIdentity, testAlone, isEndLoop to variables to allow decomposition.
May 28, 2018 6:38:19 AM fr.lip6.move.gal.instantiate.Instantiator fuseIsomorphicEffects
INFO: Removed a total of 3120 redundant transitions.
May 28, 2018 6:38:20 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/LTLFireability.pnml.gal : 76 ms
May 28, 2018 6:38:20 AM fr.lip6.move.serialization.SerializationUtil serializePropertiesForITSLTLTools
INFO: Time to serialize properties into /home/mcc/execution/LTLFireability.ltl : 34 ms
May 28, 2018 6:38:21 AM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was not deterministic with 3168 transitions. Expanding to a total of 3216 deterministic transitions.
May 28, 2018 6:38:21 AM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Determinization took 14 ms.
May 28, 2018 6:38:21 AM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Too many transitions (3208) to apply POR reductions. Disabling POR matrices.
May 28, 2018 6:38:21 AM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 926ms conformant to PINS in folder :/home/mcc/execution
pins2lts-mc, 0.000: Registering PINS so language module
pins2lts-mc, 0.000, ** error **: out of memory trying to get 4294967296
java.lang.RuntimeException: Unexpected exception when executing ltsmin :CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, <>([](X(X(X((LTLAP3==true)))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
255
at fr.lip6.move.gal.application.LTSminRunner.checkProperty(LTSminRunner.java:167)
at fr.lip6.move.gal.application.LTSminRunner.access$9(LTSminRunner.java:122)
at fr.lip6.move.gal.application.LTSminRunner$1.run(LTSminRunner.java:91)
at java.lang.Thread.run(Thread.java:748)
ITS-tools command line returned an error code 1

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="Peterson-COL-7"
export BK_EXAMINATION="LTLFireability"
export BK_TOOL="itstools"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

tar xzf /home/mcc/BenchKit/INPUTS/Peterson-COL-7.tgz
mv Peterson-COL-7 execution
cd execution
pwd
ls -lh

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3637"
echo " Executing tool itstools"
echo " Input is Peterson-COL-7, examination is LTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r260-csrt-152732585400158"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' LTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;