Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Waiting for the VM to be ready (probing ssh)
.................................................
/home/mcc/execution
total 212K
-rw-r--r-- 1 mcc users 3.9K May 15 18:54 CTLCardinality.txt
-rw-r--r-- 1 mcc users 21K May 15 18:54 CTLCardinality.xml
-rw-r--r-- 1 mcc users 2.6K May 15 18:54 CTLFireability.txt
-rw-r--r-- 1 mcc users 16K May 15 18:54 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K May 15 18:50 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.0K May 15 18:50 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 2.4K May 26 09:26 LTLCardinality.txt
-rw-r--r-- 1 mcc users 11K May 26 09:26 LTLCardinality.xml
-rw-r--r-- 1 mcc users 1.9K May 26 09:26 LTLFireability.txt
-rw-r--r-- 1 mcc users 9.2K May 26 09:26 LTLFireability.xml
-rw-r--r-- 1 mcc users 3.6K May 15 18:54 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 17K May 15 18:54 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 105 May 15 18:54 ReachabilityDeadlock.txt
-rw-r--r-- 1 mcc users 343 May 15 18:54 ReachabilityDeadlock.xml
-rw-r--r-- 1 mcc users 3.3K May 15 18:54 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 20K May 15 18:54 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K May 15 18:54 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.7K May 15 18:54 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 May 15 18:50 equiv_pt
-rw-r--r-- 1 mcc users 2 May 15 18:50 instance
-rw-r--r-- 1 mcc users 5 May 15 18:50 iscolored
-rw-r--r-- 1 mcc users 43K May 15 18:50 model.pnml
=====================================================================
Generated by BenchKit 2-3637
Executing tool itstools
Input is Peterson-COL-3, examination is LTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r260-csrt-152732585400150
=====================================================================

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME Peterson-COL-3-LTLFireability-00
FORMULA_NAME Peterson-COL-3-LTLFireability-01
FORMULA_NAME Peterson-COL-3-LTLFireability-02
FORMULA_NAME Peterson-COL-3-LTLFireability-03
FORMULA_NAME Peterson-COL-3-LTLFireability-04
FORMULA_NAME Peterson-COL-3-LTLFireability-05
FORMULA_NAME Peterson-COL-3-LTLFireability-06
FORMULA_NAME Peterson-COL-3-LTLFireability-07
FORMULA_NAME Peterson-COL-3-LTLFireability-08
FORMULA_NAME Peterson-COL-3-LTLFireability-09
FORMULA_NAME Peterson-COL-3-LTLFireability-10
FORMULA_NAME Peterson-COL-3-LTLFireability-11
FORMULA_NAME Peterson-COL-3-LTLFireability-12
FORMULA_NAME Peterson-COL-3-LTLFireability-13
FORMULA_NAME Peterson-COL-3-LTLFireability-14
FORMULA_NAME Peterson-COL-3-LTLFireability-15

=== Now, execution of the tool begins

BK_START 1527489046953

06:30:49.180 [main] ERROR PNML validation - The rng grammar file can't be accessed : www.pnml.org
06:30:49.182 [main] ERROR import - Grammar file errors have been raised, the validation can't be done, process will continue without Grammar validation
Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805151631/bin/its-ltl-linux64, --gc-threshold, 2000000, -i, /home/mcc/execution/LTLFireability.pnml.gal, -t, CGAL, -LTL, /home/mcc/execution/LTLFireability.ltl, -c, -stutter-deadlock], workingDir=/home/mcc/execution]

its-ltl command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201805151631/bin/its-ltl-linux64 --gc-threshold 2000000 -i /home/mcc/execution/LTLFireability.pnml.gal -t CGAL -LTL /home/mcc/execution/LTLFireability.ltl -c -stutter-deadlock
Read 16 LTL properties
Checking formula 0 : !(("(((((ProcBool0.wantSection_0>=1)&&(Process0.idle_0>=1))||((ProcBool2.wantSection_2>=1)&&(Process1.idle_1>=1)))||((ProcBool4.wantSection_4>=1)&&(Process2.idle_2>=1)))||((ProcBool6.wantSection_6>=1)&&(Process3.idle_3>=1)))"))
Formula 0 simplified : !"(((((ProcBool0.wantSection_0>=1)&&(Process0.idle_0>=1))||((ProcBool2.wantSection_2>=1)&&(Process1.idle_1>=1)))||((ProcBool4.wantSection_4>=1)&&(Process2.idle_2>=1)))||((ProcBool6.wantSection_6>=1)&&(Process3.idle_3>=1)))"
built 261 ordering constraints for composite.
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
Normalized transition count is 332
// Phase 1: matrix 332 rows 256 cols
invariant :ProcBool4:wantSection_4 + -1'Process2:idle_2 = 0
invariant :TourProc8:turn_8 + TourProc9:turn_9 + TourProc10:turn_10 + TourProc11:turn_11 = 1
invariant :TourProc0:turn_0 + TourProc1:turn_1 + TourProc2:turn_2 + TourProc3:turn_3 = 1
invariant :ProcBool2:wantSection_2 + -1'Process1:idle_1 = 0
invariant :ProcTourProc36:beginLoop_36 + ProcTourProc36:testIdentity_36 + ProcTourProc36:testAlone_36 + ProcTourProc36:isEndLoop_36 + ProcTourProc37:beginLoop_37 + ProcTourProc37:testIdentity_37 + ProcTourProc37:testAlone_37 + ProcTourProc37:isEndLoop_37 + ProcTourProc38:beginLoop_38 + ProcTourProc38:testIdentity_38 + ProcTourProc38:testAlone_38 + ProcTourProc38:isEndLoop_38 + ProcTourProc39:beginLoop_39 + ProcTourProc39:testIdentity_39 + ProcTourProc39:testAlone_39 + ProcTourProc39:isEndLoop_39 + ProcTourProc40:beginLoop_40 + ProcTourProc40:testIdentity_40 + ProcTourProc40:testAlone_40 + ProcTourProc40:isEndLoop_40 + ProcTourProc41:beginLoop_41 + ProcTourProc41:testIdentity_41 + ProcTourProc41:testAlone_41 + ProcTourProc41:isEndLoop_41 + ProcTourProc42:beginLoop_42 + ProcTourProc42:testIdentity_42 + ProcTourProc42:testAlone_42 + ProcTourProc42:isEndLoop_42 + ProcTourProc43:beginLoop_43 + ProcTourProc43:testIdentity_43 + ProcTourProc43:testAlone_43 + ProcTourProc43:isEndLoop_43 + ProcTourProc44:beginLoop_44 + ProcTourProc44:testIdentity_44 + ProcTourProc44:testAlone_44 + ProcTourProc44:isEndLoop_44 + ProcTourProc45:beginLoop_45 + ProcTourProc45:testIdentity_45 + ProcTourProc45:testAlone_45 + ProcTourProc45:isEndLoop_45 + ProcTourProc46:beginLoop_46 + ProcTourProc46:testIdentity_46 + ProcTourProc46:testAlone_46 + ProcTourProc46:isEndLoop_46 + ProcTourProc47:beginLoop_47 + ProcTourProc47:testIdentity_47 + ProcTourProc47:testAlone_47 + ProcTourProc47:isEndLoop_47 + ProcTour9:askForSection_9 + ProcTour9:testTurn_9 + ProcTour9:endTurn_9 + ProcTour10:askForSection_10 + ProcTour10:testTurn_10 + ProcTour10:endTurn_10 + ProcTour11:askForSection_11 + ProcTour11:testTurn_11 + ProcTour11:endTurn_11 + Process3:idle_3 + Process3:CS_3 = 1
invariant :ProcBool3:wantSection_3 + Process1:idle_1 = 1
invariant :TourProc4:turn_4 + TourProc5:turn_5 + TourProc6:turn_6 + TourProc7:turn_7 = 1
invariant :ProcBool6:wantSection_6 + -1'Process3:idle_3 = 0
invariant :ProcTourProc0:beginLoop_0 + ProcTourProc0:testIdentity_0 + ProcTourProc0:testAlone_0 + ProcTourProc0:isEndLoop_0 + ProcTourProc1:beginLoop_1 + ProcTourProc1:testIdentity_1 + ProcTourProc1:testAlone_1 + ProcTourProc1:isEndLoop_1 + ProcTourProc2:beginLoop_2 + ProcTourProc2:testIdentity_2 + ProcTourProc2:testAlone_2 + ProcTourProc2:isEndLoop_2 + ProcTourProc3:beginLoop_3 + ProcTourProc3:testIdentity_3 + ProcTourProc3:testAlone_3 + ProcTourProc3:isEndLoop_3 + ProcTourProc4:beginLoop_4 + ProcTourProc4:testIdentity_4 + ProcTourProc4:testAlone_4 + ProcTourProc4:isEndLoop_4 + ProcTourProc5:beginLoop_5 + ProcTourProc5:testIdentity_5 + ProcTourProc5:testAlone_5 + ProcTourProc5:isEndLoop_5 + ProcTourProc6:beginLoop_6 + ProcTourProc6:testIdentity_6 + ProcTourProc6:testAlone_6 + ProcTourProc6:isEndLoop_6 + ProcTourProc7:beginLoop_7 + ProcTourProc7:testIdentity_7 + ProcTourProc7:testAlone_7 + ProcTourProc7:isEndLoop_7 + ProcTourProc8:beginLoop_8 + ProcTourProc8:testIdentity_8 + ProcTourProc8:testAlone_8 + ProcTourProc8:isEndLoop_8 + ProcTourProc9:beginLoop_9 + ProcTourProc9:testIdentity_9 + ProcTourProc9:testAlone_9 + ProcTourProc9:isEndLoop_9 + ProcTourProc10:beginLoop_10 + ProcTourProc10:testIdentity_10 + ProcTourProc10:testAlone_10 + ProcTourProc10:isEndLoop_10 + ProcTourProc11:beginLoop_11 + ProcTourProc11:testIdentity_11 + ProcTourProc11:testAlone_11 + ProcTourProc11:isEndLoop_11 + ProcTour0:askForSection_0 + ProcTour0:testTurn_0 + ProcTour0:endTurn_0 + ProcTour1:askForSection_1 + ProcTour1:testTurn_1 + ProcTour1:endTurn_1 + ProcTour2:askForSection_2 + ProcTour2:testTurn_2 + ProcTour2:endTurn_2 + Process0:idle_0 + Process0:CS_0 = 1
invariant :ProcBool1:wantSection_1 + Process0:idle_0 = 1
invariant :ProcBool7:wantSection_7 + Process3:idle_3 = 1
invariant :ProcBool5:wantSection_5 + Process2:idle_2 = 1
invariant :ProcTourProc24:beginLoop_24 + ProcTourProc24:testIdentity_24 + ProcTourProc24:testAlone_24 + ProcTourProc24:isEndLoop_24 + ProcTourProc25:beginLoop_25 + ProcTourProc25:testIdentity_25 + ProcTourProc25:testAlone_25 + ProcTourProc25:isEndLoop_25 + ProcTourProc26:beginLoop_26 + ProcTourProc26:testIdentity_26 + ProcTourProc26:testAlone_26 + ProcTourProc26:isEndLoop_26 + ProcTourProc27:beginLoop_27 + ProcTourProc27:testIdentity_27 + ProcTourProc27:testAlone_27 + ProcTourProc27:isEndLoop_27 + ProcTourProc28:beginLoop_28 + ProcTourProc28:testIdentity_28 + ProcTourProc28:testAlone_28 + ProcTourProc28:isEndLoop_28 + ProcTourProc29:beginLoop_29 + ProcTourProc29:testIdentity_29 + ProcTourProc29:testAlone_29 + ProcTourProc29:isEndLoop_29 + ProcTourProc30:beginLoop_30 + ProcTourProc30:testIdentity_30 + ProcTourProc30:testAlone_30 + ProcTourProc30:isEndLoop_30 + ProcTourProc31:beginLoop_31 + ProcTourProc31:testIdentity_31 + ProcTourProc31:testAlone_31 + ProcTourProc31:isEndLoop_31 + ProcTourProc32:beginLoop_32 + ProcTourProc32:testIdentity_32 + ProcTourProc32:testAlone_32 + ProcTourProc32:isEndLoop_32 + ProcTourProc33:beginLoop_33 + ProcTourProc33:testIdentity_33 + ProcTourProc33:testAlone_33 + ProcTourProc33:isEndLoop_33 + ProcTourProc34:beginLoop_34 + ProcTourProc34:testIdentity_34 + ProcTourProc34:testAlone_34 + ProcTourProc34:isEndLoop_34 + ProcTourProc35:beginLoop_35 + ProcTourProc35:testIdentity_35 + ProcTourProc35:testAlone_35 + ProcTourProc35:isEndLoop_35 + ProcTour6:askForSection_6 + ProcTour6:testTurn_6 + ProcTour6:endTurn_6 + ProcTour7:askForSection_7 + ProcTour7:testTurn_7 + ProcTour7:endTurn_7 + ProcTour8:askForSection_8 + ProcTour8:testTurn_8 + ProcTour8:endTurn_8 + Process2:idle_2 + Process2:CS_2 = 1
invariant :ProcTourProc12:beginLoop_12 + ProcTourProc12:testIdentity_12 + ProcTourProc12:testAlone_12 + ProcTourProc12:isEndLoop_12 + ProcTourProc13:beginLoop_13 + ProcTourProc13:testIdentity_13 + ProcTourProc13:testAlone_13 + ProcTourProc13:isEndLoop_13 + ProcTourProc14:beginLoop_14 + ProcTourProc14:testIdentity_14 + ProcTourProc14:testAlone_14 + ProcTourProc14:isEndLoop_14 + ProcTourProc15:beginLoop_15 + ProcTourProc15:testIdentity_15 + ProcTourProc15:testAlone_15 + ProcTourProc15:isEndLoop_15 + ProcTourProc16:beginLoop_16 + ProcTourProc16:testIdentity_16 + ProcTourProc16:testAlone_16 + ProcTourProc16:isEndLoop_16 + ProcTourProc17:beginLoop_17 + ProcTourProc17:testIdentity_17 + ProcTourProc17:testAlone_17 + ProcTourProc17:isEndLoop_17 + ProcTourProc18:beginLoop_18 + ProcTourProc18:testIdentity_18 + ProcTourProc18:testAlone_18 + ProcTourProc18:isEndLoop_18 + ProcTourProc19:beginLoop_19 + ProcTourProc19:testIdentity_19 + ProcTourProc19:testAlone_19 + ProcTourProc19:isEndLoop_19 + ProcTourProc20:beginLoop_20 + ProcTourProc20:testIdentity_20 + ProcTourProc20:testAlone_20 + ProcTourProc20:isEndLoop_20 + ProcTourProc21:beginLoop_21 + ProcTourProc21:testIdentity_21 + ProcTourProc21:testAlone_21 + ProcTourProc21:isEndLoop_21 + ProcTourProc22:beginLoop_22 + ProcTourProc22:testIdentity_22 + ProcTourProc22:testAlone_22 + ProcTourProc22:isEndLoop_22 + ProcTourProc23:beginLoop_23 + ProcTourProc23:testIdentity_23 + ProcTourProc23:testAlone_23 + ProcTourProc23:isEndLoop_23 + ProcTour3:askForSection_3 + ProcTour3:testTurn_3 + ProcTour3:endTurn_3 + ProcTour4:askForSection_4 + ProcTour4:testTurn_4 + ProcTour4:endTurn_4 + ProcTour5:askForSection_5 + ProcTour5:testTurn_5 + ProcTour5:endTurn_5 + Process1:idle_1 + Process1:CS_1 = 1
invariant :ProcBool0:wantSection_0 + -1'Process0:idle_0 = 0
Reverse transition relation is NOT exact ! Due to transitions updateTurn_0_0_0, updateTurn_0_0_1, updateTurn_0_0_2, updateTurn_0_0_3, updateTurn_0_1_0, updateTurn_0_1_1, updateTurn_0_1_2, updateTurn_0_1_3, updateTurn_0_2_0, updateTurn_0_2_1, updateTurn_0_2_2, updateTurn_0_2_3, updateTurn_0_3_0, updateTurn_0_3_1, updateTurn_0_3_2, updateTurn_0_3_3, updateTurn_1_0_0, updateTurn_1_0_1, updateTurn_1_0_2, updateTurn_1_0_3, updateTurn_1_1_0, updateTurn_1_1_1, updateTurn_1_1_2, updateTurn_1_1_3, updateTurn_1_2_0, updateTurn_1_2_1, updateTurn_1_2_2, updateTurn_1_2_3, updateTurn_1_3_0, updateTurn_1_3_1, updateTurn_1_3_2, updateTurn_1_3_3, updateTurn_2_0_0, updateTurn_2_0_1, updateTurn_2_0_2, updateTurn_2_0_3, updateTurn_2_1_0, updateTurn_2_1_1, updateTurn_2_1_2, updateTurn_2_1_3, updateTurn_2_2_0, updateTurn_2_2_1, updateTurn_2_2_2, updateTurn_2_2_3, updateTurn_2_3_0, updateTurn_2_3_1, updateTurn_2_3_2, updateTurn_2_3_3, becomeIdle_0, becomeIdle_1, becomeIdle_2, becomeIdle_3, notAlone_0_1_2, notAlone_0_1_3, notAlone_0_2_0, notAlone_0_2_1, notAlone_0_2_3, notAlone_0_3_0, notAlone_0_3_1, notAlone_0_3_2, notAlone_1_1_2, notAlone_1_1_3, notAlone_1_2_0, notAlone_1_2_1, notAlone_1_2_3, notAlone_1_3_0, notAlone_1_3_1, notAlone_1_3_2, notAlone_2_1_2, notAlone_2_1_3, notAlone_2_2_0, notAlone_2_2_1, notAlone_2_2_3, notAlone_2_3_0, notAlone_2_3_1, notAlone_2_3_2, endLoop_0_0, endLoop_0_1, endLoop_0_2, endLoop_0_3, endLoop_1_0, endLoop_1_1, endLoop_1_2, endLoop_1_3, Intersection with reachable at each step enabled. (destroyed/reverse/intersect/total) :24/244/84/352
1 unique states visited
0 strongly connected components in search stack
0 transitions explored
1 items max in DFS search stack
1442 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,14.4606,405360,1,0,781498,497,3240,1.07608e+06,95,515,4086207
no accepting run found
Formula 0 is TRUE no accepting run found.
FORMULA Peterson-COL-3-LTLFireability-00 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 1 : !((("((((((((((((ProcTourProc0.testIdentity_0>=1)||(ProcTourProc13.testIdentity_13>=1))||(ProcTourProc26.testIdentity_26>=1))||(ProcTourProc39.testIdentity_39>=1))||(ProcTourProc4.testIdentity_4>=1))||(ProcTourProc17.testIdentity_17>=1))||(ProcTourProc30.testIdentity_30>=1))||(ProcTourProc43.testIdentity_43>=1))||(ProcTourProc8.testIdentity_8>=1))||(ProcTourProc21.testIdentity_21>=1))||(ProcTourProc34.testIdentity_34>=1))||(ProcTourProc47.testIdentity_47>=1))")U(X(("((((((((((((ProcTourProc0.testIdentity_0>=1)||(ProcTourProc13.testIdentity_13>=1))||(ProcTourProc26.testIdentity_26>=1))||(ProcTourProc39.testIdentity_39>=1))||(ProcTourProc4.testIdentity_4>=1))||(ProcTourProc17.testIdentity_17>=1))||(ProcTourProc30.testIdentity_30>=1))||(ProcTourProc43.testIdentity_43>=1))||(ProcTourProc8.testIdentity_8>=1))||(ProcTourProc21.testIdentity_21>=1))||(ProcTourProc34.testIdentity_34>=1))||(ProcTourProc47.testIdentity_47>=1))")U("((((((((((((((((((((((((((((((((((((ProcTourProc0.isEndLoop_0>=1)||(ProcTourProc12.isEndLoop_12>=1))||(ProcTourProc24.isEndLoop_24>=1))||(ProcTourProc36.isEndLoop_36>=1))||(ProcTourProc1.isEndLoop_1>=1))||(ProcTourProc13.isEndLoop_13>=1))||(ProcTourProc25.isEndLoop_25>=1))||(ProcTourProc37.isEndLoop_37>=1))||(ProcTourProc2.isEndLoop_2>=1))||(ProcTourProc14.isEndLoop_14>=1))||(ProcTourProc26.isEndLoop_26>=1))||(ProcTourProc38.isEndLoop_38>=1))||(ProcTourProc4.isEndLoop_4>=1))||(ProcTourProc16.isEndLoop_16>=1))||(ProcTourProc28.isEndLoop_28>=1))||(ProcTourProc40.isEndLoop_40>=1))||(ProcTourProc5.isEndLoop_5>=1))||(ProcTourProc17.isEndLoop_17>=1))||(ProcTourProc29.isEndLoop_29>=1))||(ProcTourProc41.isEndLoop_41>=1))||(ProcTourProc6.isEndLoop_6>=1))||(ProcTourProc18.isEndLoop_18>=1))||(ProcTourProc30.isEndLoop_30>=1))||(ProcTourProc42.isEndLoop_42>=1))||(ProcTourProc8.isEndLoop_8>=1))||(ProcTourProc20.isEndLoop_20>=1))||(ProcTourProc32.isEndLoop_32>=1))||(ProcTourProc44.isEndLoop_44>=1))||(ProcTourProc9.isEndLoop_9>=1))||(ProcTourProc21.isEndLoop_21>=1))||(ProcTourProc33.isEndLoop_33>=1))||(ProcTourProc45.isEndLoop_45>=1))||(ProcTourProc10.isEndLoop_10>=1))||(ProcTourProc22.isEndLoop_22>=1))||(ProcTourProc34.isEndLoop_34>=1))||(ProcTourProc46.isEndLoop_46>=1))")))))
Formula 1 simplified : !("((((((((((((ProcTourProc0.testIdentity_0>=1)||(ProcTourProc13.testIdentity_13>=1))||(ProcTourProc26.testIdentity_26>=1))||(ProcTourProc39.testIdentity_39>=1))||(ProcTourProc4.testIdentity_4>=1))||(ProcTourProc17.testIdentity_17>=1))||(ProcTourProc30.testIdentity_30>=1))||(ProcTourProc43.testIdentity_43>=1))||(ProcTourProc8.testIdentity_8>=1))||(ProcTourProc21.testIdentity_21>=1))||(ProcTourProc34.testIdentity_34>=1))||(ProcTourProc47.testIdentity_47>=1))" U X("((((((((((((ProcTourProc0.testIdentity_0>=1)||(ProcTourProc13.testIdentity_13>=1))||(ProcTourProc26.testIdentity_26>=1))||(ProcTourProc39.testIdentity_39>=1))||(ProcTourProc4.testIdentity_4>=1))||(ProcTourProc17.testIdentity_17>=1))||(ProcTourProc30.testIdentity_30>=1))||(ProcTourProc43.testIdentity_43>=1))||(ProcTourProc8.testIdentity_8>=1))||(ProcTourProc21.testIdentity_21>=1))||(ProcTourProc34.testIdentity_34>=1))||(ProcTourProc47.testIdentity_47>=1))" U "((((((((((((((((((((((((((((((((((((ProcTourProc0.isEndLoop_0>=1)||(ProcTourProc12.isEndLoop_12>=1))||(ProcTourProc24.isEndLoop_24>=1))||(ProcTourProc36.isEndLoop_36>=1))||(ProcTourProc1.isEndLoop_1>=1))||(ProcTourProc13.isEndLoop_13>=1))||(ProcTourProc25.isEndLoop_25>=1))||(ProcTourProc37.isEndLoop_37>=1))||(ProcTourProc2.isEndLoop_2>=1))||(ProcTourProc14.isEndLoop_14>=1))||(ProcTourProc26.isEndLoop_26>=1))||(ProcTourProc38.isEndLoop_38>=1))||(ProcTourProc4.isEndLoop_4>=1))||(ProcTourProc16.isEndLoop_16>=1))||(ProcTourProc28.isEndLoop_28>=1))||(ProcTourProc40.isEndLoop_40>=1))||(ProcTourProc5.isEndLoop_5>=1))||(ProcTourProc17.isEndLoop_17>=1))||(ProcTourProc29.isEndLoop_29>=1))||(ProcTourProc41.isEndLoop_41>=1))||(ProcTourProc6.isEndLoop_6>=1))||(ProcTourProc18.isEndLoop_18>=1))||(ProcTourProc30.isEndLoop_30>=1))||(ProcTourProc42.isEndLoop_42>=1))||(ProcTourProc8.isEndLoop_8>=1))||(ProcTourProc20.isEndLoop_20>=1))||(ProcTourProc32.isEndLoop_32>=1))||(ProcTourProc44.isEndLoop_44>=1))||(ProcTourProc9.isEndLoop_9>=1))||(ProcTourProc21.isEndLoop_21>=1))||(ProcTourProc33.isEndLoop_33>=1))||(ProcTourProc45.isEndLoop_45>=1))||(ProcTourProc10.isEndLoop_10>=1))||(ProcTourProc22.isEndLoop_22>=1))||(ProcTourProc34.isEndLoop_34>=1))||(ProcTourProc46.isEndLoop_46>=1))"))
4 unique states visited
4 strongly connected components in search stack
4 transitions explored
4 items max in DFS search stack
308 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,17.5363,501020,1,0,964350,497,4236,1.38279e+06,97,515,4726905
an accepting run exists (use option '-e' to print it)
Formula 1 is FALSE accepting run found.
FORMULA Peterson-COL-3-LTLFireability-01 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 2 : !((F(F("((((((((((((((((((((((((((((((((((((ProcTourProc12.testIdentity_12>=1)||(ProcTourProc24.testIdentity_24>=1))||(ProcTourProc36.testIdentity_36>=1))||(ProcTourProc1.testIdentity_1>=1))||(ProcTourProc25.testIdentity_25>=1))||(ProcTourProc37.testIdentity_37>=1))||(ProcTourProc2.testIdentity_2>=1))||(ProcTourProc14.testIdentity_14>=1))||(ProcTourProc38.testIdentity_38>=1))||(ProcTourProc3.testIdentity_3>=1))||(ProcTourProc15.testIdentity_15>=1))||(ProcTourProc27.testIdentity_27>=1))||(ProcTourProc16.testIdentity_16>=1))||(ProcTourProc28.testIdentity_28>=1))||(ProcTourProc40.testIdentity_40>=1))||(ProcTourProc5.testIdentity_5>=1))||(ProcTourProc29.testIdentity_29>=1))||(ProcTourProc41.testIdentity_41>=1))||(ProcTourProc6.testIdentity_6>=1))||(ProcTourProc18.testIdentity_18>=1))||(ProcTourProc42.testIdentity_42>=1))||(ProcTourProc7.testIdentity_7>=1))||(ProcTourProc19.testIdentity_19>=1))||(ProcTourProc31.testIdentity_31>=1))||(ProcTourProc20.testIdentity_20>=1))||(ProcTourProc32.testIdentity_32>=1))||(ProcTourProc44.testIdentity_44>=1))||(ProcTourProc9.testIdentity_9>=1))||(ProcTourProc33.testIdentity_33>=1))||(ProcTourProc45.testIdentity_45>=1))||(ProcTourProc10.testIdentity_10>=1))||(ProcTourProc22.testIdentity_22>=1))||(ProcTourProc46.testIdentity_46>=1))||(ProcTourProc11.testIdentity_11>=1))||(ProcTourProc23.testIdentity_23>=1))||(ProcTourProc35.testIdentity_35>=1))"))))
Formula 2 simplified : !F"((((((((((((((((((((((((((((((((((((ProcTourProc12.testIdentity_12>=1)||(ProcTourProc24.testIdentity_24>=1))||(ProcTourProc36.testIdentity_36>=1))||(ProcTourProc1.testIdentity_1>=1))||(ProcTourProc25.testIdentity_25>=1))||(ProcTourProc37.testIdentity_37>=1))||(ProcTourProc2.testIdentity_2>=1))||(ProcTourProc14.testIdentity_14>=1))||(ProcTourProc38.testIdentity_38>=1))||(ProcTourProc3.testIdentity_3>=1))||(ProcTourProc15.testIdentity_15>=1))||(ProcTourProc27.testIdentity_27>=1))||(ProcTourProc16.testIdentity_16>=1))||(ProcTourProc28.testIdentity_28>=1))||(ProcTourProc40.testIdentity_40>=1))||(ProcTourProc5.testIdentity_5>=1))||(ProcTourProc29.testIdentity_29>=1))||(ProcTourProc41.testIdentity_41>=1))||(ProcTourProc6.testIdentity_6>=1))||(ProcTourProc18.testIdentity_18>=1))||(ProcTourProc42.testIdentity_42>=1))||(ProcTourProc7.testIdentity_7>=1))||(ProcTourProc19.testIdentity_19>=1))||(ProcTourProc31.testIdentity_31>=1))||(ProcTourProc20.testIdentity_20>=1))||(ProcTourProc32.testIdentity_32>=1))||(ProcTourProc44.testIdentity_44>=1))||(ProcTourProc9.testIdentity_9>=1))||(ProcTourProc33.testIdentity_33>=1))||(ProcTourProc45.testIdentity_45>=1))||(ProcTourProc10.testIdentity_10>=1))||(ProcTourProc22.testIdentity_22>=1))||(ProcTourProc46.testIdentity_46>=1))||(ProcTourProc11.testIdentity_11>=1))||(ProcTourProc23.testIdentity_23>=1))||(ProcTourProc35.testIdentity_35>=1))"
2 unique states visited
2 strongly connected components in search stack
2 transitions explored
2 items max in DFS search stack
162 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,19.1603,565756,1,0,1.0997e+06,497,4564,1.51613e+06,97,515,5276513
an accepting run exists (use option '-e' to print it)
Formula 2 is FALSE accepting run found.
FORMULA Peterson-COL-3-LTLFireability-02 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 3 : !((F(G(G(X(F("(((((Process0.CS_0>=1)&&(ProcBool1.wantSection_1>=1))||((Process1.CS_1>=1)&&(ProcBool3.wantSection_3>=1)))||((Process2.CS_2>=1)&&(ProcBool5.wantSection_5>=1)))||((Process3.CS_3>=1)&&(ProcBool7.wantSection_7>=1)))")))))))
Formula 3 simplified : !FGXF"(((((Process0.CS_0>=1)&&(ProcBool1.wantSection_1>=1))||((Process1.CS_1>=1)&&(ProcBool3.wantSection_3>=1)))||((Process2.CS_2>=1)&&(ProcBool5.wantSection_5>=1)))||((Process3.CS_3>=1)&&(ProcBool7.wantSection_7>=1)))"
3 unique states visited
3 strongly connected components in search stack
4 transitions explored
3 items max in DFS search stack
394 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,23.095,684868,1,0,1.39899e+06,497,4713,1.85695e+06,97,515,6030765
an accepting run exists (use option '-e' to print it)
Formula 3 is FALSE accepting run found.
FORMULA Peterson-COL-3-LTLFireability-03 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 4 : !((G((("((((((((((((((((((((((((((((((((((((ProcTourProc0.isEndLoop_0>=1)||(ProcTourProc12.isEndLoop_12>=1))||(ProcTourProc24.isEndLoop_24>=1))||(ProcTourProc36.isEndLoop_36>=1))||(ProcTourProc1.isEndLoop_1>=1))||(ProcTourProc13.isEndLoop_13>=1))||(ProcTourProc25.isEndLoop_25>=1))||(ProcTourProc37.isEndLoop_37>=1))||(ProcTourProc2.isEndLoop_2>=1))||(ProcTourProc14.isEndLoop_14>=1))||(ProcTourProc26.isEndLoop_26>=1))||(ProcTourProc38.isEndLoop_38>=1))||(ProcTourProc4.isEndLoop_4>=1))||(ProcTourProc16.isEndLoop_16>=1))||(ProcTourProc28.isEndLoop_28>=1))||(ProcTourProc40.isEndLoop_40>=1))||(ProcTourProc5.isEndLoop_5>=1))||(ProcTourProc17.isEndLoop_17>=1))||(ProcTourProc29.isEndLoop_29>=1))||(ProcTourProc41.isEndLoop_41>=1))||(ProcTourProc6.isEndLoop_6>=1))||(ProcTourProc18.isEndLoop_18>=1))||(ProcTourProc30.isEndLoop_30>=1))||(ProcTourProc42.isEndLoop_42>=1))||(ProcTourProc8.isEndLoop_8>=1))||(ProcTourProc20.isEndLoop_20>=1))||(ProcTourProc32.isEndLoop_32>=1))||(ProcTourProc44.isEndLoop_44>=1))||(ProcTourProc9.isEndLoop_9>=1))||(ProcTourProc21.isEndLoop_21>=1))||(ProcTourProc33.isEndLoop_33>=1))||(ProcTourProc45.isEndLoop_45>=1))||(ProcTourProc10.isEndLoop_10>=1))||(ProcTourProc22.isEndLoop_22>=1))||(ProcTourProc34.isEndLoop_34>=1))||(ProcTourProc46.isEndLoop_46>=1))")U("(((((((((((((TourProc0.turn_0>=1)&&(ProcTour0.testTurn_0>=1))||((TourProc1.turn_1>=1)&&(ProcTour3.testTurn_3>=1)))||((TourProc2.turn_2>=1)&&(ProcTour6.testTurn_6>=1)))||((TourProc3.turn_3>=1)&&(ProcTour9.testTurn_9>=1)))||((TourProc4.turn_4>=1)&&(ProcTour1.testTurn_1>=1)))||((TourProc5.turn_5>=1)&&(ProcTour4.testTurn_4>=1)))||((TourProc6.turn_6>=1)&&(ProcTour7.testTurn_7>=1)))||((TourProc7.turn_7>=1)&&(ProcTour10.testTurn_10>=1)))||((TourProc8.turn_8>=1)&&(ProcTour2.testTurn_2>=1)))||((TourProc9.turn_9>=1)&&(ProcTour5.testTurn_5>=1)))||((TourProc10.turn_10>=1)&&(ProcTour8.testTurn_8>=1)))||((TourProc11.turn_11>=1)&&(ProcTour11.testTurn_11>=1)))"))U(G("((((((((((((((((((((((((((((((((((((((((((((((((ProcTourProc0.beginLoop_0>=1)||(ProcTourProc12.beginLoop_12>=1))||(ProcTourProc24.beginLoop_24>=1))||(ProcTourProc36.beginLoop_36>=1))||(ProcTourProc1.beginLoop_1>=1))||(ProcTourProc13.beginLoop_13>=1))||(ProcTourProc25.beginLoop_25>=1))||(ProcTourProc37.beginLoop_37>=1))||(ProcTourProc2.beginLoop_2>=1))||(ProcTourProc14.beginLoop_14>=1))||(ProcTourProc26.beginLoop_26>=1))||(ProcTourProc38.beginLoop_38>=1))||(ProcTourProc3.beginLoop_3>=1))||(ProcTourProc15.beginLoop_15>=1))||(ProcTourProc27.beginLoop_27>=1))||(ProcTourProc39.beginLoop_39>=1))||(ProcTourProc4.beginLoop_4>=1))||(ProcTourProc16.beginLoop_16>=1))||(ProcTourProc28.beginLoop_28>=1))||(ProcTourProc40.beginLoop_40>=1))||(ProcTourProc5.beginLoop_5>=1))||(ProcTourProc17.beginLoop_17>=1))||(ProcTourProc29.beginLoop_29>=1))||(ProcTourProc41.beginLoop_41>=1))||(ProcTourProc6.beginLoop_6>=1))||(ProcTourProc18.beginLoop_18>=1))||(ProcTourProc30.beginLoop_30>=1))||(ProcTourProc42.beginLoop_42>=1))||(ProcTourProc7.beginLoop_7>=1))||(ProcTourProc19.beginLoop_19>=1))||(ProcTourProc31.beginLoop_31>=1))||(ProcTourProc43.beginLoop_43>=1))||(ProcTourProc8.beginLoop_8>=1))||(ProcTourProc20.beginLoop_20>=1))||(ProcTourProc32.beginLoop_32>=1))||(ProcTourProc44.beginLoop_44>=1))||(ProcTourProc9.beginLoop_9>=1))||(ProcTourProc21.beginLoop_21>=1))||(ProcTourProc33.beginLoop_33>=1))||(ProcTourProc45.beginLoop_45>=1))||(ProcTourProc10.beginLoop_10>=1))||(ProcTourProc22.beginLoop_22>=1))||(ProcTourProc34.beginLoop_34>=1))||(ProcTourProc46.beginLoop_46>=1))||(ProcTourProc11.beginLoop_11>=1))||(ProcTourProc23.beginLoop_23>=1))||(ProcTourProc35.beginLoop_35>=1))||(ProcTourProc47.beginLoop_47>=1))")))))
Formula 4 simplified : !G(("((((((((((((((((((((((((((((((((((((ProcTourProc0.isEndLoop_0>=1)||(ProcTourProc12.isEndLoop_12>=1))||(ProcTourProc24.isEndLoop_24>=1))||(ProcTourProc36.isEndLoop_36>=1))||(ProcTourProc1.isEndLoop_1>=1))||(ProcTourProc13.isEndLoop_13>=1))||(ProcTourProc25.isEndLoop_25>=1))||(ProcTourProc37.isEndLoop_37>=1))||(ProcTourProc2.isEndLoop_2>=1))||(ProcTourProc14.isEndLoop_14>=1))||(ProcTourProc26.isEndLoop_26>=1))||(ProcTourProc38.isEndLoop_38>=1))||(ProcTourProc4.isEndLoop_4>=1))||(ProcTourProc16.isEndLoop_16>=1))||(ProcTourProc28.isEndLoop_28>=1))||(ProcTourProc40.isEndLoop_40>=1))||(ProcTourProc5.isEndLoop_5>=1))||(ProcTourProc17.isEndLoop_17>=1))||(ProcTourProc29.isEndLoop_29>=1))||(ProcTourProc41.isEndLoop_41>=1))||(ProcTourProc6.isEndLoop_6>=1))||(ProcTourProc18.isEndLoop_18>=1))||(ProcTourProc30.isEndLoop_30>=1))||(ProcTourProc42.isEndLoop_42>=1))||(ProcTourProc8.isEndLoop_8>=1))||(ProcTourProc20.isEndLoop_20>=1))||(ProcTourProc32.isEndLoop_32>=1))||(ProcTourProc44.isEndLoop_44>=1))||(ProcTourProc9.isEndLoop_9>=1))||(ProcTourProc21.isEndLoop_21>=1))||(ProcTourProc33.isEndLoop_33>=1))||(ProcTourProc45.isEndLoop_45>=1))||(ProcTourProc10.isEndLoop_10>=1))||(ProcTourProc22.isEndLoop_22>=1))||(ProcTourProc34.isEndLoop_34>=1))||(ProcTourProc46.isEndLoop_46>=1))" U "(((((((((((((TourProc0.turn_0>=1)&&(ProcTour0.testTurn_0>=1))||((TourProc1.turn_1>=1)&&(ProcTour3.testTurn_3>=1)))||((TourProc2.turn_2>=1)&&(ProcTour6.testTurn_6>=1)))||((TourProc3.turn_3>=1)&&(ProcTour9.testTurn_9>=1)))||((TourProc4.turn_4>=1)&&(ProcTour1.testTurn_1>=1)))||((TourProc5.turn_5>=1)&&(ProcTour4.testTurn_4>=1)))||((TourProc6.turn_6>=1)&&(ProcTour7.testTurn_7>=1)))||((TourProc7.turn_7>=1)&&(ProcTour10.testTurn_10>=1)))||((TourProc8.turn_8>=1)&&(ProcTour2.testTurn_2>=1)))||((TourProc9.turn_9>=1)&&(ProcTour5.testTurn_5>=1)))||((TourProc10.turn_10>=1)&&(ProcTour8.testTurn_8>=1)))||((TourProc11.turn_11>=1)&&(ProcTour11.testTurn_11>=1)))") U G"((((((((((((((((((((((((((((((((((((((((((((((((ProcTourProc0.beginLoop_0>=1)||(ProcTourProc12.beginLoop_12>=1))||(ProcTourProc24.beginLoop_24>=1))||(ProcTourProc36.beginLoop_36>=1))||(ProcTourProc1.beginLoop_1>=1))||(ProcTourProc13.beginLoop_13>=1))||(ProcTourProc25.beginLoop_25>=1))||(ProcTourProc37.beginLoop_37>=1))||(ProcTourProc2.beginLoop_2>=1))||(ProcTourProc14.beginLoop_14>=1))||(ProcTourProc26.beginLoop_26>=1))||(ProcTourProc38.beginLoop_38>=1))||(ProcTourProc3.beginLoop_3>=1))||(ProcTourProc15.beginLoop_15>=1))||(ProcTourProc27.beginLoop_27>=1))||(ProcTourProc39.beginLoop_39>=1))||(ProcTourProc4.beginLoop_4>=1))||(ProcTourProc16.beginLoop_16>=1))||(ProcTourProc28.beginLoop_28>=1))||(ProcTourProc40.beginLoop_40>=1))||(ProcTourProc5.beginLoop_5>=1))||(ProcTourProc17.beginLoop_17>=1))||(ProcTourProc29.beginLoop_29>=1))||(ProcTourProc41.beginLoop_41>=1))||(ProcTourProc6.beginLoop_6>=1))||(ProcTourProc18.beginLoop_18>=1))||(ProcTourProc30.beginLoop_30>=1))||(ProcTourProc42.beginLoop_42>=1))||(ProcTourProc7.beginLoop_7>=1))||(ProcTourProc19.beginLoop_19>=1))||(ProcTourProc31.beginLoop_31>=1))||(ProcTourProc43.beginLoop_43>=1))||(ProcTourProc8.beginLoop_8>=1))||(ProcTourProc20.beginLoop_20>=1))||(ProcTourProc32.beginLoop_32>=1))||(ProcTourProc44.beginLoop_44>=1))||(ProcTourProc9.beginLoop_9>=1))||(ProcTourProc21.beginLoop_21>=1))||(ProcTourProc33.beginLoop_33>=1))||(ProcTourProc45.beginLoop_45>=1))||(ProcTourProc10.beginLoop_10>=1))||(ProcTourProc22.beginLoop_22>=1))||(ProcTourProc34.beginLoop_34>=1))||(ProcTourProc46.beginLoop_46>=1))||(ProcTourProc11.beginLoop_11>=1))||(ProcTourProc23.beginLoop_23>=1))||(ProcTourProc35.beginLoop_35>=1))||(ProcTourProc47.beginLoop_47>=1))")
3 unique states visited
3 strongly connected components in search stack
3 transitions explored
3 items max in DFS search stack
15 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,23.2486,689656,1,0,1.40608e+06,497,4959,1.86574e+06,97,515,6056993
an accepting run exists (use option '-e' to print it)
Formula 4 is FALSE accepting run found.
FORMULA Peterson-COL-3-LTLFireability-04 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 5 : !((X((G(X("(((((((((((((((((((((((((((((((((((((TourProc0.turn_0>=1)&&(ProcTour3.testTurn_3>=1))||((TourProc0.turn_0>=1)&&(ProcTour6.testTurn_6>=1)))||((TourProc0.turn_0>=1)&&(ProcTour9.testTurn_9>=1)))||((TourProc1.turn_1>=1)&&(ProcTour0.testTurn_0>=1)))||((TourProc1.turn_1>=1)&&(ProcTour6.testTurn_6>=1)))||((TourProc1.turn_1>=1)&&(ProcTour9.testTurn_9>=1)))||((TourProc2.turn_2>=1)&&(ProcTour0.testTurn_0>=1)))||((TourProc2.turn_2>=1)&&(ProcTour3.testTurn_3>=1)))||((TourProc2.turn_2>=1)&&(ProcTour9.testTurn_9>=1)))||((TourProc3.turn_3>=1)&&(ProcTour0.testTurn_0>=1)))||((TourProc3.turn_3>=1)&&(ProcTour3.testTurn_3>=1)))||((TourProc3.turn_3>=1)&&(ProcTour6.testTurn_6>=1)))||((TourProc4.turn_4>=1)&&(ProcTour4.testTurn_4>=1)))||((TourProc4.turn_4>=1)&&(ProcTour7.testTurn_7>=1)))||((TourProc4.turn_4>=1)&&(ProcTour10.testTurn_10>=1)))||((TourProc5.turn_5>=1)&&(ProcTour1.testTurn_1>=1)))||((TourProc5.turn_5>=1)&&(ProcTour7.testTurn_7>=1)))||((TourProc5.turn_5>=1)&&(ProcTour10.testTurn_10>=1)))||((TourProc6.turn_6>=1)&&(ProcTour1.testTurn_1>=1)))||((TourProc6.turn_6>=1)&&(ProcTour4.testTurn_4>=1)))||((TourProc6.turn_6>=1)&&(ProcTour10.testTurn_10>=1)))||((TourProc7.turn_7>=1)&&(ProcTour1.testTurn_1>=1)))||((TourProc7.turn_7>=1)&&(ProcTour4.testTurn_4>=1)))||((TourProc7.turn_7>=1)&&(ProcTour7.testTurn_7>=1)))||((TourProc8.turn_8>=1)&&(ProcTour5.testTurn_5>=1)))||((TourProc8.turn_8>=1)&&(ProcTour8.testTurn_8>=1)))||((TourProc8.turn_8>=1)&&(ProcTour11.testTurn_11>=1)))||((TourProc9.turn_9>=1)&&(ProcTour2.testTurn_2>=1)))||((TourProc9.turn_9>=1)&&(ProcTour8.testTurn_8>=1)))||((TourProc9.turn_9>=1)&&(ProcTour11.testTurn_11>=1)))||((TourProc10.turn_10>=1)&&(ProcTour2.testTurn_2>=1)))||((TourProc10.turn_10>=1)&&(ProcTour5.testTurn_5>=1)))||((TourProc10.turn_10>=1)&&(ProcTour11.testTurn_11>=1)))||((TourProc11.turn_11>=1)&&(ProcTour2.testTurn_2>=1)))||((TourProc11.turn_11>=1)&&(ProcTour5.testTurn_5>=1)))||((TourProc11.turn_11>=1)&&(ProcTour8.testTurn_8>=1)))")))U(X(F("(((((((((((((TourProc0.turn_0>=1)&&(ProcTour0.testTurn_0>=1))||((TourProc1.turn_1>=1)&&(ProcTour3.testTurn_3>=1)))||((TourProc2.turn_2>=1)&&(ProcTour6.testTurn_6>=1)))||((TourProc3.turn_3>=1)&&(ProcTour9.testTurn_9>=1)))||((TourProc4.turn_4>=1)&&(ProcTour1.testTurn_1>=1)))||((TourProc5.turn_5>=1)&&(ProcTour4.testTurn_4>=1)))||((TourProc6.turn_6>=1)&&(ProcTour7.testTurn_7>=1)))||((TourProc7.turn_7>=1)&&(ProcTour10.testTurn_10>=1)))||((TourProc8.turn_8>=1)&&(ProcTour2.testTurn_2>=1)))||((TourProc9.turn_9>=1)&&(ProcTour5.testTurn_5>=1)))||((TourProc10.turn_10>=1)&&(ProcTour8.testTurn_8>=1)))||((TourProc11.turn_11>=1)&&(ProcTour11.testTurn_11>=1)))"))))))
Formula 5 simplified : !X(GX"(((((((((((((((((((((((((((((((((((((TourProc0.turn_0>=1)&&(ProcTour3.testTurn_3>=1))||((TourProc0.turn_0>=1)&&(ProcTour6.testTurn_6>=1)))||((TourProc0.turn_0>=1)&&(ProcTour9.testTurn_9>=1)))||((TourProc1.turn_1>=1)&&(ProcTour0.testTurn_0>=1)))||((TourProc1.turn_1>=1)&&(ProcTour6.testTurn_6>=1)))||((TourProc1.turn_1>=1)&&(ProcTour9.testTurn_9>=1)))||((TourProc2.turn_2>=1)&&(ProcTour0.testTurn_0>=1)))||((TourProc2.turn_2>=1)&&(ProcTour3.testTurn_3>=1)))||((TourProc2.turn_2>=1)&&(ProcTour9.testTurn_9>=1)))||((TourProc3.turn_3>=1)&&(ProcTour0.testTurn_0>=1)))||((TourProc3.turn_3>=1)&&(ProcTour3.testTurn_3>=1)))||((TourProc3.turn_3>=1)&&(ProcTour6.testTurn_6>=1)))||((TourProc4.turn_4>=1)&&(ProcTour4.testTurn_4>=1)))||((TourProc4.turn_4>=1)&&(ProcTour7.testTurn_7>=1)))||((TourProc4.turn_4>=1)&&(ProcTour10.testTurn_10>=1)))||((TourProc5.turn_5>=1)&&(ProcTour1.testTurn_1>=1)))||((TourProc5.turn_5>=1)&&(ProcTour7.testTurn_7>=1)))||((TourProc5.turn_5>=1)&&(ProcTour10.testTurn_10>=1)))||((TourProc6.turn_6>=1)&&(ProcTour1.testTurn_1>=1)))||((TourProc6.turn_6>=1)&&(ProcTour4.testTurn_4>=1)))||((TourProc6.turn_6>=1)&&(ProcTour10.testTurn_10>=1)))||((TourProc7.turn_7>=1)&&(ProcTour1.testTurn_1>=1)))||((TourProc7.turn_7>=1)&&(ProcTour4.testTurn_4>=1)))||((TourProc7.turn_7>=1)&&(ProcTour7.testTurn_7>=1)))||((TourProc8.turn_8>=1)&&(ProcTour5.testTurn_5>=1)))||((TourProc8.turn_8>=1)&&(ProcTour8.testTurn_8>=1)))||((TourProc8.turn_8>=1)&&(ProcTour11.testTurn_11>=1)))||((TourProc9.turn_9>=1)&&(ProcTour2.testTurn_2>=1)))||((TourProc9.turn_9>=1)&&(ProcTour8.testTurn_8>=1)))||((TourProc9.turn_9>=1)&&(ProcTour11.testTurn_11>=1)))||((TourProc10.turn_10>=1)&&(ProcTour2.testTurn_2>=1)))||((TourProc10.turn_10>=1)&&(ProcTour5.testTurn_5>=1)))||((TourProc10.turn_10>=1)&&(ProcTour11.testTurn_11>=1)))||((TourProc11.turn_11>=1)&&(ProcTour2.testTurn_2>=1)))||((TourProc11.turn_11>=1)&&(ProcTour5.testTurn_5>=1)))||((TourProc11.turn_11>=1)&&(ProcTour8.testTurn_8>=1)))" U XF"(((((((((((((TourProc0.turn_0>=1)&&(ProcTour0.testTurn_0>=1))||((TourProc1.turn_1>=1)&&(ProcTour3.testTurn_3>=1)))||((TourProc2.turn_2>=1)&&(ProcTour6.testTurn_6>=1)))||((TourProc3.turn_3>=1)&&(ProcTour9.testTurn_9>=1)))||((TourProc4.turn_4>=1)&&(ProcTour1.testTurn_1>=1)))||((TourProc5.turn_5>=1)&&(ProcTour4.testTurn_4>=1)))||((TourProc6.turn_6>=1)&&(ProcTour7.testTurn_7>=1)))||((TourProc7.turn_7>=1)&&(ProcTour10.testTurn_10>=1)))||((TourProc8.turn_8>=1)&&(ProcTour2.testTurn_2>=1)))||((TourProc9.turn_9>=1)&&(ProcTour5.testTurn_5>=1)))||((TourProc10.turn_10>=1)&&(ProcTour8.testTurn_8>=1)))||((TourProc11.turn_11>=1)&&(ProcTour11.testTurn_11>=1)))")
3 unique states visited
0 strongly connected components in search stack
2 transitions explored
3 items max in DFS search stack
7 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,23.318,691968,1,0,1.40894e+06,497,5122,1.86831e+06,97,515,6074748
no accepting run found
Formula 5 is TRUE no accepting run found.
FORMULA Peterson-COL-3-LTLFireability-05 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 6 : !((F(F(F(X(G("(((((((((((((((((((((((((((((((((((((((((((((((((ProcBool0.wantSection_0>=1)&&(ProcTourProc0.testAlone_0>=1))||((ProcBool0.wantSection_0>=1)&&(ProcTourProc12.testAlone_12>=1)))||((ProcBool0.wantSection_0>=1)&&(ProcTourProc24.testAlone_24>=1)))||((ProcBool0.wantSection_0>=1)&&(ProcTourProc36.testAlone_36>=1)))||((ProcBool2.wantSection_2>=1)&&(ProcTourProc1.testAlone_1>=1)))||((ProcBool2.wantSection_2>=1)&&(ProcTourProc13.testAlone_13>=1)))||((ProcBool2.wantSection_2>=1)&&(ProcTourProc25.testAlone_25>=1)))||((ProcBool2.wantSection_2>=1)&&(ProcTourProc37.testAlone_37>=1)))||((ProcBool4.wantSection_4>=1)&&(ProcTourProc2.testAlone_2>=1)))||((ProcBool4.wantSection_4>=1)&&(ProcTourProc14.testAlone_14>=1)))||((ProcBool4.wantSection_4>=1)&&(ProcTourProc26.testAlone_26>=1)))||((ProcBool4.wantSection_4>=1)&&(ProcTourProc38.testAlone_38>=1)))||((ProcBool6.wantSection_6>=1)&&(ProcTourProc3.testAlone_3>=1)))||((ProcBool6.wantSection_6>=1)&&(ProcTourProc15.testAlone_15>=1)))||((ProcBool6.wantSection_6>=1)&&(ProcTourProc27.testAlone_27>=1)))||((ProcBool6.wantSection_6>=1)&&(ProcTourProc39.testAlone_39>=1)))||((ProcBool0.wantSection_0>=1)&&(ProcTourProc4.testAlone_4>=1)))||((ProcBool0.wantSection_0>=1)&&(ProcTourProc16.testAlone_16>=1)))||((ProcBool0.wantSection_0>=1)&&(ProcTourProc28.testAlone_28>=1)))||((ProcBool0.wantSection_0>=1)&&(ProcTourProc40.testAlone_40>=1)))||((ProcBool2.wantSection_2>=1)&&(ProcTourProc5.testAlone_5>=1)))||((ProcBool2.wantSection_2>=1)&&(ProcTourProc17.testAlone_17>=1)))||((ProcBool2.wantSection_2>=1)&&(ProcTourProc29.testAlone_29>=1)))||((ProcBool2.wantSection_2>=1)&&(ProcTourProc41.testAlone_41>=1)))||((ProcBool4.wantSection_4>=1)&&(ProcTourProc6.testAlone_6>=1)))||((ProcBool4.wantSection_4>=1)&&(ProcTourProc18.testAlone_18>=1)))||((ProcBool4.wantSection_4>=1)&&(ProcTourProc30.testAlone_30>=1)))||((ProcBool4.wantSection_4>=1)&&(ProcTourProc42.testAlone_42>=1)))||((ProcBool6.wantSection_6>=1)&&(ProcTourProc7.testAlone_7>=1)))||((ProcBool6.wantSection_6>=1)&&(ProcTourProc19.testAlone_19>=1)))||((ProcBool6.wantSection_6>=1)&&(ProcTourProc31.testAlone_31>=1)))||((ProcBool6.wantSection_6>=1)&&(ProcTourProc43.testAlone_43>=1)))||((ProcBool0.wantSection_0>=1)&&(ProcTourProc8.testAlone_8>=1)))||((ProcBool0.wantSection_0>=1)&&(ProcTourProc20.testAlone_20>=1)))||((ProcBool0.wantSection_0>=1)&&(ProcTourProc32.testAlone_32>=1)))||((ProcBool0.wantSection_0>=1)&&(ProcTourProc44.testAlone_44>=1)))||((ProcBool2.wantSection_2>=1)&&(ProcTourProc9.testAlone_9>=1)))||((ProcBool2.wantSection_2>=1)&&(ProcTourProc21.testAlone_21>=1)))||((ProcBool2.wantSection_2>=1)&&(ProcTourProc33.testAlone_33>=1)))||((ProcBool2.wantSection_2>=1)&&(ProcTourProc45.testAlone_45>=1)))||((ProcBool4.wantSection_4>=1)&&(ProcTourProc10.testAlone_10>=1)))||((ProcBool4.wantSection_4>=1)&&(ProcTourProc22.testAlone_22>=1)))||((ProcBool4.wantSection_4>=1)&&(ProcTourProc34.testAlone_34>=1)))||((ProcBool4.wantSection_4>=1)&&(ProcTourProc46.testAlone_46>=1)))||((ProcBool6.wantSection_6>=1)&&(ProcTourProc11.testAlone_11>=1)))||((ProcBool6.wantSection_6>=1)&&(ProcTourProc23.testAlone_23>=1)))||((ProcBool6.wantSection_6>=1)&&(ProcTourProc35.testAlone_35>=1)))||((ProcBool6.wantSection_6>=1)&&(ProcTourProc47.testAlone_47>=1)))")))))))
Formula 6 simplified : !FXG"(((((((((((((((((((((((((((((((((((((((((((((((((ProcBool0.wantSection_0>=1)&&(ProcTourProc0.testAlone_0>=1))||((ProcBool0.wantSection_0>=1)&&(ProcTourProc12.testAlone_12>=1)))||((ProcBool0.wantSection_0>=1)&&(ProcTourProc24.testAlone_24>=1)))||((ProcBool0.wantSection_0>=1)&&(ProcTourProc36.testAlone_36>=1)))||((ProcBool2.wantSection_2>=1)&&(ProcTourProc1.testAlone_1>=1)))||((ProcBool2.wantSection_2>=1)&&(ProcTourProc13.testAlone_13>=1)))||((ProcBool2.wantSection_2>=1)&&(ProcTourProc25.testAlone_25>=1)))||((ProcBool2.wantSection_2>=1)&&(ProcTourProc37.testAlone_37>=1)))||((ProcBool4.wantSection_4>=1)&&(ProcTourProc2.testAlone_2>=1)))||((ProcBool4.wantSection_4>=1)&&(ProcTourProc14.testAlone_14>=1)))||((ProcBool4.wantSection_4>=1)&&(ProcTourProc26.testAlone_26>=1)))||((ProcBool4.wantSection_4>=1)&&(ProcTourProc38.testAlone_38>=1)))||((ProcBool6.wantSection_6>=1)&&(ProcTourProc3.testAlone_3>=1)))||((ProcBool6.wantSection_6>=1)&&(ProcTourProc15.testAlone_15>=1)))||((ProcBool6.wantSection_6>=1)&&(ProcTourProc27.testAlone_27>=1)))||((ProcBool6.wantSection_6>=1)&&(ProcTourProc39.testAlone_39>=1)))||((ProcBool0.wantSection_0>=1)&&(ProcTourProc4.testAlone_4>=1)))||((ProcBool0.wantSection_0>=1)&&(ProcTourProc16.testAlone_16>=1)))||((ProcBool0.wantSection_0>=1)&&(ProcTourProc28.testAlone_28>=1)))||((ProcBool0.wantSection_0>=1)&&(ProcTourProc40.testAlone_40>=1)))||((ProcBool2.wantSection_2>=1)&&(ProcTourProc5.testAlone_5>=1)))||((ProcBool2.wantSection_2>=1)&&(ProcTourProc17.testAlone_17>=1)))||((ProcBool2.wantSection_2>=1)&&(ProcTourProc29.testAlone_29>=1)))||((ProcBool2.wantSection_2>=1)&&(ProcTourProc41.testAlone_41>=1)))||((ProcBool4.wantSection_4>=1)&&(ProcTourProc6.testAlone_6>=1)))||((ProcBool4.wantSection_4>=1)&&(ProcTourProc18.testAlone_18>=1)))||((ProcBool4.wantSection_4>=1)&&(ProcTourProc30.testAlone_30>=1)))||((ProcBool4.wantSection_4>=1)&&(ProcTourProc42.testAlone_42>=1)))||((ProcBool6.wantSection_6>=1)&&(ProcTourProc7.testAlone_7>=1)))||((ProcBool6.wantSection_6>=1)&&(ProcTourProc19.testAlone_19>=1)))||((ProcBool6.wantSection_6>=1)&&(ProcTourProc31.testAlone_31>=1)))||((ProcBool6.wantSection_6>=1)&&(ProcTourProc43.testAlone_43>=1)))||((ProcBool0.wantSection_0>=1)&&(ProcTourProc8.testAlone_8>=1)))||((ProcBool0.wantSection_0>=1)&&(ProcTourProc20.testAlone_20>=1)))||((ProcBool0.wantSection_0>=1)&&(ProcTourProc32.testAlone_32>=1)))||((ProcBool0.wantSection_0>=1)&&(ProcTourProc44.testAlone_44>=1)))||((ProcBool2.wantSection_2>=1)&&(ProcTourProc9.testAlone_9>=1)))||((ProcBool2.wantSection_2>=1)&&(ProcTourProc21.testAlone_21>=1)))||((ProcBool2.wantSection_2>=1)&&(ProcTourProc33.testAlone_33>=1)))||((ProcBool2.wantSection_2>=1)&&(ProcTourProc45.testAlone_45>=1)))||((ProcBool4.wantSection_4>=1)&&(ProcTourProc10.testAlone_10>=1)))||((ProcBool4.wantSection_4>=1)&&(ProcTourProc22.testAlone_22>=1)))||((ProcBool4.wantSection_4>=1)&&(ProcTourProc34.testAlone_34>=1)))||((ProcBool4.wantSection_4>=1)&&(ProcTourProc46.testAlone_46>=1)))||((ProcBool6.wantSection_6>=1)&&(ProcTourProc11.testAlone_11>=1)))||((ProcBool6.wantSection_6>=1)&&(ProcTourProc23.testAlone_23>=1)))||((ProcBool6.wantSection_6>=1)&&(ProcTourProc35.testAlone_35>=1)))||((ProcBool6.wantSection_6>=1)&&(ProcTourProc47.testAlone_47>=1)))"
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O3, model.c], workingDir=/home/mcc/execution]
Compilation finished in 5069 ms.
Running link step : CommandLine [args=[gcc, -shared, -o, gal.so, model.o], workingDir=/home/mcc/execution]
Link finished in 68 ms.
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, <>(<>(<>(X([]((LTLAP8==true)))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 40 ms.
FORMULA Peterson-COL-3-LTLFireability-06 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, [](X((<>((LTLAP9==true)))U([]((LTLAP10==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 25 ms.
FORMULA Peterson-COL-3-LTLFireability-07 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, ((X((LTLAP11==true)))U([]((LTLAP6==true))))U(X(<>(X((LTLAP10==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 24 ms.
FORMULA Peterson-COL-3-LTLFireability-08 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, (LTLAP7==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 192 ms.
FORMULA Peterson-COL-3-LTLFireability-09 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, <>(X(<>([](X((LTLAP1==true)))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 22 ms.
FORMULA Peterson-COL-3-LTLFireability-10 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, [](<>(((LTLAP0==true))U(<>((LTLAP0==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 273 ms.
FORMULA Peterson-COL-3-LTLFireability-11 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, X([](((LTLAP7==true))U(X((LTLAP5==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 55 ms.
FORMULA Peterson-COL-3-LTLFireability-12 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, (LTLAP12==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 239 ms.
FORMULA Peterson-COL-3-LTLFireability-13 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, -p, --pins-guards, --when, --ltl, (LTLAP6==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 200 ms.
FORMULA Peterson-COL-3-LTLFireability-14 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=1, --when, --ltl, []([](X(<>(<>((LTLAP7==true)))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 23 ms.
FORMULA Peterson-COL-3-LTLFireability-15 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
ITS tools runner thread asked to quit. Dying gracefully.

BK_STOP 1527489102221

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution LTLFireability -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -consoleLog -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination LTLFireability -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
May 28, 2018 6:30:48 AM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, LTLFireability, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -smt]
May 28, 2018 6:30:48 AM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
May 28, 2018 6:30:48 AM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Detected file is not PT type :http://www.pnml.org/version-2009/grammar/symmetricnet
May 28, 2018 6:30:49 AM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Load time of PNML (colored model parsed with PNMLFW) : 806 ms
May 28, 2018 6:30:49 AM fr.lip6.move.gal.pnml.togal.HLGALTransformer handlePage
INFO: Transformed 11 places.
May 28, 2018 6:30:49 AM fr.lip6.move.gal.pnml.togal.HLGALTransformer handlePage
INFO: Computed order using colors.
May 28, 2018 6:30:49 AM fr.lip6.move.gal.pnml.togal.HLGALTransformer handlePage
INFO: sort/places :ProcTourProc->beginLoop,testIdentity,testAlone,isEndLoop,
ProcBool->wantSection,
ProcTour->askForSection,testTurn,endTurn,
TourProc->turn,
Process->idle,CS,

May 28, 2018 6:30:49 AM fr.lip6.move.gal.pnml.togal.HLGALTransformer handlePage
INFO: Transformed 14 transitions.
May 28, 2018 6:30:49 AM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Computed order based on color domains.
May 28, 2018 6:30:49 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.img.gal : 6 ms
May 28, 2018 6:30:49 AM fr.lip6.move.gal.application.MccTranslator applyOrder
INFO: Applying decomposition
May 28, 2018 6:30:49 AM fr.lip6.move.gal.instantiate.CompositeBuilder decomposeWithOrder
INFO: Decomposing Gal with order
May 28, 2018 6:30:49 AM fr.lip6.move.gal.instantiate.Instantiator instantiateParameters
INFO: On-the-fly reduction of False transitions avoided exploring 40.0 instantiations of transitions. Total transitions/syncs built is 360
May 28, 2018 6:30:49 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 78 ms
May 28, 2018 6:30:50 AM fr.lip6.move.gal.instantiate.CompositeBuilder rewriteArraysToAllowPartition
INFO: Rewriting arrays idle, wantSection, askForSection, turn, testTurn, beginLoop, endTurn, CS, testIdentity, testAlone, isEndLoop to variables to allow decomposition.
May 28, 2018 6:30:50 AM fr.lip6.move.gal.instantiate.Instantiator fuseIsomorphicEffects
INFO: Removed a total of 280 redundant transitions.
May 28, 2018 6:30:50 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/LTLFireability.pnml.gal : 14 ms
May 28, 2018 6:30:50 AM fr.lip6.move.serialization.SerializationUtil serializePropertiesForITSLTLTools
INFO: Time to serialize properties into /home/mcc/execution/LTLFireability.ltl : 7 ms
May 28, 2018 6:30:50 AM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was not deterministic with 352 transitions. Expanding to a total of 360 deterministic transitions.
May 28, 2018 6:30:50 AM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Determinization took 5 ms.
May 28, 2018 6:30:51 AM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 15 place invariants in 78 ms
May 28, 2018 6:30:51 AM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 256 variables to be positive in 718 ms
May 28, 2018 6:30:51 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may disable matrix : 356 transitions.
May 28, 2018 6:30:51 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of disable matrix completed :0/356 took 0 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 28, 2018 6:30:51 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete disable matrix. took 26 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 28, 2018 6:30:51 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may enable matrix : 356 transitions.
May 28, 2018 6:30:51 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete enable matrix. took 19 ms. Total solver calls (SAT/UNSAT): 0(0/0)
May 28, 2018 6:30:57 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeCoEnablingMatrix
INFO: Computing symmetric co enabling matrix : 356 transitions.
May 28, 2018 6:30:57 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(0/356) took 65 ms. Total solver calls (SAT/UNSAT): 106(9/97)
May 28, 2018 6:31:00 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(14/356) took 3144 ms. Total solver calls (SAT/UNSAT): 1590(87/1503)
May 28, 2018 6:31:03 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(30/356) took 6209 ms. Total solver calls (SAT/UNSAT): 3202(159/3043)
May 28, 2018 6:31:06 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(53/356) took 9255 ms. Total solver calls (SAT/UNSAT): 5373(258/5115)
May 28, 2018 6:31:09 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(86/356) took 12334 ms. Total solver calls (SAT/UNSAT): 7923(312/7611)
May 28, 2018 6:31:13 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(116/356) took 15973 ms. Total solver calls (SAT/UNSAT): 9903(360/9543)
May 28, 2018 6:31:16 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(157/356) took 19004 ms. Total solver calls (SAT/UNSAT): 12169(413/11756)
May 28, 2018 6:31:19 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(163/356) took 22012 ms. Total solver calls (SAT/UNSAT): 12502(462/12040)
May 28, 2018 6:31:22 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(173/356) took 25251 ms. Total solver calls (SAT/UNSAT): 13023(531/12492)
May 28, 2018 6:31:25 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(190/356) took 28303 ms. Total solver calls (SAT/UNSAT): 13807(603/13204)
May 28, 2018 6:31:28 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(209/356) took 31697 ms. Total solver calls (SAT/UNSAT): 14625(684/13941)
May 28, 2018 6:31:31 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(227/356) took 34815 ms. Total solver calls (SAT/UNSAT): 15330(753/14577)
May 28, 2018 6:31:34 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(323/356) took 37825 ms. Total solver calls (SAT/UNSAT): 17052(786/16266)
May 28, 2018 6:31:35 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Finished co-enabling matrix. took 38363 ms. Total solver calls (SAT/UNSAT): 17356(786/16570)
May 28, 2018 6:31:35 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeDoNotAccord
INFO: Computing Do-Not-Accords matrix : 356 transitions.
May 28, 2018 6:31:35 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed DNA matrix. took 94 ms. Total solver calls (SAT/UNSAT): 36(0/36)
May 28, 2018 6:31:35 AM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 44853ms conformant to PINS in folder :/home/mcc/execution

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="Peterson-COL-3"
export BK_EXAMINATION="LTLFireability"
export BK_TOOL="itstools"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

tar xzf /home/mcc/BenchKit/INPUTS/Peterson-COL-3.tgz
mv Peterson-COL-3 execution
cd execution
pwd
ls -lh

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3637"
echo " Executing tool itstools"
echo " Input is Peterson-COL-3, examination is LTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r260-csrt-152732585400150"
echo "====================================================================="
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' LTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;